Citation
Multicore Microwave Wireless Communication System

Material Information

Title:
Multicore Microwave Wireless Communication System
Creator:
Mojjada, Krishna C
Publisher:
University of Florida
Publication Date:
Language:
English

Thesis/Dissertation Information

Degree:
Doctorate ( Ph.D.)
Degree Grantor:
University of Florida
Degree Disciplines:
Electrical and Computer Engineering
Committee Chair:
EISENSTADT,WILLIAM R
Committee Co-Chair:
LIN,JENSHAN
Committee Members:
MAGHARI,NIMA
WIENS,GLORIA JEAN
Graduation Date:
5/3/2014

Subjects

Subjects / Keywords:
Antennas ( jstor )
Communication systems ( jstor )
Inductors ( jstor )
Integrated circuits ( jstor )
Modulated signal processing ( jstor )
Modulators ( jstor )
Receivers ( jstor )
Signals ( jstor )
Transistors ( jstor )
Transmitters ( jstor )
antenna
multicore
receiver
transmitter
Genre:
Unknown ( sobekcm )

Notes

General Note:
A multicore processing system consists of two or more processing cores working together to enable the output of a certain action or computation requested by the user through the operating system. Instead of increasing the clock frequency of a single core, having multiple cores work to process a single job solves the heat management problem and is more practical. However this increase in the number of cores comes at the cost of routing complexity and latency. Wireless interconnect in conjunction with physical interconnect, offers solutions to these challenges. Hence, the need for a wireless system which is power efficient and can carry out the function of interconnecting two nodes effectively has never been more. In this work, an effort is made to develop a transceiver which consumes very low power and handles data transfer effectively even in a high noise environment. The frequency of operation of the proposed system was chosen to be 60 GHz, since it is an unlicensed band offering a large bandwidth (59 to 64 GHz) which enables high data rates. However, implementing a RF design reliably on silicon at 60 GHz requires a technology node of at least 65nm and it is very expensive. So the designed system at 60 GHz is simulated for verification but not implemented on a chip. The frequency is scaled down by a factor of 4 and the designs are implemented on 130nm CMOS technology at 15 GHz (Ku band) which is much more affordable. To solve the common-mode interference issues and promote channel selectivity, this work proposes new antenna configurations which employ differential scheme and polarization principle of antennas. Multicore processors in the future may be stacked in 3D integrated circuits. In this work an in-depth study of how to measure a 3DIC with embedded structures is carried out. For the purpose of illustration, an inductor embedded in Tier-2 of a 3DIC is characterized for its behavior up to 5 GHz. This study provides insight into the data extraction for passive structures 3DIC environment in which a multicore chip can be implemented.

Record Information

Source Institution:
University of Florida
Holding Location:
University of Florida
Rights Management:
Copyright Mojjada, Krishna C. Permission granted to the University of Florida to digitize, archive and distribute this item for non-profit research and educational purposes. Any reuse of this item in excess of fair use or other copyright exemptions requires permission of the copyright holder.
Embargo Date:
5/31/2016

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MULTICOREMICROWAVEWIRELESSCOMMUNICATIONSYSTEMByKRISHNACHAITANYAMOJJADAADISSERTATIONPRESENTEDTOTHEGRADUATESCHOOLOFTHEUNIVERSITYOFFLORIDAINPARTIALFULFILLMENTOFTHEREQUIREMENTSFORTHEDEGREEOFDOCTOROFPHILOSOPHYUNIVERSITYOFFLORIDA2014

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c2014KrishnaChaitanyaMojjada 2

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Tomyparents,RathnamalaandMukundaRaoMojjada 3

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ACKNOWLEDGMENTS IwouldliketothankGodAlmightyforgivingmethestrengthandperseverancetoaccomplishthisdissertationsuccessfully.Thisworkwouldnothavebeenpossibleifitweren'tforthecollectiveandcontinuedsupportIhavereceivedduringmyperiodofstudyfromseveralpeopleandIwouldliketoconveymyearnestthankstoallofthem.Ifthereisonepersonwhoseimpactonmyprofessionallifeisprofoundandundeniable,itwouldbemyadviserProf.WilliamEisenstadt.Iwishtoexpressmygratitudetohimforgivingmeanopportunitytopursuemygraduatestudiesunderhisableguidance.Histeachingshavecontributedimmenselynotonlytomyacademicknowledgebutalsotomypersonalgrowth.HehasledbyexampleandIhavegreatlycherishedeverymomentworkingwithhim.Mythanksgotomydoctoralsupervisorycommitteeforguidingmewithvaluablesuggestionsatcrucialtimesandteachingthought-provokingcourses.Iwouldliketothankallmyteachersthroughoutmypupilageforinspiringmetopursuehighereducation.MyearnestthankstoNSFforfundingmyresearch.IwouldalsoliketoexpressmysincerethankstoDr.JenshanLin,Dr.R.BashirullahandMr.NeilEllenbackofRohdeandSchwarzforprovidingthenecessaryequipmentformyexperiments.TheadviceandencouragementprovidedbyDr.KathleenMeldeofUniversityofArizonahasbeeninvaluableandforthatIamverythankful.Iamalsothankfultomycurrentandpreviouscolleagues/friendsSaidRami,HyunhoBaek,ByulHur,Ming-CheLee,WakoTuni,MoisheGroger,AdamKinseyandDooyoungKim.Workingwiththemhasbeenanabsolutepleasureandincrediblystimulating.IwouldalsoliketoextendmythankstoWalkerTurnerandDanielKotovskyfortheirprofessionalandpersonalfriendship.SpecialthankstoCharles'Chuck'Potter,JasonKawaja,ShannonChillingworth,MichaelStapletonandmanyotherdepartmentstaffwhohavecontributedtomyresearchdirectlyandindirectly. 4

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ThisdissertationwouldnothavebeenpossiblewithoutthecontributionsandhelpofallmyteachersandcolleaguesatUniversityofFloridatowhomIamhighlyindebted.ThetimeIhavespentworkingonthesubjectIlovewiththepeoplewhocaredaboutmeandmyresearchhasbeenincrediblyenrichingandforthatIamthankful.IwouldliketothankmyparentsRathnamalaMojjadaandMukundaRaoMojjadaforbelievinginme,forinvestinginmeandforbeingthereeverystepoftheway.IwouldliketoacknowledgethecontributionsofmybrotherDr.JyotiKalyanaChakravarthyMojjada,mysister-in-lawIndiraMojjadaandmywholefamilyfortheirinvaluableandunconditionalsupportthroughoutthisjourneyofmydoctoraldegree.Iwouldliketothankthemfortakingovermypersonalresponsibilitiestothefamilyduringtheseveyears.FinallyIwouldliketothankallmyfriendsformakingmygraduatestudentlifeanamazingadventure. 5

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TABLEOFCONTENTS page ACKNOWLEDGMENTS .................................. 4 LISTOFTABLES ...................................... 8 LISTOFFIGURES ..................................... 9 ABSTRACT ......................................... 12 CHAPTER 1INTRODUCTION ................................... 14 1.1Challenges ................................... 15 1.1.1Latency ................................. 15 1.1.2Power .................................. 16 1.2Parallelism ................................... 16 1.3ExistingTechnology .............................. 17 1.3.1Raw ................................... 17 1.3.2TRIPS .................................. 18 1.3.3TILE64/TILE-Gx8072Processor ................... 19 1.3.4TeraopsResearchProcessor ..................... 21 1.4ProposedSystemLayout ........................... 22 1.5SystemDesign ................................. 23 1.5.1FrequencyPlanning .......................... 25 1.5.2ModulationScheme .......................... 25 1.6OrganizationoftheDissertation ........................ 27 2CHARACTERIZATIONOFEMBEDDEDRFELEMENTSONA3DINTEGRATEDCIRCUIT ....................................... 28 2.1ThreeDimensionalIntegratedCircuit ..................... 30 2.2ExperimentalProcedure ............................ 32 2.3Results ..................................... 34 2.4Conclusion ................................... 40 3POLARIZATIONDIFFERENTIALANTENNAFORLOSCOMMUNICATIONSINAMULTI-ANTENNASYSTEM ......................... 41 3.1Overview .................................... 41 3.2SystemDesign ................................. 43 3.2.1SingleEndedvsDifferential ...................... 43 3.2.2Description ............................... 44 3.2.3CandidateAntennafortheExperiment ................ 49 3.2.4SystemImplementation ........................ 50 3.3ExperimentalSetup .............................. 52 6

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3.4Results ..................................... 52 3.5Conclusion ................................... 57 4ALOWPOWERRECEIVERFRONT-END ..................... 59 4.1System ..................................... 60 4.1.1Architecture ............................... 60 4.1.2ModulationScheme .......................... 61 4.2Circuits ..................................... 61 4.2.1LNA ................................... 62 4.2.2Detector ................................. 63 4.3Results ..................................... 67 4.3.1Rx:System15 .............................. 67 4.3.2Rx:System60 .............................. 70 4.4Summary .................................... 76 5ALOWPOWERTRANSMITTERFRONT-END .................. 77 5.1System ..................................... 78 5.2Circuits ..................................... 79 5.2.1OOKModulator ............................. 79 5.2.2VoltageControlledOscillator ...................... 81 5.3Results ..................................... 84 5.3.1Tx:System60 .............................. 84 5.3.2Tx:System15 .............................. 85 5.4Summary .................................... 92 6CONCLUSIONANDFUTUREWORK ....................... 93 6.1Conclusion ................................... 93 6.2SuggestedFutureWork ............................ 94 6.2.1ImplementationofSystem60 ..................... 94 6.2.2Sub-THzandTHznetworks ...................... 95 6.2.3ArchitecturalInnovation ........................ 95 REFERENCES ....................................... 96 BIOGRAPHICALSKETCH ................................ 102 7

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LISTOFTABLES Table page 3-1ComparisonofSingleEndedsystemtoaDifferentialSystemat4cm/16cm. .. 56 3-2ComparisonofSimulatedDifferentialSystematvariousangularoffsetsatdifferenttransmissionlengths ................................. 57 4-1LNAperformancemetrics .............................. 75 4-2OOKDemodulatorperformancemetrics ...................... 75 5-1VCOperformacemetrics .............................. 88 5-2OOKModulatorperformacemetrics ........................ 90 8

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LISTOFFIGURES Figure page 1-1TheRawMicroprocessor .............................. 19 1-2TRIPSMicroprocessor ................................ 20 1-3TeraopsProcessor ................................. 21 1-4MulticoreLayout ................................... 22 1-5InterconnectComparison .............................. 24 1-6OOKTransient .................................... 26 2-1ChipMicrograph ................................... 29 2-23DICStructure .................................... 30 2-3TSVArray&Bondpads ............................... 31 2-4TestModel ...................................... 33 2-5SeriesImpedance .................................. 34 2-6DUTinHFSS ..................................... 35 2-7s11Comparison .................................... 37 2-8s21Comparison .................................... 38 2-9ADSSetup ...................................... 39 3-1SingleendedandDifferentialinterconnect) .................... 42 3-2SingleendedandDifferentialSystem ....................... 43 3-3SetupScheme .................................... 45 3-4SignalVectorDiagram ................................ 48 3-5Antennasystemsetup ................................ 51 3-6ExperimentalSetup ................................. 53 3-7RadiationPattern ................................... 54 3-8S21Comparison ................................... 55 3-9S21atvariousoffsets ................................. 55 3-10S21SingleEnded ................................... 56 9

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4-1ReceiverBlockDiagram ............................... 60 4-2LNARx:System15 .................................. 63 4-3LNARx:System60 .................................. 64 4-4Detector ........................................ 66 4-5Detector ........................................ 66 4-6ChipMicrograph ................................... 67 4-7LNAs11 ........................................ 68 4-8DetectorTestSetup ................................. 69 4-9Inputtothedetector ................................. 69 4-10Outputofthedetectorat3GHzcarrier ....................... 70 4-11Outputofthedetectorat5GHzcarrier ....................... 71 4-12Outputofthedetectorwithpulseinput ....................... 71 4-13s11&s22oftheLNA ................................. 72 4-14GainoftheLNA ................................... 72 4-15NoiseFigureoftheLNA ............................... 73 4-16GpvsPin ....................................... 73 4-17s11oftheDetector .................................. 74 4-18OutputVoltagevsInputpower ........................... 74 4-19Outputtransientresponse .............................. 75 5-1TransmitterBlockDiagram .............................. 78 5-2Tx:System60OOKModulatorDiagram ...................... 80 5-3Tx:System15OOKModulatorDiagram ...................... 81 5-4VCOTx:System60 .................................. 83 5-5VCOTx:System15 .................................. 83 5-6OOKModulatedSignal ............................... 84 5-7OOKModulatorInputandOutputReturnLossofTx:System60 ......... 85 5-8OOKModulatorGainforTx:System60 ....................... 85 10

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5-9VCOoutputspectrumforTx:System60 ...................... 86 5-10VCOPhaseNoiseforTx:System60 ........................ 86 5-11VCOTuningRangeforTx:System60 ....................... 87 5-12Tx:System15ChipMicrograph ........................... 87 5-13Tx:System15VCOOutputSpectrum ....................... 88 5-14Tx:System15VCOTuningRange ......................... 88 5-15Tx:System15VCOTransientOutputSignal .................... 89 5-16Tx:System15VCOPhaseNoise .......................... 89 5-17OOKModulatorOutput ............................... 90 5-18OOKTransientAnalysisat2Gbps ......................... 91 5-19OOKTransientAnalysisat500Mbps ........................ 91 11

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AbstractofDissertationPresentedtotheGraduateSchooloftheUniversityofFloridainPartialFulllmentoftheRequirementsfortheDegreeofDoctorofPhilosophyMULTICOREMICROWAVEWIRELESSCOMMUNICATIONSYSTEMByKrishnaChaitanyaMojjadaMay2014Chair:WilliamR.EisenstadtMajor:ElectricalandComputerEngineeringAmulticoreprocessingsystemconsistsoftwoormoreprocessingcoresworkingtogethertoenabletheoutputofacertainactionorcomputationrequestedbytheuserthroughtheoperatingsystem.Insteadofincreasingtheclockfrequencyofasinglecore,havingmultiplecoresworktoprocessasinglejobsolvestheheatmanagementproblemandismorepractical.Howeverthisincreaseinthenumberofcorescomesatthecostofroutingcomplexityandlatency.Wirelessinterconnectinconjunctionwithphysicalinterconnect,offerssolutionstothesechallenges.Hence,theneedforawirelesssystemwhichispowerefcientandcancarryoutthefunctionofinterconnectingtwonodeseffectivelyhasneverbeenmore.Inthiswork,aneffortismadetodevelopatransceiverwhichconsumesverylowpowerandhandlesdatatransfereffectivelyeveninahighnoiseenvironment.Thefrequencyofoperationoftheproposedsystemwaschosentobe60GHz,sinceitisanunlicensedbandofferingalargebandwidth(59to64GHz)whichenableshighdatarates.However,implementingaRFdesignreliablyonsiliconat60GHzrequiresatechnologynodeofatleast65nmanditisveryexpensive.Sothedesignedsystemat60GHzissimulatedforvericationbutnotimplementedonachip.Thefrequencyisscaleddownbyafactorof4andthedesignsareimplementedon130nmCMOStechnologyat15GHz(Kuband)whichismuchmoreaffordable. 12

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Tosolvethecommon-modeinterferenceissuesandpromotechannelselectivity,thisworkproposesnewantennacongurationswhichemploydifferentialschemeandpolarizationprincipleofantennas.Multicoreprocessorsinthefuturemaybestackedin3Dintegratedcircuits.Inthisworkanin-depthstudyofhowtomeasurea3DICwithembeddedstructuresiscarriedout.Forthepurposeofillustration,aninductorembeddedinTier-2ofa3DICischaracterizedforitsbehaviourupto5GHz.Thisstudyprovidesinsightintothedataextractionforpassivestructures3DICenvironmentinwhichamulticorechipcanbeimplemented. 13

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CHAPTER1INTRODUCTIONAmulticoreprocessingsystemconsistsoftwoormoreprocessingcoresworkingtogethertoenabletheoutputofacertainactionorcomputationrequestedbytheuserthroughtheoperatingsystem.Providedthattheoperatingsystemcanfeedanoperationintomultipleparallelthreads,afuturemulticorearchitectureconsistingof100coresormorewillprovideunprecedentedenhancementincomputationalperformance.Tomakemultiplecoresworktogetherandmakemostofthiscomputationaladvantage,aneffectivewayofinter-communicationbetweenthecoreswiththeleastlatencyhastobeachieved.Physicaltransmissionlinesareemployedtodayforinter-corecommunications.Asthenumberofprocessingcoresincrease,theroutingalgorithmbecomesmorecomplexandcandemandalargerboardspaceorchip-areainordertoaccommodatethephysicalroutingchannels.Thisiscounterproductiveinportablecomputingmarketwherethedriveistowardsthinnersmallerandlowerpowerdevices.Thestate-of-the-artinterconnectionnetworkbetweenamultiplecoreprocessorisimplementedusinga2Dmeshnetworkwitha5portrouteroneachcore[ 1 ][ 2 ].Ahybridsysteminwhichinter-corecommunicationsareachievedbyusingwirelessinterconnectionnetworkinconjunctionwithphysicalinterconnectionnetwork,offerssolutionstomostofaforementionedchallenges.However,thecircuitryaddedtoachievethismayconsumeadditionalpowercomparedtothepowerdissipatedbywiredlines.Thispowerloadsthebatteryandresultsinafasterdischargetime.Hence,theneedforawirelesssystemwhichispowerefcientandcancarryoutthefunctionofinterconnectingtwonodeseffectivelyhasneverbeenmorepresent.Atypicalpointtopointwirelesslinkconsistsofatransmitter,areceiverandacommunicationmedium(air).Eachcommunicationnodeisequippedwithatransmitterandareceivertotransmitandreceivedatarespectively.Inthiswork,atransmitter 14

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andareceiveraredevelopedseparatelyandsharenocommoncircuitry(hencenotatransceiver).Thesystemisfurtherdescribedinthefollowingchapters.Outofallthetechnologiesthatareavailableinthemarket,e.g.,GaAs,SiGeetc.,CMOSisthechoiceoftheindustrybecauseofitsreliabilityandlowcostofmassproduction.CMOStechnologyhasadvanced;itisnowcommontofabricatetransistorswithfTintheorderofhundredsofGHz.Theseadvancespavedthewayfor60GHzCMOSdesignstobeoperationalonsilicon.The60GHzbandoffersawidebandwidthof7GHzandhighdataratesupto5Gb=sandforshortrangecommunicationsthisfrequencybandoffersaperfectt.Sinceitisunlicensedandfairlynascent,interferenceinthisbandcanbeexpectedtobelow.Typicalapplicationsof60GHzcircuitswillbeforshortrangeapplicationslikewirelessHDvideolinks,highspeedwirelessEthernet,etc.Theapplicationsarelimitedtoshortrangeduetothehighpathlossthisfrequencybandsuffers.Eventhoughthe60GHzfrequencybandistailormadefortherequirementsofthesystem,implementingaRFdesignreliablyonsiliconat60GHzrequiresatechnologynodeofatleast65nmanditisveryexpensive.Sothedesignedsystemat60GHzissimulatedbutnotimplementedonachipforverication.Thefrequencyisscaleddownbyafactorof4andthedesignsareimplementedon130nmCMOStechnologyat15GHz(Kuband)whichismuchmoreaffordable.Thefrequencyischosentobe15GHzbecause,byusingfrequencymultiplicationanddivisiontechniques,certaincomponentsofa60GHzsystemcanbeimplementedusingthecircuitsdesignedat15GHz. 1.1Challenges 1.1.1LatencyAstheclockfrequencyofprocessorsincreases,thewiredelaybecomesmoreandmorerelevantanddevelopeditselfintooneofthemostimportantlimitingfactorsinthedevelopmentofmulticoreprocessors.Inamulticoresystemwith100ormorecores,wheretheeffectiveareaofthesystemonthemotherboardisquiteabitlargerin 15

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comparisontothepresentdaysystems,thislatencybecomesamuchmoresignicantcauseofconcern.Migrationfromaluminumtocopper,usinglow-Kdielectricshavehelpedbuthavenotprovedthemselvestobepermanentsolutionstothelatencyproblem.Severalinterconnectarchitecturesaredevelopedinrecentpasttoreducethelatencybyconstrainingthewirelengthsthesignaliscommunicatedwithinaclockcycle[ 3 ],[ 4 ],[ 5 ].However,forcoreslocatedondistantroutersstillfacetheunavoidablehoppenaltyfortheinformationtransfer.Awirelessinterconnectionnetworkcouldpotentiallysolvethisunavoidablelatencyproblem. 1.1.2PowerThepowerconsumedbytheon-chipcommunicationnetwork(OCN)hasbeenstudiedextensivelyin[ 6 ].ThedependencyofpowerconsumedbytheOCNoncontention,localityofthedata,thedimensionality,typeoftheOCNandthemessageinjectionrateareclearlystated.TheobservationsmadebyKonstantakopoulosetal.,in[ 6 ]arethatoneandtwodimensionalpointtopointnetworkprovides66%and82%energysavingsoverabusfora16ormorecoreprocessor.Fornetworkarchitectsofmulticoreprocessorsforportableplatforms,optimizingenergyconsumedbytheOCNismandatory.ThetopologyofawirelessOCNconsistsofmultipletransmittersandreceiversperrouterandthesedesignsneedtobepoweroptimized.ThisdissertationdiscussespoweroptimizedreceiversandtransmittersinChapters4and5respectively. 1.2ParallelismFormultiplecorestoworktogetherandenhancethecomputationalspeedofagiventask,thetaskshouldbedividedinawaythatenablescollectivework.Forthistasktobedivisible,itneedstohavemodulesthathavenodependenciesoneachother.ThisqualityinapplicationsiscalledParallelism.Itcanoccuratanylevelofthearchitecturebutitmustbepresentforthemulticoreprocessorstobemeaningful.ParallelisminapplicationscanbeclassiedintoData(DLP),Instruction(ILP)andThreadlevelparallelism(TLP).[ 7 ] 16

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Whenmultipleinstructionsfromasinglestreamcanworkwithseveraldatanotlimitedbydependencies,thentheprogramissaidtohavedatalevelparallelism.ItisaspecialcaseofILP.Whenmultipleinstructionscanbeexecutedsimultaneouslyfromthesamestream,thenthespeedupinexecutiontimeisduetoinstructionlevelparallelism(ILP).Dataandcontrolhazardsshouldn'tbepresentinthepipelineforthiskindofparallelismtobeeffective.ExploitationofILPispossiblebybothhardwareandsoftware.Threadlevelparallelismissaidtoexistinaprocesswhenmultiplethreadsorinstructionsequencesofthesameapplicationcanbeexecutedsimultaneously.ThespeedupthatcanbegainedbyparallelismcanbequantiedbyAmdahl'slawgivenbySpeedup=Performanceforentiretaskusingenhancement Performanceforentiretaskwithoutusingenhancement (1) 1.3ExistingTechnologyInthissection,previouseffortstorealizeamulticoreprocessorarelistedandthereasonsbehinddesignchoicesareexplored.Tiledmulticorearchitectures[ 8 ]haveenabledscalabilityofmulticoresystems.Eachtileconsistsofaprocessingcoreandacommunicationsystem(router).EachtileisconnectedtoadjacenttilesandthisnetworkcanbeextendedtwodimensionallytoformaTiledmulticorearchitecture.SeveralexamplesofTiledmulticorearchitecturesarestudiedinthissection. 1.3.1RawTheRawmicroprocessor[ 3 ][ 8 ]developedbyMITisoneoftherstmulticoreprocessorsreportedinliterature.Itusesascalableinstructionsetarchitecture(ISA)toaddressthelatencyoftheinterconnectionwiresandprovidesameansofcontrollingtheunderlyinghardwareresourcesdirectlybysoftwareusingasoftware-managedinstructioncachealongwithexistingarchitecturalabstractions.Itconsistsof16tiles.EachtileasshowninFigure1-1,hasaprocessingcorewithsupportingcomponents 17

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andarouterblock(onestaticandtwodynamicrouters).Theinterconnectbetweenthetilesisanon-chipnetworkof32bitfullduplexbusconsistingofover12,500wires.Eachtileconnectsto4ofitsneighborsandformsa16tiledmulticoreprocessor.Thison-chipinterconnectissoftwaremanipulatable,whichallowsforbettercontrolofthelatencybytheprogrammer.Thisprocessorwasimplementedon0.15technologyandhasaworstcaseclockfrequencyof225MHz.Forfurtherreadingthereadersshouldreferto[ 3 ].25WoftotalpowerisconsumedbytheRawmicroprocessor.Ithastobenotedthatthecomplexityandtheworstcaselatencyoftheon-chipnetworkofthemicroprocessorisdictatedbythenumberoftilesandthelargestlinkfromonecornertotheothercorneroftheprocessor.Anargumentcanbemadethatthelatencyofthewirelessinterconnectforthelongestlinkinthesystemcanbesignicantlyreducedifthelinkisdesignedindependentoftheotherroutersinthepath.Inotherwords,awirelessinterconnectsystemoffersamethodofreducingthehopcount.Thisarchitecturewascertainlyaheadofitstimeandhaspushedopenadoortotheresearchinthisarea. 1.3.2TRIPSTera-ops,IntelligentlyadaptiveProcessingSystemorTRIPSprocessor[ 5 ]isdevelopedbyUniversityofTexas,Austin.ThisprocessorisbasedonTiledmulticorearchitecture.Thedevelopedprototypeconsistsoftwoprocessingcoresandlevel-2cacheasshowninFigure1-2.Theprocessingcores,theL2cacheandthenetworkareimplementedin11differenttypesoftilestotalingto116innumber.Formoreinformationthereadersshouldreferto[ 5 ].Thecommunicationloadissharedbytwonetworks.OperandnetworkorOPNtoconnectthetileswithintheprocessorcoreandOn-chipNetworkorOCNtoconnectingthetwoprocessorcorestoL2cacheandI/Ounits.ThisOCNcanbeextendedtoaccomplishalargermulticoreprocessor.Parallelismisessentialtothisarchitectureforperformanceenhancementlikeanyothermulticorearchitecture.Thetotalnetworkingareaaccumulatesto19%ofthechip.Theprocessorclocksat336MHzandtherouterlatencyofbothOCNandOPNis1clockcycle. 18

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Figure1-1. TheRawMicroprocessorBlockDiagram[ 3 ] Reducinglatencyhasbeentheprimarymetricofthisarchitectureatacostofdiearea.Theworstcaselatencybetweentwofarthestprocessorsinanextendedfabricisdeterminedbythehopcount.TheamountofpowerconsumedbytheOCNandtheOPNisnotclearlystated. 1.3.3TILE64/TILE-Gx8072ProcessorTilera,acompanyfoundbyDr.AnantAgarwalandteamwhichdevelopedRaw,alsodevelopedTILE64.TheagshipprocessorofthiscompanyisTILE-Gx8072.TILE64andTILE-Gx8072arecommerciallyavailable.Themainapplicationsfortheseproductsarenetworking,multimediaandcloudcomputing.TILE-Gx8072consistsof72identicaltilesconnectedusinga2DMeshnetworkcalledTilera'si)]TJ /F3 11.955 Tf 12.74 0 Td[(MeshTM.This2Dmeshnetworkconsistsof5independentnetworkscarryingoutdifferentfunctions.Theyarelistedbelow[ 9 ][ 4 ] 19

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Figure1-2. TRIPSMicroprocessorBlockDiagram[ 5 ] STN:Staticnetwork.Thisnetworkisresponsibleforlow-latencyscalarcommunicationbetweentilesandissoftwareoperated, TDN:TileDynamicNetwork.ThisnetworkasthenamesuggestsisdynamicallyroutedandcarriesoutmemorycommunicationsbetweenthetilesalongwithMDN(MemoryDynamicNetwork). MDN:MemoryDynamicNetwork.Thisnetworkhandlesdatarequestsfromtilestomemoryonacachemiss. UDN&IDN:UserDynamicNetwork&I-ODynamicNetwork.ThesenetworksaresoftwareoperatedandaredynamicallyroutednetworksforuserlevelprogramandI-Ointerfacecommunications.Thisarchitectureistailoredheavilytoreducethelatencyandhenceenhancecomputingspeed.Lengthofawireisstillaprimarydesignmetricandhoppenaltyisunavoidable.Moreinformationaboutthisprocessorcanbefoundat[ 4 ]. 20

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1.3.4TeraopsResearchProcessorTheIntelTeraopsResearchProcessorconsistsofaNetworkon-Chip(NoC)whichimplementsatwo-dimensionalmeshnetworkforits80(8X10)coreprocessoroperatingat5GHz[ 1 ][ 2 ].Eachcoreconsistsofaprocessingengineanda5portrouter.The5portsoftherouterareconnectedtofourneighboringroutersanditsrespectiveprocessingunit.Eachnodeinthismeshnetworkisnotonlyresponsibleforitsownresourcesbutalsoforforwardingthepacketsfromotherrouterstothedesignatedrouter.Thisnetworkaccommodatestwologiclanes(0and1)forinstructionanddatapacketstoseparatethemandreducecongestionofaparticularpacket. Figure1-3. IntelTeraop80coreprocessorwith2DMeshinterconnectionnetwork[ 1 ] Thepoint-to-pointlinksinthisnetworkarecapableofdatatransfersupto20GB/s.Thecriticalpathinthisnetworkisaffectedbywire-delays.Arouterlinkcanextendfrom2mmto26mm[ 2 ].TheMesochronousclockingtechniqueisimplementedinthis 21

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design.Asynchronizationpenaltyisinevitableinthisdesign.Areaandpoweroverheadareaddedduetothesesynchronizersbetweenwhichthereisatrade-off. 1.4ProposedSystemLayoutTheworkin[ 6 ]providesimportantcomparisonsofon-chipcommunicationnetworksusingdirectlinksandbussesinmulticoresystems.Themodelsaccountforelectricalwirelengths,switchingenergyandnetworkcontention(orlatency.)Theresultsshowthatfor16processorsormore,directpointto-pointlinksprovidesupto82%moreenergysavingsoverabus(orphysicalgridofconnectingwires)whenthetrafcmodelassumesthateachprocessorisequallylikelytocommunicatewithanyotherprocessor.However,thecommunicationnetworksusingdirectlinksoccupyrelativelymorechipareacomparedtotheonesusinginterconnectingbus. Figure1-4. Proposedmulticorelayoutwithroutersandprocessengines[ 10 ] Thisworkisbasedonahypotheticalwirelessrouterbasedon-chipinterconnectionnetworkarchitecture.Thisdissertationfocusesondevelopingthekeycomponentsthatwouldaffectthearchitecturebutnotondevelopinganewarchitecture.AsshownintheFigure1-3,thisproposedhypotheticalarchitectureconsistsofarouterpositionedatthecenterofaclusterofcores(8-10)andthisarrangementisextendedtwodimensionally.Theroutercanbeonaprocessingcoreorintroducedasaseparatechip.Iftherouter 22

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isrealizedasaseparatechip,itcanpotentiallybeaclusterofindividualroutersfortheirrespectivecoresconnectedtogether.Acommunicationnodeintherouterdependingonthelinkitisservingcanutilizealowpowermm-wavetransceiverforwirelesscommunicationofinstructionordatapackets.Asetofspecicationsareformedtailoredtotheneedsofamulticoresystem.Thelengthofthecommunicationlinkdetermineswhetheraphysicaltransmissionlineorawirelesslinkservesthepurposeofdata/instructionpassagethroughthenode.AsshownintheFigure1-4,electricalinterconnectionnetworkissuitableforshortlinksbecausetheresistivelosslimitingthebitrateisminimalduetoitsshortlengthandenergyconsumedperbitislowerinphysicalinterconnectionnetwork[ 11 ][ 12 ].Inthiswork,achoiceismadetoimplementshortlinksusingphysicaltransmissionlinesandlongerlinksusingwirelesstransceiverstoreducetheinevitablehoplatencypenalty. 1.5SystemDesignThedissertationproposestwosystems.System60forwithcenterfrequencyof60GHzandSystem15withcenterfrequencyof15GHz.System60issimulatedandtheresultsarepresentedincomparisontothestateofthearthowever,thedesignsofthissystemarenotimplementedonsiliconduetocostconsiderations.System15isdesignedandimplementedon130nmCMOStechnologybySTMicroelectronicsandtheresultsarepresentedincomparisontothestateoftheart.Wirelessnetworksonchipformulticoreprocessorshavebeenproposedby[ 14 ],[ 15 ],[ 16 ].In[ 17 ],Debetal.,surveyedthecurrentpromisesandchallengesandidentiedlatencygainasthemostpromisingaspectandnoisychannelsandpowereffectivetransceiverdevelopmentasthemainchallengesthewirelessnetworksonchiparefacing.TheantennasdevelopedinChapter3offeraneffectivesolutiontothenoisychannelproblemandthecircuitsdevelopedinChapters4and5offersolutiontothelowpowertransceiverproblem.Thesimulatedenergyconsumptionperbitreportedin[ 16 ]is5.6pJ/bitforthetransceiversimulatedon65nmCMOSprocessbyCMP,France 23

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A BFigure1-5. PerformancecomparisonofElectricalinterconnectionnetwork.A)Propagationdelayandpowerconsumptioncomparedversusinterconnectionlength.B)EnergyconsumptioncomparisonofCarbon-nanotubeandOpticalinterconnectionnetworksversusICtechnology[ 11 ][ 13 ]. 24

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andin[ 14 ]itisprojectedthattheenergyconsumedperbitis4.5pJ/biton32nmCMOStechnologyatsubTHzfrequencies.Ithastobenotedthattheseproposedsystemsarenotexperimentallyveried. 1.5.1FrequencyPlanningForSystem60,theoperatingfrequencyofthemmWavePHYisregulatedto57GHz-66GHzinUnitedStates,Canada,EuropeandJapan[ 18 ].Effectsofin-bandandout-of-bandinterferenceisminimalbecausethenumberofdevicesoperatinginthisrangeisverylimited.Hence,constraintsonbandselectionareliftedatthestartofthereceiverdesign.ThefrequencychannelusedbythismmWavePHYis59.40GHzto61.56GHzwithaneffectivechannelwidthof2.16GHzandacenterfrequencyof60.48GHz.Alldesignsinthisworkareoptimizedtothiscenterfrequency.Themaximumindooreffectiveisolatedradiatedpower(EIRP)forthisfrequencybandinUnitedStatesis27dBi[ 18 ].Inthiswork,frequencytranslationisavoidedforthesakeofsimplicityandtoeliminateimageproblems.ForSystem15,theoperatingfrequencyisscaleddownbafactorof4fromSystem60andischosentobe15GHz.ThisfrequencybandisregulatedinKubandwhoseapplicationsaretypicallyinlongrangecommunicationsystemsbutinaclosedsystem,thecarrierfrequencyissafetouseaslongastheFCCregulationsarenotviolated. 1.5.2ModulationSchemeModulationistheprocessofalteringapropertyofthecarrierwavewithrespecttothedatatobetransmitted.Agoodmodulationschemewithahighcarrierfrequencyhelpsinachievinglongerrangeofcommunicationswithlowlossesandhigherintegrationattheboardlevelduetosmallerantennasizes.Modulationcaneitherbedigitaloranalog.Inthiswork,On-OffKeyingaspecialcaseofAmplitudeShiftKeying,adigitalmodulationschemewaschosen.Lowpowerdesignsdemandsimplicityintransceiverstructure.Inthiswork,aneffortismadetokeepthenumberofstagesinthetransceiverarchitecturetoaminimum. 25

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ComparativelycomplexmodulationschemeslikeMSK,QPSKandBPSKetc.,areavailablewithgoodbandwidthefciency,noiseimmunityandlowBERsbuttheyneedcomplexcircuitryforimplementation[ 19 ].On-OffKeyingoffersthebalancebetweenthetwotrade-offs.Implementationbecomessimplerduetotheneedforfewercomponentstorealizethesystemandprovidespowersavingduringthetransmittalofzerostate(referChapters4&5).Hence,On-OffKeyingisthemodulationschemeofchoiceinthiswork.AmplitudeShiftKeyinginvolvesalterationoftheamplitudeofthecarrierwaveinaccordancewiththedatatobetransmitted.AsshownintheFigure1-5,thecarriersignalwithamplitude0.2V,isamplitudeshiftkeyedinaccordancewiththeData.InthisparticularcaseofASK,onevoltagelevelisalwayszero,makingitOn-OffKeyingorOOK. Figure1-6. DepictionofOOKtransientsignal. MinimumBandwidthofASKisequaltoitsbaudrate.ForASKbitrateisequaltobaudrateandhencetheminimumsystembandwidthistargetedtobe1.5GHzsincethebitratetargetedis1.5Gb/s. 26

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1.6OrganizationoftheDissertationThisdissertationisorganizedinsixchapters.Chapter1introducesthedissertationandpresentsthechallengesofamulticoreenvironment.Itdiscussestheexistingresearchcitingcurrentprojectsonmulticoredevelopmentandpointsoutitsshortcomings.Itprovidesinsightintotheproposedinterconnectionnetworkarchitectureandthrowslightonpossiblewaystoaddresstheshortcomingsoftheexistingtechnology.Chapter2presentsathreedimensionalintegratedcircuitenvironmentforpassivecomponentrealization.Aninductorembeddedinsidethetiertwoofthecircuitisde-embeddedandcharacterized.Aconventionalthreestepde-embeddingSOLTtechniqueisemployedandtheresultssimulatedarecomparedwiththatofmeasuredandcalculated.Thediscrepanciesarequantiedintosimulatedxturesandthisresultaidsadesignertopredictthesediscrepanciesaheadoftimeandprovidesufcientmargintoaccountforthem.ApolarizationdifferentialantennaisdescribedinChapter3.Itproposesanewwaytocountertheinterferenceprobleminamulticore,multi-antennaenvironment.Thedifferentialantennasystemisstudiedandkeyresultsarenoted.Chapter4providesthedesigndetailsofalowpowerCMOSreceiver.Itdevelopsspecicationsrequiredforsuchareceiverwhichcanbeemployedinamulticoreenvironment.Itdescribeseverycircuitcomponentandtabulatestheachievedspecications.Chapter5explainstheschematicdesignsofalowpowerCMOStransmitter.Specicationsdevelopedforthetransmitterarepresentedinthischapter.Designdetailsofeverycomponentarepresentedandresultsaretabulated.Chapter6concludesthepresentedworkandsuggeststhefuturedirectionsthatcouldbetakentobuildontheaccomplishmentsofthedissertation. 27

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CHAPTER2CHARACTERIZATIONOFEMBEDDEDRFELEMENTSONA3DINTEGRATEDCIRCUITIncreasingdemandforcheap,compact,lowpowerRFmodulesinconsumerelectronicslikesmart-phonesandGPSnavigationsystemsisdrivingtheintegrationofmoreandmoretransistorsonasinglechip.Conventional2Dintegratedcircuitshavebeenaddressingthischallengebyscalingdownthefeaturesizes.Atthestate-of-the-artfeaturesizes,interconnectbecomesacommunicationbottleneckandleadstheindustrytoexplore3DICswhichoffersolutionstoseveraldesignchallenges.3Dintegratedcircuitsnotonlyincreasethepackingdensitybutalsoresolvetherudimentaryproblemofheterogeneous(logic,analog&RF)circuitsonasinglechip.FabricatingreliableTSVshelpstheindustrytosolvetheinterconnectlengthandthusroutingissues.Aspromisingasitseems,thefabricationandpackagingtechnologyarestillintheprototypephasefor3DICsandsoitisveryimportanttorealizereliableon-chiphighfrequencycircuitcomponents.MoremodelingdefectscanbeexpectedinathreedimensionalICwhencomparedtoatraditionalICbecauseofthenoveltyofthetechnology.Thesedefectscanrangefromprocesserrorstodesignawsduetolackofexperienceindesigninga3DIC.Since3DICsdemanduniquepackagingrequirements,systemdesignposesnewchallengesnecessitatingIC/packageco-design[ 20 ].Becauseofthesenumerouspotentialpointsoffailure,theneedforexactcharacterizationisemphatic.InductorsareextensivelyusedinmicrowavecircuitslikeLNAs,MixersandVCOsetc.Itiscrucialtofabricatethemwithagreatdegreeofaccuracyinordertoextractthedesiredresponseespeciallyinahighfrequency,highQsystembecausetheyarepronetoperformancelimitationsthroughsubstratecoupling,skineffectetc.,[ 21 ].Precisecharacterizationoftheinductorisimportantbecauseincaseslikeoscillatorswhereaccuracyiscritical,parasiticelementsmayhamperthesustenanceoftheoscillationrenderingadesignfailure.Thischapterexploresthefeasibilityoffabricatingareliableinductordeepinsidea3DIC.Inordertocharacterizetheinductorforits 28

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truespecicationsinsidetheICtiers,ithastobede-embedded.De-embeddingtheinductorisimportantina3DICsettingbecauseithelpstocharacterizetheeffectsofthebond-padsandTSVsinthesignalpathandthusfacilitatesthevalidationoftheDUTsperformanceasapartofthe3Dcircuit.ThisinsightisessentialtoforeseeRFdesignconstraintsthatmightleadtofailuresina3DIC. Figure2-1. Micrographofthefabricated3DICdie. Inthischapter,asingleturninductorfabricatedonTier2ofa3DICisde-embeddedusingathreestepde-embeddingtechnique[ 22 ],[ 23 ].Thisprocedureischosenoutofallthosepresentedin[ 23 ]foritsaccuracy,howeveritisproventhatfora3DIC,theaccuracyobtainedisnotnearlyenough.CompactembeddedteststandardsarealsofabricatedonTier-2toperformon-chipSOLT(Short,Open,Load,Thru)calibration.Thedirectde-embeddedmeasurementsaftercalibratingwithon-chipstandardsarecomparedwiththecalculatedde-embeddedmeasurementsusing[ 22 ],[ 23 ]andsimulatedresultsusingHFSS.Theresultsareanalyzedasfuturedesignreferences.Theexperimentconductedinthischapterisuniqueina3DICsettingandreportsoneoftherstdetailedstudiesofinductorcharacteristicsona3DIC.These 29

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resultshelpidentifytheparasiticeffectsadesignershouldkeepaneyeoutforwhiledesigningRFcircuits. A BFigure2-2. (A)Modelstructureofthe3DICdepictingthethreetiers(B)Crosssectionofthe3DIC. 2.1ThreeDimensionalIntegratedCircuitThethreedimensionalcircuitisfabricatedbyMITLL3DSOI150nmICtechnologyandthefabricatedchipmicrographcanbeseeninFigure2-1.Ithasthreetiersstackedontopofoneanother.ThetoptierisTier3andthebottomoneisTier1asshowninFigure2-2(A)[ 24 ].Thecross-sectionofthe3DICisshowninFigure2-2(B).Allthetest 30

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standardsincludingtheinductorarefabricatedontheTier2sothatthemeasuringplanecanbeveriedtoreachtheendsthatconnectDUT.Eachtierisanindependent2DICwiththreemetallayers.Tier2isippedandoxidebondedtoTier1[ 24 ].TheinductorthatisusedastheDUTisfabricatedusingBM1(backmetal1)onTier3.Theplananddesignofthisspiralinductorischosentobeoctagonalbecauseitofferslessseriesresistancethanarectangularinductor[ 25 ].TheexactlayoutoftheDUTonTier-2connectedthroughTSVstothebondpadsonTier-3canbeseeninFigure2-3.Theinterconnectincludesanarrayof3Dviaswhichareetchedthroughtheoxidesubstratesandtheyextendfromthetoptiertothetopmetallayerofthebottomtier.TheTSVsarefabricatedasanarrayof6x5spaced1.4mapartand1.25x1.25m2inareaasshowninFigure2-3. Figure2-3. ApictureshowingDUT,TSVarrayandthebond-pads. Metallayersofeachtierarelledtocomplywithfoundryrequirements.Thebondpadsare101.25x101.25m2inareaandarefabricated49mapart.TheycontactthebackmetalofTier3forprobing[ 24 ].Forde-embeddingtheteststructuresfabricateddeepinsidethethreedimensionalIC,theeffectsofthebondpadsandTSV(throughsiliconvia)shouldbecharacterizeduptotheDUT. 31

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Twocalibrationplanesaredened,calibrationplaneXwhichislocatedatthetipsoftheRFprobesandcalibrationplaneYwhichislocatedattheDUTasshowninFigure2-2(a).Thustheprocessofde-embeddingiseffectivelyshiftingthecalibrationplanefromphysicallocationXtoY. 2.2ExperimentalProcedureThefabricatedthreedimensionalintegratedcircuitismountedonaglassslideandismeasuredusingaCascadeMicrotechRFprobestationandHP8510CVNA.CascadeMicrotechimpedancestandardsubstrate(ISS)isusedtocalibratetheVNAtotheprobetip.SOLTcalibrationisperformedwiththeISSandtheerrorcoefcientsareloadedintheVNA.Aftercalibration,S-parametermeasurementsoftheembeddedstandardsareconductedbyprobingthe3DICthroughbond-pads.ThetargetofthisprocedureistoextracttheparasiticsalongwiththeDUT(inductor)performance.Themeasurementsrecordedatthisstageincludetheeffectsofbothbond-padsandTSVs.ThecalibrationplaneisnowatplaneXasshowninFigure2-2(a).Tode-embedtheDUTfromthebondpadsandTSVs,atechniquecalledthreestepde-embeddingprocesswithshort-2ignoredbecauseofsymmetryisemployed.Thisprocedureischosenoutofallpresentedin[ 23 ]foritsaccuracy,howeveritisprovenherethatfora3DIC,theaccuracyobtainedisnotenough.Thede-embedding,accordingtothisprocess,isdonebymodelingthebondpadandTSVsasshownintheFigure2-4.Furthermodelingoftheinterconnectisdiscussedin[ 26 ].Afteraccountingforalltheelementsinthemodel,theDUTcanbecharacterizedforitstruehighfrequencyresponse.ThemodelseparatesthecharacteristicsofcontactpadsandTSVfromtheDUT.TheseriesimpedancesandtheshuntadmittancesarecalculatedusingtheS-parameterdataofthecalibrationstandardsonTier-2[ 23 ].Afterde-embeddingtheeffectsoftheseriesimpedanceusingequation1,theeffectsoftheparalleladmittanceshouldbeeliminatedinthemodelinordertocharacterizetheDUTusingequation2.Fordetailedcalculationinformation,please 32

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Figure2-4. EquivalentmodelemulatingtheparasiticimpedanceandadmittancesofcontactpadsandTSV. referto[ 23 ].De-embeddingtheDUT,usingthisprocedureisdoneusingMATLAB,andhencehereforththeseresultswillbecalledcalculatedresults.z11i=z11)]TJ /F3 11.955 Tf 11.95 0 Td[(z1)]TJ /F3 11.955 Tf 11.96 0 Td[(z3z12i=z12)]TJ /F3 11.955 Tf 11.96 0 Td[(z3z21i=z21)]TJ /F3 11.955 Tf 11.95 0 Td[(z3z22i=z22)]TJ /F3 11.955 Tf 11.95 0 Td[(z2)]TJ /F3 11.955 Tf 11.96 0 Td[(z3 (2)y11=y11i)]TJ /F3 11.955 Tf 11.96 0 Td[(y3y21=y21i+y3y12=y12i+y3y22=y22i)]TJ /F3 11.955 Tf 11.96 0 Td[(y3 (2)z1,z2andz3areparasiticseriesimpedancesextractedfromthemodelshowninFigure2-4usingMATLAB(3StepDe-embeddingprocedure).Thebehaviorofz1,z2andz3ofthexture(bond-pads+TSV)withfrequencyisshowninFigure2-5.Asonecanobservethextureresponseresistanceisfairlylinearuntil5GHz.Tode-embedtheeffectsofthebondpadsandtheTSVdirectly,theVNAneedstobecalibratedusingthe3DICon-chipstandards.So,SOLTcalibrationisperformedwiththestandardsfabricatedonchip.ThisisineffectshiftingthecalibrationplanefromplaneXtoplaneYasshowninFigure2-2(a).TheS-parametermeasurementsfor 33

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theDUTarerecorded.ThemeasurementsatthisstageshouldideallyreectthetruecharacteristicsoftheDUT.Theresultsrecordedarecalledmeasuredresultsfromhereonwards.AHFSSsimulationisperformedontheDUTrecreatingthechipenvironment.Thesolutionsetreferstoacompletelyde-embeddedDUTwiththeportsetupasshowninFigure2-6.Theportsaresetinsuchawaythatthesourceisdirectlyconnectedtotheloadandhencethecharacteristicsreectthatoftheloadandloadalone.Thesemeasurementsarecalledsimulatedresultsfromhereonwards. Figure2-5. SeriesimpedanceextractedforthemodelinFigure2-4. Themeasuredde-embeddedS-parametersfromtheVNA(Measuredresults),theembeddedmeasurementsconditionedusingMATLAB(calculatedresults)accountingfortheeffectsofthebondpadsandTSVsandtheresultsfromsimulatingtheinductorusingHFSS(simulatedresults)arecomparedandcontrastedfordetailedinsightintothe3DICcharacterization. 2.3ResultsTheteststructuresarefabricatedin3DSOI150nm3-TierICtechnology.Bond-padsaredesignedtohave150mpitchforGSGprobes.Aguardringislaidoutaround 34

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Figure2-6. DepictionofDUTsimulationsetupinHFSS. theteststructurestoensurepropergrounding.AllthemeasurementsaretwoportandareacquiredusingHP8510CVNA.TheinductorissimulatedusingHFSS.Thede-embeddeddataprocessingisdoneusingAgilentADSandMATLAB.Ultimately,themeasuredresults(resultsrecordedaftercalibratingtheVNAwithonchipstandards)arethereferenceones;theaccuracyofthesimulatedandthecalculatedresultsareevaluatedascomparedtothese.Afterexaminingtheresults,itcanbeconcludedthatthethreestepde-embeddingtechniqueemployediserrorproneinthe3DICandfaredleastaccurateincomparisontothesimulatedresults.Inordertoinvestigatethesediscrepancies,thes-parameterdatalesofmeasured,simulatedandcalculatedresultsareimportedtoAgilentADSandlumpedcomponentsareaddedsymmetricallyonboththemeasurementportsaccordingthemodelinFigure2-4toaccountfortheICelements(parasitics)causingthesediscrepanciesintherespectiveresultsasshowninFigure2-7.Thissetupofaddinglumpedcomponentstotheextractedresultsiscalledasimulatedxturefromthispointonwards. 35

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ThisexercisenotonlyprovidesinsightintowhichparticularelementintheproposedmodelinFigure2-4isbeingover/under-estimatedbutalsoprovidesamethodtoevaluatede-embeddingtechniques.Itisnotpracticaltohaveon-chipcalibrationstandardsinevery3DICanditisimperativethataformulationofaccurateofinede-embeddingprocedureisessential.Asitcanbeseeninthefollowingdiscussion,thethreestepde-embeddingproceduredoesnotcatertotheseneeds.Figure2-8showsthemeasurementcomparisonofDUTresponsebetweenthemeasured,simulatedandcalculated(3stepde-embeddingtechnique)measurements.Onecanobserveaconclusiveproximityinthesimulated,measuredandcalculatedresults;howevertheseresultsarederivedfromthesetupinFigure2-7andhenceincludetheeffectsoftheaddedlumpedelementsforcloserapproximations.Atlowfrequenciestheoffsetinthesimulatedresultsisduetopurelyresistivedifferencesanditcanbeattributedtothecontactresistancesofaboutoneohm.Also,asshowninFigure2-7aparasiticcapacitanceof20fFisunderestimatedinsimulation.Theestimationofthelumpedelementsinthesimulatedxtureisdoneinsuchawaythatbothmagnitudeandphaseofthes-parameterinconsiderationareascloseaspossibletothemeasuredresults.Figure2-7(A)showsthemeasurement(s11)comparisonofDUTresponsebetweenthemeasured,simulatedandcalculated(3stepde-embeddingtechnique)rawmeasurements.Itcanbeobservedthatthesimulatedandcalculatedresultsaredeviantfromthemeasuredresultsasexpected.However,addingthesimulatedxturetotheresultswillhelpcharacterizingthesedifferences.Onecanobserveaconclusiveproximityinthesimulated,measuredandcalculatedresultsasshowninFigure2-7(B);theseresultsarederivedfromthesetupinFigure2-9andhenceincludetheeffectsoftheaddedlumpedelementsforcloserapproximations.Atlowfrequenciestheoffset 36

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A B C DFigure2-7. Acomparisonbetweencalculated(extractedaftercalibration),measuredde-embeddedandsimulateds11magnitudeandphase.A)Directcomparison.B)Afterlumpedelementcompensation(simulatedxture). 37

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A B C DFigure2-8. Acomparisonbetweencalculated(extractedaftercalibration),measuredde-embeddedandsimulateds21magnitudeandphase.A)Directcomparison.B)Afterlumpedelementcompensation(simulatedxture). 38

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inthesimulatedresultsisduetopurelyresistivedifferencesanditcanbeattributedtothecontactresistancesofaboutoneohm.Also,asshowninFigure2-9aparasiticcapacitanceof22fFisunderestimatedinsimulation.Theestimationofthelumpedelementsinthesimulatedxtureisdoneinsuchawaythatbothmagnitudeandphaseofthes-parameterinconsiderationareascloseaspossibletothemeasuredresults. Figure2-9. ExperimentalsetupinAgilentADStocomparethesimulatedandmeasuredresults. Ontheotherhand,calculatedresultsandmeasuredresultsaresignicantlydispersedwhencomparedastheyare.AfteraddinglumpedcomponentsasshowninFigure2-9,itcanbeobservedthatseriesresistanceofoneohmhelpssettheresultsconvergeatlowfrequencies.Thesimulatedxtureforcalculatedresultsincludesseriesinductanceshighlightingtheerrorinthecalculateddataset. 39

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Figure2-8(A)depictsthes21rawmagnitudeandphasemeasurementsandcomparesthemastheyare.TheproximityofmeasuredandsimulatedresultsinFigure2-8(B)emphasizesthefactthatSOLTusingonchipcalibrationstandardsislegitimatehoweverthedisparitybetweenthemeasuredandcalculatedresultsevenaftertheinclusionofsimulatedxtureinvalidatesthethreestepde-embeddingprocedurein3DICs.Overall,onecanderivethattheimpedancevaluesobtainedfromcalculationsarefairlycloseinrealparthowevergrosslyunder/overestimatedintheimaginarypart.SincetheDUTisaninductiveelement,theerrorintheimaginarypartrenderstheresultsinthedatasetineffectivewithoutthesimulatedxture.Thisineffect,rulesouttheofinede-embeddingprocedureadoptedasachoicefor3DICs.Theauthorsndthatthe3DICprovidesuniqueenvironmentwithdevicessandwichedbetweensubstratesandthereareadditionalparasiticsignalpathsthatarenotproperlyaccountedforwiththestandardde-embeddingprocedures.Additionalresearchinthisareaisrequired. 2.4ConclusionAninductorisfabricatedonTier-2ofa3DIC.Athreestepde-embeddingtechniqueisemployedtode-embedaninductorembeddeddeepinsidea3DICandcharacterizeitupto5GHz.On-chipstandardsareusedtocalibratethenetworkanalyzerusingSOLTtechnique.Measuredresultsarecomparedwithsimulatedandcalculatedvaluesanditcanbeconcludedthatthemodelextracted[ 22 ],[ 23 ]fromcalculationiserroneousandthisaberrationisduetoundercompensatinginter-layerinteractions.Theresultsvalidatethefeasibilityofaninductorsincethesimulatedandmeasuredresultsmatch.Thesimulatedxturethrowslightonwhatcomponentsmighthavebeenestimatederroneously.Itisshownthatcontactresistances,parasiticparallelandfeedforwardcapacitancesarentadequatelymodeledinsimulation.Afterfurtherexperimentation,waystomodelthedifferencesarediscussed.Theparasiticseriesimpedancesisevaluatedandplotted. 40

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CHAPTER3POLARIZATIONDIFFERENTIALANTENNAFORLOSCOMMUNICATIONSINAMULTI-ANTENNASYSTEM 3.1OverviewRecenton-chipcommunicationnetworkshaveamultitudeofcommunicationnodesandeachnodeistypicallyconnectedtoitsnearestneighborsusingphysicaltransmissionlines.Physicalinterconnecthasbeenabottleneckintheadvancementofon-chipcommunicationnetworksintermsoflatencyandmemorybandwidthasphysicallimitsofchipfabricationmaterialsarereached[ 27 ].Longphysicalinterconnectsintroducedelayandtheyarealsoresponsiblefortheadditionofparasiticelementstothedesignalteringitscharacteristics.Thesechallengescanbemetbyrealizingtheinterconnectusingawirelesslink.Severalwirelesscommunicationnetworkshavebeendevelopedovertheyears[ 28 ],[ 29 ],[ 30 ],[ 31 ],[ 32 ];howeversignalmanipulationattheantennalevelhasntbeenresearched.Solutionsforintegrationofmillimeterwaveantennasonchipandinpackagehavebeenstudiedin[ 33 ].Atypicalwirelesslinkconsistsofatransmitter,areceiver,antennasandacommunicationmedium.Transmitterandreceiverchipsetsforfrequenciesof60GHzandbeyondhavealreadybeendemonstratedin[ 34 ].Anon-chipcommunicationnetworkconsistsofseveralcommunicationnodes.Whiledevelopingthenetworkarchitectureitisimportanttoassesstheadvantagesanddisadvantagesofreplacingthephysicaltransmissionlineswiththeirwirelesscounterparts.Forexample,eachcomponentofthewirelesssystem(Tx,Rxetc.,)consumespower,whichintotalshouldbecomparabletothelossesaccountedbythephysicaltransmissionlinesforthewirelesslinktobeagoodalternative.Thisassessmentdeterminesthechoiceofinterconnectbetweenasetofnodesinthenetworkarchitecture.Onesuchcomparisonismadebetweencopperinterconnect,Carbon-Nanotube(CNT)andOpticalinterconnect[ 13 ].From[ 13 ]and[ 11 ]itcanbeobservedthatforalinkmeasuringmore 41

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than1cm,physicalinterconnectbecomescomparativelylessenergyefcientandintroducesconsiderablymorepropagationdelay. Figure3-1. Adepictionofsingle-endedanddifferentialformsofphysicalandwirelessinterconnect. Antennasformacrucialpartofawirelesssystem.Asystemimplementingwirelessinterconnecton-chip/boardisnecessarilyamulti-antennasystem.Operatingmultipleantennastogetherinaconnedspacewithminimalinterferenceisachallengingtask.Ifthecommunicationspacespansoverafewsquarecentimetersandthealltheantennasareoperatinginthesamefrequencychannel,thetaskbecomesevenmorechallenging.Thesignalofonewirelesslinkbecomesnoisetotheadjacentlinkbecauseoftheclosephysicalproximity.Adaptationofdifferentialpropertiestothesystemtocounterthecommonmodenoiseproblemisalogicalderivative.Anexperimenttocharacterizecrosstalkonasiliconsubstrateincommon-modeanddifferentialmodeisconductedin[ 35 ],andithasbeenproventhatthedifferentialmodehasa10dBadvantageoverthecommon-modecounterpart.In[ 35 ],thecrosstalkischaracterizednumericallyusingequations2and3.Figures2and3in[ 35 ]provethe+10dBbettercrosstalkperformanceexperimentally.Thisresultcanbeextendedtoantennas.Adifferentialsystemoffersnotonlycommonmodenoiseimmunitybutalsofacilitateshighspeed 42

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communicationbecauseofitsprecisetimingdenitionwhencomparedtoasingleendedsystem[ 36 ].Figure3-1showsasystemofsingle-endedanddifferentialformsofphysicalandwirelessinterconnect.Isolationofeachcommunicationchannelisachievedbythepolarizationpropertyofantennas[ 37 ].Amethodofachievingselectivecommunicationbetweenasetofcommunicationnodesusingadifferentialantennapairisdemonstratedinthischapter. 3.2SystemDesign 3.2.1SingleEndedvsDifferential Figure3-2. WorkingofaSingle-endedsystemincomparisonwithdifferentialsystem. Asingleendedsystemisoneinwhichthesignalispropagatedwithreferencetoaxedpotential,typicallyground.Thissystemissusceptibletoanynoisecoupleddirectlyorindirectlytothesystem.Thisnoisecouldbesupplygeneratedoranexternalelectromagneticinterference.Oncethenoisecouplestothesignalofinterest,itdistortstheinformationcarriedbythesignalandleadstoerroneouscommunicationofdata.Henceitisnecessarytotakegoodmeasurestomakethesignalimmunetothenoise.Figure3-2showsablockdiagramofasingle-endedsystemandadifferentialsystem.Adifferentialsystemconsistsoftwosignalsequalinamplitudeandopposite 43

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inphaseandthetwosignalsarereferencedtoeachother.Anynoisecommontothesesignals,forexamplesupplynoise,iseliminatedsincethesignalofinterestispropagatedasadifferenceoftwosignalsandanycommonremainderiscanceledoutduetothisproperty.DifferentialsystemsareusedaggressivelyacrosstheanalogandRFintegratedcircuitdesignplatformsduetoaforementionedadvantages,howeveroncethesignalmovesfromacircuittoanantennaitistypicallyprocessedinthesingleendedway.Thisworkoffersamethodtocommunicateawirelesssignalinatruedifferentialfashion.Amulti-antennasystemconsistsofantennascommunicatingnoisesensitiveaswellasnoisysignals.Mutualcouplingofthesesignalscanbedisastroustothecommunicationsystem.Thereforeitisnecessarytoisolatethesignalsfromeachother.Thiscanbeaccomplishedbyemployingadifferentialsystemapproach.Bothnoisesensitiveandnoisysignalsarebestpropagateddifferentially[ 36 ].Anoisysignalwhenpropagateddifferentially,couplestothenoisesensitivesignalsituatedsymmetrically,insuchawaythattheinducednoiseiscanceledduetotheequalamplitudeandoppositephaseofthedifferentialsignals.Duetotheseadvantages,differentialconceptsareemployedintransmitterandreceivercircuits;howeverthesignalispropagatedusinganantennaconventionallyinsingleendedmode.Thismodeconversionlimitstheamountofbenetatruedifferentialsystemcanoffer.Tothebestoftheauthorsknowledgeallthepoint-to-pointwirelesslinksimplementedsofarhavebeensingleended.Inthiswork,thedifferentialpropertiesareadoptedinrealizingawirelesssystemthatiscompetentinprovidingminimalinterferingenvironmentbyrejectingcommonmodenoiseformultiplelineofsightwirelesslinkswhilepolarizationprinciplesareemployedforisolatingthewirelesschannels. 3.2.2DescriptionAmulti-antennasystemthathasmorethanoneantennaoperatinginthesamefrequencybandinclosephysicalproximityispronetointerference.Thisformsone 44

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Figure3-3. Wirelessdifferentialtransmissionlinebetweennodes1and2.TerminalsAandBareorthogonallypolarizedtoeachother. ofthemanychallengesofrealizingawirelessinterconnectsystem.Agivenantennaissusceptibletosignalinterferencefromotherantennasinthesystem.Asolutiontothisproblemisofferedinthiswork.Thesignalofinterestifcommunicateddifferentiallywillnotbeinterferedbyothercommonmodesignalsinthemediumbecausetheyarediscardedbythepropertyofcommonmoderejectionbythedifferentialsystem.Sointheory,sinceadifferentialsystemoffersbetternoiseimmunityandhighersignaltonoiseratio(SNR),implementingthewirelessdatalinkdifferentiallyoffersaplausiblesolutiontoreduceinterferencefromotherantennasinthesystemcommonmodetoit.AnotheradvantageofadoptingadifferentialsystemisthatbecauseofthehigherSNRachievedbythedifferentialsystem,thedatarateofthesystemcanbeimprovedsignicantly[ 36 ].Multipleantennashavebeenemployedinthepastforbettertransmissionandreceptionofasignalwithdiversitytechnique[ 38 ].Inthecaseofpolarizationdiversitytechniquetwoormoreantennasworkinginunisontoeitherreceiveortransmitmultiplecopiesofonesignalpolarizedindifferentdirectionscarryingonepieceofthesameinformation[ 39 ].Theprimedifferenceoftheproposedsystemfromthatin[ 38 ]and[ 39 ]isthateachantennainthesystemproposedhasonlyonedesignatedantennaat 45

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theendofagivencommunicationlink.Inotherwords,eachantennainthesystemisdesignedtoreceivesignalfromortransmitsignaltooneantennainthesystemforagivencommunicationlinkunlikein[ 38 ]wheretwotransmittingantennasarelinkedtoonereceivingantennaforbettersignalquality.Adifferentialsystemconsistsoftwosignalsequalinmagnitudeand180outofphase.Sincethedataiscommunicatedoverthetwosignalsintheproposedsystem,twoantennasareusedtocarryoutthefunction.Thetwoantennasshouldbeisolatedfromeachotherforthesignaltobeuncorrupt.Inotherwords,inter-terminalinterferenceshouldbeavoidedforthesystemtoworkasdesigned.Polarizationpropertyofelectromagneticwaveshasbeenutilizedtoaddressthisissue.Theoretically,orthogonallypolarizedelectromagneticwavesdonotinterferewitheachother.Polarizationlossfactor(PLF)fortwoorthogonallypolarizedwavesiszero(cos=0,whereistheanglebetweenthepolarizationvectorsofthetwowaves).Thegoalistopolarizethetwosignalsinadifferentialsystemperpendiculartoeachotherinordertominimizeinter-terminalcrosstalk,i.e.,ifthepositivesignalinthedifferentialpairisverticallypolarized,thenegativesignalwillbehorizontallypolarized.Thereforethereshouldbenopowerexchangebetweenthetwoantennasofthedifferentialpairandhencethetwosignalsareisolatedemulatingaphysicaldifferentialtransmissionline.Inthesystem,thetransmittingandreceivingantennapairsarearrangedinlineofsight(LOS)inthedirectionofradiationprincipallobe.Thepositivesignaliscommunicatedbetweentheverticallypolarizedantennas(p-antennas)andthenegativesignaliscommunicatedbetweenthetwohorizontallypolarizedantennas(n-antennas).Thep-antennasandthen-antennasaresufcientlyseparatedfromeachothersothatthereisnocross-communicationbetweenthem.AsshownintheFigure3-3,thep-antennasarealignedinlineofsighttoeachotherandsoarethen-antennas.Forillustration,eachdifferentialnodeisdividedintotwoantennaterminals.ThesignalfromterminalAiscommunicatedtoterminalC 46

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andthesignalfromterminalBiscommunicatedtoterminalD.InterferencefromthesignaltransmittedfromterminalAtoterminalBorterminalDiszerogiventhattheyareperfectlyorthogonallypolarized.ThesameisthecaseforthesignaltransmittedfromterminalBtoterminalsAandC.Straysignalsexternaltothedifferentialsystemthatarecommonmodetothereceivingdifferentialnodeareeliminatedbythecommonmoderejectionofthedifferentialscheme.Straysignalsinternaltothesystem,i.e.thesignalsgeneratedwithinthesystembutarenotintendedfortheparticularreceiverhowever,aretobedealtwith.Thesestraynodesshouldbeidentiedandprecautionshavetobetakensothatthestraysignalsstayveryweakincomparisontotheintendedtransmittedsignal.Afewoftheproposedsolutionsare,apotentialstraytransmittershouldnotbeindirectlineofsightofthereceiverantenna,thereceiverantennashouldnotbesituatedinthedirectionoftheprinciplelobeofthestraytransmitterantennaandthelinklengthbetweenthestraytransmitterandthereceiveristobelargerthantheintendedwirelesslink.Tofurthereliminatetheeffectsofthestraysignalthatisresidualevenaftertakingtheaboveprecautions,thesystemcanbedesignedtobesymmetricalsuchthatallthestraynodesareoffsetby180.ThisisfurtherexplainedbelowwiththehelpofFigure3-4.AnystraysignalKpinthesystemwhichispolarizedatanangletothep-antennawillbeatanangle(90)]TJ /F6 11.955 Tf 12.31 0 Td[()tothen-antennaasshowninFigure3-4.Sincethesystemconsistsofonlydifferentialpairswithantennaspolarizedorthogonallytoeliminateinter-terminalinterference,foreverystraysignal,itcanbesafelyassumedthatstraysignalKnexistsasitsorthogonalcounterpart.Asproposedearlier,forthestraytransmittertransmittingstraysignalsKpandKn,fromadistanced,thereexistsanotherstraytransmittertransmittingstraysignalsKpandKnwithequalmagnitudeandoppositepolarizationdirection.ThesestraysignalscanceleachotheroutasshowninFigure3-4andequations1,2,3&4. 47

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Themostdominantnoisesourcesofareceiverinanon-chipcommunicationnetworkarethenearbycommunicationnodesofthesamesystem.Anytransmitterwhiletransmittingtoitsintendedreceiverisalsoactingasanoisesourceforthereceiverofobservationiscalledastraytransmitterinthiswork.Below,itisshownthatdifferentialtransmitterpairsinaregulararraycongurationcanbeusedtocanceloutstraynoiseforanobservationreceiver.Thisnoisecancellationoperationcanbeperformedasasecondaryfunctionofthedifferentialantennapairsinanarrayasopposedtoprimaryfunctionofdatatransmissionandcanbeperformedinatimemultiplexedarrangementwithdatatransmission.IntheanalysisbelowtheKpstraysignalcomesfromaverticalantennainadifferentialantennapairandtheKnsignalcomesfromahorizontalantennainadifferentialantennapair. Figure3-4. Polarizationvectordirectionsofsignalofinterestandstraysignals. 48

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IfstraysignalKpandKncanberepresentedbyvectorswithmagnitudeKasshowninFigure3-4,Kp=jKj()]TJ /F8 11.955 Tf 9.48 0 Td[(^xsin+^ycos)Kn=jKj()]TJ /F8 11.955 Tf 9.48 0 Td[(^xcos)]TJ /F8 11.955 Tf 12.25 0 Td[(^ysin) (3)ThenstraysignalsKpandKncanberepresentedbyvectorsKp=jKj(^xsin)]TJ /F8 11.955 Tf 12.24 0 Td[(^ycos)Kn=jKj(^xcos+^ysin) (3)Vectoradditionofequations1and3resultsin0,ifthemagnitudesofKpandKpareequalandthatofequations2and4resultsin0,ifthemagnitudesofKnandKnareequal.IfthesignalsKpandKphavedifferentmagnitudesbutarecomparable,theinterferingsignalhasnegligibleeffectonthereceivedsignal.ThephasesofthetwosignalsKpandKpareconstrainedtobeequalwhichisalimitationofthissolution.Thusthesystemproposedcanprovideimmunityfromnotonlytheinter-terminalinterferencebutalsointerferencefromarandomstraysignal.Theresidualinternalstraysignalimmunityisprovidedbythesymmetryofthesystemandnottobemisunderstoodwiththecommonmodesignalrejectionofthedifferentialscheme. 3.2.3CandidateAntennafortheExperimentAmicrostrippatchantennaisusedasacandidateantennaforproofofconceptbecauseofitssimplicityinconstruction.Itiseasytorealizelinearpolarizationusingapatchantennainanydirectionneededwithasimplechangeinthefeeddirection.Linearpolarizationinthedirectionofchoiceisachievedbyaligningthepatchantennafeedinthatrespectivedirection.Whenrealizingtheproposedsystemonchip,otherantennaalternativesmustbeexplored.Eventhoughthisexperimentalconceptisfrequencyindependent,itismostadvantageousintheunlicensedbandof60GHz.Sincethisbandofferswidebandwidthandhaslessnaturalinterferers,theantennasystemisveryaptforit.Shieldingthiswirelessinterconnectcanbedoneastheskindepthof 49

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aluminumnecessaryat60GHzcanbeachievedbysprayingorsputtering[ 32 ].Anin-depthexplorationofantenna-in-packagesolutionsforpatchantennasat60GHzisdemonstratedin[ 40 ]. 3.2.4SystemImplementationAsdiscussedearlier,theantennasetupforthedifferentialcommunicationofasignaliscarriedoutthroughasetoforthogonallypolarizedantennas.Thisworkswelltheoreticallyforonelink.Thesystemhoweverconsistsofamultitudeofthesewirelesslinks.Inorderforsuccessfuladaptationofthesysteminacommunicationnetwork,absoluteisolationshouldbeensuredbetweentwolinks.Inthischapter,implementationofadifferentialwirelesscommunicationnetworkisalsoproposed.Polarizationpropertyoftheelectromagneticwavesisonceagainputtouseindeningthesystem.Polarizationlossfactor(PLF)iscos2.Ifforexample,thetransmittingpairandthereceivingpairareoffsetbyanangle,thepowerthatisreceivedfromanantennatransmittingpowerPwouldbe(P(1)]TJ /F3 11.955 Tf 12.2 0 Td[(cos2))orPsin2.Soanisolationofcos2isachievedforanoffsetof.SoasshownintheFigure3-6,ifacommunicationnodeistobeisolatedbycertainamountofpowerfromnode1,itjustneedstohaveantennasarrangedatanangularoffset.Theoretically,ifthetransmitterandreceiverantennasareoffsetby60,thePLFis0.25andhenceonly25%ofthetransmittedpowerisreceived(-6dB).Ifthe25%ofthetransmittedpowerislessthanthereceiversensitivity,thereshouldbenoreception.Iftheangularoffsetof45,thenthePLFis0.5andhencea-3dBlossinpoweroccurswhichishalfthetransmittedpower.Henceitistheoreticallypossibletoprovidevariableisolationbetweentwoantennapairs.Thisproveshelpfulin60GHzdesignswherethepathlosshassignicantimpactonthestrengthoftransmittedsignal.Alongerlinksuffersmorepathlossanddependingonthetransmittedpower,thereceiverselectivelyreceivesthesignal. 50

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AsshownintheFigure3-5,differentialnodePwillcommunicatewithnodeQhoweverdifferentialnodesPandQcannotcommunicatewithnodeRbecauseitisatanangularoffsetof90withnodesPandQ.AsitcanbeseenintheFigure3-5,eachdifferentialnodeconsistsoftwoantennasorthogonallypolarizedwitheachother.Hencethedesiredreciprocallinksare(P-Q),(P-R)andnot(Q-R).Thearrowsintheguredepictthepolarizationdirectionoftheantenna.DifferentialnodesTandUareatanangularoffsetwithrespecttonodeSinlineofsightandthatprovidesthenecessaryisolationbetweenthenodes.PowerlostduetopathlossatnodeUfromnodeSwillbemorebecauseitisfartherfromnodeShoweverifitarrangedinanangularoffsetwithlesserpolarizationlosswhencomparedtothatofbetweennodesSandT,theoreticallyitispossiblefornodesTandUtoreceivethesameamountofpowerfromnodeSusingtheproposedsystem.Hencethepotentialreciprocallinksare(S-T),(S-U)and(T-U)dependingonthetransmittingpowerofeachnode. Figure3-5. Systemdiagramwithmultipledifferentialcommunicationnodesarrangedatdifferentangularoffsets. 51

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3.3ExperimentalSetupTosimplifythetestingandmeasuretheantennaperformanceovernechangesinqualityfactorQ,microstrippatchantennasaredesignedusingAnsysHFSS.Thedimensionsofthepatchare0.322x0.256(WxL).Thepatchantennasradiateinbroadsidedirection.Theyaredesignedtooperateat1.93GHz.TheantennasarethenfabricatedusingRO4350B(RogersCorp)20milthickPCB.RO4350Bhasadielectricconstantof3.66andlosstangentof0.0031at2GHz.ThefabricatedantennasareshownintheFigure3-6.Thepatchantennasarearrangedwiththeirradiatingelementsofonenodefacingtheradiatingelementsoftheothernode.EachfabricatedantennahasitsownnitegroundplaneallofwhicharegroundedthroughSMAconnectors.TwoantennasarrangedwiththeirfeedsperpendiculartoeachotherasshowninFigure3-6,actasonedifferentialpairandareconnectedtoonecommunicationnode.Thedottedlinesrepresentthedirectionofpolarization.Anothersetofantennasalsowiththeirfeedsperpendiculartoeachother,situatedindirectlineofsightverticallyseparatedfromtherstdifferentialpairby4cmactastheseconddifferentialpair.TheseconddifferentialpairisrotatedabouttheaxislocatedatthecenteroftherespectivepatchoftherstdifferentialpairbyanangleasshownintheFigure3-6.Therightanglebetweentheantennasbelongingtoadifferentialpairismaintainedatalltimesandeachantennaterminalinthedifferentialnodeisseparatedbyadistancethatisatleastby4timestheverticalseparationbetweentheantennaanditscounterpartofthenodeinlineofsighttoensuresuppressionofcross-terminalcommunication..Thissetupisimplementedinsimulation(HFSS)andphysicallyforverication. 3.4ResultsRohde&SchwartzZNB-8,a4portvectornetworkanalyzerisemployedtomeasurethesystemcharacteristics.TheantennasystemissimulatedusingAnsysHFSSandthemeasuredresultsarecomparedtothatofsimulated.SingleendedterminalsA&Bformdifferentialnode1andsingleendedterminalsC&Dformthedifferentialnode2. 52

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A BFigure3-6. Experimentalsetup.A)PhotographofdifferentialantennasB)SimulationsetupinAnsysHFSS. Thecalculatedpathlossofthesystemat1.93GHzforatransmissiondistanceof4cmis10.2dB.Thesystemworksinthefar-eldregionoftheantennasat4cm[ 41 ].ThesimulatedradiationpatternsofthetwoantennasatterminalsAandCofFigure3-6areshowninFigure3-7whentheyarepolarizedorthogonallywithrespecttoeachother.ItcanbeseenthattheE-planeandH-planeoftheantennasareinterchangedasexpectedwhentheyareoffsetby90.Figure3-8showstheS21ofthedifferentialantennasystemcomprisingofantennasA-D.ItcomparesthemeasuredS21tosimulatedS21.Achangeinresonantfrequency 53

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A BFigure3-7. Radiationpatter.A)RadiationpatternE-Plane(phi=0)ofAntennasatterminalsAandCwhentheyareat90degreeoffset.B)RadiationpatternH-Plane(phi=90)ofAntennasatterminalsAandCwhentheyareat90degreeoffset. 54

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Figure3-8. SimulatedandMeasuredS21ofthedifferentialantennasystemwith0and45angularoffsets. of20MHzisobservedanditisduetothechangeinthelengthofthefeedlinewhilemountingtheSMAconnectorsandisonlya0.1%effect. Figure3-9. MeasuredS21ofthedifferentialantennasystematvariousangularoffsets. InFigures3-8and3-9,aneffortismadetocomparetheisolationachievedbyhavingthereceivingantennasatdifferentangularoffsetswithrespecttothetransmitting 55

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antennaforthecasesofsingleendedanddifferentialantennasystems.ThedifferencesinthemeasuredvaluesofS21aretabulatedinTable3-1.Figure3-9showstheS21measuredfortheantennasystemwithdifferentialnode1(TerminalsA&BinFigure3-6)atdifferentangularoffsetswithrespecttodifferentialnode2(TerminalsC&DinFigure3-6).Figure3-10showstheS21measuredforthesingleendedantennasystemwhereonlytwoantennasexistforthetwocommunicationnodes(TerminalsA&CorB&DinFigure3-6). Figure3-10. MeasuredS21ofthesingleendedantennasystematvariousangularoffsets. Table3-1. ComparisonofSingleEndedsystemtoaDifferentialSystemat4cm/16cm. AngularOffset()MeasuredIsolationachievedbydifferentialantennawithrespectto0offsetMeasuredIsolationachievedbysingleendedantennawithrespectto0offsetTheoreticalisolationthatcanbeexpectedcos2 00dB0dB0dB300.94dB1.49dB1.24dB452.84dB3.51dB3.01dB604.59dB5.93dB6.02dB9029.7dB21.31dB1 56

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Table 3-1 drawscomparisonsbetweentheisolationachievedbythedifferentialantennasystemtothatofsingleendedantennasystemandtheoreticalexpectations.Itcanbeobservedthatasangularoffsetsincreasefrom0to90isolationincreasesasexpected.Forangularoffsetsgreaterthan60,itcanbeobservedthatanisolationofapproximately5dBorhighercanbeachievedwhichprovestheexperimentalgoal.For90angularoffset,anisolationof30dBcanbeobservedinthedifferentialsystemwhichisnearly8dBmorewhencomparedtothatofsingleendedsystem.Asimulationoftheantennasystemat5cm/20cmvertical/horizontalseparationrevealsa16dBextraisolationachievedbythedifferentialsystemoversingleendedsystem.Table 3-2 comparestheisolationachievedbythedifferentialantennasystematvariousverticalandhorizontalseparations.ItcanbeconcludedfromtheTables3-1and3-2that,aswemovefurtherintothefar-eldregionoftheantennasthepolarizationprinciplewhichisprimarilyafar-eldprincipleismoreeffective.Anisolationof78.86dBcanbeobservedbythe90offsetdifferentialpairoverthe0offsetdifferentialpairat5cm/20cmdistanceswhichisverydesirableformulti-antennasystems. Table3-2. ComparisonofSimulatedDifferentialSystematvariousangularoffsetsatdifferenttransmissionlengths AngularOffset()SimulatedIsolationachievedbydifferentialantennawithrespectto0offsetat5cm/20cmSimulatedIsolationachievedbydifferentialantennawithrespectto0offsetat6cm/24cmTheoreticalisolationthatcanbeexpectedcos2 00dB0dB0dB301.31dB1.36dB1.24dB453.18dB2.91dB3.01dB607.29dB6.07dB6.02dB9078.86dB54.62dB1 3.5ConclusionAnoveldifferentialantennapairtopologyisproposedtoaddressthechallengeofwirelesslineofsightcommunicationsinamulti-antennasystemlikeawirelessmulticorenetwork.Amethodofselectivelycommunicatingbetweenseveralnodesinaclosed 57

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systemisdeveloped.Polarizationprincipleoftheantennasisexploitedtocarryoutthefunctionofinsulatingthetwoterminalsofadifferentialnodefromeachotherandtoisolatecommunicationchannelsbetweentwodifferentsetsofnodes.Theantennasarefabricatedandmeasured.Theresultsarereportedwhichconcurwiththeconcepttheorizedprovingthesuccessofthetopology.Furthermeasurementsareneededtodemonstratethisworkingprincipleoverasystemconsistingofmultipledifferentialnodeswithsimultaneouson-goingcommunication. 58

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CHAPTER4ALOWPOWERRECEIVERFRONT-ENDTheroleofareceiverinacommunicationsystemistoreceive,condition,de-modulateanddeciphertheinformationtransmittedbythetransmitter.Atypicalreceiverfront-endconsistsofanantenna,abandselectlter,alownoiseamplifyingstage,followedbyalterforimagerejection;amixerforfrequencyconversionandchannelselectlteringstages.Dependingonitsconstituents,theamountofthepowerconsumedbyareceiverisgenerallyasignicantpartofthepowerbudgetofacommunicationsystem.Developingareceiverforshortrange,highfrequency,highdatarateapplicationslikemulticorewirelessinterconnectsystemswithaddedpowerconstraintsischallengingtosaytheleast.Extensiveeffortsareputinrealizingwirelessinterconnectinapplicationslikemulticoreprocessingsystemsovertheyears[ 2 ][ 28 ].Awirelessinterconnectsystemconsistsofatransmitter,areceiverandanantennaateverycommunicationnode.Thisintra-chipwirelessinterconnectnotonlyalleviatescomplexroutingproblemsbutalsoreducestheinterconnectdelayandfacilitatesfasterclockspeeds[ 28 ].Torealizeapracticalwirelessinterconnect,itisessentialthatthecircuitryaddedontoaparticularcommunicationnodeconsumesverylowpower.Inordertosubstituteaphysicaltransmissionlineinapowerconstrainedsystem,ithastoconsumepowercomparabletotheohmiclossofthephysicaltransmissionline.Inthispaper,twonecessaryandsufcientcomponentsofthereceiverfrontendofonesuchwirelessinterconnectsystemaredevelopedandcomparedwiththestateoftheart.The60GHzfrequencybandhasbeenapopularchoiceforthewirelessinterconnects.The7GHzbandwidthitoffersmakesthebandidealforshortrangehighdataspeedapplications.Severaltransmitterandreceiversystemshavebeendevelopedinthisfrequencybandduetoitsvastbandwidth[ 42 ][ 32 ].However,toimplementa60GHzdesignreliablyonCMOS,fTofthetransistorshastobehigh,whichtypicallyrequiresa 59

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technologynodetobelessthan90nmanddemandshigherimplementationcost.Inthispaper,thefrequencyof60GHzhasbeenscaleddownbyafactorof4,andthesystemisimplementedat15GHzasaproofofconcept.Inordertodesignapowerefcientsystem,thesystemneedstohavefewestpossiblenumberofstageswithlowcurrentdrawingchannels.Direct-conversion(ZeroIF)architectureischosentobesttthenecessityforfewestsystemcomponents.OOKmodulationschemenotonlyofferssimplicitybutalsoconservesthepowerwhileprocessingazerobinaryvalue. Figure4-1. Ablockdiagramofthesystemproposed. Chapter4isdividedinfoursections.Section4.1introducesthesystem'sarchitectureandthemodulationscheme.Section4.2describesthecircuits.Section4.3discussestheexperimentalsetupandtheresultsandSection4.4summarizesthendings. 4.1SystemAblockdiagramofthesystemcanbeseeninFigure4-1. 4.1.1ArchitectureReceiversbasedontheirarchitecturescanbebroadlyclassiedintotwotypes.Directconversion(homodyne)andindirectconversion(heterodyne)receivers.AHomodyneoraDirect-conversion(Zero-IF)architectureofferssimplicityindesign 60

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duetoitsfewerbuildingblocks.Whiledevelopingawirelessinterconnect,thereisanabsolutenecessityforminimumnumberofcircuitstagestocarryoutthedesiredfunctioneffectively.Demodulationiscarriedoutusingthedetector,sothereisnoneedforalocaloscillator.Thissavessignicantpowerconsumptionastheoscillatorispowerhungryandareaintensivedevice.Sincetherearenomixersandlocaloscillatorsinthisarchitecture,therearenoimage-frequenciesinvolvedandthefrequencyspurgoesoutofthedetectedspectrum[ 43 ].Sincethereisnodown-convertingmixer,theDCoffsetwhichisadrawbackofadirectconversionreceiverceasestoexist.Choosingthisarchitecturealsosavesthecostofalterandmakesthedesignhighlyintegrated.Thisarchitecturesuffersfromminimumdynamicrangebutthisisacostdesignerscouldlivewithgiventhelowpowerconsumptionitoffers. 4.1.2ModulationSchemeOn-OffKeyingorOOKisaspecialcaseofAmplitudeShiftKeyingmodulationscheme.Thismodulationschemefacilitatespowerefcientcircuitssincewhilecommunicatingabinaryzero,itallowsthecircuittosleep.Thismodulationschemeofferssimplicityandrequiresminimumnumberofcurrentdrawingchannels.OOKprovidesabalancebetweenthebandwidthefciency,noiseimmunityandlowBERtrade-offs. 4.2CircuitsTwosetsofreceiversystemsaredesignedtoworkattwodifferentcarrierfrequencies.Therstsystemisdesignedtooperateatacarrierfrequencyof15GHzandishenceforthcalledRx:System15.Thesecondsystemisdesignedtooperateatacarrierfrequencyof60GHzandiscalledRx:System60fromnowon.Rx:System15isfabricatedon130nmCMOStechnologybySTMicroelectronicsandismeasuredtoproveitsworkingcharacteristicsandRx:System60issimulatedon90nmCMOStechnologybyUMC. 61

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4.2.1LNALowNoiseAmplierorLNAformsoneofthemostimportantfunctionalblocksofthereceiverwhichcontributessignicantlytothelinkbudgetofthesystem.Itprovidesthenecessarygainforthefollowingstagestoprocesstheweakinputsignalwhilesuppressingthenoise.Itdictatesthenoiseperformanceofthereceiversinceitistypicallytherststageofcascadedfunctionalblocksinareceiver.IndesigninganLNAforlow-powerapplicationswherethesignalreceivedisusuallynearthesensitivitylevel,highgainistypicallyanobviouscriterion.However,thepowerbudgetlimitsthebiascurrenttoacertainmaximumgainvalue.Sincethecurrentconsumedisdirectlyproportionaltothesmallsignalgain,atrade-offbetweenthegainandpoweralwaysexistsincircuitdesign.IndesigningtheLNAforRx:System15,aneffortismadetondanoptimalpointwherethepowerconsumedisminimumandthegainobtainedismaximum.ThetopologythusderivedisacascadedsinglestageLNA.Itprovideshighgainwhileprovidinggoodisolationbetweentheoutputandtheinput.TheinputandoutputportsoftheLNAareconjugatematchedformaximumpowertransfer.Thematchingnetworkisdesignedtoincludelumpedinductorsandcapacitors.Transmissionlinematchingisadenitebuthighareaalternative.However,fortheoptimallayout,lumpedelementsprovedtobeabetterchoiceforthisspecicdesign.Figure4-2showstheschematicofthedesignedLNAwithallthecomponentvalues.Figure4-3showstheschematicofthedesignedLNAforRx:System60.FortheLNAforRx:System60,thetopologyadoptedhasthreegainstages.TherststageoftheLNAisacascodeprovidinghighgainandnecessaryisolation.Thesecondandthirdstagesarecommonsourcestagesprovidingnecessarygainboostwhilemaintainingreasonablenoiseperformance.Eachstageofthecircuitisconjugatematchedtothefollowingstageforhighergainandefcientpowertransferwithminimallosses.Thematchingnetworkisdesignedtobemadeoflumpedinductorsandcapacitors.A5 62

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Figure4-2. CircuitdiagramoftheLNAforRx:System15. resistorisaddedinserieswiththeinductorintheoutputmatchingnetworkforstability.Itdoesaddtothenoisebutthecontributionisinsignicant.EachtransistorisbiasedusingaselfbiasingVtreferencecircuit[ 44 ]. 4.2.2DetectorThefunctionofthedetectorinthisparticularsystemisessentiallytoseparatethedatafromitscarrier.AnOOK=AMdetectorisdesignedbasedonsquarelawdetectionprincipleanditisoptimizedforlowpower.Theinputtothecircuitismodulatedcarrierandtheoutputisthedemodulatedbasebandsignal.Thisparticularmethodofdemodulationischosenbecauseofitssimplicityinimplementation.ThedetectorinputismatchedtotheoutputoftheLNAformaximumpowertransfer.TheschematicsofthedetectorsinRx:System15andRx:System60canbeseeninFigures4-4and4-5respectively.ThetopologychosenforRx:System15waschosentobeasingle 63

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Figure4-3. CircuitdiagramoftheLNAforRx:System60. transistorcommonsourcestagesothatthecurrentdrawnandhencepowerconsumedisminimumbythiscircuit.Thetransistorinthedetectoroperatesinsaturationregionandassumingthatthetransistorisasquarelawdevice,[ 45 ],[ 46 ]iDdc=K 2(VGS)]TJ /F3 11.955 Tf 11.95 0 Td[(Vt)2) (4)iD(rf+dc)=K 2(VGS+Vrf)]TJ /F3 11.955 Tf 11.96 0 Td[(Vt)2 (4)i=iD(rf+dc))]TJ /F3 11.955 Tf 11.95 0 Td[(iDdc=K 2(V2rf+2(VGS)]TJ /F3 11.955 Tf 11.96 0 Td[(Vt)(Vrf))Let,Vrf=Acos(!t)=K 2(A2 2+A2 2(cos2!t)+2(VGS)]TJ /F3 11.955 Tf 11.96 0 Td[(Vt)(Acos!t))/A2when!componentislteredattheoutputand2!componentisneglected (4) 64

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VO=i(Rload)/A2/InputRFPower (4)whereVOistheoutputofthedetectorandAistheamplitudeoftheRFsignal,!isthefrequencyofthecarrier,KisnCoxW L.nisthemobilityoftheelectrons,CoxisthecapacitanceofthegateoxideandW Listhewidthtolengthratioofthetransistors.ThetransistorinthedetectorshowninFigure4-4issettooperateinsaturationregion.Thedrainresistanceandthedraincurrentpassingthroughitsetstheoutputvoltageofthedetector.ThisvoltagecanbemanipulatedusingthecurrentwhichisinturncontrolledbytheVGSofthetransistor.TheamplitudeofthemodulatedRFcarrieralterstheVGSasderivedinEquation4-4andisdetectedattheoutput.Inthiscase,theoutputvoltageisproportionaltotheinputpower,whichsatisesthesquarelawdetectioncriterion[ 45 ][ 46 ].Alter,isaddedattheoutputtoclearthecarrierfromthesignalforacleanenvelope.ThislterisimplementedusingaseriesconnectedinductortoacapacitorinbothRx:System15andRx:System60.TheresonantfrequencyoftheLCseriescircuitismadeequaltothecarrierfrequencysoitcreatesashortforthecarrierfrequencybutanopentoallotherfrequencies.AvariablecapacitorisusedintheLCcircuitinRx:System15tohelpindynamictuningofthefrequencywhichmakesfrequencybandwidthofthedesignlarger.Theoutputofthedetectorisconnectedtoabufferforthesignaltoworkrail-to-rail.ThedrainresistanceofthedetectorinFigure4-4ischosensuchthatitproducesaninputvoltagetothebufferthatisjustbelowVIL,whichisthemaximuminputvoltagetothebufferthatproducesalogiczeroorgroundvoltageattheinputwhenthereisnoRFinputtothetransistor.WhentheRFisprovidedtothetransistoranincrement(> 65

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(VIH)]TJ /F3 11.955 Tf 12.25 0 Td[(VIL))intheoutputofthedetectorchangesthelogicstateofthebufferfromzerotoonewhichisVddpotential. Figure4-4. CircuitdiagramoftheDetectorofRx:System15. Figure4-5. CircuitdiagramoftheDetectorofRx:System60. ThedetectorinRx:System60isshowninFigure4-5.Thedesignisinspiredby[ 43 ],andthemodicationmadetothecircuitisthatitusesonesupplyvoltageandconsumeslesspowerfortheapplication. 66

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4.3ResultsRx:System15isimplementedonCMOS130nmSTMicroelectronicsprocess.Rx:System60isdesignedandsimulatedonCMOS90nmUMCprocess.Theresultsaredocumentedinthissection. 4.3.1Rx:System15 Figure4-6. Chipmicrographofthereceiver. ThefabricatedchipisshowninFigure4-6.Theareaoccupiedbythereceiverpartofthechipis1294mX1135m.Thedesignsarearealimited,sothenumberofoutputpadsthatcouldbeplacedonchiparealsolimited.TheoutputoftheLNAisconnecteddirectlytotheinputofthedetectorandsoisembeddedinthesystemandisnottakenoutofthechipasanoutput.HencethetransientandS-parametermeasurementsofthisparticularstagearelimitedtosimulationandcouldnotbemeasuredonchip.InFigure4-7,thesimulatedandmeasureds11oftheLNAisplottedagainstfrequency.TheinputnodeoftheLNAisconnectedtotheoutputofatransmitterstageandabondpadtoextracttheoutputofthetransmitterandtoinjectinputsignalintothereceiverifnecessary.TheresultsshowninFigure4-7aremeasuredatthisnode.Itcanbeobservedthatthevalleyofthemeasureds11curveisshiftedbackinfrequency.This 67

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Figure4-7. SimulatedandMeasureds11oftheLNAwithinputconnectedtotheoutputofaTransmitterStage shiftiscausedduetotheunderestimatedandmis-modeledinductanceofthestandardcelllibraryprovidedbythefoundry.ThisdiscrepancykilledthegainthatisdesignedtobeproducedbytheLNA.Figure4-8,showsthetestsetupofthedetector.Sincetheprecedingamplifyingstageisoutoftuneandtheconnectingnodebetweenthetwostagesisnotconnectedtoabondpad,itproveddifculttoprovidetheRFinputtothedetectorinthedesignedroute.However,theinputisprovidedtothedetectorthroughabiasteetotheDCbiasportofthetransistor.A5Kresistanceisinthesignalpathandaccountstoapproximately-20dBattenuation.So,a3dBminputpowertothebiaspad,resultsin-17dBminputpowertothegateofthetransistor.ThedetectoroperatesataVddof0.6Vandconsumes1mAandresultsinaminimal0.6mWofpowerconsumptionunderthistestconditions.Figure4-9showsanexample1GHzcarrierAMmodulatedat35KHzappliedtotheDCbiaspadasshowninFigure4-8. 68

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Figure4-8. TestsetupoftheDetector. Figure4-9. Exampleinputtothedetectorwithcarrierfrequencyof1GHzandAMsignalat35KHz. 69

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Figure4-10. Outputdepictingthedetectedenvelopefortheinput3GHzcarrierand40KHzAMmodulatingsignal. Figure4-10showstheoutputofthedetectorbuffertrackingtheinputofa3GHzcarrierAMmodulatedat40KHzandFigure4-11showstheoutputofthedetectorbuffertrackingtheinputofa5GHzcarrierAMmodulatedat50KHz.Figure4-12showstheswitchingcapabilityofthetransistorinthedetectorat400MHzFromtheaboveresults,itcanbeconcludedthatthedetectoriscapableoftrackingtheamplitudeandbufferingittoarailtorailswing. 4.3.2Rx:System60SimulatedinputandoutputreturnlossesofthedesignedRx:System60LNAcanbeseeninFigure4-13.Figure4-14showsthegain,Figure4-15showstheNoiseFigureoftheLNA.AllthedesignmetricsaretabulatedinTable4-1.Figure4-16showsthegainoftheLNAplottedagainsttheinputpower.TheinputmatchingofthedetectortotheoutputofLNAisdepictedinFigure4-17.Figure4-18plotstheoutputvoltageagainsttheinputpowerofthedetector.ThedetectorconsumesaDCpowerof0.56mW. 70

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Figure4-11. Outputdepictingthedetectedenvelopefortheinput5GHzcarrierand50KHzAMmodulatingsignal. Figure4-12. Outputdepictingtheswitchingabilityofthedetectorat400Mbps. 71

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Figure4-13. s11&s22oftheLNA. Figure4-14. s21oftheLNA. 72

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Figure4-15. NoiseFigureoftheLNA. Figure4-16. Powergainplottedagainstinputpower. 73

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Figure4-17. s11oftheDetector. Figure4-18. OutputVoltagevsInputpoweroftheDetector. 74

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Figure4-19. DetectedOutputVoltagetransientresponsetotheASKmodulatedinput. Figure4-19showsthesimulatedtransientresponseofthedetectorforanalternatingbinary1sand0spulseinput.Table4-2comparestheperformancemetricsofthedemodulatorwiththestate-of-the-art. Table4-1. LNAperformancemetrics ReferenceGainNoiseFigures11s22PowerConsumed [System60]90nm16.21dB4.3dB-10.8dB-6.13dB3.6mW[ 47 ]90nm15dB4.4dB-20dB-20dB4mW[ 48 ]90nm5.5dBNoDataNoDataNoData24mW[ 49 ]32nmSOI18dB11dB-8dB-8dB44.5mW Table4-2. OOKDemodulatorperformancemetrics ReferenceTechnologyFrequencyDataRateVDDPowerConsumed [System60]90nm60.48GHz1.5Gb/s1.2V0.56mW[System15]130nm6GHz50Kb/s0.6V0.6mW[ 50 ]130nm60GHz5Gb/s1.2V14.7mW[ 51 ]90nm60GHz3.5Gb/s1.2V28.7mW[ 49 ]32nmSOI210GHz10Gb/s1.0VNoData 75

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4.4SummaryInthischapter,presentedtworeceiversystemsthatcouldbeintegratedonawirelessinterconnectnetwork.Rx:System15isimplementedon130nmCMOSTechnologybySTMicroelectronicsandRx:System60issimulatedon90nmCMOSbyUMC.Powerconsumptionhasbeentheprimedesignmetric.Rx:System15consumesapowerof0.6mW(forthedetectoronly)whileworkingat5GHz.Rx:System60consumesapowerof4.1mWwhileworkingatacarrierfrequencyof60GHz. 76

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CHAPTER5ALOWPOWERTRANSMITTERFRONT-ENDAtransmitterisadevicewhichtransmitsbasebanddatatoaremotereceiverbymodulatingthecarrierwithbasebanddataandamplifyingthesignalasneeded.Transmittersconsumethelargershareofpowerinatransceiverpowerbudget.InanybatteryoperatedRFdevice,theradiodeterminesthebatterylifealongwithothercomponentssuchasdisplayandgraphicsprocessor.Developingalowpowertransmitterisessentialinportableelectronics.Forawirelessinterconnectsystemtobepracticalandcomparableinperformancetothephysicalinterconnectsystem,ithastoconsumeverylowpower.Anefforttodeveloponesuchtransmitterwhichconsumeslowpowerwhiledeliveringtheneededperformanceismadeinthischapter.The60GHzunlicensedfrequencyspectrumnotonlyoffersalargebandwidthbutalsohasfewerinterferersduetoitsnascence[ 18 ].Thisspectrumhoweverhasalargepathlossandthisrestrictstheapplicationsinwhichlongerrangesareneeded.Extensiveresearchisbeingcarriedoutinthisspectrumandseveralradiosinthisfrequencybandaredemonstrated[ 42 ],[ 46 ],howeverashieldedsystemworksperfectlywellwithotherfrequencieswhichareeasierandcheapertoimplementaslongastheFCCregulationsarenotviolated[ 30 ].Inthischapter,alowpower,highdatarate15GHzand60GHztransmittersaredemonstrated.ThetransmitteremploysOn-OffKeying(OOK)modulationscheme.Thisschemenecessitatesfewercomponentsinthesystemandinturnisresponsibleforlowerpowerconsumption.Ithasafewdrawbacksincludinganinterferenceproblem,whichisaddressedbyantennaspresentedinChapter2inthisresearch.Thefrontendofatransmittertypicallyconsistsofamodulator,aVCOandapoweramplier.TheVCOtypicallyisresponsibleforsignicantlyincreasedpowerrequirementsofthetransmitter. 77

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Toimplementa60GHztransmitterfront-enddesignonsilicon,technologynodeoflessthan90nmistypicallyneeded.Fabricationbecomesreallyexpensiveatsuchsmallgatelengths.Inthiswork,thefrequencyisscaleddownbyafactorof4toaccommodateRFdesignsonsiliconat130nmtechnologytotthebudgetandasaproofofconcept.Underlyingprinciplesofdesignstandthesameforboth60GHzand15GHzfrequencybands.Inthischapter,twosetsofdesignsforalowpowertransmitterarepresented,onetoworkat60GHzandtheotherat15GHz.The60GHzsystemissimulatedinUMC90nmtechnologyandisreferredtoasTx:System60.The15GHzsystemisimplementedin130nmCMOStechnologybySTmicroelectronicsandisreferredtoasTx:System15. 5.1System Figure5-1. BlockdiagramoftheproposedTransmitter. Transmittersbasedontheirarchitecturescanbebroadlyclassiedintotwotypes:DirectUp-conversionandIndirectUp-conversiontransmitters.InDirect-Upconversionarchitecturethebasebandsignalisup-convertedtocarrierfrequencyinonestepwhereasinIndirectUp-conversion,thebasebandisup-convertedtoanintermediatefrequencybeforegettingconvertedtocarrierfrequency. 78

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Everyefcientpowerlimitedsysteminliteraturehastwosalientfeatures,1)fewbuildingblocksand2)simplecircuitsincludingfewcurrentdrawingchannels.DirectconversionorHomodynearchitecturenecessitatesthebasebandtobeup-convertedtoRFinasinglestage[ 52 ]andthusminimizesthenumberofbuildingblockseliminatingthenecessityofcircuitstohandleintermediatefrequency.Thisarchitecturefacilitateshigherlevelsofintegrationandoffersasimplestructuretothesystem.Hence,thisarchitectureischoseninthesystemconstruction.BlockdiagramofthetransmittercanbeseeninFigure5-1.ThetransmitterTx:System60,includesa60GHzVoltagecontrolledoscillator(VCO)andanOOKModulator.TheVCOproducesthecarrier-signalatdesiredfrequencyi.e.,60GHz.TheOOKmodulator,whichisaMOScascadeamplier,modulatesthecarrierusingthedatafeed.Themodulationschemeofacommunicationsystemhasadirectimpactontheenergyefciencyofthesystem.Severalfactorsincludingdata-rates,complexity,etc.,effectthechoiceofthemodulationscheme.UncodedMQAMandcodedMFSKincludesomeofthemosttransmittedpowerefcientmodulationschemesforshortrangepoint-to-pointcommunicationlinks[ 53 ].However,forefcientcircuitenergyconsumptionthesemodulationschemesrequirethetransmitterandreceivercircuitstobecomplex.On-Offkeying,asimplisticformofamplitudeshiftkeying(ASK)isemployedinthissystemtodeliverpowerefcienttransmitterandreceivercircuits.Thismodulationschemesuffersin-channelinterferencebutthisisatrade-offthedesignersarewillingtolivewith. 5.2Circuits 5.2.1OOKModulatorOn-offkeyingisthesimplestcaseofASKmodulationwheretheamplitudeofthecarriersignalischangedinaccordancewiththebinarybasebanddata.SeveralCMOSASKmodulatorshavebeenreportedin[ 54 ],[ 55 ],[ 46 ].OOKmodulationschemeconsists 79

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ofonlytwolevelsofamplitude,thehighlevelisdemodulatedasbinary1,andthelowlevelorlackofsignalisdemodulatedasbinary0bythereceiver.ThecircuitdiagramoftheOOKmodulatorforTx:System60isshowninFigure5-2andtheoneforTx:System15isshowninFigure5-3.ThedesigncanbeinterpretedasacascodeamplierinwhichtheRFcarrierisattheinputgateofthecommonsourceNMOStransistorandthebinarybasebandsignalatthegateofthecommongateNMOStransistor.Whilethecommonsourcetransistorbooststhesignalbyit'scurrentgaintimes50,thecommongatetransistoractsasaswitchturningonwhenit'sgateishighandturningoffwhenit'sgateislow.Thiscreatesasignalthatison-offkeyingmodulated. Figure5-2. CircuitDiagramoftheOOKModulatorinTx:System60. Figure5-3showstheOOKmodulatordesignedforTx:System15.TheworkingprincipleofboththedesignsaresameandtheperformanceisdiscussedinSection4.TheinputandtheoutputoftheASKModulatorareconjugatematchedformaximumpowertransfer. 80

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Figure5-3. CircuitDiagramoftheOOKModulatorinTx:System15. 5.2.2VoltageControlledOscillatorFullyintegratedLC-VCOshavebeenpushingfrequenciesthatcanbeimplementedonsilicon.IntegratedLC-VCOshavebeenimplementedonsiliconsuccessfullywithgoodphasenoisecharacteristics[ 56 ],[ 57 ],[ 58 ].Stillitsohappensthatthequalityofinductorsimplementedonsiliconfallquitefrequentlybelowexpectations.Transformer-basedLCoscillatorsarereportedtohavebetterqualityfactors[ 56 ]buttheyarecostlytoimplementonsiliconduetolargerspacedemandinlayout.InthecaseofTx:System60,fora60GHzVCOtoberealizableonsilicon,thetechnologyshouldofferreliablepassives.Areasonablequalityfactor(Q=3)inductorischosenwhichsetstherequirementsforthecapacitorforoscillationatdesiredfrequency.Thecapacitancevalueneedstobevariabletoprovidetheabilitytotunetheoscillator.AMOSVaractorisemployedtoserveasavaractorinthisdesign.InTx:System15,aLCVCOisimplementedon130nmtechnologywithadesignedtargetof15GHzandismeasuredtooscillateat11GHzwhileconsuming7mAincludingtheVCObuffers. 81

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ThearchitectureofthesystemdemandsthattheVCOoperateatthecarrierfrequency.AdifferentialLC-VCOdesignischosenforthephasenoisecharacteristicsitoffers[ 59 ][ 60 ].FortheoscillationtosustainthelossesintheLC(InductorandCapacitor)tankhavetobecompensated.Thecrosscoupledtransistorsinthedesignservethisverypurpose.Theyprovidethenecessarynegativeresistancetosustaintheoscillation.TheVCOisdesignedtobelowpowertosuittherequirementsofthesystemandwithminimalsacriceofspectralpurity.ThecircuitdiagramofthedesignedVCOforTx:System60isshownintheFigure5-4andtheoneforTx:System15isshowninFigure5-5.FortheVCOinTx:System15,thevaractorsprovidethevariablecapacitanceattheoscillatingnodeandacentertappeddifferentialinductorprovidesthexedinductance.Thetuningrangedependscompletelyuponthevaractorvoltagecharacteristicsandthisismeasuredtobe1GHz.AsshowninFigure5-5,thebiasPMOStransistorsetsthecurrentsinthecross-coupledNMOStransistorswhicharesizedsuchthattheirsmallsignalgainisresponsibleforcompensationoflossesinthetankforsustainedresonance.TheVCObuffersareACcoupledtotheoscillatingnodesisolatingthemfromtheoutput.Thebiasvoltageofthetransistorsinthebuffercircuitlimitthesignalpowergeneratedbytheoscillator.ThesignalgeneratedbytheVCOisfedtotheOOKmodulatorthroughtheVCObuffers.FortheVCOinTx:System60,MOSvaractorsareusedtoprovidethevariablecapacitance.TwoinductorsalongwiththetwoMOSvaractorsformtheresonancetank.TheVCObuffersinthisdesignarealsoACcoupledtotheoscillatingnodesandaresourcefollowedandhenceprovidenogain.InTx:System15,thequalityfactoroftheLCtankcomprisingdifferentialinductorandvaractorsimplemented,hasturnedouttobesignicantlylowerthantheonedocumentedinthetechnologyguideprovidedbythefoundryandthesimulationofthedesignkit.Duetothisreason,theVCOoscillatesat11GHzwhileitwasoriginallydesignedtooscillateat15GHzwhilebiasedatthesameoperatingpointasthe 82

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simulation.HoweverthetankoscillatesandhencethesmallsignalgainofthecrosscoupledNMOStransistorsdoaccountasdesignedforthelossesinthetank.Itcanhencebeinferredthatthemeasuredresistanceofthetankisclosetosimulationbutthereactivecomponentsfallshortofthesimulatedanddocumentedresponse. Figure5-4. CircuitdiagramoftheVCO. Figure5-5. CircuitdiagramoftheVCO. 83

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5.3ResultsInthissection,thesimulatedresultsofTx:System60andthemeasuredresultsofTx:System15aredocumented. 5.3.1Tx:System60Figure5-6showstheresultsoftransientanalysisoftheOOKmodulator.Twobinarylevelsmodulatedonthecarriercanbeclearlyseen. Figure5-6. DepictionoftheOOKModulatedSignalinTx:System60. TheinputandoutputreturnlossoftheOOKmodulatorcanbeobservedinFigure5-7.Thisresultshowsthatthethemodulatorismatchedformaximumpowertransferatbothinputandoutput.Againof6dBcanbeobservedinFigure5-8.Themodulatorservestwopurposes;oneofwhichistomodulatethecarrierVCOsignalandtheotheristoboostthesignalstrength.SincetheamountoftimethewholecircuitisswitchedONdependsonthedata,powerisconsumedonlywhentransmittingabinary1andisconservedwhentransmittingabinary0.Figure5-9showstheoutputspectrumoftheVCOattheoperatingfrequencyanditsveharmonics.Figure5-10depictsthephasenoiseofthedesignedVCO.Aphase 84

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Figure5-7. InputandoutputreturnlossoftheOOKmodulator. Figure5-8. SimulatedgainoftheOOKModulator. noiseof-75dBc/Hzisobtainedat1MHzoffsetfromtheoscillationfrequencywhichiscompetitivewiththestateoftheart.Figure5-11showsthetuningrangeoftheVCO. 5.3.2Tx:System15Thecircuitsarefabricatedon130nmCMOSprocessprovidedbySTMicroelectronics.Thechipmicro-photographisshowninFigure5-12.Thetransmitterpartofthediemeasures1.3x1.1mm2.TheVCOhasatuningrangeof1GHz,andthecenter 85

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Figure5-9. 60GHzVCOoutputspectrum Figure5-10. 60GHzVCOphasenoise. frequencyofoscillationis11GHz.TheoutputspectrumoftheVCOisshowningureFigure5-13.ThemeasuredtuningrangeoftheoscillatorisshowninFigure5-14whiletheVtuneissweptfrom0.75Vto1.25V.TheLCtankstartstooscillateataVtuneof0.6V.TheLCtankconsumes3mAofcurrentandtheVCObuffersconsume2mAeach.ForaVDDof1.2V,theVCOconsumes8.4mWofpowerwhilegenerating-24dBmRFpower.Figure5-15showsthemeasuredtransientsignaloftheVCOandFigure5-16 86

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Figure5-11. Frequencyvs.TuningVoltage. showsthemeasuredVCOphasenoise.Table5-1summarizesthemeasuredresultsoftheVCOandcomparesitwithstate-of-the-art. Figure5-12. Chipmicrographofthetransmitter. TheOOKmodulatorwasdesignedtooperateat15GHz,howeversincetheVCOoscillatesat11GHzduetothepoorlymodeledvaractorcapacitanceoftheLCtank,thegainoftheOOKmodulatoriseffectedbutthecarriesouttheOOKmodulationontheVCOoutputwiththebinarydatainput.Figure5-17showsthelevelsofpowerofthe 87

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Figure5-13. MeasuredVCOoutputspectrum. Figure5-14. MeasuredVCOtuningRange. Table5-1. VCOperformacemetrics TechnologyPhaseNoiseVDDPowerFOMFrequency1MHzOffsetConsumed [System60]90nm-75dBc/Hz1.2V5mW-163.6dBc/Hz60.48GHz[System15]130nm-132dBc/Hz1.2V8.4mW-203dBc/Hz11GHz[ 61 ]90nm-95dBc/Hz0.6V3.16mW-185dBc/Hz64GHz[ 62 ]130nm-90dBc/Hz0.43V3.9mW-185dBc/Hz61.7GHz[ 46 ]90nm-99.5dBc/Hz1.2V12mWNoData30GHz[ 63 ]32nmSOI-80.9dBc/Hz1.0V42mWNoData210GHz 88

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Figure5-15. MeasuredVCOtransientoutputresult. Figure5-16. MeasuredVCOphasenoise. OOKmodulatoroutputdepictingthesuccessfulmodulation.Asignalattenuationof16dBcanbeobservedfromthedataofbinaryonetobinaryzero.ThemeasuredtransientsignalisshowninFigures5-18and5-19at2Gb/sand500Mb/srespectively.TheOOKmodulatordrawsacurrentof3mAat1.2VVDD.Table5-2summarizesthemeasuredresultsoftheOOKModulatorandcomparesitwiththestate-of-the-art. 89

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A BFigure5-17. OOKmodulatoroutput.A)Binary0input.B)Binary1input. Table5-2. OOKModulatorperformacemetrics TechnologyConversionVDDPowerDataFrequencyGainConsumedRate [System60]90nm5.3dB1.2V0.86mW1.5Gb/s60GHz[System15]130nmNoData1.2V3.6mW2Gb/s11GHz[ 55 ]90nm9.9dB1.8V14.4mW2Gb/s60GHz[ 46 ]90nm12dB1.2V3.6mW1.5Gb/s60GHz 90

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Figure5-18. OOKTransientAnalysisat2Gbps. Figure5-19. OOKTransientAnalysisat500Mbps. 91

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5.4SummaryAlowpowertransmitterfrontendisdesignedasapartofawirelessinterconnectsystem.ThedesignsofTx:System60aresimulatedandtheonesofTx:System15arefabricatedonsiliconandveriedbymeasurement.AVCOoscillatingatacenterfrequencyof11GHzwith9%tuningrangewhileconsuming8.4mWofpowerandanOOKmodulatorconsuming3.6mWofpowerisdemonstratedinTx:System15.Adatarateof2Gbpsisachievedinmeasurement.Thedesignandimplementationperformancediscrepanciesarenotedandexplained.Theworkingprinciplesareiteratedandthemeasurementresultsaredemonstrated.Tx:System60,isdesignedtoworkat1.5Gbpsandthesimulationresultsarepresented. 92

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CHAPTER6CONCLUSIONANDFUTUREWORK 6.1ConclusionAsummaryofthecontributionsmadebythisresearcharelistedinthischapter.Thesolutionsproposedbytheresearchareaimedtoaddresstheproblemofmulticoreinterconnect.Chapter1introducedtheconceptofmulticoreprocessors,liststhechallengesfacedindesigningmulticoreprocessorsandhowtheseproblemsareimpedingit'sgrowth.Itsurveyedandcomparedtheexistingalternativestothesolutionproposedandidentiedthemeritsandthemotivefortheapproachundertaken.Chapter2exploredthe3DICtechnologyareaandstudiedTSV(ThroughSiliconVia)interconnect.ADUTonaTier-2ofa3Dintegratedcircuitischaracterizedbyde-embeddingthepadsandtheTSV.Theresultsuncoveredthepropertiesoftheinterconnectin3DICandprovidedinsightintothepossibilityofamulticoreprocessorona3DIC.Chapter3introducesamethodofachievingselectivecommunicationbetweenasetofcommunicationnodesonanetworkusingadifferentialantennapair.Thecommonmodenoisecancelingpropertiesoftheproposedpolarizationdifferentialantennafacilitatescontrolledisolationofmultiplewirelesschannelsinclosephysicalproximityandmakesline-of-sightcommunicationsinmulti-antennasystemsoperatinginthesamefrequencychannelfeasible.Theproposedantennademonstratesclearsuperiorityinsignalisolationincomparisontoitssingle-endedcounterpart.Routingphysicaltransmissionlinestakesupspaceonchip/boardandalsointroducesparasiticelementstothedesignalteringitscharacteristicsespeciallyathighfrequencies.Theideaistowirelesslytransmitandreceiveatruedifferentialsignalemulatingaphysicaldifferentialtransmissionlinepreservingitscommonmodenoisecancelingproperties.Amethodtoregulatethereceivedpowerisproposed. 93

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InChapter4,aLNAandanOOKdetectorwhichformtwomajorbuildingblocksofanOOKreceiverfrontendthataredesignedfortwosystems,System60(60GHz)andSystem15(15GHz).Rx:System60issimulatedon90nmCMOStechnologyandtheresultsarecomparedtothestateoftheart.Rx:System15issimulatedandfabricatedon130nmCMOStechnologybySTMicroelectronics.Thisreceiverisdevelopedasapartofthesystem,whichperformsthefunctionofawirelessinterconnectonchip.Powerconsumptionistheprimedesignmetricofthisprojectandhencethedesignsareoptimizedaccordingly.Rx:System60achieves4.16pJ/bit.ThedetectorinRx:System15consumes0.6mWat0.6VVdd.InChapter5,alowpowertransmitterfrontendisdesignedforSystem60andSystem15.Tx:System60isdesignedandsimulatedon90nmCMOStechnologybyUMCandtheresultsarecomparedwithstate-of-the-art.ThedesignsforSystem15andfabricatedin130nmCMOStechnologytoworkat15GHz.Howeverduetounderestimatedvaractorcapacitanceprovidedbythefoundry,thefrequencyshiftedto11GHzandtheworkingofSystem15isdemonstratedatthatfrequency.Tx:System60andTx:System15bothachieved6pJ/bitenergyconsumption.TransmittersdesignedinthischapteralongwithreceiversinChapter4andtheantennainChapter3completethewirelessinterconnectsolutionthedissertationoffers. 6.2SuggestedFutureWorkThedissertationaddressesseveralkeyproblemswirelessinterconnectnetworksonchiparefacingtoday.However,severalkeyareascouldbeimprovedfurthertomakemoreenergyefcientandlowlatencywirelessinterconnect.Theseareasarenotedandarelistedinthissection. 6.2.1ImplementationofSystem60System60thatisdevelopedinthisdissertationcouldbeimplementedon65nmsiliconalongwithanon-chipantennatocomparetherealtimeperformance.Steps 94

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couldbetakentomaketheinterstagematchingmorebroadbandwithfewerlumpedelementstosavethechiparea. 6.2.2Sub-THzandTHznetworksAsthefrequencyincreasesthelumpedelementdimensionson-chipdecreases.Thisfrequencybandhasproventoprovidehighbandwidthcircuitswithminimumcomplexitytransceivers[ 14 ].Thisisakeyareafutureworkcouldbebasedupon. 6.2.3ArchitecturalInnovationWiththeantennasandthetransceiversthataredevelopedinthisdissertation,anewarchitectureneedstobedevelopedthathelpswithlatencycostandispowerefcient.TheMulti-hoppenaltyinmulticoresystemscanbeaddressedusingtheantennatopologyindiagonalcommunicationswhichhasn'tbeenattemptedyet. 95

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BIOGRAPHICALSKETCH KrishnaChaitanyaMojjada,wasborninSrikakulam,acoastaldistrictinAndhraPradesh,India.HereceivedhisbachelorsinElectricalandElectronicsEngineeringfromSathyabamaUniversity,Chennai,Indiain2008.HethenmovedtoUnitedStatestopursuehismaster'sandPhDinelectricalandcomputerengineeringfromUniversityofFlorida,Gainesville.HisresearchinterestsincludeRF/MicrowaveCircuitsandSystems. 102


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