Citation |

- Permanent Link:
- https://ufdc.ufl.edu/UFE0021560/00001
## Material Information- Title:
- Broadband Balun Embedded Measurement for Differential Circuits
- Creator:
- Jung, Kooho
- Place of Publication:
- [Gainesville, Fla.]
Florida - Publisher:
- University of Florida
- Publication Date:
- 2007
- Language:
- english
- Physical Description:
- 1 online resource (115 p.)
## Thesis/Dissertation Information- Degree:
- Doctorate ( Ph.D.)
- Degree Grantor:
- University of Florida
- Degree Disciplines:
- Electrical and Computer Engineering
- Committee Chair:
- Eisenstadt, William R.
- Committee Co-Chair:
- Fox, Robert M.
- Committee Members:
- O, Kenneth K.
Crisalle, Oscar D. - Graduation Date:
- 12/14/2007
## Subjects- Subjects / Keywords:
- Amplifiers ( jstor )
Bandwidth ( jstor ) Broadband transmission ( jstor ) Calibration ( jstor ) Differential circuits ( jstor ) Electric potential ( jstor ) Human error ( jstor ) Microwaves ( jstor ) Signals ( jstor ) Simulations ( jstor ) Electrical and Computer Engineering -- Dissertations, Academic -- UF active, analyzer, balun, c3, calibration, common, coupled, cross, cxm, differential, embedded, error, impedance, line, marchand, measurement, mixed, mode, network, pad, parameter, s, spice, standard, substrate, test, transmission, vector, y - Genre:
- bibliography ( marcgt )
theses ( marcgt ) government publication (state, provincial, terriorial, dependent) ( marcgt ) born-digital ( sobekcm ) Electronic Thesis or Dissertation Electrical and Computer Engineering thesis, Ph.D.
## Notes- Abstract:
- Conventional 2-port vector-network-analyzers are used for measuring 4-port differential circuits, where each port is embedded with a balun, either using external baluns, on-chip baluns, or baluns integrated in on-wafer probes. The proposed strategy requires the development of compact sized broadband baluns, an algorithm for calibrating the parasitic effects of the embedded baluns, and an evaluation method for the measurement errors caused by the balun?s imperfections. The proposed strategy can be applied to virtually all single-ended equipment, which enables them to be free from post measurement processes for estimating virtual-differential measurement results. The baluns are realized using Marchand's configuration given their large relative-bandwidth and compact structure. The optimum values for the differential- and common-mode characteristic impedances of the Marchand-coupling are analytically derived as 58.58 Ohm and 85.36 Ohm, respectively. In order to obtain such high coupling, a new coupling structure is proposed using a double-sided single-layer printed-circuit-board surrounded by conductive fixtures. The designed baluns are assembled to on-wafer probes, and the measurements results show that the balun embedded probes have broad 3 dB-relative-bandwidths of 0.909. For characterizing and calibrating the 3-port error-box in the balun embedded on-wafer measurements, a new set of impedance-standard-substrate and an extraction algorithm are proposed. This method fully extracts all 9 mixed-mode s-parameters of the 3-port error-box, where 4 differential-modes are used for the calibration, and the remaining 5 common- and cross-modes are used for evaluating their associated measurement errors. The proposed method uses the pseudo-inverse of over-determined matrices, by which it becomes more tolerant to measurement errors, when compared to a previous method of using a dual-through pattern connected to a dual-probe. Since the calibrations are for only the differential-modes, measurement errors occur due to the undesired common- and cross-modes of the embedded baluns and device-under-test, even under the most ideal calibration conditions. These errors are evaluated using a newly proposed algorithm, which calculates the anticipated minimum and maximum of the s-parameters that can result due to the common- and cross-modes. In efforts to further increase the measurement bandwidth of the proposed measurement strategy, active baluns are developed using a newly proposed combined-cascode-cascade configuration, which is designed in the IBM 8HP 130 nm BiCMOS process. For input power as high as 5 dBm, the bandwidth is shown to be DC - 17 GHz, where the imbalance of the differential output is less than 1.8 dB in amplitude and less then 10 degrees in phase. With the development of a calibration algorithm for unidirectional error-networks, active baluns become a promising solution for the proposed balun-based measurements, due to their large bandwidth and compact structure. ( en )
- General Note:
- In the series University of Florida Digital Collections.
- General Note:
- Includes vita.
- Bibliography:
- Includes bibliographical references.
- Source of Description:
- Description based on online resource; title from PDF title page.
- Source of Description:
- This bibliographic record is available under the Creative Commons CC0 public domain dedication. The University of Florida Libraries, as creator of this bibliographic record, has waived all rights to it worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law.
- Thesis:
- Thesis (Ph.D.)--University of Florida, 2007.
- Local:
- Adviser: Eisenstadt, William R.
- Local:
- Co-adviser: Fox, Robert M.
- Electronic Access:
- RESTRICTED TO UF STUDENTS, STAFF, FACULTY, AND ON-CAMPUS USE UNTIL 2008-12-31
- Statement of Responsibility:
- by Kooho Jung.
## Record Information- Source Institution:
- UFRGP
- Rights Management:
- Copyright Jung, Kooho. Permission granted to the University of Florida to digitize, archive and distribute this item for non-profit research and educational purposes. Any reuse of this item in excess of fair use or other copyright exemptions requires permission of the copyright holder.
- Embargo Date:
- 12/31/2008
- Classification:
- LD1780 2007 ( lcc )
## UFDC Membership |

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PAGE 1 1 BROADBAND BALUN EMBEDDED MEASUREMENT FOR DIFFERENTIAL CIRCUITS By KOOHO JUNG A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL OF THE UNIVERSITY OF FLOR IDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY UNIVERSITY OF FLORIDA 2007 PAGE 2 2 2007 Kooho Jung PAGE 3 3 To my family, friends, teachers, and the people of Cascade Microtech PAGE 4 4 ACKNOWLEDGMENTS My forem ost honor goes to my family and friends for their ince ssant support. Among them, Im in forever debt to my dear parents, whose teachings through examples has enlightened and strengthened my mo rals, patient, compassion, and logical thinking. I am very grateful to have studied at the Un iversity of Florida. I thank my advisor, Dr. William R. Eisenstadt, for his invaluable teachin gs and for his generous care for us students during our difficulties, which I will try my best to follow through out my future career. I also thank my co-adviser, Dr. Robert M. Fox, for s howing the ways for theoretical approaches in identifying the key problems, which became a central tool in my engineer ing strategies. I also thank other members of my committee, Dr. Kenneth K. O and Dr. Oscar D. Crisalle, for their critical feedback through out my research. I thank my colleagues, Jongshick Ahn, Sudeep Puligundla for their help through numerous discussi ons and for their valuable friendship. I also thank my seniors and friends at the Gainesvi lle Korean Catholic Community, which became a second family to me through many voluntee red work, among which, Sanghoon Han, Jangsup Yoon, and Hyeopgoo Yeo, who had always looked after for my well-being with the utmost generosity. I thank the past and present engineers of Cascade Microtech; Richard Campbell, Peter Navratil, Mike Andrews, Leonard Hayden, and Thaine Allison, and its founders, K. Reed Gleason and Eric W. Strid, for providing the in ternship opportunity and for their continuous support, which became the essential driving force for this work. I also thank the Center for Circuit and System Solutions (C2S2) of Focu s Center Research Program (FCRP) for their support and providing helpful networks to other leading research groups. Furthermore, I thank the Ministry of Information a nd Communication, Republic of Korea, for the scholarship, and Dr. Dong-Ho Lee of Hanyang University, Republic of Korea, for his recommendation. PAGE 5 5 I give special acknowledgement to my advisors during my Masters program at Hanyang University, Republic of Korea Dr. Jongin Shim and Dr. Yungseon Eo. Their passion for science and the intellectual search for answers had infl uenced me in so many ways. It was my great honor to have had learn from them which I will treasure for th e rest of my life. PAGE 6 6 TABLE OF CONTENTS page ACKNOWLEDGMENTS...............................................................................................................4LIST OF TABLES................................................................................................................. ..........8LIST OF FIGURES.........................................................................................................................9ABSTRACT...................................................................................................................................13 CHAP TER 1 INTRODUCTION TO BALUN EMBEDDED MEASUREMENTS .................................... 151.1 Advantages of Differential Circuits..................................................................................151.2 Conventional Measurements of Differential Circuits....................................................... 161.3 Proposed Measurements of Differential Circuits Using Broadband Baluns....................181.4 Applications Beyond Network-Analyzers........................................................................ 192 BACKGROUND THEORIES IN BALUNS AND MIXED-MODES S-P ARAMETERS...212.1 Introduction Mixed-Mode S-Parameters.......................................................................... 212.2 Mixed-Mode S-parameter Calculation Using SPICE....................................................... 252.2.1 Extraction Circuits for Mixed-Mode S-parameters................................................ 252.2.2 Application Examples............................................................................................ 292.3 Introduction to Balun and Relative-Bandwidth................................................................363 MARCHAND BALUN EMBEDDED PROBE..................................................................... 393.1 Introduction to Marchand Balun Embedded Probe.......................................................... 393.2 Coaxial Marchand Balun and the Migration to its Planar Type....................................... 393.3 Analytical Derivation for Optimum Design..................................................................... 453.3.1 General Quarter-Wavelength Coupled TL............................................................. 453.3.2 Optimum Design for Planar Marchand Balun........................................................ 483.3.3 Common-Mode Matching......................................................................................503.4 Structural Realization.......................................................................................................513.5 Measurement Results........................................................................................................ 554 CHARACTERIZATION AND CALIBRATION FOR 3-PORT ERROR NETWORK ....... 584.1 Introduction to 3-port Error-Box and its Characterization............................................... 584.2 Proposed ISS and Extraction Algorithm........................................................................... 594.2.1 Proposed ISS..........................................................................................................604.2.2 Required Measurements.........................................................................................614.2.3 Extracting S-parameters of the 3-port Error-Box................................................... 624.2.4 Verification and its Comparison to the Use of 7 Dual-Load Patterns.................... 65 PAGE 7 7 4.3 Application to Marchand Balun Embedded Probe........................................................... 664.4 Calibration........................................................................................................................665 EVALUATION OF ERRORS CAUSED BY COMMONAND CROSS-MODES ............. 705.1 Measurement Errors Caused by Common-Modes and Cross-Modes............................... 705.2 Common-Modes and Cross-Modes in Balun Embedded Measurements......................... 705.3 Error Evaluation and the Used Approximations............................................................... 715.4 Application to Fully-Differential Amplifier..................................................................... 786 ACTIVE BALUN USING COMBINED CA SCODE-CASCADE CONFIGURATION ...... 836.1 Introduction to Various Active Baluns............................................................................. 836.1.1 Distributed Amplifier Type.................................................................................... 846.1.2 Differential Amplifier Type...................................................................................856.1.3 Source-Drain Outp ut Configuration.......................................................................856.1.4 Common-Source and Common-Gate Pair Configuration...................................... 876.2 The Proposed Combined Cascode-Cascade Configuration.............................................. 886.3 Measurement Environment............................................................................................... 946.4 Measurement Results........................................................................................................ 976.5 Low-Pass Bias-Feedback Network for Stable Bias Conditions..................................... 1016.6 Summary and Applications.............................................................................................1057 CONCLUSION..................................................................................................................... 106LIST OF REFERENCES.............................................................................................................110BIOGRAPHICAL SKETCH.......................................................................................................115 PAGE 8 8 LIST OF TABLES Table page 3-1 Using double-coax vs. using PCB c oupled-T L in realizin g Marchand-coupling................... 454-1 Used s-parameter values for simulation verification.............................................................. 664-2 RMS errors of the extracted s-parameter values.................................................................... 666-1 C3-baluns internal bias points and AC voltage swings at 5 dBm input................................ 906-2 Forward gains of C3-balun for the input power of -25 dBm ~ 5 dBm................................. 1006-3 Change of bias performances of the proposed C3-balun due to process variations............. 105 PAGE 9 9 LIST OF FIGURES Figure page 1-1 Circuits in their various types............................................................................................151-2 Conventional method for measuring a di fferential circuit using a 2-port VNA................ 171-3 Balun embedded measurements......................................................................................... 192-1 Nodal scattering-wave representation of three-port and four-port circuit.........................212-2 Mixed-mode scattering-wave representati on of three-port and four-port circuit..............222-3 Decomposing nodal voltages in terms of propagation direction....................................... 262-4 Extraction circuit for [ s]4s first and third.......................................................................272-5 Extraction circuit for [ s]4s second and fourth column................................................... 282-6 Extraction circuit for [ s]3.................................................................................................292-7 Two-staged 5GHz CMOS fully-differential amplifier...................................................... 312-8 SPICE-based extraction of [ s]4 for the circuit shown in Figure 2-8................................ 322-9 Layout of a differential transformer w ith unbalanced coupling of a nearby loop............. 332-10 Circuit model of a differentia l transformer shown in Figure 2-9....................................... 332-11 SPICE-based magnitude extraction of [ s]4 for the circuit shown in Figure 2-10 (4port case)..................................................................................................................... .......342-12 SPICE-based phase extraction of [ s]4 for the circuit shown in Figure 2-10 (4-port case)...................................................................................................................................342-13 SPICE-based magnitude extraction of [ s]3 for the circuit shown in Figure 2-10 (3port case)..................................................................................................................... .......352-14 SPICE-based phase extraction of [ s]3 for the circuit shown in Figure 2-10 (3-port case)...................................................................................................................................352-15 Rat-race balun operating at 6 GHz.....................................................................................373-1 Cross-sectional view of a coaxial cable and its currents.................................................... 403-2 Coaxial Marchand balun.................................................................................................... 403-3 Transmission-line model of Marchand balun.................................................................... 42 PAGE 10 10 3-4 Equivalent circuit for the impedance s een at Marchand baluns differential port .............423-5 Normalized frequency plot of the diffe rential-mode impedance seen at Marchand baluns differential port...................................................................................................... 433-6 Planar-type Marchand balun.............................................................................................. 443-7 General c/4 coupled transmission-line............................................................................. 463-8 Impedances of planar Marchand balun with symmetric c/4 coupled TL......................... 483-9 Simulation results of an optimized planar Marchand balun operating at fc = 6 GHz........ 493-10 Planar Marchand balun with common-mode matching..................................................... 503-11 Cross-section of various c oupled microstrip-TL structures............................................... 513-12 Cross-section of the proposed coupled microstrip-TL structures...................................... 523-13 PCB layout of the proposed Marchand balun.................................................................... 533-14 Proposed balun embedded probes...................................................................................... 543-15 Measuring balun embedded probes using a dual-through connected to a dual-probe....... 553-16 Measurement results of the proposed balun embedded probes......................................... 564-1 Full Characterization of the 3-port e rror-box in the measurements using balun embedded probe................................................................................................................. 594-2 Proposed impedance-standard-substrate (ISS).................................................................. 604-3 Required measurements for th e proposed extraction algorithm........................................614-4 Flowgraph of the ISS measurement through the error-box............................................... 634-5 Extracted s-parameters of a balun embedded probe using the proposed ISS and extraction algorithm and their comparison w ith the previous me thod of using a dualthough pattern connected to a dual-probe..........................................................................674-6 Full 2-port balun embedded measurement and their 2 x 2 differential-mode sparameter matrices............................................................................................................. 685-1 Mixed-mode flowgraph for diffe rential measurement using baluns.................................. 715-2 Mixed-mode flowgraph for VNAs non-calibrated s11 and s21..........................................725-3 Mixed-mode flowgraph for VNAs non-calibrated s22 and s12..........................................74 PAGE 11 11 5-4 Measuring dual-reflections of the DUT.............................................................................775-5 Rat-race type balun; mismatches were randomly induced from the shown nominal values in order to achieve large CXM............................................................................... 785-6 Mixed-mode s-parameters of a Rat-race type balun shown in Figure 5-5......................... 785-7 Fully-differential amplifier; 10% varia tions were randomly induced from the shown nominal values in order to achieve large CXM................................................................. 795-8 Mixed-mode s-parameters of the fully-differential amplifier shown in Figure 5-7........... 805-9 Differential-mode s-parameters of the DUT; original, measured, and calibrated sparameters, with anticipated maximum and minimum, using 102, 103, and 104 samples...............................................................................................................................816-1 Comparing single-ended a nd mixed-mode s-parameters between passive balun and active balun................................................................................................................... .....836-2 Distributed amplifier type active balun.............................................................................. 846-3 Differential amplifier type active balun............................................................................. 856-4 Active balun using sourcedrain output configuration.......................................................866-5 Matched source-follower for maximu m forward-gain at low frequencies........................ 866-6 Simplified AC-equivalent circuit of th e active balun using source-drain output configuration......................................................................................................................876-7 Active balun using commonsource and common-gate pair.............................................. 886-8 Proposed active balun using combined cascode-cascade configuration (C3-balun)......... 896-9 Simulation results of the proposed C3-balun..................................................................... 906-10 Chip layout of the proposed C3-blaun in IBM 8HP 130 nm BiCMOS process................ 916-11 Chip photo of the proposed C3-blaun in IBM 8HP 130 nm BiCMOS process................. 926-12 Layout for NMOS interconnect; M3 of the proposed C3-balun........................................ 926-13 Layout for NMOS interconnect; zoom-in area of Figure 6-12.......................................... 936-14 Layout for NMOS interconnect; zoom-in area of Figure 6-13.......................................... 936-15 Three-pin DC-probe wi th embedded bypass capacitors.................................................... 946-16 Using GSGs through pattern for unknown-through measurements.............................. 95 PAGE 12 12 6-17 Full 3 x 3 s-param eter and y-parameter matrices of active balun with pads, pads only, and active balun without pads............................................................................................966-18 Measured magnitude of the single-ended s-parameters of the proposed C3-balun at the input power of -25 dBm............................................................................................... 986-19 Measured phase of the single-ended s-pa rameters of the proposed C3-balun at the input power of -25 dBm..................................................................................................... 986-20 Mixed-mode s-parameter measurement of the proposed C3-balun at -25 dBm input....... 996-21 Mixed-mode s-parameter measurement of the proposed C3-balun at 5 dBm input.......... 996-22 Noise measurement of the proposed C3-balun................................................................ 1006-23 C3-balun with network for stable biasing........................................................................ 1026-24 Low frequency amplifier used for lowpass bias-feedback network in the proposed C3-balun...........................................................................................................................1036-25 Threshold-referenced self-biasing networ k used in the proposed C3-balun and the attached low-pass bias-feedback network........................................................................ 1036-26 Overall performances of the C3-b alun the attached biasing network..............................1047-1 Proposed balun embedded measur ement for differential circuits.................................... 106 PAGE 13 13 Abstract of Dissertation Pres ented to the Graduate School of the University of Florida in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy BROADBAND BALUN EMBEDDED MEASUREMENT FOR DIFFERENTIAL CIRCUITS By Kooho Jung December 2007 Chair: William R. Eisenstadt Cochair: Robert M. Fox Major: Electrical and Computer Engineering Conventional 2-port vector-netwo rk-analyzers are used for measuring 4-port differential circuits, where each port is embedded with a balu n, either using external baluns, on-chip baluns, or baluns integrated in on-wafer probes. Th e proposed strategy requires the development of compact sized broadband baluns, an algorithm for calibrating the parasitic effects of the embedded baluns, and an evaluation method for the measurement errors caused by the baluns imperfections. The proposed strategy can be app lied to virtually all single-ended equipment, which enables them to be free from post measurement processes for estimating virtualdifferential measurement results. The baluns are realized using Marchands configuration given th eir large relativebandwidth and compact structure. The optimum values for the differentialand common-mode characteristic impedances of the Marchandcoupling are analytica lly derived as 58.58 and 85.36 respectively. In order to obtain such high coupling, a new coupling structure is proposed using a double-sided single-layer printed-circuit-board surrounded by conductive fixtures. The designed baluns ar e assembled to on-wafer probes, and the measurements results show that the balun embedded probes ha ve broad 3 dB-relativ e-bandwidths of 0.909. PAGE 14 14 For characterizing and calibrating the 3-por t error-box in the balun embedded on-wafer measurements, a new set of impedance-standard-substrate and an extraction algorithm are proposed. This method fully extracts all 9 mixe d-mode s-parameters of the 3-port error-box, where 4 differential-modes are used for the ca libration, and the remaining 5 commonand crossmodes are used for evaluating their associated measurement errors. The proposed method uses the pseudo-inverse of over-determined matric es, by which it becomes more tolerant to measurement errors, when compared to a pr evious method of usi ng a dual-through pattern connected to a dual-probe. Since the calibrations are for only the differe ntial-modes, measurement errors occur due to the undesired commonand cros s-modes of the embedded baluns and device-under-test, even under the most ideal calibration conditions. Thes e errors are evaluated using a newly proposed algorithm, which calculates the anticipated mini mum and maximum of the s-parameters that can result due to the commonand cross-modes. In efforts to further increase the measur ement bandwidth of the proposed measurement strategy, active baluns are developed using a newly proposed combined-cascode-cascade configuration, which is designed in the IBM 8HP 130 nm BiCMOS process. For input power as high as 5 dBm, the bandwidth is shown to be DC 17 GHz, where the imbalance of the differential output is less than 1.8 dB in amplit ude and less then 10 degrees in phase. With the development of a calibration algorithm for unidir ectional error-networks, active baluns become a promising solution for the proposed balun-based measurements, due to their large bandwidth and compact structure. PAGE 15 15 CHAPTER 1 INTRODUCTION TO BALUN EMBEDDED MEASUREMENTS 1.1 Advantages of Differential Circuits Differential signals are defined as tw o si gnals with the same strength and opposite polarities. Differential circuits ar e defined as networks which use differential signals for their inputs and outputs. The key advantage of using di fferential circuits, comp ared to using singleended circuits (networks with single-ended signals as their inputs and outputs) is the fundamental balanced characteristics by which one can minimi ze the flow of undesired energy transferring to and from the system, such as electromagnetic interference/compatibility (EMI/ EMC) and fluctuations of voltage-biases including ground (GND). Another advantage of using differential circuits is the rejection of even harmonics cause d by the circuits non-linearity of large-single responses, because the even harmonics are in phase at each port of the differential output, from which they are cancelled out when observing the difference between the two ports. These key advantages of differential circuits enable them to be applied to a wide range of high-speed RF applications, where recent advances are report ed in areas such as power amplifiers [1.1], frequency doublers [1.2], and distributed amplifiers [1.3]. A B C Figure 1-1. Circuits in their va rious types. A) Single-ended. B) Differential. C) GND-less differential. A further advantage of using differential circuits is in re gards to the GND. In a signalended circuit, as shown in Figure 1-1A, the circuits node-potentials are assumed to be PAGE 16 16 referenced to the underlying GND plane. However, such an assumption is only possible, when the shortest wavelength of the si gnal traveling in the ci rcuit is much longer than the dimensions of the GND plane. Any distant tw o points on the GND plane, if the resulting electric al path is comparable to the signals wavelength, cannot be modeled as the same node. Therefore, at high frequencies, the various locations in the underl ying GND plane cannot be treated as the actual GND sharing the same node. Such uncertainty of the GNDs model can cause critical design errors, which often create difficult modeling ch allenges. However, the problems caused by the GNDs uncertainty are less severe for a differential circuit, as shown in Figure 1-1B. This is because the balanced signals can make virt ual-GND nodes (nodes that behave like GND for AC signals) in local points inside the circuit, whic h are not influenced by the uncertainty of the underlying GND plane. Furthermore, the prob lem caused by the GNDs uncertainty can be solved completely by using GND-less differential circuit [1.4], as shown in Figure 1-1C, where the two balanced signals are referenced to each other rather than to GND. 1.2 Conventional Measurements of Differential Circuits In m easuring a differential circuit, or a di fferential device-under-test (DUT), the most convenient method is to use a 4-port vector-netwo rk-analyzer (VNA) with balanced differential sources and receivers [1.5]. However, due to the high cost of new test equipment, a more practical approach is sought ut ilizing 2-port VNAs, which are avai lable in most laboratories for RF circuits. The most common measurement method for utilizing the 2-port VNA is to terminate (connect to a 50 load) two of the four ports, and ca librate and measure the non-terminated ports. As shown in Figure 1-2, six combinations of such 2-port calibration and measurement are required, and the measurement results are mathem atically combined to characterize the DUTs differential operations. However, this met hod requires long measurement cycles, and the PAGE 17 17 connecting and disconnecting of the ports between each measurement compromises the measurement accuracy. The most critical problem occurs when measuring active differential circuits, because their non-linear large-signal re sponses cannot be characterized by superposing the six measurements. Figure 1-2. Conventional method for measuring a differential circuit using a 2-port VNA. Advanced solutions for the non-linear behavi or are proposed in [1.6][1.7] using a puremode VNA (PMVNA), where the 2-port VNA is connected to 3 dB hybrid-junctions that convert the two single-ended signals to and from their difference (differential-mode) and their average (common-mode). The 3 dB hybrid-junctions are further connected to switches for choosing between differential-mode and common-mode, and phase-shifters for compensating any mismatched delays in the interconnections betw een the connected parts. In the PMVNA, all of the mentioned parts are connected to a PC through the GPIB (Gener al Purpose Interface Bus) for central controls. Although this method can provide a complete solution for measuring differential circuits, the method requires sophis ticated engineering expertise in the measurement setup and in correctly interpreting the measurement results. PAGE 18 18 1.3 Proposed Measurements of Differential Circuits Using Broadband Baluns In efforts to efficiently m easure differential circuits while av oiding the engineering overhead mentioned in [1.6][1.7], a new method is proposed using baluns that focuses on measuring the differential-mode. A balun is a 3-port network that converts between balanced differential signals (bal) and unba lanced single-ended signals (un); the detail descriptions of its basic operations are presented in Chapter 2. By using baluns operating over a wide frequency range, the differential-mode of a differential circuit can be meas ured efficiently, as shown in Figure 1-3; the baluns are embedded into the meas urements, either using external baluns (Figure 1-3A for coaxial interfaced DUT and Figure 1-3B for on-wafer DUT) or using compacted sized baluns embedded in the on-wafer probes (Figure 1-3C). Note, by embedding the baluns on the probes, one can avoid the change s in the electrical lengths an d contact resistances of the connectors when maneuvering the probes betwee n the calibration and the measurements. The proposed measurement method requires the devel opment of the items shown below, which are the main topics of this work. Compact sized broadband baluns (for the case shown in Figure 1-3C) An algorithm for calibrating the effects of the embedded baluns Evaluation of measurements errors cause by the baluns imperfections The compact sized broadband balun is show n in Chapter 3, which is realized using Marchands configuration [1.8]. The new algorithms for ch aracterizing and calibrating the effects of the baluns and evaluating the errors cause by baluns imperf ections are respectively shown in Chapters 4 and 5. Active baluns are shown in Chapter 6, which are unidirectional converters between differential a nd single-ended signals. Despite th eir inability to convert bidirectionally, they are used becau se they can realize broad bandwidth in limited areas, which is beyond what passive baluns can provide. With the development of a calibration algorithm for PAGE 19 19 unidirectional error-networks, this becomes a promising solution for the proposed strategy shown in Figure 1-3C. A B C Figure 1-3. Balun embedded measurements. A) Using external baluns. B) Using external baluns connected to on-wafer probes. C) Using balun embedded probes. 1.4 Applications Beyond Network-Analyzers The potential of the proposed m easurement st rategy need not be confined to VNAs. It can be applied to virtually all si ngle-ended equipment operating in the frequency domain (such as signal generators and spectrum analyzers), so that they can be used for differential measurements. This enables the measurements to be free from post measurement processes and mathematical PAGE 20 20 calculations for achieving vi rtual-differential measurement results. The broadband balun components developed in this work can also be used for other embedded test applications, such as on device-interface boards (DIB), IC-chips (for active baluns), and load boards for automated test equipment (ATE). The compact size of the activ e baluns make them especially suitable for Built-in Self Test (BIST) applic ations [1.9]-[1.11], as well as for general on-chip differential circuits requiring compac t sized broadband baluns. PAGE 21 21 CHAPTER 2 BACKGROUND THEORIES IN BALUNS AND MIXED-MODES S-P ARAMETERS 2.1 Introduction Mixed-Mode S-Parameters The s-par ameter matrix ([ s ]) is generally used to re present multi-ported networks operating in the RF/microwave range, as shown in Figure 2-1 for 4-port and 3-port circuits. The scattering waves (or power wa ves) [2.1][2.2], labeled as a s and bs, are defined as the squareroot of the power of each ports (P1 ~ P4) propagating toward and away from the network, respectively. The ratios of these power-waves define the single-ended s-parameter matrix, as shown in Equation 2-1 for 4-port circuits and in Equation 2-2 for 3-port circuits. The elements of the s-parameter matrix are used to define the ne tworks operation, such as the gain from P1 to P3, s31, or the reflections at P2, s22. A B Figure 2-1. Nodal scattering-wave representation of A) three-port circuit and B) four-port circuit. 4 3 2 1 4 3 2 1 44434241 34333231 24232221 14131211 4 3 2 1a a a a a a a a ssss ssss ssss ssss b b b b4s (2-1) PAGE 22 22 3 2 1 3 3 2 1 333231 232221 131211 3 2 1a a a a a a sss sss sss b b b s (2-2) In order to observe differential-mode and co mmon-mode behavior, as well as the crossmode (the conversion-mode between differen tial-mode and common-mode) behavior, of the differential ports P1 (P1 and P2), P2 (P3 and P4 of 4-port network), and P2 (P3 of 3port network), mixedmode (differential-mode a nd common-mode) scattering waves are used as shown in Figure 2-2 and Equations 2-3 and 2-4 [2.3][2.4]. The subscripts d and c in the powerwaves and s-parameters represent the differen tial-mode and the common-mode. In Equations A3 and A-4, the differential-modes and common-mode s-parameters are grouped together, and the ungrouped s-parameters are the cross-modes. A B Figure 2-2. Mixed-mode scattering-wave representation of A) thre e-port circuit and B) four-port circuit. 2 1 2 1 4 2 1 2 1 22 21 22 21 12 11 12 11 22 21 22 21 12 11 12 11 2 1 2 1 c c d d c c d d cc cc cd cd cc cc cd cd dc dc dd dd dc dc dd dd c c d da a a a a a a a ssss ssss ssss ssss b b b b s (2-3) differential-mode common-mode PAGE 23 23 1 2 1 3 1 2 1 11 12 11 21 22 21 11 12 11 1 2 1 c s d c s d cc cs cd sc ss sd dc ds dd c s da a a a a a sss sss sss b b b s (2-4) Mixed-mode power-waves are defined with mi xed-mode voltages and currents. Consider P1 (P1 and P2) shown in Figure 2-2 (and Figur e 2-1). The mixed-mode voltages and currents are defined in Equation 2-5, a nd their decomposition with respect to their propagation direction is shown in Equation 2-6, which is in the same format as the single-ended representation shown in Equation 2-7. The superscripts and correspond to waves propagating towards and away from the network, respec tively. Each decomposed term shown in Equation 2-6 also follows the same definitions in Equation 2-5. Th e asymmetry with the fact or of 1/2 in Equation 2-5 was chosen for power conservation [2.3][2.4], which results in the different characteristic impedances for differential-mode and comm on-mode, as shown in Equations 2-8 through Equation 2-10. Definitions presented in Equations 2-5 through 2-10 also apply for P2 in the same way. The mixed-mode voltages and currents define the mixed-mode scattering-waves as shown in Equations 2-11 and 2-12, which is in the same format as the single-ended representation shown in Equations 2-13 and 2-14 Finally, the ratios of these mixed-mode scattering waves define the mixe d-mode s-parameters matrix, [s], as introduced in Equations 23 and 2-4. Note, for the 3-port case, the single-en ded port is represented by s. Therefore, the single-ended port P2 is the same as P3, hence, vs 2, is 2 as 2 and bs 2 are respectively same as v3, i3, a3, and b3. 2 1 2 1 1 1 1 11100 2/12/100 002/12/1 0011 i i v v i i v vc d c d (2-5) differential-mode common-mode PAGE 24 24 1 1 1 1 1 1 1 1 1 1 1 1 c d c d c d c d c d c di i v v i i v v i i v v (2-6) 2 1 2 1 2 1 2 1 2 1 2 1i i v v i i v v i i v v (2-7) 222211110//// ivivivivz (2-8) 0 11 11 02// zivivzdd ddd (2-9) 2///011 110zivivzcc ccc (2-10) cc dd cc dd c c d d c c d d cc dd cc dd c d c dzi zi zi zi zv zv zv zv iv iv iv iv a a a a02 02 01 01 02 02 01 01 22 22 11 11 2 2 1 1/ / / / (2-11) cc dd cc dd c c d d c c d d cc dd cc dd c d c dzi zi zi zi zv zv zv zv iv iv iv iv b b b b02 02 01 01 02 02 01 01 22 22 11 11 2 2 1 1/ / / / (2-12) 04 03 02 01 04 03 02 01 54 33 22 11 4 3 2 1/ / / / zi zi zi zi zv zv zv zv iv iv iv iv a a a a (2-13) 04 03 02 01 04 03 02 01 54 33 22 11 4 3 2 1/ / / / zi zi zi zi zv zv zv zv iv iv iv iv b b b b (2-14) PAGE 25 25 2.2 Mixed-Mode S-parameter Calculation Using SPICE In order to obtain simulations of [ s], an IC designer would first obtain [s] via a microwave-circuit simulator, and then convert it into [ s], through linear matrix-operations [2.3]. The problem occurs when the circuits are entered in SPICE, where a circuits schematic cannot be re-entered on a microwave-circuit simulator fo r fear of making fatal tr anslation errors. Some linking programs exist to transfer files between microwave design tools and IC CAD systems, but these require technology support, additional installed software, and sophisticated user capability. Another disadvantage is that th e relationships between the extracted [s] and the circuits operation (node-voltages and branch-currents) are not traceable. The linear matrix operation in converting [s] into [ s] further hides [ s]s relationship to the circuits operation. Furthermore, transient simulations of the mixe d-mode s-parameters fo r monitoring non-linearity as well as the stability are not available using this conve ntional method. To overcome these problems, a new way to directly extract mixed-mode s-parameters from SPICE for 4-port and 3port circuits is shown in this section, which is an extension from the previous work for singleended 2-port networks presented by [2.2] and [2.5]. 2.2.1 Extraction Circuits for Mixed-Mode S-parameters The analysis for building the attached extrac tion circuits starts with decomposing the ports nodal voltages in terms of their propagation directions as shown in Figure 2-3A. This is a 2-port circuit, where the source of vA is applied to PS and the load is connected to PL, through transmission-lines both matched with z0. The propagation-loss and phase-shifting effects of the transmission lines are assumed to be calibrated ou t. For the source port, one-half of the applied voltage propagates towards PS ( vS +=vA/2) due to a voltage division occurring between the sourceimpedance and the transmission-lines charact eristic impedance. The total nodal voltage vS must PAGE 26 26 A B Figure 2-3. Decomposing nodal vo ltages in terms of propagation direction. A) Transmissionline model. B) SPICE model. equal the sum of vS + and vS -; hence, vS -= vS -vA/2. For the load port, wh ere no waves are injected towards PL ( vL +=0), vL is equal to vL. Keeping in mind this decomposition, Figure 2-3A can be converted into Figure 2-3B where the transm ission lines are repla ced by their Theveninequivalent circuit seen at STh and LTh. The extraction of [ s]4s 1st column starts from the definition stated in Equation 2-3, where only the differential-m ode wave is injected at P1 while rest of the incident waves remain zero. This is achieved by applying unit voltages with opposite polarity at P1. Using the Thevenin-equivalent circuits shown in Figure 2-3, this is modeled as Figure 2-4A. The equation of [ s]4s 1st column is shown in Equation 2-15. Each element begins with its definition, which is expressed in terms of v+ 1,2 and v1~4. These terms are replaced by v1~4, via the same decomposition analysis shown in Figure 2-3. The final expression of Equation 2-15 can be PAGE 27 27 realized by the attached circuitry as shown in Figure 2-4A. Voltages v1~4, control the dependent sources of the attached circuits which are arranged in accordance with the final term of Equation 2-15 to generate the outputs sdd 11, sdd21, scd 11, and scd 21, which are node voltages interpreted as dimensionless quantities. By applying unit volta ges with the same polarity, the elements of [ s]4s third column can be extracted using a si milar procedure. These results are shown in Equation 2-16 and in Figure 2-4B. A B Figure 2-4. Extraction circuit for [ s]4. A) First column. B) Third column. 43 21 43 21 43 21 43 21 21 02 01 02 01 01 21 11 21 111 1 / / / / / 1 vv vv vv vv vv vv vv vv vv zv zv zv zv zv s s s sc c c c d d d d d d cd cd dd dd (2-15) 43 21 43 21 02 01 02 01 01 21 11 21 111 / / / / / 1 vv vv vv vv zv zv zv zv zv s s s sc c c c d d d d c c cc cc dc dc (2-16) The extraction circuits for elements of the [ s]4s 2nd and 4th columns can be achieved by switching the two differential ports, P1 (P1 and P2) and P2 (P1 and P3), followed by the PAGE 28 28 same procedure, as shown in Equations 2-17 and 2-18. The final terms of these equations can be realized in circuits as shown in Figure 2-5. The extraction circuits for extracting elements of [ s]3 are also done in the same way as that of [ s]4. The derivation procedure for extracting elements of [ s]3 are shown in Equations 2-19 through 2-21, and the resulting extraction circuits are shown in Figure 2-6. 43 21 43 21 02 01 02 01 02 22 12 22 121 / / / / / 1 vv vv vv vv zv zv zv zv zv s s s sc c c c d d d d d d cd cd dd dd (2-17) 1 / / / / / 143 21 43 21 02 01 02 01 02 22 12 22 12vv vv vv vv zv zv zv zv zv s s s sc c c c d d d d c c cc cc dc dc (2-18) A B Figure 2-5. Extraction circuit for [ s]4. A) Second column. C) Fourth column. 21 3 21 01 03 01 01 11 21 112 1 / / / / 1 vv v vv zv zv zv zv s s sc c d d d d cd sd dd (2-19) PAGE 29 29 21 3 21 01 03 01 03 12 22 122 12 2 / / / / 1 vv v vv zv zv zv zv s s sc c d d cs ss ds (2-20) 1 2 / / / / 121 3 21 01 03 01 01 11 21 11vv v vv zv zv zv zv s s sc c d d c c cc sc dc (2-21) A B C Figure 2-6. Extraction circuit for [ s]3. A) First column. B) Second column. C) Third column. 2.2.2 Application Examples The mixed-mode s-parameters are extracte d with the proposed SPICE-based method and they are compared with the results obtained from Agilent ADS, followed by linear matrix operations shown in Equations 2-22 and 2-23 for 4-port and Equations 2-24 and 2-25 for 3-port, which can be derived from definitions shown in Section 2.2.1. The extractions are done for a 5 PAGE 30 30 GHz CMOS fully-differential amplifier, and also for a differential transformer (adapted from [2.6]) with unbalanced coupli ng of a nearby conductive loop. 1010 1010 0101 0101 1100 0011 1100 0011 2 14 4s s (2-22) 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 244433433424132314443343342413231 24231413 22211211 24231413 22211211 44433433424132314443343342413231 24231413 22211211 24231413 22211211 4ssssssssssssssss ssss ssss ssss ssss ssssssssssssssss ssss ssss ssss ssss s (2-23) 020 101 101 011 200 011 2 13 3s s (2-24) 2 2 2 2 2 2 2 222211211 2313 22211211 3231 33 3231 22211211 2313 22211211 3ssss ss ssss ss s ss ssss ss ssss s (2-25) The circuit diagram of the fully-differential amplifier is shown in Figure 2-7. All of the inductances (and the transformers) include a series resistance to account for a finite Q of 10, and the current source is replaced by a CMOS current mirror. The first stage (MP1 and MP2) is a differential common-source conf iguration with LC-resonator loads to achieve high drain impedance, and hence, achieve high gain. Th e second stage (M1 and M2) also uses commonsource configuration with LC-resonators, where the LC-resonators also work as impedance PAGE 31 31 matching networks to achiev e output resistances of 50 The input matching circuits attached in P1 and P2 are designed using LC-networks. To achieve high commonand cross-modes, the authors deliberately made the size and current carrying capabilities of the CMOS asymmetric via the CMOS NFET model Kp parameters (0.02 mA/V2 for MP1 and M1, and 0.022 mA/V2 for MP2 and M2). The magnitude of the extracted mixed-mode s-parameters are shown in Figure 2-8. The solid lines are obtained via this new method (using SPICE), and the dotted lines are obtained by microwave circuit simulation and the mixed-mode matrix conversion operation. Both results show almost identical responses, with a slight difference due to the different MOS models (as well as parasitic models) between SPICE and the microwave simulator. The other elements of [ s]4 which are not shown here, have magnitudes lower than -60 dB, and were unsuitable to compare due to the noise of th e numerical simulation errors. Figure 2-7. Two-staged 5GHz CMOS fully-d ifferential amplifier; CMOS NFET model Kp parameters are 0.020 mA/V2 for MP1 and M1, and 0.020 mA/V2 for MP2 and M2; all L includes series resistance to achieve finite Q of 10. PAGE 32 32 Figure 2-8. SPICE-bas ed extraction of [ s]4 for the circuit shown in Figure 2-8. The layout and the circuit diagram for the fu lly-differential transf ormer (4-port) and a differential to single-ended transformer (3-port) are shown in Figures 2-9 and 2-10. Note, P4 remains open in the 4-port case, and P4 is s horted to ground for 3-port case. The inductance of the metal path P1-to-P2 (black) and P3-to-P4 (g ray) are respectively 0.5 nH and 0.3 nH, and the coupling coefficient between thes e two inductances is 0.8. The transformer is unbalanced by the asymmetrical coupling of a nearby inductance of 0.2 nH (white), where the coupling-coefficients to the upper spiral structur e (k) is 5 times larger than that of the lower spiral structure (k'). The resistances associated with the inductance acc ount for the finite Q of 10 at 5 GHz, and the parasitic capacitances are omitted for simplicity. As shown in Figures 2-11 through 2-14, the SPICE-based extractions are identical to those obtained via ADS, both in magnitude and in phase, which prove that the proposed method is accurate and free from any approximation or assumption. The elements of [ s]4 and [ s]3 that PAGE 33 33 are not shown in Figures 2-11 through 2-14 are the ones with the magnitudes smaller than -120 dB, where the simulations numerical errors became predominant. Figure 2-9. Layout of a differential transfor mer with unbalanced coupling of a nearby loop. Figure 2-10. Circuit model of a differe ntial transformer shown in Figure 2-9. PAGE 34 34 Figure 2-11. SPICE-based magnitude extraction of [ s]4 for the circuit show n in Figure 2-10 (4port case). Figure 2-12. SPICE-based phase extraction of [ s]4 for the circuit shown in Figure 2-10 (4-port case). PAGE 35 35 Figure 2-13. SPICE-based magnitude extraction of [ s]3 for the circuit show n in Figure 2-10 (3port case). Figure 2-14. SPICE-based phase extraction of [ s]3 for the circuit shown in Figure 2-10 (3-port case). PAGE 36 36 2.3 Introduction to Balun and Relative-Bandwidth A balun is 3-port network, as shown in Figure 2-1B, which converts between balanced differential signals (bal) and unbalanced single-ended signals ( un). As shown in Equation 226, an ideal balun is define d as a 3-port network where s13 (= s31) and s23 (= s32) are both 1/sqrt(2) with opposite polarities (180 differe nce in phase), while all other single-ended sparameters are zero. Such a single-ended s-para meter matrix means that the single-ended signal in P3 splits its power into (or combines its pow er from) P1 and P2 with opposite polarities, while all ports do not reflect any powers and maintains perfect isolation betwee n P1 and P2. The same balun can be represented using a mixed-mode 3port network, as shown in Figure 2-2B. As shown in Equation 2-27, an ideal balun is defined as a 3-port network where sds 12 (= ssd 21) is 1, while all other undesired mixed-mode s-paramete rs are zero. Such a mixed-mode s-parameter matrix means that the single-ended signal in P3 completely transfers its power to (and receives its power from) P1 in its differential-mode, while all other transfers and reflections are zero. 180 ; 0 2 2 20 0 20 0 21 2 1 1 1 2 1 1 1 333231 232221 131211 sss sss sss (2-26) 000 001 010 11 12 11 21 22 21 11 12 11 cc cs cd sc ss sd dc ds ddsss sss sss (2-27) The frequency behavior of a ba lun is often characterized by using a figure of merit called the relative-bandwidth. Its definition is shown using Figure 2-15, which is a frequency response of an example balun (Rat-race ba lun [2.7]) operating with the cen ter frequency of 6 GHz. At 6 GHz, the single-ended s-parameters (Figure 2-15A) show that it transmits with -3 dB loss through s13 (= s31) and s23 (= s32) with opposite polarities of 180, while the other undesired PAGE 37 37 single-ended s-parameters are very low. Figure 2-15B shows the same balun in mixed-mode sparameters, where at 6 GHz, th e differential transmission of sds 12 (= ssd 21) is 0 dB, while the other undesired mixed-mode s-parameters are very low. However, these undesired s-parameters increase as the frequency approaches the side bands, towards 3 GHz and 9 GHz, where the balun no longer operates ideally. A B Figure 2-15. Rat-race balun operating at 6 GHz. A) Single-ended. B) Mixed-mode. As shown in Figure 2-15B, absolute-bandwid th (BW) of a balun can be defined using which denotes the minimu m required difference between sds 12 (= ssd 21) and all other undesired s-parameters. In this work, ab solute-bandwidth is defined by using = -3 dB, and the PAGE 38 38 relative-bandwidth is defined by normalizing the absolute-bandwidth by its center frequency, as shown in Equation 2-28. This figur e of merit is often convenient wh en characterizing baluns that are realized using passive compone nts, such as coupled microstr ip transmission-lines (TL) or transformers using coiled ferrites, since this main tains its value regardless of the change of center frequency via structural scaling; if the used materials electromagnetic performances are maintained through the change of frequencies, the center frequency can be increased (or decreased) by scaling down (or scal ing up) the structural dimensions. 717.0 GHz 6 GHz 85.3GHz 15.8 frequency center bandwidth-absolute bandwidth-relative (2-28) From various types of baluns, the planar-type Marchand balun [2.8][2.9] is chosen in this work, for its area-efficient structure and its cap ability to produce large relative-bandwidths compared to other balun types such as the lumped delay type [2.10] or the Rat-race type [2.7]. The detail operation of Marchand baluns and their app lications to balun embedded measurements are shown in the next chapter. PAGE 39 39 CHAPTER 3 MARCHAND BALUN EMBEDDED PROBE 3.1 Introduction to Marchand Balun Embedded Probe Baluns are embedded into on-wafer probes in o rder to provide accurate differential measurement capabilities for c onventional single-ended two-port VNAs, as shown in Figure 13C. From various types of baluns, the planar Marc hand balun is chosen in this research, for its area-efficient structure and its capability to produce large relative-bandwidths compared to other balun types of passive baluns. The review of coaxial Marchand Balun [1.8] and its migration to the planar type is shown in S ection 3.2. The analytical derivation procedure for designing the optimum planar-type Marchand ba lun and the newly proposed Marc hand-coupling structures are respectively presented in Sections 3.3 and 3.4. The final measurement results are discussed in Section 3.5. 3.2 Coaxial Marchand Balun and the Migration to its Planar Type A cross-sectional view of a general coaxial cable is shown in Fi gure 3-1. Although this has only two conductors, it has three current compone nts as annotated as I_center, I_outer, and I_shield, where I_center is alwa ys equal to I_outer with oppos ite directions. Using coaxial transm ission-lines (TL), the original Marchand balun can be designed as shown in Figure 3-2, along with its cross-sectional view It uses double-coax structures where the inner coaxes have the characteristic impedances of za (at the left-hand side) and ze (at the right-hand side) and the outer coaxes have the characteristic impedance of zb. The I_center and I_outer of the za-coax share the same values but are in opposite directi ons. The goal is to couple these currents into the two center conductors of the z0-coaxes located at the bottom. However, the problem is that in the za-coax, the current in the outer conductors inner-part (I_outer) is connected to its outer-part (I_shield) at any cut interfaces. Hence, th is I_outer couples into I_center of the zb-coax. As PAGE 40 40 Figure 3-1. Cross-sectional view of a coaxial cable and its currents. A B Figure 3-2. Coaxial Marchand balun. A) 3-D view. B) Cr oss-sectional view. PAGE 41 41 shown in the remainder of this section, the c/4-length (where, c is the wave-length of the center frequency of fc) of the zb-coax and the series open-ended ze-coax enables these undesired coupling to be cancelled out over a wide range of frequency. Figure 3-3 is the TL model of the Marchand balun, where the conductive bodies, labeled as A ~ Q, can be compared with labels shown in Figure 3-2. The TL model shows that signals at P1 and P2 always have opposite polarity. Furtherm ore, since this is a pa ssive-lossless network, the matching of the differential port, P1 and P2, to 100 enables the single-ended port, P3, to be matched to 50 Therefore, the bandwidth of the impeda nce seen at the differential port can be directly translated as the bandwidth in which the Marchand balun operates. Figure 3-4 shows the equivalent circuit for calculati ng the differential-mode impedance seen at the differential port, zD, which is 2 times the value of the displayed zodd, as shown in Equation 3-1. This factor of 2 is due to the definitions of differential-mode currents an d voltages, which is shown in the Equation 2-5. The equivalent lumped elements zX, zY, and zZ, are the impedances of the shorted c/4-stub of zbcoax (Equation 3-2), 50 terminated za-coax, and the opened c/4-stub of ze-coax (Equation 33), respectively, where is the normalized frequency as shown in Equation 3-4. By assuming za = 50 (hence, zY = 50 ), one can derive th e matching condition of zD = 100 which is ze = za 2/(2zb). Note that the differential-mode impedance, zD, tends to maintain a constant value over a wide range of because the variation caused by the tan term of the shorted c/4-stub ( zX) and variation caused by the cot term of the opened c/4-stub ( zZ) tends to cancel each other, as shown in Figure 3-5. The flatness increases for higher zb. However, if zb is too large (beyond 200 ) the shorted c/4-stub could no longer be modeled as Equation 3-2, because of the increasing dimensions of the outer coax, wher e the propagation can no longer be treated as purely transverse-electromagnetic (TEM) mode. PAGE 42 42 Figure 3-3. Transmission-line model of Marchand balun. Figure 3-4. Equivalent circuit for the impeda nce seen at Marchand baluns differential port. ||222ZYX odd Dzzz zz (3-1) tan b Xzjz (3-2) cot 22 0 b Zz z jz (3-3) c c cvelocity-phase ; 2 f f f (3-4) PAGE 43 43 A B Figure 3-5. Normalized freque ncy plot of the differential-mode impedance seen at Marchand baluns differential port A) Real value of zD. B) Imaginary value of zD. Although the double-coax typed Marchand balun provides convenient theoretical designs, there are critical challenges with respect to the actual manufacture and assembly process. So it is often practical to reali ze the concept using planar TLs that can be created usi ng printed-circuitboard (PCB) or thin-film process. The basic circuit for such plan ar Marchand balun is shown in Figure 3-6, where the single-ended port, P3, bi-directionally converts the signal transmitted to and from the differential balanced ports, P1 and P2. At the center frequency of fc, the signal entering the single-ended port, P3, goes into a coupled TL structur e, and reaches plane A after traveling c/4, where the balanced signals can be ach ieved when given the correct amount of PAGE 44 44 coupling. However, in order to main tain the balance at the sidebands, zopen is connected in series to P1 for phase compensation, which enables a broad 3 dB-relative-bandwidth of 1~1.3. Hence, the Marchand-coupling consists of two c /4 coupled TLs, where one is connected to the singleended port, P3, and the other one connected to an open-ended te rminal. This Marchand-coupling need not be symmetric where one c /4 coupled TL is the exact mirror image of the other. However, this work uses the symmetric type, because of the convenience in the manufacturing, and also because it provides superi or balance of the signals at P1 and P2, due to their symmetric structure with respect to GND [3.1]-[3.3]. Figure 3-6. Planar-t ype Marchand balun. For the planar-type Marchand balun, the manufacturing and assembly process are far more convenient than that of the coaxial type, especially in high frequencies, where the availability of the coaxial cables with the required characteristic impedances is limited. However, the design and optimization aspect is more difficult compared to the coaxial type. This is primarily because the design paramete rs of the previous double-coax, za and zb, which can be chosen independently from each other, are now replaced by the coupled TLs differential-mode and common-mode charact eristic impedances, z0 d and z0, that are coupled to each other. The comparative study between two approaches is list ed in Table 3-1. To overcome these challenges for designing planar Marchand baluns, a new optimi zation procedure is deve loped analytically as shown in the next section. PAGE 45 45 Table 3-1. Using double-coax vs. using P CB coupled-TL in realiz ing Marchand-coupling Design Issues Double-Coax PCB Coupled-TL characteristic impedances za = va/ ia zb = vb/ ib z0 d = 2( v1v2)/ ( i1i2) z0 c = 0.5( v1+v2)/ ( i1+i2) analytical solutions za,b = 59.9591sqrt( r/ r) x ln ( radout/ radin) none need to use full-wave simulators design standpoint convenient za and zb are independent difficult z0 d and z0 c are coupled manufacture standpoint difficult inconsistent dimensions medium convenient custom PCB vendors 3.3 Analytical Derivation for Optimum Design 3.3.1 General Quarter-Wavelength Coupled TL Designing a planar Marchand balun requires finding the optimum values for the characteristic impedances of Marchand-coupled TL z0 d of the differential-mode and z0 c of the common-mode. This starts with characterizing a general c/4 coupled TL, as s hown in Figure 3-7, where z2 ~ z3 are arbitrary terminal impedances. The goal here is to solve for the input impedance, zin, at the center frequency, fc, which will be used as the central tool for finding the optimum values of z0 d and z0 c. As shown in Equation 3-5, the single-ended v s in ports P1 and P3 can be written in terms of differential-mode, vd 0, and common-mode vc0, where they are split in to their direction of propagation (the superscript + denotes the co mponent propagating towards P2 and P4, while PAGE 46 46 the superscript denotes the component propaga ting towards P1 and P3). Similarly, Equation 3-6 shows the differentialand common-mode vs at ports P2 and P4, where the terms j is to account for the c/4 propagation. From Equations 3-5 and 3-6, v1~4 can be written in terms of the directional vd 0s and vc0s as shown in Equation 3-7. The same can be is applied to the currents as shown in Equations 3-8 through 3-10, where the characteristic impedances are defined in Equation 3-11. Applying an AC 1V signal to the node v1, Kirchoffs voltage-law gives the first term of Equation 3-12. Its v1~4 and i1~4 can be replaced by the directional vd 0s and vc0s, as shown in the rest of Equation 3-12. From this equation, the directional vd 0s and vc0s can be solved using the inverse matrix of M. The results are inserted in to Equation 3-7 and Equation 310, by which the analytical form of v1~4 and i1~4 respectively obtained. Si nce the input is AC 1V, the inverse of the current i1 becomes equal to input impedance as shown in Equation 3-13. Figure 3-7. General c/4 coupled transmission-line. 0 0 0 0 0 0 3 12/12/1 11c d c d c dv v v v v v v v (3-5) 0 0 0 0 4 22/12/1 11c d c dv v j v v j v v (3-6) 0 0 0 0 4 3 2 12/2/ 112/12/1 2/2/ 112/12/1c c d dv v v v jjjj jj-jj v v v v (3-7) PAGE 47 47 0 0 0 0 0 0 3 111 2/12/1c d c d c di i i i i i i i (3-8) 0 0 0 0 4 22/12/1 11c d c di i j i i j i i (3-9) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 3 2 12/2/// 2/12/1/1/1 2/2/// 2/12/1/1/1 2/2/ 2/12/111 2/2/ 2/12/111c c d d c c d d c c d d c c d d c c d d c c d dv v v v zjzjzjzj z z zz zjzjzjzj z zz z i i i i jjjj jj-jj i i i i (3-10) 00 00 00 00 0 0/ / / /cc dd cc dd c div iv iv iv z z (3-11) c c d d c c d d c c d d c c d dz z j z z j z z j z z j z z z z z z z z z z j z z j z z j z z j v v v v ziv ziv ziv v0 4 0 4 0 4 0 4 0 3 0 3 0 3 0 3 0 2 0 2 0 2 0 2 0 0 0 0 444 333 222 12 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 1 2 1 2 1 ; 0 0 0 1 0 0 0 1 M M (3-12) 2 0 04 2 0 02423 2 0 023 2 0 043 2 002 2 2 2 4 2 2 2 2 4 d c d c d c d c cd inz zz z zzzzz z zzz z zzzzz z (3-13) PAGE 48 48 3.3.2 Optimum Design for Planar Marchand Balun The planar-type Marchand balun is shown ag ain in Figure 3-8A, where the equivalent impedances of the Marchand-coup ling networks are defined as zeq1 and zeq2, as shown in the equivalent circuit in Figure 3-8B. The impedan ces seen at various positions are labeled as zX, zY, and zZ. For the balun to work ideally, the input si gnal at P3 must be delivered to a matched impedance of zZ = 50 For balun to become lossless, half of this 50 must be due to the coupling to P1 and the other half must be due to the coupling to P2. Hence, the real part of zeq 1 and zeq 2 must both be equal to 25 However, Equation 313 indicates that zeq 2 is purely real (when assuming the z0 d and z0 c are also purely real). This also means zeq 1 is purely real since zeq 1 + zeq 2 must be equal to 50 Hence, zX = 25 and zY = 75 where the additional 50 in zY comes from the source impedance at P3. A B Figure 3-8. Impedances of planar Marchand balun with symmetric c/4 coupled TL. A) Original circuit. B) Equivalent circ uit using lumped impedances, zeq 1 and zeq 2. PAGE 49 49 Using Equation 3-13, zX and zY can be expressed in terms of z2~3, where the appropriate values for z2~3 can be chosen by comparing the port numberings between Figure 3-7 and Figure 3-8A. The results are shown in Equations 3-14 and 3-15, from which the final the optimum values for z0 d and z0 c are found, as shown in Equations 3-16. Note that in obt aining Equations 316, the proper signs can be chosen using the physical fact that 2 z0 c is always greater than or equal to z0 d/2. Figure 3-9 shows the simulated s-paramete rs of the planar-type Marchand balun using the optimum characteristic impe dances shown in Equation 3-16. 25 2/2 2/2 50 0 502 00 2 00 4 3 2 dc dc inXzz zz z z z zz (3-14) 7525 2/250 4 0 50 502 00 2 00 4 3 2 dc cd inYzz zz z z z zz (3-15) 36.85 58.58 2/11/25 2/11/1000 0 c dz z (3-16) Figure 3-9. Simulation results of an optim ized planar Marchand balun operating at fc = 6 GHz. PAGE 50 50 3.3.3 Common-Mode Matching As shown in Figure 3-9, the Marchand ba lun offers a broadband matching at the differential port, P1 and P2, for differentialmode, but it becomes an open circuit for commonmode. This can be interpreted as poor isolation between P1 and P2. If the differential DUT has any significant commonor cro ss-modes, any reflections of the unmatched common-modes of the balun will result in measurement errors, ev en under the most accurate calibrated conditions. Therefore, when the baluns are being used for testing differential DUTs, it is very important for them to be matched in both the di fferentialand common-mode, in other words, P1 and P2 need to be well isolated. This is achieved by attaching 50 resistors at P1 and P2 which are looped with a 50 half-wavelength TL [3.4], as shown in Figure 3-10. Due to the electrical symmetry, the center point of the looped TL beco mes a virtual-open for the common-mode and a virtual-GND for the differential-mode, at the center frequency, fc. Therefore, when the signals travel c/4 towards the terminals of the attached resistors, they become virtual-GND for common-mode and a virtual-open for differentia l-mode. As a result, the attached network provides 50 terminations at each port for the comm on-mode, while remaining transparent for the differential-mode. Note that the same will not apply for the sidebands of the center frequency, fc, resulting in a narrower 3 dB-relative-bandwidth, as will be shown in Section 3.5. Figure 3-10. Planar Marchand ba lun with common-mode matching. PAGE 51 51 3.4 Structural Realization The previous section showed that the optim ized design for planar-type Marchand balun required a very large coupling where z0 d is low as 0.7 x z0 c. This gives rise to new challenges in the structural design of the coupled TL. The cross-sectional views of their various structures are shown in Figure 3-11. Figure 3-11A is most commonly used [3.5], but its coupling is too small where the z0 d cannot be made as low as 0.7 x z0 c. This can be solved by coupling on both sides [3.6][3.7], as shown in Figure 3-11B. However, this requires bondwires, which degrades the reproducibility with respect to manufacturing. Also, this makes it difficult to place and route the Marchand-coupling while connecting the common-m ode matching network. An alternative way is to couple vertically [3.8], as shown in Fi gure 3-11C. This provides ve ry large coupling where there are virtually no limits to how small the z0 d can be made with respect to z0 c. However, a critical problem is that the derived optimum z0 d and z0 c cannot be applied, because the two coupled TL are asymmetric wi th respect to the GND. A B C Figure 3-11. Cross-section of various coupled microstrip-TL structures. In order to achieve large coup ling between the two TL that are symmetric with respect to the GND, a new coupled TL is proposed, where its cross-sectional view is shown in Figure 3-12. It uses a double-sided single-layer PCB surrounded by conductive fixtures. Note that regardless of the type of coupled TL, such conductive fixtur e is expected to inhe rently exist, for EMI protection and for the structural robustness in preparation for the final assembly to the probe. Large coupling can be easily achieved in th is structure, because the majority of the PAGE 52 52 electromagnetic field propagates inside the P CBs substrate of high dielectric constant ( r = 2 ~ 4) for differential-mode, while that of the common-mode propagates in air ( r = 1). However, since the phase-velocitie s of the differential and common-mo de are no longer the same, as was the case in Section 3.3.1, it requires further stru ctural tuning from its no minal values that had produced the characteristic-impedan ces presented in Equation 3-16. In choosing the operatin g center frequency, fc, one must consider that it requires more area for lower fc, due to the increased length of the Marchand-coupling and the common-mode matching network, whic h are proportional to c. Considering the limited available area in the probes holder, this work was challenged to achieve an fc as low as 6 GHz, which fully occupies the available area as shown in the next secti on. However, by allowing the balun to become somewhat larger than the probes holder, fc can be anticipated to become as low as 3 GHz. Note, there is less motivation to make Marchand baluns lower than fc = 3 GHz, because for such low frequencies, compact sized ferrite-transformers can be used instead, which can operate from DC to 1 ~ 2 GHz. Figure 3-12. Cross-section of the propos ed coupled microstrip-TL structures. Using the proposed coupled TL structure, two types of Marchand baluns of fc = 6 GHz are realized using an 8 mil-th ick Rogers (RO4003) PCB, as shown in Figure 3-13. The top trace and the bottom trace are not only used as coupled TLs for the Marchand-coupling, but also as signal-path and GND for microstrip TLs before and after the Marc hand-coupling; at the single- PAGE 53 53 A B Figure 3-13. PCB layout of the proposed Marchand balun. A) Type-A. B) Type-B. PAGE 54 54 ended port, P3, the bottom trace is the signals pa th while the top trace is the GND, and for the differential ports, P1 and P2, as well as for the common-mode matching branch, the top trace is the signals path while the bottom trace is th e GND. Such a design provides convenient portinterfaces to coaxial cables, and enables the structure to be free from vias and bond-wires, by which one can achieve high cost-efficiency and high reproducibility in manufacturing. Note that the common-mode matching branch for type-A uses a thinner trace than that of type-B and any other 50 traces. This is because of the finite length of the dual trace (along with their undesired coupling e ffects) that exists between th e Marchand-coupling and the chip resistors terminals. This makes the optimum characteristic impedance of the common-mode matching branch to be higher than its nominal 50 and this new thinner TL was chosen to be optimum with respect to achieving the broadest relative-bandwidth. A B Figure 3-14. Proposed balun embedded probes. A) Type-A. B) Type-B. PAGE 55 55 The designed planar type Marc hand baluns are assembled w ith the conductive fixtures and embedded onto the on-wafer probes as shown in Figure 3-14. The probe holder and probes tips are ones used by the commercial Dual Infi nity Probe series manufactured by Cascade Microtech Inc. 3.5 Measurement Results The balun embedded probes are measured using a dual-through pattern that is connected to a dual-probe, as shown in Figure 3-15. The disp layed ports, P1 ~ P3, are measured 2 ports at a time using a 2-port VNA, while the 3rd port is terminated. This is followed by a post measurement process that shifts the reference pha se plane, as shown in the figure. Finally, the full 9 mixed-mode s-parameters are calculated by combining all 3 combinations of such measurements and using Equation 2-25. Figure 3-15. Measuring balun embedded probes using a dual-thr ough connected to a dual-probe. The measured mixed-mode s-parameters are shown in Figure 3-16. It shows wellbalanced signals at the fc = 6 GHz, which gradually degrades as they approach towards the sidebands, 3 GHz and 9 GHz. Although these im perfections become transparent through calibration, the effects of these undesired reflecti ons, as well as commonand cross-modes of the differential DUT, can degrade the accuracy of the measurement, as presented in Chapter 4. However, one can roughly estimate the m easurement bandwidth by using 3 dB-relativebandwidth as introduced in Section 2.3. The sdd21 = sdd12 of type-A and type -B are shown to be PAGE 56 56 A B Figure 3-16. Measurement results of the propos ed balun embedded probes. A) Type-A. B) Type-B. PAGE 57 57 3 dB larger than the other s-parameters at 3.25 GHz ~ 8.67 GHz and 3.43 GHz ~ 8.55 GHz, respectively. Hence, their center frequencies are respectively 5.96 GHz and 5.99GHz, and the resulting relative-bandwidths are respectively 0.909 and 0.855. The measurement results showed that the proposed balun embedded probes can be used in differential measurement for br oad relative-bandwidths, as long as the effects of the baluns are calibrated. The calibration pro cedure along with a new characte rization method for the balun embedded probes are presented in the following chapter. PAGE 58 58 CHAPTER 4 CHARACTERIZATION AND CALIBRATI ON FOR 3-P ORT ERROR NETWORK 4.1 Introduction to 3-port Error-Box and its Characterization In the proposed balun embedded measurement strategy, the error-ne twork (or error-box), from each port of the VNA to the DUT, is 3-por t rather than the conventional 2-port. The calibration of such error-boxes is shown in [4.1] and [1.7]. These methods can efficiently extract the 4 mixed-mode s-parameters of interest (e ither the differential-mode or the common-mode, depending on the type of the 3 dB-coupler used for the measurements), out of the 9 mixed-mode s-parameters. However, it is also very important to extract the other remaining 5 mixed-mode sparameters describing the imperfection of the 3 dB-coupler, because they contribute to critical measurement errors that can occur even unde r the most accurate calibrated conditions, as discussed in Chapter 5. Extracting the full 9 mixed-mode s-paramete rs of the error-box is shown in [4.2]. However, its application is limited to measuring th e reflections of differential loads, and requires the use of 3 dB hybrid-junctions that are capable of converting both differential-mode and common-mode, simultaneously. The general method to characterize a 3-port error-box that converts only to differential-mode or only to common-mode is to use a dual-through pattern connected to a dual-probe. This is shown in Figure 4-1, for the case of balun embedded probes (Figure 1-3C). The dual-through is a pattern availa ble in the impedance-st andard-substrate (ISS) made for dual-probes, and the Coa xial Cable is the same coax that will be used during the actual balun embedded measurement. The displayed ports, P1 ~ P3, are measured 2 ports at a time using a 2-port VNA, while the 3rd port is terminated. This is followed by a postmeasurement process that shifts the reference pl ane, as shown in the figure. Finally, the full mixed-mode s-parameters are calculated by comb ining all 3 combinations of such measurement PAGE 59 59 as shown in Equation 2-25. However, this method cannot account for the errors associated with the imperfections of the dual-thr ough pattern and dual-probe, and any errors that occur in the VNA itself. It also requires connecting and disconnecting of ports betw een each measurement, which compromises the accuracy. Figure 4-1. Full Characteriza tion of the 3-port error-box in the measurements using balun embedded probe. To overcome these problems, this work pr oposes a new set of Impedance-StandardSubstrate (ISS) that can be used to efficiently characterize the full mixed-mode s-parameters of the 3-port error-box, which will be presented and verified in Section 4.2. The proposed method uses a pseudo-inverse of an over-determined matrix by which the extracted results are tolerant to errors that occur when measuring the impedan ce standards. Although the work focuses on balun embedded measurements, the same method can be applied to general on-wafer measurements using 3 dB-couplers. Furthermore, by a minor va riation, the proposed method can be used to efficiently extract the full mixed-mode s-parameters of the 3 dB-coupler embedded probe itself, which becomes a valuable tool in the probes de velopment stage. The application for a Marchand balun embedded probe is shown in Section 4.3, and Section 4.4 shows th e calibration procedure using the 4 differential-mode s-parameters of the extracted 9 mixed-mode s-parameters. 4.2 Proposed ISS and Extraction Algorithm The goal is to extract the full 9 mixed-mode s-parameter of the 3-port error-box, from the VNAs ports to the tip of the balun embedded probes. As shown in this section, this is done by PAGE 60 60 extracting the full 9 single-ended s-parameters using the proposed ISS, and than mathematically converting them into the full 9 mixed-mode s-parameters, which is basically a variation of the conventional method used for singl e-ended 2-port error-boxes [4.3]. 4.2.1 Proposed ISS The circuit-schematic of the proposed ISS is shown in Figure 4-2A. It consists of 9 patterns of dual-loads for P1 and P2, and 1 patt ern of through (thru) which connects them. The 9 dual-load patterns are labeled with two lettered acr onyms, where the first and second letter respectively denote the load of P1 and P2, and the letters S, O, and M, respectively represent short, open, and matched. It is assumed that the two ports are well isolated in A B Figure 4-2. Proposed impedancestandard-substrate (ISS). A) Ci rcuit schematic. B) Locations on the reflection plane. PAGE 61 61 the ISS (less then -32dB up to 10 MHz ~ 40 GH z), which can be achieved by placing a GND strip between the two landing pads of P1 and P2 Figure 4-2B shows the locations of the 9 dualload patterns in a reflection plane where its axis X and Y are the reflection-coefficients at P1 and P2, respectively. It shows that the 9 patterns are equally spaced among themse lves, so that all of the patterns produce well distin ct dual-reflections at high frequencies. The proposed ISS is designed to be applicable for 100 um ~ 150 um pitched GSSG (GND-Si gnal-Signal-GND) probe tips, and its prototype is manuf actured by Cascade Microtech Inc., which is a variation of their commercial ISS (P/N 129-246) made for dual-probes. 4.2.2 Required Measurements Two sets of measurements ar e required in using the proposed ISS, as shown Figure 4-3. The first set, Figure 4-3A, characterizes the impe dances of the patterns so that they become known dual-loads. Hence, the pa tterns are measured using a dualprobe that is calibrated up to plane-a. For 9 dual-load patterns, the measured s11 and s22 are respectively stored in variables A B Figure 4-3. Required measurements for the prop osed extraction algorithm. A) Measuring ISS only. B) Measuring ISS through error-box. PAGE 62 62 Xi and Yi,, where the index i = 1 ~ 9 corresponds to 9 dual-load patterns. For the thru pattern, the measured s11, s22 and s21 (= s12) are respectively stored in X10, Y10, and Z10. Note, if this proposed algorithm becomes systematically inco rporated into the VNA, this first set of measurements can be avoided by simply typing in the cal-coefficients of the dual patterns. The second set of measurements, Figure 4-3B, characterizes the raw reflections of the patterns through the 3port error-box. Therefore, the measur ements are done without calibration. The measured reflections are stored in variables Ri, where i = 1 ~ 10 corresponds to the same index used in the first set. 4.2.3 Extracting S-parameters of the 3-port Error-Box The flowgraph of the single-ended s-parame ter for the 3-port error-box and the ISS is shown in Figure 4-4. The goal is to extract the unknown s-parameters of the 3-port error-box (the es which are substituted by a ~ f and g for convenience), using the known s-parameters of the ISS ( Xi, Yi, and Zi) and the measured reflections (Ri). For the 9 dual-load patterns with Zi=1~9 = 0, Ri=1~9 can be expressed using Masons Rule [4.4], as shown in Equation 4-1. By rearranging the terms and writing for each of the i s, this can be expressed in a matrix from, as shown in Equation 4-2. Since M is a 9 x 7 over-determined matrix, its pseudo-inverse (M+) is used to solve for X = M+R, which is the unique solution that makes the error of ||R-MX||2 minimum [4.5]. For the thru pattern with Zi=10 0, R10 can be expressed using Masons Rule, as shown in Equation 4-3, which is rearranged in Equati on 4-4 to achieve separate expressions for gf and c. From the solved X from Equation 4-2 and the expression of gf and c shown in Equation 4-4, the unknown a ~ f and g can be extracted by the following procedure. First, a b and d are obtained from the first 3 elements of X. These are then used in the next 3 elements X, from which, g2, f2, and c2 are obtained. To extract their sign information, the obtained a b d g2, f2, and c2 are used in 7th elements of X to solve for gfc Finally, by inserting the obtained a b d g2, PAGE 63 63 Figure 4-4. Flowgraph of the I SS measurement through the error-box. f2, c2, and gfc into Equation 4-4, the signs of gf and c can be determined. Although, Equation 4-4 solves for the complete gf and c, only the sign information is bei ng utilized. This is because the previously obtained g2, f2, and c2 are expected to be more accurate due to their superior tolerance to measurement errors that occur while measuring the ISS. This is discussed in detail in the following section. The sign of gf only offers the relative signs between g and f Even with measuring more Ris of known patterns, it is fundamentally im possible to extract th e individual signs of g and f because the reflection path will always consists of g2, f2, or gf While the relative sign of g and f is sufficient to characterize the error-boxs mixed-mode s-parameters, there remains an uncertainty of 180 x N degree (N = any integer) phase-shift in the error-boxs ssd 21 (= sds 12) and ssc 21 (= scs 12). However, the procedure presented in this section is only show n for the 3-port error- PAGE 64 64 box leading to VNAs port1. Therefor e, at this point, it become s only applicable for calibrating and measuring a dual-reflection at V NAs port1, where the effects of 180 x N degree phase-shift cancel out. This 180 x N degree uncertainty only becomes a problem for a full 4-port case, when measuring the DUTs mixed-mode forward and reverse transmission. In such case, 180 x N degree uncertainty does not always cancel out be cause the N in the erro r-box attached to VNAs port1 may not necessary be the same as that of VNAs port2. The same problem also exists in the conventional single-ended 2-port calibration, and it is solved by measuring both error-boxes back-to-back via a known through pattern [4.3]. The same algorithm can be applied for this work by using dual-through patterns, which are ava ilable in ISSs made for general dual-probes, such as Cascade Microtech ISS P/N 129-246. ii i i ii i i iYXcabYbXa YXbfaggfcYgXf dR 2 2 2 2 21 2 (4-1) abddcbfaggfc abc adf bdg d b a R R R YXRYXXYRYRX YXRYXXYRYRX YXRYXXYRYRX222 2 2 2 9 2 1 9999999 9999 2222222 2222 1111111 11112 ; 1 1 1 ; X R M XMR (4-2) 2 10 1010 2 10 10 10 2 10 1010 2 2 10 10 2 10 2 102 1 2 2 ZYXcabZfYbXa ZYXbfaggfcZgfYgXf dR (4-3) PAGE 65 65 2 10 1010 2 2 10 2 10 2 10 10 2 10 10 10 10 2 22 102 2 ZYXgfcbfagdRcab YgdRbXfdRadR Z gfcdRc fgdRgfc c gf (4-4) 4.2.4 Verification and its Comparison to the Use of 7 Dual-Load Patterns Using the MATLAB program, the proposed algorithm is put into test for a set of known s-parameters, and compared with an alternat ive approach of using minimum number of measurements of the dual-load patterns, which is 7 corresponding to the 7 unknown elements in the vector X. The resulting 7 x 7 matrix is shown in Equation 4-5 and its matrix equation is shown in Equation 4-6, from which the solution becomes X = M-1R. Note that i = 1 ~ 7 can represent any of the 9 dual-load patterns. 1 1 17777777 7777 2222222 2222 1111111 1111 YXRYXXYRYRX YXRYXXYRYRX YXRYXXYRYRXM (4-5) 7 2 1 ; R R R RXMR (4-6) The s-parameters used for this verificati on are shown in Table 4-1. For the proposed approach of using 9 dual-load patterns, the patterns SO, MO OO, SM, MM, OM, SS, MS, and OS, are assigned sequentially to i = 1 ~ 9. For the alternative approach of using 7 dual-load patterns, the patterns SO, MO, SM, MM, OM MS, and OS, are assi gned sequentially to i = 1 ~ 7. In order to emulate measurement errors, the Ris were added with a rando m variable that ranges of -0.005 ~ 0.005 with uniform probability dist ribution. The root-mean -square (RMS) of the errors of the extracted a ~ f and g are obtained by r unning the program 104 times, and the results PAGE 66 66 are shown in Table 4-2. It show s that the proposed approach of using 9 dual-load patterns is less susceptible to measurements errors, compared to alternative approach of using the minimum 7 dual-load pattern. For one element, b ( e22 in Figure 4-4), the proposed method of using 9 patterns, showed approximately 5 times lower magnitude of RMS error compared to that of using the minimum 7 patterns. Table 4-1. Used s-parameter va lues for simulation verification Variables for s-parameters a b c d f g Used values 0.11 0.12 0.16 0.15 0.93 0.14 Table 4-2. RMS errors of th e extracted s-parameter values Variables for s-parameters a b c d f g Extraction using 9 patterns 0.0024 0.0368 0.0089 0.0017 0.0009 0.0072 Extraction using 7 patterns 0.0040 0.1815 0.0314 0.0029 0.0012 0.0092 4.3 Application to Marchand Balun Embedded Probe With minor variation, the proposed method can be used to extract the full mixed-mode sparameters of the 3 dB-coupler embedded probes, which becomes a valuable tool in their development stage. This is done by calibrati ng up to plane-b for the second set of measurements shown in Figure 4-3B. This is applied to a Marchand balun embedded probe shown in Figure 3-14B, where the extracted results are shown in Figure 4-5. In order to check reproducibility, the extraction pro cedure is repeated 9 times, wh ich are shown by the overlapping multiples lines. The results show that the extrac ted s-parameters using the proposed method are in good agreement with that of previous method (symbol o) of using a dual-through pattern connected to a dual-probe. 4.4 Calibration From the extracted 9 mixed-mode s-parameters, the 4 differential-mode s-parameters are used for calibration, which is shown in this se ction. The measurement setup for a full 4-port PAGE 67 67 A B C D E F G H I Figure 4-5. Extracted s-parameters of a balun embedded probe (Figure 3-14B) using the proposed ISS and extraction algorithm (lines ) and their comparison with the previous approach of using a dual-though pattern connected to a dual-probe (symbol o); the multiple conjoining lines represent the repeated sets of measurements (total of 9 sets). A) sdd11. B) sds 12. C) sdc 11. D) ssd 21. E) sss22. F) ssc 21. G) scd 11. H) scs 12. I) scc11. balun embedded measurement is shown in Figure 4-6, where [s] is the differential-mode elements of [s]4 of the DUT, and [e1] and [e2] are differential-mode elements of [s]3 of the error-boxes. Along with VNAs non-calibrated measurement, [m], these are all 2 x 2 s-parameter matrices, which is the case for the de-embeddi ng procedure of the conventional single-ended 2port calibration. The de-embedding procedure begins with sw apping the ports of error-box leading VNAs port1, as shown in Equation 4-7. This new [e1] is in cascaded connection to [s] and eventually PAGE 68 68 to [e2], which calls for the use of t-parameters [4.6] as defined in Equation 4-8 and the conversion equations shown in Equation 4-9, where a s and b s are power-waves propagating to and from the 2-port network, respectively. Usi ng the t-parameters, the measurement network can be described as Equation 4-10, where [s]t, [m]t, [e1] t, and [e2]t are the t-parameters of [s], [m], [e1] and [e2]. This equation is rearranged into Equation 4-11, from which the error-boxes are be de-embedded. Finally, the de-embedded [s] can be achieved by the re verse conversion equation shown in Equation 4-9. Figure 4-6. Full 2-port balun embedded measurement and their 2 x 2 differential-mode sparameter matrices; [m] is a 2 x 2 single-ended s-parameter matrix which is measured using a non-calibrated VNA. 11 11 1 11 1111 12 21 22 22 21 12 11 ee ee ee ee ][e [e1] (4-7) 2 2 2221 1211 1 1 a b tt tt b a (4-8) 11 12 11 11 11 21 21 21 11 21 22 211 det & det 1 t t t tt t ss s s s s t [s] s [t] (4-9) PAGE 69 69 ttt t[e2][s]][e1[m] (4-10) 1 1 tt t t[e2][m]][e1[s] (4-11) Form the extracted 9 mixed-mode s-parameters, the other 5 s-parameters that are not used in the calibration are common-mode and cross-mode s-parameters. These can cause critical measurement errors, even under the most accurate calibration of the differential-modes. The evaluation of these errors in re lation to extracted common-mode a nd cross-mode s-parameters of the 3-port error-boxes are presen ted in the following chapter. PAGE 70 70 CHAPTER 5 EVALUATION OF ERRORS CAUSED BY COMMONAND CROSS-MODES 5.1 Measurement Errors Caused by Common-Modes and Cross-Modes In the proposed balun embedded measurem ent strategy and the calibration algorithm shown in the previous chapters, measurement erro rs will still exist even under the most accurate extraction and calibration of the 3-port error-box. These are due to the undesired common-mode and cross-modes (the conversi on between the differential-mode and common-modes) of the embedded balun and the differential DUT. This chapter proposes a new algorithm that evaluates these errors, by which the users can convenientl y be informed of the measurements accuracy. Although it focuses on differential measurements where the errors are due to common-mode and cross-modes (CXM), the same procedure can al so be applied to common-mode measurements using embedded power-splitters, wh ere the errors are due to the differential-mode and crossmodes. The differential measurement setup and their common-mode and cross-modes errors are shown in Section 5.2. In Secti on 5.3, the proposed algorithm for evaluating these CXM errors is presented, along with the employed approximations. Finally, the verification of the proposed algorithm using a fully-differential amplifier meas ured via Rat-race baluns [2.7] is shown in Section 5.4. 5.2 Common-Modes and Cross-Modes in Balun Embedded Measurements The mixed-mode s-parameter flowgraph of the proposed measurement setup (Figure 4-6) is shown in Figure 5-1, where s, e 1, and e 2 are the mixed-mode s-parameters of the DUT, errorbox-1, and error-box-2 respectively. These are represented by letters a ~ z in order to provide convenient notation in the next se ction. The dark lines are the differential-modes and the lightgray lines are commonand cross-modes. In the ideal case, only the dark lines exist where the error-boxes can be calibrated out to give the accurate characterization of the DUTs 2 x 2 PAGE 71 71 differential-mode s-parameters. However, in prac tice, the light-gray lines co-exist providing additional paths. Hence, the extracted mixed-mode s-parameters of the DUT will be distorted with these errors cause by CXM, even under th e most accurate characte rization and calibration of the error-boxes differential-modes. Figure 5-1. Mixed-mode flowgraph for differential measurement using baluns. 5.3 Error Evaluation and the Used Approximations The goal is to evaluate the error of the calibrated 2 x 2 differential-mode s-parameters of the DUT caused by the CXM. This starts with developing an approximate solution to the VNAs non-calibrated 2 x 2 s-parameters that includes the effect s of the CXM of the error-box and the DUT. The first approximation is that the two error-boxes are id entical, by which the primes (') of error-box-2 are dropped. Figur e 5-2 shows the mixed-mode flowgraph of the VNAs noncalibrated s11 and s21. Although the differential-modes (black lines) are split from the CXM (lightgray lines), the flowgraph is essentially the same as Figure 5-1, because the nodes ( N1~4 and the input node) and the errors ( e1~4, e11, and e21) are interlinked. The nodes of the flowgraph can be expressed as Equation 51, where there associated terms are shown in Equations 5-2 through 5-5, and [I] is a 6x6 identity matrix. The matrix [M1] is obtained by observing only the black lines, and the error terms in Equations 5-3 through 5-5 are obtai ned by applying Masons PAGE 72 72 Rule [4.4] on the light-gray lines. Finally, Equa tions 5-6 is obtained by inserting Equations 5-3 into Equations 5-1, where its first and last elements are respectively s11 and s21. The same procedure is applied for VNAs non-calibrated s22 and s12, as shown in Figure 53. It starts with the Equation 5-7, where the associated terms shown in Equations 5-8 through 5-10. The final Equations 5-11 is obtained by inser ting Equations 5-9 into Equations 5-7, where its first and last elements are respectively s22 and s12. Figure 5-2. Mixed-mode flowgraph for VNAs non-calibrated s11 and s21. 21 4 3 2 1 11 21 4 3 2 1 11 1 21 4 3 2 1 11 0 0 0 0 e e e e e e S N N N N S f d S N N N N S M (5-1) PAGE 73 73 00000 00000 0000 0000 00000 00000 f a j h k i a f1M (5-2) 21 4 3 2 1 11 2 2 2 21 4 3 2 1 111 1 1 1 1 1 S N N N N S yg ycg ybgqwbtg xybgbtgn yzbcgbtcgr yzbgbtrg e e e e e eE E E1M (5-3) yzbbrbtE 211 (5-4) 0 1 1 1 0 0 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 0 0 1 1 1 02 2 2 2 2 2 2 2 2 2 2 2 2 2vybg brgp yzbcg brcgt ycg ybgm ubrg vybc brcp yzbc brtc yc ybcm ubrc wzpb vyqb brbpq vwbtb wzbc brcq ybcq wbtc uwzb ymqb ubrbq wbtbm znpb vxyb xbrbp vbtbn zbcn xbrc xybc btcn uznb xymb uxbrb btbmn zbcp vbtc zc yzbc btrc uzbc btcm zbgp vbtg zcg yzbcg btcgr uzbg btgmE1M (5-5) PAGE 74 74 yg ycg ybgqwbtg xybgbtgn yzbcgbtcgr yzbgbtrg f d S N N N N SE E 2 2 2 1 1 21 4 3 2 1 111 1 1 1 1 0 0 0 0 1E1M MI (5-6) Figure 5-3. Mixed-mode flow graph for VNAs non-calibrated s22 and s12. 12 4 3 2 1 22 12 4 3 2 1 22 2 12 4 3 2 1 22 0 0 0 0 e e e e e e S N N N N S f d S N N N N S M (5-7) PAGE 75 75 00000 00000 0000 0000 00000 000002f a i k h j a f M (5-8) 12 4 3 2 1 22 2 2 2 12 4 3 2 1 221 1 1 1 1 1 S N N N N S zg zcg zbgnxbrg wzbgbrgq yzbcgbrcgt yzbgbrtg e e e e e eE E E2M (5-9) 0 1 1 1 0 0 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 0 0 1 1 1 02 2 2 2 2 2 2 2 2 2 2 2 2 2uzbg btgm yzbcg btcgr zcg zbgp vbtg uzbc btcm yzbc btrc zc zbcp vbtc xymb uznb btbmn uxbrb xybc btcn zbcn xbrc vxyb zpnb vbtbn xbrbp ymqb uwzb wbtbm ubrbq ybcq wbtc wzbc brcq vyqb wzpb vwbtb brbpq ybcm ubrc yc yz bc brtc vybc brcp ybgm ubrg ycg yzbcg brcgt vybg brgpE2M (5-10) PAGE 76 76 zg zcg zbgnxbrg wzbgbrgq yzbcgbrcgt yzbgbrtg f d S N N N N SE E 2 2 2 1 2 2 12 4 3 2 1 221 1 1 1 1 0 0 0 0 1EM MI (5-11) Note that the same soluti on for the VNAs non-calibrated 2 x 2 s-parameters can be achieved by directly extracting the nodes matrix equation from the mixed-mode flowgraph in Figure 5-1. This will result in an 11 x 11 matrix in correspondence to the 12 nodes less the input node. For the proposed method to be applicable to VNAs post measurement processes, fast calculation speed is essential. Howeve r, calculating the inverse of an 11 x 11 matrix can become too much overhead for the system to process at ea ch point of the swept frequency. Therefore, it becomes more beneficial to use Equations 5-6 and 5-11, since they onl y require calculating the inverse of a 6 x 6 matrix. The calculation time of the pr oposed post measurement processes is discussed in detail in the following section. The mixed-mode s-parameters ( a ~ z) for solving Equations 5-6 and 5-11 are obtained as follows. The error-boxes a ~ f and g can be are obtained by using the characterization method proposed in [4.2] for hybrid-junctioned measur ements or by using the method proposed in Chapter 3 for on-wafer balun embedded measur ements. The dual-loads of the 4-port DUT ( m n i j p q r, and t ) can be obtained using 2-port measuremen ts as shown in Figure 5-4, which can be done fairly easily for both coaxial-interf aced and on-wafer measurements. As a second approximation, the DUTs forward and reverse differential gains ( h and k ) are substituted with their results obtained through the balun embedded measurements where the 3-port error-boxes are calibrated out using the method presented in Chapter 3. As th e third and final approximation, the other unknown CXM ( u ~ z) of the DUT are each substituted by complex random variables, PAGE 77 77 where their amplitudes range from -0.3162 ~ 0.3162 (where, 0.3162 = -10 dB) and -0.1 ~ 0.1 (where, 0.1 = -20 dB) for forward gains ( u w and y) and the reserve gains ( v, x, and z ), respectively, all with uniform probability distribution. The rando m phases range from ~ also with uniform probability distribution. This third approximation is assuming that the forward and reverse CXM gains are respec tively less then -10 dB and 20 dB. However, the user can change these numbers when given more information on the DUTs CXM, where the measurements accuracy will increase if the DUT is guaranteed to have lower CXM gains. A B Figure 5-4. Measuring dual -reflections of the DUT. Using these mixed-mode s-parameters as inputs, the VNAs non-calibrated 2 x 2 sparameters are calculated using Equations 5-6 an d 5-11. The results are th en calibrated using the procedure presented in Chapter 4, which represent a 2 x 2 differential s-parameter of a DUT for randomly generated complex variables for u ~ z. In order to find out how much u ~ z can contribute to the measurement, this process is repeated at least 100 times (each time using different random values for generated for u ~ z), from which the maximum and the minimum amplitude of each 2 x 2 differential s-parameter are chosen. As shown in the next section, these anticipated maximum and minimum provide the quant itative information of the CXMs effects to the measurements, from which their accura cies can be efficiently evaluated. PAGE 78 78 5.4 Application to Fully-Differential Amplifier Using circuit sim ulations, the proposed method is put into test for a fully-differential amplifier that is being measured using a Rat-ra ce type balun. The Rat-race type balun is shown in Figure 5-5. It is designed to have the center frequency, fc (= phase-velocity x c) of 6 GHz. In order to achieve large CXM, the delay paths electrical length and their characteristic impedances were purposely skewed from the displayed nominal values, where the resulting mixed-mode s-parameters are shown in Figure 5-6. The same is done for the fully-differential Figure 5-5. Rat-race type balun; mismatches were randomly induced from the shown nominal values in order to achieve large CXM. Figure 5-6. Mixed-mode s-parameters of a Rat-race type balun shown in Figure 5-5. PAGE 79 79 amplifier which is shown in Figure 5-7. Each component is randomly designated to either be increased or decreased by 10 % from its nominal values shown in the figure. The resulting mixed-mode s-parameters of the fully diffe rential amplifier are shown in Figure 5-8. As shown in Figure 5-9, the 2 x 2 differential s-parameters of the fully-differential amplifier are measured using the rat-race bal un, and the effects of the rat-race balun are calibrated out. The non-calibrated s-parameters (i ncluding the baluns) are shown in dashed-black lines and the calibrated s-parameters (where the differential-mode networks of the baluns are calibrated out) are shown in solid-black lines. This is still off from the original s-parameters (solid-light-gray lines) due to the errors cause by the CXM of the balun and the DUT. Figure 5-7. Fully-differential amplifier; 10% va riations were randomly induced from the shown nominal values in order to achieve large CXM. Since the original s-parameters are not availa ble in the actual meas urement environment, the user cannot be informed of th e amount of errors that are associ ated with the measured results (solid-black lines). However, the user can be informed of the anticipated maximum and minimum s-parameters, where their variations are caused by CXM. From this, the users are PAGE 80 80 efficiently informed of the measurement accuracy along with their measurement results. This is done by the proposed method of using Equatio ns 5-6 and 5-11 along with random complex variables for the unknown CXM of the DUT, as s hown in Figure 5-9. The anticipated maximum and minimum are respectively shown in symbols and The filled colors of the symbols, A B Figure 5-8. Mixed-mode s-parameters of the full y-differential amplifier shown in Figure 5-7. A) Elements larger than -25 dBm. B) Elements lower than -24 dBm. PAGE 81 81 A B C D Figure 5-9. Differential-mode s-parameters of the DUT; the lines represent the original (solidlight-gray), measured (dashed-black), a nd calibrated (solid-black) s-parameters; symbols represent the anticipated maximum ( ) and minimum ( ), using 102 (white), 103 (gray) and 104 (black) samples. A) sdd11. B) sdd 12. C) sdd21. D) sdd22. and represent the number of random comple x samples used, from which the maximum and minimum s-parameters were chosen. The colors white, gray, and black, respectively correspond to using 102, 103, and 104 random complex samples, where the CPUs calculation times were respectively 3.8, 38.3, and 390.9 seconds, when using Intels 1.4 GHz Celeron Mobile Processor. The results show that the original and the calibrated s-parameters are all well within the anticipated maximum and minimum s-parameters. Note that the dB-ranges between the PAGE 82 82 anticipated maximum and minimum s-parameters b ecome larger as the frequency approaches the sidebands of 6 GHz. This is due to the limited ba ndwidth of the rat-race type balun, where its CXM is minimal at the fc = 6 GHz, but gradually increases as it approaches the sidebands. As mentioned in the previously section, the dB-rang es between the anti cipated maximum and minimum s-parameters can be decreased if the DUT was respectively guaranteed with lesser forward and reverse CXM gains than -10 dB and -20 dB. So far, passive baluns were used for the proposed balun embedded measurement. Although, the Marchand balun can provide broad 3 dB-relative-bandw idth, it is difficult to make this larger than 1, due to in the increase of CXM and their associated measurement errors. Therefore, in efforts to further increase the bandwidth of the proposed measurement strategy, active baluns are developed using a newly proposed combined cascode and cascade pair, as shown in the next chapter. PAGE 83 83 CHAPTER 6 ACTIVE BALUN USING COMBINED CASCODE-CASCADE CONFIGURATION 6.1 Introduction to Various Active Baluns Active balu ns are unidirectional converters be tween differential and single-ended signals, as shown in Figure 6-1, where th e single-ended and mixed-mode sparameters are compared with that of a passive balun. In spite of their inabi lity for bi-directional conversion, as for the case of passive baluns, they are used fo r their large bandwidth, which is beyond what passive baluns can provide. The bandwidths upper-end frequency of an active balun depends on the technologys Figure 6-1. Comparing single-ended and mixed-mode s-para meters between passive balun and active balun, where 1 2 = 180. PAGE 84 84 speed, while the lower-end frequency can potentially extend to DC, when not considering the effects of the DC-decoupling capacitors in the ports. Such unbounded lower-end frequency enables active baluns to be realized in limited chip-areas, which makes them the most suitable for Built-in Self Test (BIST) applications [1.9][1.11], as well as general differential circuits requiring compact sized broadband baluns. 6.1.1 Distributed Amplifier Type The distributed am plifier base d balun is shown in Figure 6-2. Similar to a conventional distributed amplifier, the input in P3 travels through a virtual transmission-line realized by the cascaded lumped LC-network (C is the parasi tic gate capacitance) where its characteristic impedance 1/(2 x sqrt(LC)) is equal to 50 and finally reaches P1. While the signals travel through the virtual transmission-line, each transist or generates an output signal at the drain, which is combined through another virtual tran smission-line realized by the cascaded lumped LC-network attached to the drain (C is the parasitic drain capacitance). The gain in each path can be designed to be -3 dB by maki ng the Ls lossy and controlling th e gain of each transistor. In a given CMOS or Bipolar process, the distributed amplifier conf iguration produces the largest bandwidth [6.1]. However, it occupies a fairly large area of at least 1 mm x 2 mm. Due to such large area overhead, it is seldom used in embedded test applications. Figure 6-2. Distributed am plifier type active balun. PAGE 85 85 6.1.2 Differential Amplifier Type A suitable approach in limited chip-areas is the differential amplifier configuration [6.2], as shown ion Figure 6-3, which is most commonly used due to its large common-mode rejection. However at high frequencies, the two outputs b ecome unbalanced because two signals travel through different number of stages from the co mmon input one stage (common-source of M2) for the inverting path and tw o stages (common-drain of M2 followed by common-gate of M1) for the non-inverting path. A series LC-network can be used to compensate for the mismatched phase [6.3][6.4], but this sacrifices the bandwidths lower-end frequency. Figure 6-3. Differential amplifier type active balun. 6.1.3 Source-Drain Output Configuration Matching the num ber of stages of can be achieved by using a source-drain output configuration [6.5][6.6], as show n in Figure 6-4. The unbalanced i nput at P3 is converted into balanced output to P1 (non-inve rting source-output) and P2 (invert ing drain-output). This type of active balun is superior with rega rds to using a single transistor (M1), by which it becomes free from the magnitude imbalance caused by the mi smatches among multiple transistors in other configurations of active baluns However, other than its low dynamic range due to the required Vdsat of M1, it has some inherent critical problems, such as the requirement of a second gain stage and phase mismatch at high frequencies. PAGE 86 86 Figure 6-4. Active balun using s ource-drain output configuration. The requirement of a second stage is invest igated in Figure 6-5, which is a sourcefollower with matched input and output (I/O). The maximum gain can be achieved by assuming that the current-source is ideal. For Zs = 1/( gm(1+)) to be matched to 50 gm must be equal to 1/(50(1+)). Using this, along with v1 + = 0 and vi = 0 of matched case, the maximum s13 of the source-drain output ty pe balun can be expressed as Equation 6-1, which is shown to be always less than 1/2, and hence, less than the required gain of 1/sqrt(2) for baluns. Figure 6-5. Matched source-fo llower for maximum forwardgain at low frequencies. 2 1 1 1 2 1 50|| 50/ 50/1 1 13 sm i izg v v v v s (6-1) The more critical problem is the imbalanced phase of the differe ntial output at high frequencies. Figure 6-6 shows the simplified AC-equivalent circuit of the source-drain output configuration, where its forward gains to the source and the drain are respectively solved in PAGE 87 87 Equations 6-2 and 6-3. Practical values of the parameters in Equation 6-3 will make the enclosed first order term of s of the numerator to become positive. Using this sign information along with the fact that the last term its numerator is negative, one can see that Equation 6-3 has one positive and one negative zero. Therefore, Equa tion 6-3 has an additional pole and a negative zero when compared to Equation 6-2, where each produces an additional 45o / Dec decrease in the phase, compared to that of Equation 6-2. Figure 6-6. Simplified AC-equiva lent circuit of the active ba lun using source-drain output configuration. 1 11m s gs mgs ig R sC gsC v v (6-2) d gd m s gs s m mgs m s gd gsgd iR sC g R sC R g gC g R CsCCs v v 1 1 1 1 12 2 (6-3) 6.1.4 Common-Source and Common-Gate Pair Configuration The m ore promising method for achieving balanc ed phase at high fre quencies is to use common-source and common-gate pair [6.7][6.8], as shown in Figure 6-7. Using this configuration, the relative phase can maintain 180o at high frequencies beyond the first few poles. PAGE 88 88 However, a new challenge exists for matching th e input, due to its high parasitic capacitance at the two transistors (M1 and M2) which are accompanied by a thir d transistor from a currentsource for biasing M1. Figure 6-7. Active balun using co mmon-source and common-gate pair. To overcome these problems, this paper pr oposes a new configuration of cascode and cascade pair using a shared input transistor, hence the name, combined cascode-cascade balun (C3-balun). This new configuration will be pr esented in detail in Section 6.2, and the measurement environment and the measurement re sults are respectively shown in Section 6.3 and 6.4. Furthermore, an attached low frequency feedback network is proposed in Section 6.5, which can improve the stability of the proposed circuits bias conditi on in future designs. 6.2 The Proposed Combined Cascode-Cascade Configuration The proposed C3-blaun is shown in Figure 68, w here the transist ors transconductance are annotated in parenthesis. Th e cascaded non-inverting path for s13 is combined with a cascoded inverting path for s23, using a common input stage transistor M3. Compared to the previous common-source and comm on-gate pair configuration, the proposed C3-balun enables higher reverse-isolation and a br oader frequency range for input matching due to the reduced parasitic capacitance at P3. The broadband input matching is further enhanced by dividing the PAGE 89 89 inputs 50 resistance into 22.6 and 27.0 where the remaining 0.3 is from the parasitic resistance of the 0.2nH inductor, which is th ere to achieve inductive peaking to maximize the bandwidths upper-end frequency. The dividing of the 50 resistance reduces the input signal, thus requires the increases of the size of M3. Although this increases the gate-capacitance, a broader input matching can be ach ieved due to the separated 22.6 which is free from being shunted by the increased gate-capacitance. Figure 6-8. Proposed active balun using combin ed cascode-cascade configuration (C3-balun). The circuit contains no DC-decoupling capaci tors, other than the ones at the ports terminals. This is to best extend the baluns ba ndwidth on its lower-end frequency as close to DC as possible. However, from the design and optim ization standpoint, this also means that the selection of bias-points is not as convenient. The biggest challe nge is deciding on the bias point PAGE 90 90 for v3, since it influences all three transistor s, simultaneously. For this reason, 4.7 is introduced to enable additional design freedom, so that bias point of M2s source, v 3, can be chosen to be different from that of M3s drain and M1s gate, v3. The bias-points are optimally chosen for the circuit to operate up to 5 dBm of the input power, while maintaini ng all transistors to operate in the saturation-mode and remain safe from gate-drain and gate-source oxide breakdown. The designed bias-points and the simula ted AC voltage swings (peak valu es) are shown in Table 6-1. Note such optimization has resulted in large bias es for VDDs as high as 4.2 V. However, these values can be reduced if the desi gn is aimed for less operational power. The simulation result of the proposed C3-balun is shown in Figure 6-9. It shows that the two forward gains maintain -3 dB with opposite polarities up to 30 GHz. All other undesired sparameters, such as reflections and isolations, are all shown to be less then -10dB up to 30 GHz. Table 6-1. C3-baluns intern al bias points and AC volta ge swings at 5 dBm input Nodes DC bias points AC voltage swi ngs (peak) Result voltage swings vs 0.56 V vi 1.00 V 0.31 V 0.69 ~ 1.31 V v3 1.05 V 0.31 V 0.74 ~ 1.36 V v3 1.16 V 0.25 V 0.91 ~ 1.41 V v2 2.36 V 0.40 V 1.96 ~ 2.76 V v1 1.39 V 0.40 V 0.99 ~ 1.79 V A B C Figure 6-9. Simulation results of the proposed C3-balun. A) Magnitude of s13 and s23. B) Phase of s13 and s23. C) Other undesired s-parameters. PAGE 91 91 The proposed C3-balun is manufactured us ing the IBM 8HP 130 nm BiCMOS process. The layout is shown in Figure 6-10 and the manu factured chip is shown in Figure 6-11. The dummy pads are placed for calibrating out the pads effects, as it will be presented in the next section. As shown in the figure, by repl acing the 0.2 nH lineinductor into an -shaped inductor, one can anticipate that the compacted version of the la yout can be as small as 0.2 mm x 0.2 mm (without including the pads), which make s the proposed active balun to become suitable for BIST applications, as well as general diffe rential circuits requiri ng compact sized broadband baluns. The interconnect and routing of the fi ngers of the NMOS is shown in Figures 6-12 through 6-14, where M#, MQ, AM are the metal laye rs and G, S, D respectively denotes that the routing is to the gate, source, drain. Figure 6-10. Chip layout of the proposed C3-blaun in IBM 8HP 130 nm BiCMOS process. PAGE 92 92 Figure 6-11. Chip photo of the proposed C3 -blaun in IBM 8HP 130 nm BiCMOS process. Figure 6-12. Layout for NMOS interconnect; M3 of the proposed C3-balun. Sub_Con denotes substrate contact. PAGE 93 93 Figure 6-13. Layout for NMOS interc onnect; zoom-in area of Figure 6-12. Figure 6-14. Layout for NMOS interc onnect; zoom-in area of Figure 6-13. PAGE 94 94 6.3 Measurement Environment The proposed C3-balun is m easured with R ohde & Schwarzs ZVA40 which is a truedifferential 4-port vector networ k analyzer (VNA) using phase controlled balanced differential sources and receivers [1.5][6.9 ]. The on-wafer RF probing an d calibrations are done using Cascade Microtechs Infinity Probe Series (GSG for P3 and GSSG for P1 and P2, where G stands for ground and S stands for RF signal) and their Impedance-Standard-Substrate (ISS) P/Ns 005-016 (for GSG) and 129-24 6 (for GSSG). The DC biasing is done using GGBs DC probes with bypass chip capacitors embedded at the tip and the rear to provide stable biases through out the frequency range of 10 MHz ~ 40 GHz, as shown in Figure 6-15. These capacitors are embedded because the on-chip cap acitors cannot be made large enough to bypass the frequency components less than 1 GHz. Figure 6-15. Three-pin DC-probe with embedded bypass capacitors. In calibrating for a 3-port measurement, a new challenge emerges in the through measurements between the GSG an d the GSSG. This is because no grounds (Gs) should be left floating during the through measurements, in or der to achieve accurate calibrations up to tens of GHz. This is solved by using unknown th rough open short match (UOSM) PAGE 95 95 algorithm [4.3][6.10]. By tilted GSG through patter n of the ISS P/N 005-016, as shown in Figure 6-16, one can measure the unknown through betw een GSG (P3) and the GSSG (P1 or P2). A B Figure 6-16. Using GSGs through patter n for unknown-through measurements. A) Unknown through between P3 and P1. B) Unknown through between P3 and P2. Another challenge is the post m easurement process of calibrating out the pads effects, as shown in Figure 6-17. The measured s-parameters of the active balun with pads ( [s]D) and those of the pads obtained by measuring the dummy pads shown in Figure 6-10 ([s]P), are respectively converted into y-parameters of [y]D and [y]P. From this, the y-parameters of active balun (without pads) can be obtained by [ y]A = [y]D [y]P, which can be converted back to its sparameters, [s]A. The conversion between the s-parameters and y-parameters of a 3-port network, can be derived from their definitions as show n in Equations 6-4 and 6-5. The relationship between the s-parameters power-waves, and the y-parameters vs and i s (where it is defined to direct inwards to the network) are shown in E quations 6-6 and 6-7. By inserting Equation 6-6 into Equation 6-4 and inserting Equation 6-7 into Equation 6-5, th e conversion equations between the two parameters can be derived as Equati ons 6-8 and 6-9. PAGE 96 96 A B C Figure 6-17. Full 3 x 3 s-parameter and y-parameter matrices of A) active balun with pads, B) pads only, and C) active balun without pads. 3 2 1 3 2 1 333231 232221 131211 3 2 1 a a a a a a sss sss sss b b b s (6-4) 3 2 1 3 2 1 333231 232221 131211 3 2 1v v v v v v yyy yyy yyy i i i y (6-5) k k k k ki v z z z z b a 2 2 1 2 2 10 0 0 0 3~1 (6-6) k k k k kb a zz zz i v0 0 0 0 3~111 (6-7) sIsIy1 01 z (6-8) yIyIs 0 1 0z z (6-9) PAGE 97 97 6.4 Measurement Results The single-ended measurement of the proposed C3-blaun is shown in Figure 6-18. The forward gains are 1 dB ~ 1.5 dB higher than that of the simulation. These are most possibly due to increased load resistances caused by the paras itic routing resistance, which can be amended in future designs by post layout simulations. The phase of the forward gains are shown in Figure 619, where their relative phase maintains 180 ( 10) up to 30 GHz. This is well beyond the point in which the gain starts to decrease, which ca nnot be achieved using th e previous source-drain output type active baluns, as pres ented in Section 6.1.3. The othe r undesired s-parameters such as the reflections and the isolations ar e all less then -10 dB up to 30 GHz. The measured mixed-mode s-parameters ar e shown in Figure 6-20 and Figure 6-21 for the input power of -25 dBm and 5 dBm, respectiv ely. The forward differential gains in the two graphs show virtually the same results, which proves that the proposed C3-blaun maintains its linearity for the inpu t as high as 5 dBm. The other undesired s-parameters such as re flections and isolations are all under -10 dB up to 30 GHz, except for sdd11 during the frequency range 0. 4 GHz ~ 1 GHz and 20 GHz ~ 30 GHz, where it becomes as high as -6.1 dB. This is due to the constructive interference of the single-ended reflections shown in Figure 6-18, which was neglected during the simulation-level design stage of monitoring only the single ended s-parameters. This can be solved in the future designs by monitoring the mixed-mode s-paramete rs as well, during the simulation-level design stage. Table 6-2 shows the accuracies of the forwar d gains for various bandwidths. This shows that the proposed C3-balun can be used directly with high ac curacy up to 10 GHz, and with moderate accuracy up to 17 GHz. However, if the errors caused by the baluns imperfections can be calibrated out, the proposed C3-balun can be used up to 30 GHz. However, as discussed in PAGE 98 98 Figure 6-18. Measured magnitude of the single-ended s-paramete rs of the proposed C3-balun at the input power of -25 dBm. Figure 6-19. Measured phase of the single-ended s-parameters of the proposed C3-balun at the input power of -25 dBm. PAGE 99 99 Figure 6-20. Mixed-mode s-parameter measurem ent of the proposed C3-balun at -25 dBm input. Figure 6-21. Mixed-mode s-parameter measurem ent of the proposed C3-balun at 5 dBm input. PAGE 100 100 Table 6-2. Forward gains of C3-balun for the input power of -25 dBm ~ 5 dBm Bandwidth | dB( s23) dB(s13) | [dB] ( s23) ( s13) [deg] dB( sds 12) [dB] DC ~ 10 GHz < 1.1 173 ~ 184 -1.5 ~ 1.8 DC ~ 17 GHz < 1.8 170 ~ 184 -2.7 ~ 1.9 DC ~ 30 GHz < 9.4 170 ~ 188 -6.8 ~ 1.9 Chapter 4, applications beyond 30 GHz are not r ecommended due to the increase in the common and cross-mode errors of the balun, where th ey can cause critical measurement errors, even under the most accurate calibration conditions. For the noise measurements, it is important to note that baluns must be characterized with differential noise rather then the conventional single-ended noise, in or der to well describe circuits performances accordance to its applicat ions. Unfortunately, this cannot be obtained by mathematically combining the noise performances at each port, because their randomness cannot account for the relative phase and magnitude of th e differential-port. However, ZVA40 offers a Figure 6-22. Noise measurement of the proposed C3-balun; symbols and O represent differential-mode and commonmode, respectively, where the filled symbols are the measured noise and the unfilled symbols are the VNA systems background noise. PAGE 101 101 spectrum analyzer mode, by which a true-differe ntial output powers can be measured as shown in Figure 6-22. Each frequency poi nt is plotted with the average value obtained from repeated noise measurements of 26 times. Symbols and O filled in gray respectively represent the output powers differential-mode and common-m ode, at zero input (terminated with 50 ). This is compared with the unfilled symbols, which represent the systems background noise of the ZVA40. This comparison shows that the measured noises (the filled symbols) are only valid roughly in frequency range of 0.2 GHz ~ 20 GHz. Within this valid frequency range the proposed C3-balun showed low differential noise of less than -95 dBm. Note that in certain frequency range clusters, the differential-mode is shown to be at least 10 dB higher than that of the common-mode, which cannot be obtained by mathematically co mbining single-needed noise measurements. 6.5 Low-Pass Bias-Feedback Networ k for Stable Bias Conditions The internal bias points of the proposed C3-bal un have significant a ffects to the circuits overall performances, especially on the gain and the dynamic range. However, minor process variations of the transistors will result in altern ate bias points, which can significantly change the transmission gains of the circuits. Therefore, developing a low-pass bias-feedback mechanism by which the circuit can maintain stable bias conditions regardless of the proce ss variations is one of the most important tasks for the proposed C3-baluns future design. The low-pass bias-feedback network is shown in Figure 6-23, where the drain currents of ID1 (for M1) and ID2 (for M2 and M3) are matched to 17.12 mA. Despite the process variations of the transistors, the matching of the drai n currents are achieved by the attached low-pass feedback network; the lower-e nd terminals of the two 62.9 resistors are connected to vip and vin, where their DC values tends to match each other (vip @ DC = vin @ DC) due to the large low- PAGE 102 102 Figure 6-23. C3-balun with network for stable biasing. frequency gain of the loop formed by attached low-frequency amplifier (18 dB loop gain from vip vout source-follower of M2 common-source of M1 back to vip). The circuit diagram for the low-frequency amplifier is shown in Figure 6-24. The matching of the drain currents enables the matching of th e transconductances of M3 and M1, which results in the matching of s13 and s23. The low-pass bias-feedback network only controls the matching of s13 and s23 and not their values, which need to be maintained at -3 dB each. Since the values of the matched s13 and s23 depends on the matched bias curr ents of ID1 and ID2, these bi as currents need to be well controlled. This is done by IREF of the attached self-biasing ci rcuit, as shown in Figure 6-25, which delivers VREF to the proposed C3-balun. The self-biased IREF is independent of VDD as shown in Equation 6-10, where VTH10 is the threshold of M10 and B10 is from the large signal equations for a short-channel NMOS tr ansistor operating in saturation, IREF = B10( VREF VTH10). PAGE 103 103 Figure 6-24. Low frequency amplifier used for low-pass bias-feedback network in the proposed C3-balun. Figure 6-25. Threshold-referen ced self-biasing network used in the proposed C3-balun and the attached low-pass bias-feedback network. 1 9410 10 B V ITH REF (6-10) PAGE 104 104 Note that in Figure 6-23, the us ed C3-balun is slightly modified from its previous version. The modification is done to use constant VDD (3.58 V) and also to accommodate for the increased parasitic capac itance associated with the attached self-biasing circuit and the low frequency amplifier. This modified C3-balun is designed using no inductors and operates in the frequency range from 10 MHz up to 10 GHz with the maximum input power of 0 dBm. However, the upper-end frequency is expected to increase at least up to 17 GHz (as shown in the measurements of the previous design), by using on-chip inductors (connected in series with the 94 in the self-biasing ci rcuit shown in Figure 6-24), and al so by lowering the maximum input power to be less than 0 dBm. Further increase in the upper-end freque ncy can be achieved by sacrificing the lower-end frequency, allowing one to use internal DC -blocking capacitors by which the transistors operational bias-points can be chosen independently from each other. The overall performances of the C3-balun with the attached biasing network are shown in Figure 6-26, where the -3 dB bandwidth is up to 10 GHz. This figure also presents the stability response for the feedback branch I-Probe shown in Figure 6-23, where the DC loop gain is 18 dB and the phase margin is 60 degrees. The large DC loop gain enables the two bias points at vip A B C Figure 6-26. Overall performances of the C3-balun the attached biasing network. A) Magnitude of the s-parameters. B) Phase of the s13 and s23. C) Stability response. PAGE 105 105 and vin to be matched, which results in the matched s13 and s23, as shown in Table 6-3. The results show that despite the 2 % process variations in M1 and M2, the ID1 and ID2 maintains their values with in 0.35 %, wh ich results in the small change in the transmission gain of less than 0.36 dB. Table 6-3. Change of performances of the proposed C3-balun due to process variations Operation 2% decrease in M1 2% increase in M1 2% decrease in M2 2% increase in M2 ID1 [mA] 17.13 mA 17.11 mA 17.09 mA 17.15 mA s13 @ 0.1 GHz -3.12 dB -2.87 dB -2.81 dB -3.17 dB ID2 [mA] 17.15 mA 17.09 mA 17.12 mA 17.12 mA s23 @ 0.1 GHz -2.99 dB -3.02 dB -3.03 dB -2.98 dB s23-s13 @ 10 GHz 187.60 187.81 187.76 187.77 6.6 Summary and Applications In efforts to further increase the measur ement bandwidth of the proposed measurement strategy, a new active balun is proposed which operates with the input po wer as high as 5 dBm, and the bandwidth up to 17 GHz, where the imbalan ce of the differential output was less than 1.8 dB in amplitude and less then 10 degrees in ph ase. The solution for stable biasing is also proposed by attaching a low-pass bias-feedback ne twork. With the develo pment of a calibration algorithm for unidirectional error-networks, the proposed active balun is anticipated to become a promising solution for the proposed measurement strategy, due to their large bandwidth and compact size (as small as 0.2 mm x 0.2 mm), which are far be yond what passive baluns can provide. Such characteristics also make the propo sed active balun to become most suitable for BIST applications as well as general circu its requiring compact si zed broadband baluns. PAGE 106 106 CHAPTER 7 CONCLUSION The conventional 2-port VNAs were used for m easuring 4-port differential circuits, where each port was embedded with a balun, either using external baluns, on-chip baluns, or baluns integrated in on-wafer probes, as shown in Figure 7-1. The potential of this proposed measurement strategy need not be confined to VNAs. It can be applied to virtually all singleended equipments operating in the frequency doma in (such as, signal generators and spectrum analyzers) to be used for measuring differential circuits, which enables them to be free from post measurement processes of mathematical calc ulations for achieving virtual-differential measurement results. Three major topics for the development of the proposed measurement strategy are listed below Figure 7-1. Figure 7-1. Proposed balun embedded measurement for differential circuits. Compact sized broadband baluns Algorithm for calibrating the eff ects of the embedded baluns Evaluation of the measurements errors cause by the baluns imperfections Mixed-mode s-parameters, as reviewed in Chapter 2, were used throughout the design and the characterization in this work. The SPICE-based extraction of the mixed-mode sparameters [7.1][7.2] were especially useful, b ecause it allowed one to examine the relationship PAGE 107 107 between the extracted results and the circuits ope ration. Furthermore, the transient response of the SPICE-based extraction enabled the simulation to account for the circuits non-linear effects [7.1][7.2]. The developed compact sized broadband baluns were shown in Chapter 3, which were realized using planar-type Marcha nds configuration [7.3]. Such c onfiguration was chosen for its large relative-bandwidth and compact structure. To achieve high performances, the optimum values for the differentialand common-mode characteristic impedances of the Marchand coupling were analytically derived using general transmission-line theories. For the case of symmetric Marchand baluns, these values were shown to be 58.58 for differential-mode and 85.36 for common-mode. In order to achieve such large coupling, a new coupling structure was proposed using a double-sided single-laye r PCB surrounded by conductive fixtures. Large coupling was easily achieved in this structure, because the majority of the electromagnetic field propagates inside the PCBs substr ate of high dielectric constant ( r = 3.38) for differential-mode, while that of the common-mode propagates in air ( r = 1). Two planar-type Marchand baluns were designed using alternativ e layout arrangements. Both de signs were integrated with common-mode matching branch in order to mini mize the errors associated with the commonand cross-modes. Finally, the designed baluns were assembled onto the on-wafer probes. Using a dual-through pattern conn ected to a dual-probe, the measur ement results showed large 3 dBrelative-bandwidths of 0.909 and 0.855. In Chapter 4, a new set of ISS and an extr action method were proposed for characterizing the 3-port error-box in 3 dB-coupl ed (including baluns) on-wafer measurements [7.4]. The proposed method fully extracted all 9 mixed-mode sparameters of the 3-port error-box, where in the differential-mode measurements, the 4 differe ntial-modes were used for calibration, and the PAGE 108 108 remaining 5 commonand cross-modes were used for evaluating the measurement errors. This method required less work compared to the pr evious method of using a dual-through pattern connected to a dual-probe, and it is anticipated to be more accurate because it avoids the reconnections of the coaxes leading to the VNA and avoids the errors associated with the imperfection of the dual-through pattern, dualprobe, and VNA itself. The proposed method was also shown to be more tolerant to measuremen t errors that occur when measuring the ISS, because it used the pseudo-inverses of over-determined matrices. The proposed ISS was manufactured by Cascade Microtech Inc., and it was put into test for a Marchand balun embedded probe, where the extracted results show ed good agreement with that of the previous approach. A new evaluation method for the measurement errors cause by the baluns commonand cross-modes (CXM) [7.5] was shown in Chap ter 5. The proposed evaluation method used random variables to account for the unknown parame ters of the differential DUT, and displayed the anticipated minimum and maximum of the sparameters that can result under the pseudoworst conditions of the measurement errors caused by CXM. It was shown that the proposed method can be used in post measurement processes, by which the users can be conveniently informed of the measurements accuracy. The verification of the proposed algorithm was done for a fully-differential amplifier that was bei ng measured through the Rat-race type baluns. The results showed that the DUTs original and the calibrated 2x2 differential s-parameters were all well within the anticipated minimum and maxi mum s-parameters provided by the proposed method. In efforts to further increase the bandwidth of the proposed measurem ent strategy, active balun were developed operating up to tens of GHz in limited chip-areas, as shown in Chapter 6 PAGE 109 109 [7.6]. With the development of a calibration algo rithm for unidirectional error-networks, this is anticipated to become a promising solution for the proposed strategy, due to their large bandwidth and compact size, which are far beyo nd what passive baluns can provide. The newly proposed active balun used a cascode and cascade pa ir with a shared input transistor, hence, was named as the combined cascode-cascade balun (C3balun). The circuit cont ained no internal DCdecoupling capacitors, so that the bandwidths lower-end freque ncy was only limited by the DCdecoupling capacitors at the por ts interfaces. The proposed C3-b alun was designed in the IBM 8HP 130 nm BiCMOS process, where the layouts compacted version was expected to fit in limited chip-areas as small as 0.2 mm x 0.2 mm, which makes them well suitable for BIST applications as well as general circuits requiri ng compact sized broadband baluns. For the input power as high as 5 dBm, the measurement results (with the pads calibrated out) showed a large bandwidth up to 17 GHz, where the imbalance of the differential output wa s less than 1.8 dB in amplitude and less then 10 degrees in phase. PAGE 110 110 LIST OF REFERENCES [1.1] Y. Ko, W. R. Eisenstadt, and J. R. Pa viol, Design and optimization of a 5 GHz CMOS power amplifier, 7th Annual IEEE Wirele ss and Microwave Tec hnology Conference, pp. 117, Apr. 2007. [1.2] M. -S. Yang, S. -M. Oh, and S. -G. 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Fox, Evaluation of Measurement Uncertainties Caused by Comm onand Cross-modes in Differential Measurements using Baluns, IEEE Transaction on Microwa ve Theory and Techniques submitted for review, Oct. 2007. [7.6] K. Jung, W. R. Eisenstadt R. M. Fox, A. W. Ogden, and J. -S. Yoon, Broadband Active Balun using Combined Cascode -Cascade Configuration, IEEE Transaction on Microwave Theory and Techniques submitted for review, Sep. 2007. PAGE 115 115 BIOGRAPHICAL SKETCH Kooho Jung received the BS and MS degrees in electrical engineering from Hanyang University, Republic of Korea, in 1997 and 2001, respectively, where he had m ajored in device physics for semiconductor optical-device under the supervision of Dr. Jongin Shim. He received the Ph. D. degree in electrical engineering from the University of Florida, majoring in passive and active broadband Baluns and RF calibration/measurement theories. In 2001-2002, he was an associate engineer at Giga Electronic System Lab (National Lab), Republic of Korea, where he worked on RF -to-Optic Link and circuit modeling for optical devices. Concurrently, he had lectured in electr omagnetics, electronic circuits, and engineering mathematics at Kyungmin College. In 1999-2000, he served as the S4 NCOIC during his mandatory military tour at the 102nd Military Intelligence, 8th US Army, stationed in Republic of Korea, where he received 4 medals/awards from the Republic of Korea Army and the United States Army. Dr. Jungs research interests also in clude RF CMOS power-amplifiers and electromagnetics/circuit-mode ling for passive devices. He received the Telecommunication National Scholarship in 2002-2006, from the Mi nistry of Information and Communication, Republic of Korea, and was awarded Fello wship from Texas Instruments in 2004. |