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Analysis and design of regenerative load system for power device test

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Title:
Analysis and design of regenerative load system for power device test
Creator:
Hsu, Chin-Yuan, 1948-
Publication Date:
Language:
English
Physical Description:
vii, 180 leaves : ill. ; 29 cm.

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Subjects / Keywords:
Capacitors ( jstor )
Damping ( jstor )
Electric current ( jstor )
Electric potential ( jstor )
High frequencies ( jstor )
Inductance ( jstor )
Inverters ( jstor )
Simulations ( jstor )
Utilities ( jstor )
Waveforms ( jstor )
Dissertations, Academic -- Electrical and Computer Engineering -- UF ( lcsh )
Electrical and Computer Engineering thesis, Ph. D ( lcsh )
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bibliography ( marcgt )
non-fiction ( marcgt )

Notes

Thesis:
Thesis (Ph. D.)--University of Florida, 1996.
Bibliography:
Includes bibliographical references (leaves 173-179).
General Note:
Typescript.
General Note:
Vita.
Statement of Responsibility:
by Chin-Yuan Hsu.

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ANALYSIS AND DESIGN OF REGENERATIVE LOAD SYSTEM
FOR POWER DEVICE TEST













BY

CHIN-YUAN HSU


A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL
OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY UNIVERSITY OF FLORIDA

1996


UNIVERSITY OF FLORIDA LIBRARIES














ACKNOWLEDGMENTS


I would like to express my deepest gratitude to Dr.Khai D.T. Ngo, the chairman of my supervisory committee, for his guidance and encouragement. I would also like to thank other professors, Sheng S. Li, Dennis P. Carroll, Alexander Dominjan and B. Capehart, for serving on my supervisory committee. Lastly, I want to thank Dr. J. Kenneth Watson for his initial support, encouragement and assistance.

In deepest gratitude, I wish to express my greatest love and thanks to my parents, my sister and my younger brother for their assistance and encouragement.


ii















TABLE OF CONTENTS
page
ACKN O W LEDGM EN TS ........................................................................................ 1i

ABSTRA CT...................................................................................................................v

CHAPTERS

I INTRODUCTION ...............................................................................................1

1.1 Im pedance Em ulator ............................................................................. 1
1.2 Inverter w ith Active Power Filtering Function ...................................... 3
1.3 Regenerative Load System .................................................................... 4

2 ACTIV E PO W ER FILTER............................................................................. 8

2.1 Introduction........................................................................................... 8
2.2 Principles of Operation ........................................................................ 10
2.3 Sim ulation Results ............................................................................... 18
2.4 Experim ental Results ........................................................................... 24
2.5 Discussions .......................................................................................... 24
2.6 Sum m ary ............................................................................................. 29

3 REGEN ERA TIV E LOAD SY STEM .......................................................... 30

3.1 Introduction......................................................................................... 30
3.2 Principles of Operation ........................................................................ 33
3.3 Sim ulation Results ............................................................................... 45
3.4 Discussions .......................................................................................... 47
3.5 Sum m ary ............................................................................................. 51

4 STABILITY ANALYSIS OF REGENERATIVE LOAD SYSTEM
W ITH UTILITY SOURCE IM PEDAN CE.................................................. 53

4.1 Introduction......................................................................................... 53
4.2 Stability Analysis of the Regenerative Load System...........................54
4.3 Sim ulation Results.......................................................................... .........62
4.4 Discussions................. ......................................................................... 68
4.5 Sum m ary............................................................................................. 75


iii









5 INPUT IMPEDANCE SPECIFICATION OF DEVICE UNDER TEST
FOR STABLE REGENERATIVE LOAD SYSTEM.................................. 77

5.1 Introduction .......................................................................................... . 77
5.2 Defining the Regenerative Load System as Two Cascaded Subsystem...79
5.3 Subsystem Interaction Analysis..................................................... ..........83
5.4 Stability Analysis of Regenerative Load System
as Two Cascaded Subsystems............................................................. 90
5.5 Stability Improvement of Regenerative Load System............ ...............115
5.6 Input Impedance Specification of Device Under Test....................... ....120
5.7 D iscu ssio ns....................................................... .....................................137
5.8 Sim ulation R esults.................................................................................147
5.9 Experimental Results
5.10 S um m ary................................................................................................144

6 ACTIVE DAMPING AND COMPENSATION OF
THE REACTIVE CURRENT...... ..................................................................149

6 .1 Introduction ............................................................................................149
6.2 A ctive D am ping.....................................................................................150
6.3 Compensation of the Reactive Current..................................................155
6.4 Bandwidth of the Current Controller......... ............................................159
6.5 Combination of the Active Damping and
Compensation of the Reactive Current...................... ............................161
6.6 Sim ulation R esults.................................................................................165
6 .7 S um m ary................................................................................................167

7 CONCLUSIONS AND FUTURE WORKS...................................................170

R E FE R EN C E S............................................... ...........................................................173

BIOGRAPHICAL SKETCH............... ......................................................................180


iv














Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirement for the Degree of Doctor of Philosophy

ANALYSIS AND DESIGN OF REGENERATIVE LOAD SYSTEM FOR POWER DEVICE TEST

By

Chin-Yuan Hsu

August 1996

Chairman: Khai D. T. Ngo
Major Department: Electrical and Computer Engineering

A "regenerative load system" is proposed, replacing the conventional load for the long-term testing of power equipment and motor-generator set. Basically, this system consists of two parts: (1) impedance emulator and (2) inverter with power filtering function.

The proposed system has three significant merits: economic, safety and power quality. The first merit involves the recycling of the electrical energy, resulting in the energy consumption less than 20% of the conventional load. If the soft-switching technique is employed for the converter, the total energy dissipation can be even lower than 10%. Second, safety is a consideration. Due to the low energy dissipation, no appreciable Joule heating is observed. The third, power quality, is equally important. Since the current from the ac line is shaped into a pure sinusoidal waveform with


v









power factor equal to one, problems such as harmonic currents and EMI will be greatly reduced. Hence the power quality of the utility source can be improved.

In order to accomplish the analysis and design of the system, the following contributions have been made. For the active power filter design, a new control method, using an integrator and sampling technique, is proposed to simplify the calculation algorithm for the real fundamental component of load current. In addition, a new simple control scheme, based on the energy balance concept, is proposed to control the voltage of an energy-storage capacitor. The advantages of this active power filter (APF) circuit are simplicity of control circuits, low cost (a smaller energystorage capacitor) and good transient response (less than two cycles of 60 Hz). The feasibility of this theory is verified by using PSpice simulation and experimental results.

Secondly, in the design of the system, a memory circuit is used to calculate and memorize the utility source current. This design provides an alternative method to the design of APF control circuits. Third, we have found that the utility source inductance may cause the APF system to become unstable. After the addition of the damping circuit, the system can be stable. However, even with the addition of the damping circuit, the APF or regenerative load system, will still be unstable if the gain of the current controller is greater than one. Therefore, for the stability of the system with utility source inductance, the following conditions must be met: (1) addition of a damping circuit and (2) the current controller gain must be kept smaller than one. This


vi









phenomenon has been verified by Matlab control analysis and PSpice simulation and has never been noted in the literature.

Fourth, employment of the equivalent impedance concept separates the regenerative load system into two equivalent subsystems and establishes the "input impedance specification" of the DUT (Device Under Test) for the stability of the

-regenerative load system." Fifth, for the improvement of stability margin of the system, a new "two-damping-circuits" concept is proposed. The addition of a second high frequency damping circuit can further improve the stability margin of system. This "two-damping-circuits" concept can be applied also to other circuit design.

Sixth, and lastly, when using the active damping circuit to replace the conventional passive damping circuit, the overall system efficiency is improved. Also, a new "reactive-current-compensation" concept is developed to compensate the reactive component absorbed by the damping circuits. Hence the power factor of the utility source current can be increased to nearly one, even in the presence of the damping circuits.


vii














CHAPTER 1

INTRODUCTION


If we test power device or equipment where a conventional load is used, a large amount of energy will be dissipated and Joule heat produced. This dissertation develops a "regenerative load system" for long term testing of "power equipment" and "motorgenerator set" to achieve energy conservation. At the same time this system can improve the power quality of the utility source. Basically it consists of two parts: (1) an impedance emulator and (2) an inverter with power filtering function, as shown in Fig. .1.. Two topics in power electronics are closely related to this study: "power factor correction" [1-23] and "active power filter" [24-56]. The following discusses some of the characteristics and applications.



1.1 Impedance Emulator ( related to power factor correction)

For applications in which line pollution in terms of harmonic content and displacement power factor of the input current is of main concern, ac/dc converters featuring almost unity power factor are required. These high quality rectifiers, also called "power factor pre-regulators" (PFPs) replace the conventional capacitive-filter rectifiers, which have the disadvantages of absorbing high peak currents from the utility line. The goal of a high quality rectifier is to emulate a resistive load, achieving


I





2


P S


L1


P


P.
in


Device Under Test


P
L


P


Regenerative Load


C


(a)


S


utility


Is


in


"Device"


under test


iin


1i


Inverter withImeac Active PowerIpdnc Filtering Euao


T Energy Storage Capacitor
~---------------------------------------------(Regenerative Load)


(b)



Fig. 1.1 The regenerative load system and the internal structural block diagram.
(a) The regenerative load system and (b) The internal structural block diagram of the regenerative load system.


PL





3


theoretically the unity power factor, even in the presence of distorted line voltage. In order to do that, PFPs (power factor pre-regulators) must be able to shape the input current in such a way that it represents a scaled replica of the line voltage. Among the active methods for input current shaping based on switching dc/dc converters, those employing boost topology are mostly applied [1-3]. Moreover, this resistor emulator concept has also been extended to the "variable active-passive reactance" (VAPAR), which was originally proposed in references [24] to [26], and is one of the new applications of the bilateral converter. The VAPAR works as a variable passive reactive element (or a kind of virtual reactance) including the transient state. Realization conditions and experimental results were introduced by Funato and Kawamura [241. In these analyses and experiments, however, a dc voltage source was used as an energy storage element. If a dc voltage source is replaced with a capacitor, the VAPAR can be considered as a complete two-terminal element. In Chapter 3, the VAPAR concept is employed to implement the "impedance emulator."



1.2 Inverter with Active Power Filtering Function (related to active power filter)

Power electronics are widely used in industrial equipment, such as frequency changer, motor-drive system, etc. Such equipment presents a nonlinear impedance to the utility, generating large harmonic currents with adverse effects, such as low power factor, low efficiency, and destruction of other equipment (e.g. the power capacitor can be damaged by the resonant overvoltage, etc.). Also, EMI interferes with instruments and communication equipment. Therefore, the active power filter was used to reduce the above pollution problems and to compensate the reactive power of the load





4


simultaneously. Since the active power filter must provide the harmonic and reactive power, it is basically a bilateral converter. Chapter 2 proposes the active power filter with

-reduced energy-storage capacitor." Subsequently, in Chapter 3, this APF is re-modified as an "inverter with power filtering function" to become a part of the "regenerative load system."



1.3 Regenerative Load System

In Chapter 3, the above two parts are combined together to form a regenerative load system, used for long term testing of the power equipment and motor-generator set.

The proposed system, shown in Fig. 1.1(a), consists of two parts: (1) an impedance emulator and (2) an inverter with power filtering function. The internal structural block diagram is shown in Fig. 1.1(b). In the first, the impedance emulator draws currents from the DUT, according to the equation 1 L = L . This current related ZL

power can be used to charge the "energy-storage capacitor." Therefore, the input of this converter can be viewed as an equivalent load impedance of value "ZL ". The energy stored in the capacitor is inverted into ac current and is fed back into the input of the DUT by the second part of the system, i.e., "inverter with active power filtering function." In addition, this inverter can also provide the compensation current to shape the ac line current is into a pure sinusoidal waveform with power factor P.F.=1.0.

The proposed system has many merits. First, this system is economical because of the recycling of the electrical energy. The energy consumption will be less than 20% of the conventional load. If the "soft-switching" scheme is employed for the converters,





5


the energy dissipation can be even lower than 10%. Secondly, safety is a consideration. Due to the low energy dissipation, no appreciable Joule heating is observed. Lastly, since the current from the ac line is shaped into a pure sinusoidal waveform with power factor P.F.=1 .0, problems such as harmonic currents and EMI will be greatly reduced. Hence, the power quality of the utility source can be improved.

In the whole analysis and design process, we obtained the following new contributions. For the active power filter design in Chapter 2, a new control method using an integrated and sampling technique is proposed to simplify the calculation algorithm for the real fundamental component of load current. In addition, a new simple control scheme based on the "energy balance concept" is proposed to simplify the design of the conventional APF-capacitor-voltage-control circuit. This APF has many merits. First, it simplifies the calculation of the current is(t) required by the utility source. Next, a larger voltage ripple can be tolerated in the energy storage capacitor; therefore, a smaller energy storage capacitor is needed. Finally, only a proportional capacitorvoltage-control method is applied in the controller design, and the transient response is fast and good (less than two cycles of 60 Hz).

In Chapter 3, a new utility source current memory circuit based on the energybalance concept is proposed to simplify the design of the energy-storage capacitor voltage control circuit. This design further simplifies the control circuit of the "regenerative load system." For simplicity, we assume in Chapter 3 that the utility source inductance, Ls, equals zero. The effect of the utility source inductance Ls on the system stability will be reconsidered in Chapter 4 and is a contribution of this research.





6


In the stability analysis of the regenerative load system, the research in Chapter 4 indicated that with the existence of utility source impedance L, the system will become unstable. After the addition of damping circuit, the system can be stabilized; however, the current gain of the current controller of the APF or inverter with active power filtering function must be kept below one, i.e., k
Additionally, in Chapter 5, we derived the "input impedance specification" of the DUT for the stability of the regenerative load system. There are many related research works in the literature [57-68]. However, we proposed an "equivalent circuit concept" to transform the system into two subsystems, an utility source subsystem and a DUT load subsystem. Then, the "two subsystem interaction theory" by Schulz [57] and Wildrick et al. [66] is applied to analyze the stability of the integrated system. Based on PSpice simulation, we use a simple current-controller model which is valid up to 1.1 kHz for 20 kHz switching frequency. If the switching frequency is not high, more detailed model needs to be considered [70]. This will remain as an interesting future research work. Finally, the input impedance specification of the DUT is established for the stability of the regenerative load system, assuming the output impedance of the utility source subsystem is known.

We also established the "two damping circuits concept." In the analysis of Chapter 5, we found that if only one damping circuit (low-to-medium frequency) is used, the stability margin of the system is not large enough. The addition of a second high





7


frequency damping circuit can further improve the stability margin of the system. This two damping circuit scheme can be applied to other circuit designs.

Lastly, we used the active damping circuit to replace the passive damping circuit since the passive damping circuit will dissipate energy in its resistor and decrease the total efficiency of the system. Also these damping circuits can absorb the capacitivereactive current and cause the power factor of the utility source to be less than one, i.e., p.f. < 1.0. Therefore, in Chapter 6, the active damping circuit is introduced to replace the conventional passive damping circuit. The energy consumption in the active damping resistor is restored into the energy-storage capacitor. Hence the efficiency of the system can be increased. Also, in Chapter 6, a "reactive current compensation concept" is developed to compensate the reactive current component absorbed by the damping circuits. Thus the power factor of the utility source current can be increased to nearly one, i.e., p. f.~- 1.0. In addition, it is noted that due to the bandwidth limitation of the current controller, only the low-to-medium frequency damping circuit can be replaced by the active damping circuit, and the high frequency damping circuit still needs to be passive.














CHAPTER 2

ACTIVE POWER FILTER
WITH REDUCED ENERGY-STORAGE CAPACITANCE


2.1 Introduction

Power electronics are widely used in industrial equipment, such as frequency changers, motor-drive systems, etc. Such equipment presents a nonlinear impedance to the utility, generating large harmonic currents with adverse effects, such as low power factor, low efficiency, and destruction of other equipment (e.g. the power capacitor can be damaged by the resonant overvoltage, etc.). Also, the EMI will interfere with some precision instruments and communication equipment. Therefore, the active power filter was used to reduce the above pollution problems and to compensate the reactive power of the load simultaneously.

As a result, utility power quality has become an important issue. Many research papers and methods have been proposed to solve these problems. Conventionally, a passive LC filter was used to suppress the harmonics and capacitors were used to compensate the lagging power factor. However, they have many disadvantages, such as large size, resonance and fixed compensation characteristics [27,28]. The conventional passive power filter cannot, therefore, provide a complete solution.


8





9


Many specialists approach the solution from the viewpoint of preventing the generation of harmonics, such as high-power-factor switching power supply, frequency changers and uninterruptible power supplies [29-34]. However, existing harmonic pollution sources still need to be improved. Some active power filter (APF) methods have been proposed to compensate the present harmonic loads, to provide the reactive power, and to compensate the harmonic current, in order to achieve the goal of high quality utility sources [25-41]. Since the active power filter must provide the harmonic and reactive power, it is basically a bilateral converter.

This chapter proposes a new APF technique, employing a reference voltage in phase with the utility supply, to multiply with the load current and to calculate the real fundamental component of the load current. The difference between the instantaneous load current and this fundamental component is the command current for the APF. This command current includes reactive fundamental power and harmonics. This compensation current is provided by a bilateral converter using the unipolar pulsewidth-modulation (PWM) technique [30,42].

As the reactive power comes from the energy-storage capacitor and this reactive energy transfers between the load and the energy-storage capacitor (charging and discharging the capacitor), the average capacitor voltage can be maintained at a constant value. Owing to the losses in the converter such as switching loss, capacitor leakage current, etc., the utility must provide, not only the real power needed by the load, but also the additional power required by the converter to maintain the capacitor





10


voltage at a prescribed value. In this chapter, we propose a new dc bus voltage controller, using the energy balance concept.

As no delay element (such as LPF or PI control) is used in this control circuit, the transient response is fast and good (less than two cycles of 60 Hz). The advantages of this APF circuit are simplicity of control circuit, low cost (a smaller energy-storage capacitor), and good transient response (less than two cycles of 60 Hz). In theory, the time delay for the compensation of reactive and harmonic currents is zero. The feasibility of this theory is verified by using a PSpice simulation and experimental results.



2.2 Principles of Operation

2.2.1. System Description

The fundamental building block of the APF system is shown in Fig. 2.1. Under normal circumstances, the utility can be assumed to be a sinusoidal voltage source.



vs(t) = Vsm sin ot (2.1)

If a nonlinear load is applied, the load current consists of the fundamental component and all the higher-order harmonics and can be represented as




SL M In sin(nnot + On) (2.2)
n=i





11


is(t) iL(t)



qAC utility i
V~sin(ofl)I Non-linear load C ------------ --------------LCT

S Iq'



Bilateral PWM Converter
-------------------------------


Fig. 2.1 Simplified schematic of the active-power-lineconditioner or the active power filter.





12


Therefore , the load power can be expressed as



PL(t) = vs(t)iL(t) IVsm sin2 Ot cos O +IiVsm sin2 ot cosO + Vsm sinotIn sin(not + 0) n=2

= pS(t)+ pC (t) (2.3)

In Eq. (2.3), the first term is the real power supplied by the utility source, the second term is the reactive power, and the third term is the harmonic power, i.e.,




ps(t) = IVsm sin2 otcosO1 pC (t) = IiVsm sinot cosot sin 1 + 2:Vsm sin(ot) In sin(ncot + On) (2.4)
n=2

As the APF provides the reactive and harmonic power pc(t), the current supplied by utility will be




s(t)= -p(t) = I, cosO I sinot vS(t)

=is sincot

where


Is = I cosO (


(2.5)





13


The current is in phase with the utility voltage and is pure sinusoidal. At this time, the APF must provide the following compensation current



i c(t) ='L (t)-- is(t) (2.6)

Thus the APF needs to calculate the current i,(t) accurately and instantaneously as described below.




2.2.2 Calculation of the Fundamental Component i4~)

Now, if a sinusoidal waveform with amplitude 2 and in phase with the voltage source v,(t) is multiplied by iL(t),




p L (t) = 2 sin ot I n sin(not + 0 n) .... (2.7) n=I

Integrating Eq. (2.7) over a period T, the averaging power can be obtained as




Pav PL (t)dt

= I (21 sin2 ot cos01)dot
coT
+- (2I, sin ot cost sin0, )dot
coT

+ E I(2sinOtIn sin(not + 0n)dot n=2

I, IcosO1 (2.8)





14


After integration over a whole period, the second and third terms on the right-hand side of Eq. (2.8) will be equal to zero. Therefore, Pa, = I, cosOI is the peak value of the current supplied by the voltage source , as seen in Eq. (2.5).

The block diagram of the fast utility source current calculation circuit is shown in Fig. 2.2. The voltage source is buffered down and fed through a zero-cross detector (ZCD) to provide a synchronous square wave as the input of the phase-locked-loop (PLL) circuit. The PLL circuit will produce a reference signal 2sinot in phase with the utility voltage source. This signal is multiplied by the load current L(t), integrated over a period T, and fed through a sample-and-hold (S/H) circuit to obtain a quantity proportional to II cosO1. The control logic resets the integrator at the beginning of every period T and samples the integration results at the end of the integration. In this way, the real power can be calculated. By appropriate adjustment of the gain K, the peak value of the utility source current can be obtained.



2.2.3. Control of the dc-bus Capacitor Voltage

The compensation current ic (t) is provided by a bilateral converter with unipolar PWM modulation as shown in Fig. 2.3. The dc source comes from the energy storage capacitor, as it provides only the reactive power to the load. However,




15


phs-okd PLL _Freset sampling

X Integrator S/H K + (t)



VDC(t) + S/ K1 K
iL(t) V(




Fig. 2.2 Block diagram of the fast calculation circuit for the utility source current.












IC~t) + Kc PWM - CONV. c)






Fig. 2.3 The bilateral converter using the unipolar PWM modulation to provide the
compensation current ic(t).





16


owing to the switching loss of the converter, the utility must supply, not only the real power of the load current, but also a small overhead for the capacitor leakage and converter switching losses. In this way, the dc-bus voltage can be maintained on a fixed level. The control strategy, using the energy-balance principle, is described in the following.

If the reference voltage across the capacitor is Vcr, the reference energy storage will be




Ecr = CVcr (2.9)
2 c

while the instantaneous energy in the capacitor is



1 2
E, (t) = -Cev2 (t) (2.10)
2

Therefore, the energy loss of the capacitor in one period will be



AEc (t) = Ecr - Ec (t)
cc 2 2
= {Vcr - v (t)}
2


= 2 {Vcr +vc(t)}{Vcr - v,(t)} (2.11) Assuming that, within one period, the variation in capacitor voltage is moderate, the term {Vr + vc(t)} can be approximated as





17


Vcr + Vc (t) ~ 2Vcr (2.12)

AE c (t) Cc Vcr {Vcr - v c(t)} = Ki{Vcr - ve(t)} .(2.13)

Since this energy loss must be supplied by the utility voltage source, the peak value of the charging current I S can be estimated as




Vsm sinotI s sincotdt = AE Therefore


IsC = AEC= K2AEc
TVsm

where

2
K2 = (2.14)
TVsm

Hence, the peak value of the charging current Ise can be obtained as




Isc= K2AEc = K2Ki {Vcr - vc(t)} = K12 {Vcr - v (t)} where


K12 = KIK2 2CcVcr (2.15)
TVsm





18


As a result, the total peak current provided by the voltage source is



ism =is+ ISC

i,(t) = Ism sinot (2.16)


i*C(t) = iL(t) - is(t) (2.17)

By multiplying Ism with sincot, we can obtain the utility source current is(t). The difference between the load current iL(t) and is(t) will be the command current i * (t) for the APF converter.

Either bipolar or unipolar voltage switching of the converter can be used. The latter is selected to reduce converter loss. Thus, the current tracking circuit is a bilateral converter with unipolar PWM technique [30,42] as shown in Fig. 2.3. The switching frequency is 25kHz.





2.3 Simulation Results

Figure 2.4 shows the simulation results using PSpice software, where L1=2.5mH, Ci=10pF, Cc=660pF, and f, = 25kHz. When the voltage source is applied, the estimation integration circuit for the current i,(t) has not yet provided the calculated value. Hence, the output is zero, and all the load current is supplied by the converter. The capacitor voltage will drop owing to the release of stored energy. In the second cycle, however, the utility will supplement the energy in the capacitor to





19


200V ---- ---------------------------------------------------------- ------ --- ---a Y(7,3)
27-2 --------------------- - --- ------ --- --------(b)





aI (Vms)
(c)vuc
(d)















(c) Utility source current
(d) Compensation current
(e) Capacitor (Cdc) voltage Load current changes from a peak value of A to 20A after the fifth cycle.





20


raise its voltage to the prescribed value. Even so, the utility current still maintains a pure sinusoidal waveform. Except for the one-period delay by the integrator (this is the minimum time required to calculate the real power), the whole control circuit has no other time delay. Therefore, the transient response will be fast and good. In the simulation circuit, there is a step change of load current, from a peak value of lOA to 20A, after the fifth cycle. However, the utility source current responds immediately at the next cycle and stabilizes at the new value. This behavior demonstrates the fast and good transient response.

Figure 2.5 shows the frequency components of load current iL utility source current is, and converter compensation current i, obtained by PSpice simulation. In Fig. 2.6, the transient response of a step change of load current from peak value of 20A to IOA at the fifth cycle is presented. From this simulation, a capacitor-voltage rise during the transition cycle can be observed.

If limitation of the capacitor voltage is required, the utility current must change just after the voltage boundary is encountered. To achieve this an additional circuit can be added to detect the crossing of the voltage limit and to estimate the extra fundamental utility current needed to return the capacitor voltage to the preset value before the beginning of the next cycle.

Figure 2.7 shows the results of PSpice simulation, where the voltage limit is set as Vma = 235V and Vmin = 175V. In addition, the load current changes from peak value of 1 OA to 20A at the fifth cycle and from peak value of 20A to 1 OA at the tenth cycle.







21


10A T--------------------.-.-------------------------------------------.--...--.------------(a)

OA
a I (vO)
IOA ---------------------------------------------------------- --------.--------------(b)

a i (vMs)
OAy ---------------------------------------------------------------------- -------------(c)
OA
OH 1.0KH 2.0KH 3 OKH 4.0KH 5. 6M 6.0KH
a I (vuc)
Frequency












Fig. 2.5 Frequency components of load current L, utility source current is and

converter compensation current ic

(a) Load current iL = i(vm)

(b) Utility source current i,= i(vms)

(c) converter compensation current ic = i(vmc)






22


200V --- - - - - - -------------------------------- ---------------------------------------(a)
-200V+----- ----------------- ----------------------,------------------------- ------a V (7.3)
(b)
-2MA+------ ------- ------- ----- ------ ------------------------------ - ---a I (yin)
20A ---------------------- ----------------------------------------------------
(c)
-2MA ---- ------------------------------------------------------------- ------200, ------------------------------ ------------------------------------(d)


-2M -------- --- -------------------- -------------- 1
350V --------------------------- ---------------------------------------------- -------(e)

a v(71,FGnd)
Time





Fig. 2.6 Simulated current and voltage waveforms for steady-state and transient response.
(a) Utility source current
(b) Load current
(c) Utility source current
(d) Conpensation current
(e) Capacitor (Cdc) voltage Load current changes from a peak value of 20A to IOA after the fifth cycle.





23


(a)
-200V+- ------- --- I----------- ---------------- ---- ----------------------------- ---
a V (7,3)
2044 ----------------------------- ---- - - - - -

2b) ---- ------------------------ --- -- --- ----------------------------- -

2 0 - - - - - - - - - - - - - - - - - - - - - - -- - - - - -- - - - - - -- - - - - - - - - - - - -

2 -- ------- ----------------- ----- ---- ----- ----- ---------------------------15MA --------------- --------------- ------- --a I(vm)

a1V I (ie






a v(7e,FGd)





Fig. 2.7 Simulated current and voltage waveforms for steady-state and transient response.
(a) Utility source voltage
(b) Load current
(c) Utility source current
(d) Compensation current
(e) Capacitor (Cdc) voltage Maximum and minimum voltages across the capacitor are preset at Vmax =s235V and Vmin =r175V





24


2.4 Experimental Results

Figure 2.8(a) shows the experiment results where the RMS value of voltage source is 28v (voltage waveform pre-scaled down by 1/3), the load on the dc side is a 4700F capacitor in parallel with 360 resistor, and idc = 0.85A, whereas Fig. 2.8(b) is the result when a 40pF capacitor is placed in front and parallel with the rectifier. The dc-bus voltage of the converter is 50v and Cc is 330pF.

Figure 2.9(a) and (b) are the experiment results for transient response. The

load current began with a value of 1 p.u. RMS, rose up to 2 p.u. and fell back again to 1 p.u. In Fig. 2.9(a), the energy-storage capacitor is assumed as 1.42 p.u., whereas in Fig. 2.9(b), the capacitor value is 0.46 p.u., and the voltage across capacitor "Cc" is set at 1.76 p.u. From Fig. 2.9(b), it can be seen that even with a large ripple voltage on the energy-storage capacitor, the compensation results are still good.




2.5 Discussion

The determination of the value of the energy-storage capacitor is based on the following three conditions:

(1) Step increase of the real fundamental component of the load current

When the load current has a step increase, the energy stored in the capacitor must be released immediately to support the step increase in the power consumed by the load, i.e., by using energy-balance concept






25


OC fr PtI DC PIN1 ii" A4


(a)


__ 2


I1


'DC~* F-C I ' O-fi Q I i


(b)


Fig. 2.8 Experimental results for steady-state where Cc= 330pF: (a) Load on dc side is a 4700pF capacitor in parallel with a 36 Q resistor, (b) 40 IF capacitor in front and parallel with the rectifier
(1) Utility voltage (voltage waveform pre-scaled down by 1/3)
(2) Load current
(3) Utility source current
(4) Compensation current


N7i/
I t





26


aG P 1 0rPJI DC I 0C P 11 I I V

(a) -.YYC










A ACt I Dq TI DC A! A


\II Lt1 11J


(b)


I K


Fig. 2.9 Experimental transient-response results: (a) Cdc =1.42 p.u.; (b) Cd =0.46 p.u. Cc.base = P.U.= (I baseT) / Vbase Vbase = Vs.PMs base s.RMS
T=60Hz
(1) Utility voltage (voltage waveform pre-scaled down by 1/3)
(2) Load current
(3) Utility source current
(4) Voltage across energy-storage capacitor C,


A_ Id/ 4.I





27


C{ - V min= -VsmAl LIT (2.18)
2 2

where Vc.min = preset lower limit of the voltage of the energy-storage capacitor, Al LI = step increase of the peak value of the real fundamental component of the load current and T = period of the utility voltage source. Therefore, the value of the capacitor is




C _I = VsmAILIT (2.19)
Vcr - Vcmin

(2) Step reduction of the real fundamental component of the load current

While the load current is reduced, the utility source current does not change until the next cycle. Hence, this extra utility source current AI L2 will charge the energy-storage capacitor, i.e., by using the energy-balance concept




1 C m2 - V2 } =1Vsm l L2T (2.20)
2 2

where Vc,ma = preset upper limit of the voltage of the energy storage capacitor and AI L2 = step reduction of the peak value of the real fundamental component of load current. Therefore, the value of the capacitor required is




C 2 = VsmAIL2T (2.21)
V m2 - V (
c~max cr





28


(3) Reactive and harmonic components of the load current

During the steady state, the reactive and harmonic components of the load current will charge and discharge the energy-storage capacitor during the period. Therefore, using the energy balance concept



S(V - V) VsmAL3 T (2.22)
2 2 2

where AI L3 = the peak value of the RMS of the reactive and harmonic component of load current and Vca = maximum or minimum voltage of the energy-storage capacitor during one period. Therefore, using the energy balance concept



T
VsmAIL3
C = 2 (2.23)
(Ve~ 2
VAcr)l

where the half period T/2 is selected as the maximum charging or discharging times of the reactive and harmonic components will be less than T/2.

If the sinusoidal current waveform during the transient is to be preserved, the largest of CC1 , Cc2 , and C3 is selected as the value of the energy-storage capacitor. If the sinusoidal current waveform is not needed during the transient, the value of C3 is chosen as the value of the energy-storage capacitor. In Fig. 2.7, the latter case is applied in order to reduce the value of the maximum voltage across the energy-storage capacitor.





29


2.6 Summary

Owing to the nonlinear load of much electronic equipment, the utility power system is polluted by harmonics and the power factor is reduced. In this chapter, a new APF technique is proposed, using integration of the power and a sampling technique to simplify the calculation of the real fundamental component of load current. In addition, the energy-balance concept in the energy-storage capacitor is used to simplify the design of the conventional APF-capacitor-voltage-control circuit. This APF has three merits. To begin with, the calculation circuit for the utility source current is(t) is simplified. Second, a larger ripple voltage can be tolerated in the energy storage capacitor; therefore, a smaller energy storage capacitor is needed. Third, only a proportional capacitor-voltage-control method is applied in the controller design. Hence, the transient response is fast and good (less than two cycles). The feasibility of the above scheme is verified by PSpice simulation and experimental results. The results demonstrate that harmonics are suppressed and a nearly unity power factor is obtained.















CHAPTER 3

REGENERATIVE LOAD SYSTEM


3.1 Introduction

For testing the power device, if a conventional load is used, a large amount of energy will be dissipated and Joule heat will be produced. Hence, the focus of this chapter is trying to develop a regenerative load for long term testing of power equipment and motor-generator set to achieve energy conservation and improve the power quality. The proposed system is shown in Fig. 3.1. Basically this system will consist of two parts: an impedance emulator and an inverter with active power filtering function. The internal structural block diagram is shown in Fig. 3.2.

In the first place, the impedance emulator draws current from the DUT, according to the equation IL=VL/IL. This current related power can be used to charge the energy storage capacitor; therefore, the input of this converter can be viewed as an equivalent load impedance of value ZL.

The energy stored in the capacitor is inverted into ac current and fed back into the input of the DUT by the second part of the system, i.e., the inverter with active power filtering function. In addition, this inverter can also provide the compensation


30




31










S ig 3 Device ---+

PC Under Test



Regenerative Load

PC PL


Fig. 3.1 The regenerative load system.




32


i,
S
t

utility

s S


in
t


"Device" under test


- - o mi


C


Inverter withImeac Active Power pdac
Filtering Euao

Energy Storage Capacitor

(Regenerative Load)



Fig. 3.2 The internal structural block diagram of the regenerative load system.


IL





33


current to shape the ac line current is into pure sinusoidal waveform with power factor P.F.=l.0.

Hence, the proposed system has three merits. Because the system recycles the electrical energy, the energy consumption will be less than 20% of the conventional load. If the soft-switching scheme is employed for the converters, the dissipation can be even lower than 10%. Additionally, the system is safe. Due to the low energy dissipation, no appreciable Joule heating is observed. Lastly, since the current from the ac line is shaped into sinusoidal waveform with power factor P.F.=1.0, problems such as harmonic currents and EMI will be greatly reduced. Thus, the power quality of the utility source can be improved.

In this chapter, a new dc capacitor voltage controller using a new utility source current memory circuit and the energy-balance concept is proposed. In order to concentrate on the description of the energy-balance concept and the utility source current memory circuit, we assume, temporarily, the utility source is an ideal voltage source, i.e., the source inductance, Ls, is zero. The effect of utility source inductance, Ls, on the system stability will be discussed in Chapter 4.





3.2 Principles of Operation

The example schematic of the regenerative load system is shown in Fig. 3.3, and consists of the impedance emulator and the inverter with active power filtering function.





34









702 + - 7 + -8 2 2b2a I

+~~~, Ds_ V H 1 aD 3a ++=

Vs V -2000VF:
-+ D2
T 00
701 3a 2

. r----- ---- (DUT)


VMC 7274 -3F-D+ 75 Si7
C S S12
VM3 (8 1 (82 N


+ L2
7501 L 3 8 PI CI
743 Sl4

(81) (82)



(XCCt6 CCt6)
(Current Controller)


dle 2mh lal

2e



S. (108e)

To


(Impedance Emulator)


Fig. 3.3 The schematic circuit diagram of the regenerative load system.


1


* -a





35


3.2.1 Impedance Emulator

For the impedance emulator, a simple dc-to-dc boost converter is employed as a dc current controller with the reference current such that r e f = V o / R L (3.1)

where Vo is the output voltage of the device under test and RL is the emulated value of the load. Therefore, the output current of the device under test, lo, will track the reference current, Iref . The energy into the impedance emulator is used to charge the capacitor Cdc. The control circuit of the impedance emulator is shown in Fig. 3.4. Switches Se and Se2 are used to select a reference current Iref . Once the reference current Iref is selected, the actual current into the boost converter will track the reference value Iref . The current tracking scheme used is conventional bang-bang hysteresis controller. The output signal is used to control the power stage switch Sie of the impedance emulator shown in Fig. 3.3.



3.2.2 Invertor with Active Power Filtering Function



Calculation of the command current ic*(t) for the inverter

As for the second part, the inverter with active power filtering function consists of a single-phase bridge converter acting as a single-phase current controller. The voltage across the capacitor Cdc acts as the voltage source of this inverter.





36








t3 t3bar 100el Sel

+ (xt3) + 10K
Vt3 - V(1)/1 Meg
- 100e2 100e3 100e
SSe2
V(()/15VdK 0.02pF






10e 105e 106e 1078e


Fig. 3.4 The control circuit of the impedance emulator.





37


The command current ic*(t) for this inverter is calculated as shown in Fig. 3.5. The control strategy, using the energy-balance principle, is described below.

If the reference voltage across the capacitor is Vcr, the reference energy storage will be




Ecr =-CV2 (3.2)
2 cr

while the instantaneous energy in the capacitor is




Ec(t) = CCv 2 (t) (3.3)
2

Therefore, the energy loss of the capacitor in one period will be AEc(t) = Ecr - Ec(t)

= C{Vr - V (t)}
2 c

= {Vcr + vc(t)} {Vcr - vc(t)} (3.4)
2

Assuming that, within one period, the variation in capacitor voltage is moderate, the term {Vcr + vc(t)} can be approximated as



Vcr + vc(t) ~ 2Vcr (3.5)

AEc(t) CcVcr{Vcr - vc(t)} = Ki{Vcr - vc(t)} (3.6)





38


differential zero-crossing
v,(t) amplifier detector control
--+-e ZCD logic



phase-locked PLL f sampling

sinoti (t) sinot +
A + +C X 61 i:(t)

SH AI0C + + 3/. upae is(t)
VCt + K K2A12 + memory

sample
[Note:] and Isci
delay and resample hold
can be replaced
by sampling.



S/He
previous memory


Fig. 3.5 The block diagram of the calculating circuit for the utility source current.





39


Since this energy loss must be supplied by the utility voltage source, the change of the peak value of the charging current, A Isc, can be estimated as




Vsm sinotAIsc sinotdt = AEc (3.7)


Therefore

2
AIsC = AEc = K2AEc (3.8)
TVsm

where


K2 = 2
TVsm

Hence, the variation of the peak value of the charging current, AIsc, can be obtained as follows



AIsc = K2AEc = K2KI {Vcr - vc(t)} = K12{Vr - vc(t)} (3.9)

where


K12 = K2KI = 2CcVcr TVsm

In the next period, if this amount of peak value A Isc = A 11 is added to the steady-state utility current Isc1, the capacitor voltage will be restored by an amount of A V, as shown in Fig. 3.6. However, the steady-state utility source current must also be updated by an amount AI2 = AIsc in order to prevent capacitor voltage from continuing





40


AV AV1


AV2




to ti1 t
I I


sampling sampling

(a) Voltage change of the energy storage capacitor Cdc.
I 2
AI I













| to ti t2 t

sampling at zero
crossing of 60Hz

(b) Peak value of the charging current I...




Fig. 3.6 The concept for the memory of the peak value of steady-state utility source current, is.

I. A2 is used to adjust the steady-state charging current Isc in order to prevent
vc(t) from continuing change (e.g., voltage drop AV2)c
2. Al, is used to raise the vc(t) for an amount AV, = AV.
3. AV, = AV2= AV and AI, = AI2 = Al.4. ISCI is the previous memory of the peak value of steady-state utility current.
5. Iw3 is the updated memory of the peak value of steady-state utility current.
6. Iw2 is the actual peak value of I during t, I~ t2-





41


to change (e.g. another voltage drop AV2 ). Therefore, the memory of the peak value of the updated steady-state utility current needs to be


(3.10)


Isc3 = Isci + Al2


where

A12 = AIsc = K12{Vcr - vc(t)} As a result, during the next period, the total peak value of source current will be



Isc2 = All +Lsc3 =All +A12 +IscI


= 2AI + Isci


(3.11)


where


Al = Ali = A12 K12{Vr - vC(t)}

By multiplying IsC2 with sinot, it is possible to obtain utility source current is(t). The difference between the load current iL(t) and is(t) will be the command current ic(t) for the inverter with active power filtering function.


is(t) = Isc2 sinot


(3.12)


'c (M = iL W (t- is(t) (3.13)

During steady-state, the capacitor voltage vc(t) at the sampling instant will equal to reference voltage Vcr.





42


Vc(t)sampling = Vcr Hence, the variation of the charging current Al will be AI = AIsc = K12{Vcr - vc(t)} = 0 Consequently, in the steady-state, the utility source current will become Isc2 2AI + Isci = Iscl is(t) = Isc2 sinot = Isc i sinot = Iss sinot


where


Iss = steady-state peak value of utility source current


In addition, the updated memory of Isc3, will be re-sampled as the previous memory for the following cycle as shown in Fig. 3.5.

The detailed schematic diagram of the calculation circuit of the command current ic*(t) for the inverter with filtering function is shown in Fig. 3.7.


(3.14)


(3.15)


(3.16)









vs(t) differential is(t)/10 + lc(t)
amplifier s(t) in/10


61
phase-locked sinot +
loop
+
sinot


3103


spnslcn


vcr(t) + 2Cc Vcr 3101
vc(t) - T Vsm

K1K2


sp2 100


pdated memory


V(sp3) smlIsplJ
+ ml m2 m3
sp3 + loon

0.02pF 0.02pF


previous
sm5[splbar] memory
m5 m6 m7

+ 1000
16 em5 = 0.02pF
(5V) .X2 V(m3)I

IOK J Q 1701 Q 23 _IL0.02ms

CKs sp I bar + (XI) - 1801 27 (74LS14)
0.05V -K Q 7432
CL 2 buffer 0.02ms 60 HZ
sampling



Fig. 3.7 The schematic diagram of the calculation circuit of the command current i(t) for the inverter.





44


Current-mode control scheme of the inverter

Either bipolar or unipolar voltage switching of the inverter can be used. The latter is selected to reduce the inverter loss. Hence, the current tracking circuit is a bipolar converter with unipolar PWM technique [30, 42], as shown in Fig. 3.8. The detailed control circuit is shown in Fig. 3.9, and the switching frequency is 25 kHz.





3.3 Simulation Results

Figure 3.10 shows the simulation results, using PSpice software, where L, = 2.5mH, C, = IOuF, Cdc = 660uF (or 470uF) and fs =25 kHz. When the utility source current is applied, the impedance emulator has not been turned on. Hence, all the currents are nearly zero and the capacitor voltage is kept at the reference voltage Vref = 285v. After the fifth cycle, the impedance emulator is turned on, and there is a step change of the output current of the DUT from i0 = OA to i0 = 1 OA. The input current to the DUT is stabilized at the seventh cycle; however, the capacitor voltage vdc is lower than Vref. Hence, the capacitor voltage is charged to Vref in the eighth cycle. The whole system is stabilized at the beginning of the ninth cycle. Therefore, the transient response is two cycles longer than that of DUT. When the DUT is stabilized, the capacitor voltage may not be at the Vref value. As a result, there is one more cycle needed for the capacitor voltage to be charged to Vref -





45


Fig. 3.8 The bilateral current controller using the unipolar PWM modulation.





iC(t) + 91 1000 9101 L2
94 + +- K=50 ---93 _Tim i(VM4) 000OP T. 011F

NA 9201






16
(5V)
1OK

Si 1
16 91
(5V) (nplrPM


82K S12



25 KHZ


Fig. 3.9 The detailed control circuit of the bilateral current controller with
unipolar PWM modulation.





46










(a)



(b)



(c)



(d) L



(e)







Fig. 3.10 Simulated current and voltage waveforms for the regenerative load system.
(a) Utility source voltage vs = v(7,3) ; utility source current i, = i(vms)
(b) DUT input current iL = i(vm)
(c) Current controller current icc = i(vmc)
(d) DUT output voltage v0 = v(l) ; DUT output current i0 = i(vmle)
(e) Capacitor (Cdc) voltage Vdc = v(7 1,FGnd) DUT output current changes from a peak value of OA to 1 OA at the fifth cycle.





47


In Fig. 3.11, the transient response of a step change of DUT output current from i0(t) OA to i(t) = OA is presented. From this simulation, a two cycle longer transient response than that of DUT can be observed. Figure 3.12 shows the results of PSpice simulation, where the output current of DUT changes from i(t) = GA to 1 A at the fifth cycle and from IOA to GA at the tenth cycle.





3.4 Discussion

The determination of the value of energy-storage capacitor is based on the following three conditions:

(1) Step increase of the real fundamental component of the DUT input current

When the DUT input current has a step increase, the energy stored in the capacitor must be released immediately to support the step increase in the power consumed by the DUT, i.e., by using the energy-balance concept




2Cc{Vr - Vc min} = VsmAI IT (3.17)

where Vc,min = preset lower limit of the voltage of energy-storage capacitor, AILI = step increase of the peak value of the real fundamental component of the DUT input current and T = period of the utility voltage source. Therefore, the value of the capacitor is





48









(a) XV{



(b)



(c)


(d)



(e)

.. . . . ... ........





Fig. 3.11 Simulated current and voltage waveforms for the regenerative load system.
(a) Utility source voltage vs = v(7,3) ; utility source current is = i(vms)
(b) DUT input current iL = i(vm)
(c) Current controller current ic= i(vmc)
(d) DUT output voltage vo = v(1) ; DUT output current io = i(vmle)
(e) Capacitor (Cdc) voltage Vdc = v(7 1,FGnd) DUT output current changes from a peak value of I OA to OA at the fifth cycle.





49









(a)



(b)



(c)


(d)


(e)

.. .. . . .. . . .. . . . ;; - -- - - -- - -- -





Fig. 3.12 Simulated current and voltage waveforms for the regenerative load system.
(a) Utility source voltage v, = v(7,3) ; utility source current is = i(vms)
(b) DUT input current i L = i(vm)
(c) Current controller current icc = i(vmc)
(d) DUT output voltage vo = v(1) ; DUT output current i. = i(vmle)
(e) Capacitor (Cdc) voltage Vdc = v(71,FGnd) DUT output current changes from a peak value of OA to IOA at the fifth cycle and from
1 OA to OA at the tenth cycle.





50


C VsmALLIT (3.18)
cr -Vmin

(2) Step increase of the real fundamental component of the DUT output current

While the DUT output current is increased, its input current may not change as quickly and as large until the next cycle. Hence, this extra DUT output current AIL2 will charge the energy storage capacitor, i.e., by using the energy balance concept



1 2 2 1
CC{Vcma- V- } = -VsmAIL2T (3.19)
2 2

where Vc,max = preset upper limit of the energy storage capacitor and AIL2 = step increase of the peak value of the real fundamental component of DUT output current. Therefore, the value of the capacitor required is




Cc2 = VsmAI L2T (3.20)
cmax -r

(3) Reactive and harmonic components of the DUT input current

During the steady-state, the reactive and harmonic components of the DUT input current will charge and discharge the energy-storage capacitor during the period. Therefore, using the energy balance concept




- Cc(Vei - Vs) = VsmI L- (3.21)
2 2 2





51


where AIL3 = the peak value of the RMS of the reactive and harmonic component of DUT input current and VcA = maximum or minimum voltage of the energy-storage capacitor during one period. Therefore, using the energy balance concept



T
VsmAI L3
Cc3 = 2 (3.22)
(V 2, - Ve)
V A cr)

where the half period T/2 is selected, so that the maximum charging or discharging times of the reactive and harmonic components will be less than T/2.

If the transient response waveform of the system is to be preserved, the largest of CcI, Cc2 and Cc3 is selected as the value of the energy-storage capacitor. If the transient response waveform of the DUT is not needed, the value of Cc3 is chosen as the value of the energy-storage capacitor.





3.5 Summary

For the long term testing of power equipment and motor-generator set, a regenerative load system is proposed, based on the energy balance concept. In addition, a memory circuit is added to the dc capacitor voltage controller to store the value of the utility source current needed to maintain the capacitor voltage during steady-state. This memory circuit concept can simplify the design of the capacitor voltage controller. This regenerative load system has three advantages: (1) economic, the energy consumption will be less than 20% of the conventional load; (2) safety, due





52


to the low energy dissipation, no appreciable Joule heating is observed; and (3) power quality, since the ac line current is shaped into sinusoidal waveform with P.F. = 1.0, problems such as harmonic currents and EMI are greatly reduced and the power quality of the utility source is also improved. In addition, only a proportional capacitor-voltage-control method is applied in the controller design. Thus, the transient response is fast and good. The feasibility of this regenerative load system is verified by PSpice simulation.














CHAPTER 4

STABILITY ANALYSIS OF
REGENERATIVE LOAD SYSTEM
WITH UTILITY SOURCE INDUCTANCE


4.1 Introduction

For the regenerative load system in Chapter 3, we assumed that the utility source is an ideal voltage source and has no series inductance with itself. However, actually, there will be some leakage inductance of the power transformer, Ls, in series with the utility source. When this series inductance is taken into consideration, the regenerative load system will become marginally stable or unstable.

This chapter will discuss the stability problem of the regenerative load system with the source inductance taken into consideration, and proposes a R,C damping circuit added to the system to obtain stability.

In addition, the analysis also shows that in order to maintain the stability of the system, the current gain of the current controller must be smaller than one, i.e., k(s) = I./Iin <1.0. In the analysis, first, we use an ideal current-controller, i.e., k=real constant. Then, based on PSpice simulation, we use a simple current-controller model which is valid up to 1.1 kHz for 20 kHz switching frequency. From these two kinds of analyses, the effect of the bandwidth limitation of the inverter on the system stability is


53





54


revealed. If the switching frequency is not high enough, more detailed model needs to be considered (70].



4.2 Stability Analysis of the Regenerative Load System with Source Inductance

When a regenerative load is connected to the utility source, the system may oscillate because of the presence of the utility source impedance, Ls. The schematic of the regenerative load system with source inductance, Ls, is shown in Fig. 4.1. The PSpice simulation results are shown in Fig. 4.2.

The occurrence of such instability is the motivation for the investigation reported here. There are many related research works on the stability of distributed power supply system [57-68]. The nature of the problem can be understood by consideration of the equivalent circuit of the feedback port of the regenerative load system as shown in Fig. 4.3. For concreteness, we consider the case for the DUT without loading. Hence, the input impedance of the DUT can be represented by an inductance ZLI = sLL, where LL is the magnetization inductance of the input transformer. This equivalent circuit can be further reduced to that shown in Fig. 4.4, where k is the gain of the current controller. The terminal voltage VI(s), i.e., V(7,3), can be obtained as


V1(s)= Vs(s) Zeq S
Zs + Zeq 1+ Z
Zeq

V


(4.1)


l+T





55


L ----------------------------------------702 s + - 7 + - 2 2 2a I



D-I
L= D=3 +i s I Vm :3.6pH o0 . 2 3a + C V

I V2 Dr 200 pF




IS VMO
- T D2 '
701 3a 0
3 ------- - - - - - - - - - - - - - - -
r------- ; ,---------------------------------------,I (DUr)




11 I1
Vuct 72-+
1 74 -)Fg- 75 Sil S12 7
Ci -( M (81 (82 S(e
L2 dj. 2mh lal
170 73 2 /


S1_3 si 4 S,,(108e)
(81) (82)


(XCCt6 CCI6)
(Current Controiler) (Impedance Emulator)



Fig. 4.1 The schematic circuit diagram of the "regenerative load system" with utility
source inductance Ls.





56


(a) VI
I 0 1 1-.



(b)



(c)


(d)



*
(e)


I




Fig. 4.2 Simulated current and voltage waveforms for the regenerative load system with utility source inductance Ls =0.02mh.
(a) Utility source voltage vs = v(7,3) ; utility source current is = i(vms)
(b) DUT input current iL = i(vm)
(c) Current controller current ice = i(vmc)
(d) DUT output voltage v0 = v(1) ; DUT output current io = i(vmle)
(e) Capacitor (Cdc) voltage Vdc = v(71,FGnd)





57


L3 VM VM -- - - -- - - -- - -
+ I + -8' 2b1
703 702 + DUT
vs Is L

701
3 1
(75) - +(73)+cI VM3
_VMCI K[ic, + it]
C,

(74)





Fig. 4.3 The equivalent circuit of the feedback port of the
regenerative load system.





58


Ls V1(s) sLs V1(s)


I(s) IcI(s) I(s) Ii
I ZL 71 V &

- s K [ I c i + I
I;,-* I


K[IC1 + 111


sLs V1(s)



Vs


1

Z'eq - sCI Z,
1-K


V, VI
I%=---= (I - K)-


Z'eq


SCI ZL


= (1-K)(IC,+I,)


Fig. 4.4 The reduced equivalent circuit of Figure 4.3.


Is = (I - K)(Ic, + It)





59


where

Z
T=-
Zeq

Z11
Z ZLII
Z eq = SCi
e =I-k =1-k

k = gain of the current controller (inverter) As discussed in references 57 and 66, the impedance ratio at the interface, defined as T = Zs/Zeq', can be considered as the loop-gain of the system and can be used to determine the stability.

The root-locus of the characteristic equation



Z
l+ T = I+-- = 0 (4.2)
Zeq

is shown in Fig. 4.5 for k = 0 to k = 0.99, where Ls = 2mH, Lt, = 600mH, rt, = 0.0010, CI = lOuF. Figure 4.5 clearly shows one pair of roots on the imaginary axis. Hence, the system is marginally stable and has sustained oscillations. The simulated results, using Matlab, is shown in Fig. 4.6 for k = 0.99. As shown in Fig. 4.6, the oscillation frequency is opproximately fos 11 KHz. This is in agreement with f = =o/2n 11.5kHz, which is calculated from the root-locus in Fig. 4.5 for k = 0.99.

If the gain of the current controller is increased beyond k >1 where the rootlocus is shown in Fig. 4.5(b), we can then see that there is one pole in the RHP. The






60


Root Locus


-1.5 -1 -0.5 0
real


0.5 1 1.5
xl&


Root Locus


-2 -1 0
real


1 2 3
x 101


Fig. 4.5 Root-locus of the regenerative load system with source impedance Ls, where Ls = 2mH, L, = 600mH, CI= 10pF. (a) stable system, k=0 to 0.99,+ for k=0, x for k=0.99; (b) unstable system, k=1.001 to 1.10, * for k=1.001, o for k=1.10.


x 1f
8r


6F


4


2F


(a)


imag


x


-4


-61-


-1


1

0.8


0.6

0.41

0.2


(b)


imag 0


A - - - G-- - -


-0.2

-0.4

-0.6 -


-0.8


-1 .
-3


a





61


0.


icl(t)
5



5

0


-0. 51
0

100r


0.2 0.4 0.6 0.8
V1(t)


1 1.2 1.4 1.6
X 10


50




0 . 0.2 0.4 0.6 0.8 1 1.2 1 .4 1.6
x 10F


Fig. 4.6 Matlab simulation results of the regenerative load system with utility source impedance Ls, where Ls=2mH, LI = 600mH, rt = 0.0010, and C, =10pF. (a) current of capacitor CI; (b) voltage at the interface of utility source and the DUT. The oscillation frequency is approximately, fos ~ 1.1 kHz for the current gain k=0.99.





62


system will become unstable because for k 1, there is a positive feedback with loopgain greater than one.

In order to stabilize the system, the root-locus must be shifted from the imaginary axis into the LHP. Employment of state feedback and pole placement can achieve this goal. However, the simple method is to add an R,C damping circuit across the terminal as shown in Fig. 4.7. The Rp,Cp damping circuit is used to damp out the oscillation for the case of current gain k < 1. Therefore, the characteristic roots of the system will move into the LHP as shown in Fig. 4.8, and the system will become asymtotically stable by adding this damping circuit Rp,Cp.

In the case of the gain of the current controller increasing beyond one, k > 1, there will be one pole moved into the RHP as shown in Fig. 4.9 and the system will become unstable again. The reason for this instability is due to the positive feedback with loop-gain greater than one, k 1. For the stability of the system, the damping circuit must be added and at the same time, the current gain of the current controller need to be smaller than one, i.e., k < 1.





4.3 Simulation Results

When the damping circuit, Rp,Cp, is added to the terminal, the system will become asymptotically stable for k < 1, as the root-locus of Fig. 4.8 (a) shows. The schematic of the regenerative load system with the damping circuit is shown in Fig. 4.10. Figure 4.11 shows the simulation results, using PSpice software, where





63














Ls V



vs I

3702
Is3 e


damping circuit


(75) - + (73)
C1 VM3

- IKc, TC


(74)


Fig. 4.7 The equivalent feedback port circuit with the damping circuit included.


+ Ild






64


Root Locus 80001


-10 -8 -6 -4
real


-2 0 2
x 101


Root Locus


N


A


I


-2 -1 0
real


1 2 3
x 104


Fig. 4.8 Root-locus of the regenerative load system with source impedance Ls, and having the damping circuit Rp=10Q,Cp=10piF added. (a) stable system, k=0 to k=0.99, + for k=O, x for k=0.99; (b) Zoom of (a) around the origin of the s plane.


6000

40002000-


(a)


imag 0


x --


-2000-4000-60004-


00L


-12



8000 6000

40002000-


(b)


imag


-2000-4000-6000-


.8000.


-3


-A


Oi i






65


Root Locus


Is--..-.......... *









0 1 2 3 4 5 6
real x 1gs


Root Locus 80001


0 0.5
real


1 1.5 2
x 101


Fig. 4.9 Root-locus of the regenerative load system with source impedance Ls, and having the damping circuit Rp=1M, Cp=10pF added. (a) unstable system, k=1.001 to
1.10, * for k=1.001, o for k=1.10; (b) Zoom of (a) near the imaginary axis.


800Cr


6000

4000 2000-


(a)


0
imag
-2000


-4000-600C-8000L- 1


6000

40002000-


(b)


0
imag
-2001-


U







U







U


-400C

-600-


-RAd '


-1


-0.5





66








L ----------------------------------------702 s + - 7 + -8 2 2b 2a 1
+s Vi VM ..3a + C
+ 2a D4
s V M C - . . i. - 2 0 0 0 F0
+ D2'
- C,-701 3a 0


VMc 72
74 - 75 S11 S12 7
C1 (82 VM2





L------ -- ---- -- -- --
750173


S13 S14
(81)(2)


die 2mh lal

2e

ie

SIG (108e)
10


(XCCt6 CCt6)
(Current Controller)


(Impedance Emulator)


Fig. 4.10 The schematic circuit diagram of the "regenerative load system" with the damping citcuit "R,,C,."





67









(a)
. 10.3) . If 12

(b)



(c)



(d)



(e)







Fig. 4.11 Simulated current and voltage waveforms for the regenerative load system with utility source inductance Ls =2mH, after the damping circuit Rp=10 Q, Cp=10pF, is added.
(a) Utility source voltage vs = v(7,3) ; utility source current is = i(vms)
(b) DUT input current iL = i(vm)
(c) Current controller current i = i(vmc)
(d) DUT output voltage vo = v(1) ; DUT output current io = i(vmle)
(e) Capacitor (Cdc) voltage Vdc = v(71,FGnd) DUT output current changes from a peak value of OA to 1 OA at the fifth cycle and from
1 OA to OA at the tenth cycle.





68


Ls=2mH, C, = lOuF and fs = 25 kHz. In the simulation circuit, the DUT output current changes from peak value of OA to 1 OA at the fifth cycle and from peak value of IOA to OA at the tenth cycle.





4.4 Discussion

Up to this point, the current gain of the inverter is assumed as a real constant. In reality, however, the current gain will be a function of complex frequency s, i.e., k(s), as derived in the following. The equivalent circuit of the current controller is shown in Fig. 4.12. From Fig. 4.12, the output current IL(s) is obtained as L2 (S) ke12[I ref - ki,scaleI L2] V(7,3) (4.3)
sL2

where

kel2 = kk2
VdC 285
kei = t -- = Vg 3
k2 =50
k i,scale = k i = 0.1(v/a) L2= 2.5mh

Therefore,

'L2(s)I= frefkcI2 V0
sL2 + kikc2 sL2 +kike12 If the term (sL2 + k, k12 ) is very large, i.e., k, k12 = loop-gain >> 1, then the second term Vo / (sL2 + k, k12 ) can be neglected, and thus





69


IU(S) s2 Ie=
c 0 CONV. -PM KC,
V(7,3) (Iys) + ICI(s)) - K4,Wal (K C)

Ki,.


Fig. 4.12 The equivalent circuit of the unipolar PWM current controller.





70


kjkc12
kiIL2 L2_ -(4.5)
Iref s+ kjkc12 1+ S L2 P

where

0 kjk c12
P L2

For I*ef = ko [IL (s) + IcI (s) ] at s=0, the actual current gain will be given as




k(s) = IL2 k 0 (4.6)
1 L (S) + Idi (S) +Swhere

k 0 = dc current gain of the inverter By applying k (s) of Eq. (4.6) to Eq. (4.1), the terminal voltage of the system without damping circuit is obtained as




V, (S) = VS
1+Ts
I +sT=s) +T~s) (4.7)
=V ais+ a0 s b3s3 +b2s2 +b1s+ bo where

a, = LI, ao = k kc12 Li/L 2 ; b3 = Ls L, C1,

b2= Ls L, C1 (1-ko) ki kc12/ L 2,

bi = Ls + LI, bo = ki kci2 L/L 2 + (-ko) (ki kci2/ L 2) Ls





71


Hence, the characteristic equation of the system without damping circuit is



b3S3 + b2S2 + bjS +bo = (4.8)



From Eq. (4.8), the root-locus can be plotted as shown in Fig. 4.13. In Fig. 4.13, there is one complex pair of poles in the RHP. As a result, the system will be unstable, and the oscillation will increase with time. These results are verified in Fig. 4.2 for the actual circuit simulated using PSpice software. This is different from the simulation results in Fig. 4.3, which assumes k = real constant, and the oscillation amplitude will not grow with time.

Similarly, the system with the damping circuit can also be re-examined, assuming the current gain K(s) of Eq. (4.6). The terminal voltage vi(t) will be obtained as




V, (s) = I)
I +T(s)

= (4.9)
1+
(Ze Zdamp)

where


Zdamp = RP + I
scp


Therefore






72


x 104


Root Locus


1)


-20 -15 -10 -5 0 5
real x 104

x 104 Root Locus


-3 -2


-1 0
real


1


2 3
X 10,


Fig. 4.13 Root locus of the regenerative load system with utility source impedance Ls=2mH, and without damping circuit, assuming that the current gain, i.e., k(s) = ko (kjk12 / L2)/(s+ kik12 / L2), is a function of frequency, where k0 = 0 to 1.02 ; "+" for k o=0, "x" for k0=1.0 and "o" for k o=1.02. (a) entire root locus; (b) Zoom of (a) near the imaginary axis.


1.51-


1


0.5F


(a)


C


0
imag
-0.5

-1-


-1.5-


1


0


(b)


.5

1 .5

0 )E)

.5

-1

.5


imag
-0


-1





73


a2s 2+als+ao (4.10)
V, (S) =VS (4.3 )
b4s4 + b3s3 +b2s2 +bs+b



where

a2 = RpCpLi, a, = L, (1 + RpCp ki kci2/L2), ao = L, k, kcI2/L2;

b4= LsLRpCpC1, b3 =LsL [C1 + Cp + (1-ko)RpCp(ki kci2/L 2) Ci],

b2= Ls {LI [ (1-kO)( ki kc12/L2) CI + (ki kci2/L2) Cp] + RpCp} + RpCpLi,

b, = Ls ( 1 + (1-kO) RpCp(ki kc12/L2) } + L, [ 1 + RpCp(ki kc12/L2) I,

bo = (1-kO) Ls (ki kc12/L2) + L, (ki kci2/L2)



and the characteristic equation of the system with damping circuit is given as



b4 S4 + b3S3 + b2S2+ b1S + bo = 0 (4.11)



The root-locus of the system can be obtained from Eq. (4.11) as shown in Fig. 4.14. When the root-locus in Fig. 4.14 is compared with that of Fig. 4.8 and Fig. 4.9, which assume current gain k = real constant, it can be seen that the complex dominant pole pairs in Fig. 4.8 (b) and Fig. 4.14 (b) are almost the same, and, thus, are related to the damping circuit Rp,Cp. The difference between these two root-locus is in the other pole pairs, which are influenced by the current gain k(s) of the inverter.

We can see, however, from Fig. 4.14 (a), that the system is stable for current gain ko< 1. Therefore, the requirement for the system stability is that the dc current






74


Root Locus


x 10,


-15 -10


real


-5


0


Root Locus Ann. .


-2 -1 0
real


5
x 10'


1 2 3
x I'


Fig. 4.14 Root locus of the regenerative load system with utility source impedance Ls=2mH, and with damping circuit, R = 100 , C = 1 OpF , assuming that the current gain, i.e., k(s) = k0 (kik12 / L2)/(s+ kik12 / L2), is a function of frequency, where k0 = 0 to 1.02; "+" for k o=0, "x" for k0=1.0 and "o" for k o=1.02. (a) entire root locus; (b) Zoom of (a) near the imaginary axis.


4

3

2

1


(a)


0
imaq


-2

-3

-4


20


60

40 20


(b)


0

0

0

0

0C

)C


0C -


imag
-20


-40

-60


-800L-3


C


1 . I





75


gain ko of the inverter is less than one, i.e., ko < 1, and the damping circuit Rp,Cp is added to the regenerative load system.





4.5 Summary

This chapter presented an analysis of the stability of the regenerative load system with the utility source inductance, Ls, taken into consideration. It was shown that the system will be exponentially unstable, using PSpice simulation, i.e., assuming that the current gain k(s) of the current controller is a function of complex frequency s. If the current gain is assumed as -a constant, for k < 1, the system is still marginally stable with sustained oscillation, as shown in the results of simulation using Matlab software. These instability phenomena are corroborated by the root-locus analysis of the regenerative load system.

Although employment of state feedback and pole placement can relocate these RHP poles into the LHP, the simple method is to add an R,C damping circuit across the interconnection terminal of the utility source and the DUT. This R,C circuit can damp out the oscillation for the case of current gain k < 1. Therefore, the characteristic roots of the system will move into the LHP as shown in the root-locus analysis. The effect of the R,C damping circuit on the stability of the system is verified using PSpice simulation.

Even with the addition of this damping circuit, the system will still become unstable if the current gain of the current controller is greater than one, i.e., k > 1.





76


This instability is demonstrated by the movement of poles into the RHP, using

the root-locus analysis. The physical explanation for the instability is that if the current gain, k, of the current controller is greater than one, then it is the situation of positive feedback with loop-gain greater than one that will cause instability. In summary, for the stability of the system, the damping circuit must be added across the utility source terminal, and at the same time, the current gain of the current controller must be kept below one, i.e., k(s)l < 1.














CHAPTER 5

INPUT IMPEDANCE SPECIFICATION
OF DEVICE UNDER TEST FOR
STABLE REGENERATIVE LOAD SYSTEM


5.1 Introduction

In order to find the input impedance specification of DUT for the stability of the system, there are many related methods in the literature [57-68]. Among these methods, the two subsystems interaction theorem is an adequate one and is adopted here [57,66]. First, the regenerative load system is transformed into two equivalent subsystems; then the two subsystems interaction theorem can be applied to analyze the stability of the system. This provides an alternative analysis method in addition to the root-locus used in Chapter 4. In addition, the input impedance specification of the DUT is also presented, using the subsystem interaction theorem [57,66].

At first, in Sec. 5.2, the equivalent impedance concept is proposed to transform the impedance and its associated controlled current source into an equivalent impedance such that Zeq - Z where Z is the original impedance and k is the gain (1 - k)

of the current controller. After this transformation, the system can be further divided into two equivalent subsystems. Then, in Sec. 5.4, the two subsystems interaction theorem is applied to analyze the stability of the system. We found that the system has potential stability problems for the active DUT load (e.g., regulated power converters)


77





78


due to the phase characteristics of the small signal dynamic input impedance of the active DUT (negative resistance in the low-to-medium frequency range). In order to clarify the effect of bandwidth limitation of the current controller on the system stability, we analyze the system using both the ideal model, i.e., current gain k=real constant, and the simple frequency-dependent model which is valid up to 1.1 kHz for 20 kHz switching frequency, based on PSpice simulation. If the switching frequency is not high enough, more detailed model by Tan and Middlebrook [70] needs to be considered. From the stability analysis, we found that the bandwidth limitation of the current controller has an adverse effect on the system stability. Therefore, a two damping circuits concept is proposed in Sec. 5.5 to improve the stability margin of the system. With the addition of a high frequency damping circuit, the stability margin increases remarkably. Subsequently, in Sec. 5.6, the input impedance specification of the DUT for a specified stability margin is presented. From this input impedance specification of DUT, we concluded in Sec. 5.7 that the proposed regenerative load system will be stable for the practical DUT and even for the active DUT. The only requirement of the input impedance of DUT is that its magnitude is greater than 0.1 Q for all the frequency range of interest. The validity of this study is verified by PSpice simulation.





79


5.2 Defining the Regenerative Load System as Two Cascaded Subsystems

In order to find the input impedance specification of the DUT for a stable regenerative load system, the utility source port can be transformed into two equivalent subsystems as shown in Fig. 5.1.

Figure 5.1(a) shows the original input port equivalent circuit with the inverter represented as a controlled current source. This controlled current source can be split into two controlled current sources as shown in Fig. 5.1(b). One controlled current source is parallel with the capacitor C1, and the other is parallel with the input impedance of the DUT.

Since the controlled current source, k 11, supplies current to the impedance Z1, the input current to this parallel combination will be



I7,q = 11 - kI; = (1 - k)I7 (5.1.)

Hence the equivalent load impedance is given as - VI VI
7 eeq ( I7 1 - k)II


= Z (5.2)
1-k

where


Z7 - - input impedance of DUT I 7


k= current gain of the controlled current source (inverter)





80 YVS


6~


ClI sCi


____________________________________________________________ I


S s s~_ I


It zf


'cl


tKICi 1c


________________ & J


Fig. 5.1 The transformed equivalent subsystems of the regenerative load system.


ZI


(a)


Vs


KI,


N


(b)








sL5= vs


(c)


ZSTH








B


ZCIe
VSTH =Vs + C Zs =Z11Zc1,q ZS ZC Z, = ; ZI=s-LI+r,


(d)


Fig. 5.1 Continued.


81


A I fq= (I - K)lf o-I-





B


Icl,eq K)Ici





TZccq =11 1K





82


Similarly, the parallel combination of the 1/(sC1) and klcl can be transformed into an equivalent impedance, ZcIeq, as




Zci~eq (5.3)


This transformed equivalent system can be further divided at the terminal A, B as shown in Fig. 5.1(c). The left part will be represented by a Thevenin's equivalent circuit with the Vseq and Zs,eq given as




Vseq = VS ZcI,eq (5.4)
S + ZcI,eq


Zseq = Zs|lZcieq = ZsZcl,eq (5.5)
ZS + Ze(,e)

When the DUT is connected to the Thevenin's equivalent source circuit, the regenerative load system will be reduced to two cascaded subsystems as shown in Fig. 5.1(d). These two subsystems are the (1) equivalent source subsystem and (2) equivalent DUT load subsystem.

In the next section, a methodology for developing the input impedance specification of an unknown DUT subsystem for stable system operation is introduced. The method assumes that the output impedance of the utility source subsystem is known. If the DUT meets the input impedance specification, the stability of the regenerative load system will be ensured, despite allowing impedance overlap at the interface of the subsystems [57,66].





83


5.3 System Interaction Analysis

5.3.1 Impedance Ratio as a Loop-Gain

Consider the integration of the two subsystems as shown in Fig. 5.2. Assuming that each subsystem is individually stable, the overall transfer function of the integrated system can be expressed as the product of the individual subsystem transfer functions ( FA and FB ) and a loading factor [57-68].




FA- V2B _ FAFB FAB-
VIA l+ Z0
Zin

= FA FB (5.6)
I+ Tm

where


Tm = = = Equivalent loop-gain of the integrated system
Zin

FA = Forward transfer function of load subsystem without load impedance, i.e., ZL 00 FB = Forward transfer function of load subsystem without source impedance, i.e.,Zs= 0 Zo= Output impedance of the source subsystem Zin= Input impedance of the load subsystem = - Z" = Loading factor
l+ Tm Zo + Zin





84


Subsystem A


0+ + V2A~~ ~~~' +
VIA F=- V2A VI
VIAAZI


zo Zi


Subsystem B


Fig. 5.2 Two cascaded subsystems.


V2B F= -
VIB


VB
29





85


Both Zo and FA are input-to-output transfer functions of the source subsystem and have common denominators (characteristic equation of the source subsystem). Also, Yin ( I/Zin ) and FB are input-to-output transfer functions of the load subsystem and have common denominators (characteristic equation of the load subsystem). The above statement is true when both the subsystems are observable at the interface [71].

Since the denominator of FA FB is canceled by the numerator of the loading factor in Eq. (5.6) (also the denominator of Tm), the characteristic equation of the integrated system will be



l+Tm =0 (5.7)



As discussed in references 58 and 66, the impedance ratio at the interface, defined as Tm=Zo/Zin, can be viewed as the equivalent loop-gain of the system. This equivalent loop-gain can be used to determine the stability and performance of the system.

The stability of the integrated system can be determined by calculating the zeros of Eq. (5.7), i.e., root-locus plot, or by applying the Nyquist criteria to this loopgain Tm. The root-locus method is adopted in Chapter 4 and in this chapter, the Nyquist criteria is used. The root-locus method requires analytical models; however, the Nyquist plot can easily be determined from either analytical models or measurement data. Also, it should be noted that the choice of source and load subsystems is not dependent on the direction of power flow. However, the source subsystem must be chosen such that its output impedance at the interface bus is an input-to-output transfer function of the source subsystem. Similarly, the load





86


subsystem must be chosen such that its input admittance at the interface bus is an input-to-output transfer function of the load subsystem.

If 1Zin1>> ZI for all frequencies, the loading effect is negligible and the system stability will depend only upon the stability of the individual subsystems. When |ZO| is larger than lZin, a considerable loading effect exists. However, a loading effect does not necessarily imply a stability problem. In this case, the Nyquist criteria can be applied to the loop-gain, Tm, to determine the system stability.



5.3.2 Effect of Impedance Overlap on System Stability and Performance

For the case where IZOI exceeds lZin for some frequencies, further analysis is needed to determine the system stability as discussed in references 57 and 66. An example of two impedance overlapping is shown in Fig. 5.3. In the frequency range where I Zin I






87


Magnitude
-10

zirl
-20----. ----.----- .---- ...- .--- .-.- ..---..

',B
-30 - - - - - -
:z--- - - - -


102


Hz
Phase


zn: A. 'B



-- - -- - - - - - -


103


100


0


10'


ITmI 20



B

B



-20
20 10' 10
Hz phase of Tm 200
PM:



0 -- - - - - - - - -- - -

. - - - - -: B- - - - -


13


10'


10,


10 3


10


Fig. 5.3 Impedance overlap at the interface. (a) impedance comparison; (b) phase plot of impedance; (c) Bode magnitude plot of Tm = Z0 /Z in ; (d) Bode phase plot of Tm;

(e) polar plot of Tm = Z. /Zin (on the next page).


(a)


dB


(b)


(c)


(d)


105


10,


d


'


102





88


904.5


120 150



PM1


1


Tm


60

3
30
1.5


Q i I- - A i


PM 210


240M


0


330 300


270




(e)


Fig. 5.3 Continued. (e) polar plot of Tm = Z, /Zj, .





89


Since the ITm crosses the 0 dB line twice, two different phase margins can be defined assuming the subsystems are individually stable, one at the initial point of the overlap [point A in Fig. 5.3 (a), (b), and (c)] and the other at the final point of the overlap [point B in Fig. 5.3(a), (b), (c)]. For this example, the phase margin at the initial point of overlap, PM, , is given by



PMI = 180 - ZTm (5.8)



and the phase margin at the final point of overlap, PM2 , is given by




PM2 = 1800 + ZTm (5.9)



Figure 5.3(d) shows the polar plot of Tm together with two phase margins.

In addition to the stability of the loop-gain, Tm, the phase margins of Tm are also of particular importance in the cascading of two subsystems. A small phase margin drastically increases the magnitude of the loading factor 1/(1+Tm), resulting in severe peaking in the closed-loop transfer function of the integrated system. As a conservative design practice, a phase margin of 600 can be applied for most practical applications.





90


5.4 Stability Analysis of the Regenerative Load System as Two Cascaded Subsystems

5.4.1. Stability of Subsystems

Section 5.3 mentioned that if the two subsystems are individually stable, the impedance ratio at the interface as in Eq. (5.6) can be considered as the loop-gain of the integrated system, and the Nyquist criterion can be applied to the loop-gain, Tm, as defined in Eq. (5.6) to determine the system stability. Therefore, the source subsystem needs to be stabilized by adding a damping circuit Rp,Cp as shown in Fig. 5.4. In addition, this compensated regenerative load system can be transformed into two equivalent subsystems, as shown in Fig. 5.4(c), (d), and (e) where




VTH = vs 1 (5.10)
ZS+ (Z Zciceq)


ZTH = ZsjZP1Zc1ieq (5.11)

and where


Zcl,eq



sCP

ZS = sLS

The stability of the compensated source subsystem, where Rp=100 and Cp=10 F, is investigated by the root-locus plot of the source subsystem, using the





91


sLs Ts i














jic I'1]



damping circuit

(a) Equivalant circuit sLS
+
















17
O VS Ll

















Subsystem A Subsystem B

(b) Two Subsystems Fig. 5.4 The transformed equivalent subsystems of the compensated regenerative load system.





92









Ls
T (I1-K)
j1K):
+ Rp I,



AT TT
T z
sC 1 -K Z 1-K ZpII(Zcr Zj 1K

(c) two subsystems with (d) two cascaded subsystems
equivalent impedance:

- and Z, -K













(e) represented as Thevenin's equivalent circuit.


Fig. 5.4 Continued.





93


current gain K(s) as the varying parameter, where the current gain is given as in Eq. (4.6)





L2
K(s)= ko L2 S+kik12
s+
L2 (5.12)

= ko S
1+
(p

and where k = dc current gain of the controlled current source (inverter) ki = 0.1 [V/A] k12= k1k2


Vdc
vtrn

k2=50

L2 =2.5mH= inductance of the current controller OP - k2
L2.



The root-locus in Fig. 5.5 shows that if the dc current gain, i.e., ko in Eq. 5.12 is greater than one, then the root-locus will enter into the RHP (indicated as point o), and the source subsystem will become unstable. Hence, the dc current gain, ko, of the inverter must remain smaller than one, i.e., ko< 1, for stability. Figure 5.6 shows




Full Text

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ANALYSIS AND DESIGN OF REGENERATIVE LOAD SYSTEM FOR POWER DEVICE TEST BY CHINYUAN HSU A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY UNIVERSITY OF FLORIDA 1996 UNIVERSITY OF FLORIDA LIBRARIES

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ACKNOWLEDGMENTS I would like to express my deepest gratitude to Dr.Khai D.T. Ngo, the chairman of my supervisory committee, for his guidance and encouragement. I would also like to thank other professors, Sheng S. Li, Dennis P. Carroll, Alexander Dominjan and B. Capehart, for serving on my supervisory committee. Lastly, I want to thank Dr. J. Kenneth Watson for his initial support, encouragement and assistance. In deepest gratitude, I wish to express my greatest love and thanks to my parents, my sister and my younger brother for their assistance and encouragement.

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TABLE OF CONTENTS page ACKNOWLEDGMENTS ii ABSTRACT v CHAPTERS 1 INTRODUCTION 1 1 . 1 Impedance Emulator 1 1 .2 Inverter with Active Power Filtering Function 3 1 .3 Regenerative Load System 4 2 ACTIVE POWER FILTER 8 2.1 Introduction 8 2.2 Principles of Operation 10 2.3 Simulation Results 1 8 2.4 Experimental Results 24 2.5 Discussions 24 2.6 Summary 29 3 REGENERATIVE LOAD SYSTEM 30 3.1 Introduction 30 3.2 Principles of Operation 33 3.3 Simulation Results 45 3.4 Discussions 47 3.5 Summary 51 4 STABILITY ANALYSIS OF REGENERATIVE LOAD SYSTEM WITH UTILITY SOURCE IMPEDANCE 53 4.1 Introduction 53 4.2 Stability Analysis of the Regenerative Load System 54 4.3 Simulation Results 62 4.4 Discussions 68 4.5 Summary 75 iii

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5 INPUT IMPEDANCE SPECIFICATION OF DEVICE UNDER TEST FOR STABLE REGENERATIVE LOAD SYSTEM 77 5.1 Introduction ..77 5.2 Defining the Regenerative Load System as Two Cascaded Subsystem... 79 5.3 Subsystem Interaction Analysis 83 5.4 Stability Analysis of Regenerative Load System as Two Cascaded Subsystems 90 5.5 Stability Improvement of Regenerative Load System 115 5.6 Input Impedance Specification of Device Under Test 120 5.7 Discussions 137 5.8 Simulation Results 147 5.9 Experimental Results 5.10 Summary 144 6 ACTIVE DAMPING AND COMPENSATION OF THE REACTIVE CURRENT 149 6.1 Introduction 149 6.2 Active Damping 150 6.3 Compensation of the Reactive Current 155 6.4 Bandwidth of the Current Controller 159 6.5 Combination of the Active Damping and Compensation of the Reactive Current 161 6.6 Simulation Results 165 6.7 Summary 167 7 CONCLUSIONS AND FUTURE WORKS 170 REFERENCES 173 BIOGRAPHICAL SKETCH , 180

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Abstract of Dissertation Presented to the Graduate School of the University of Florida in Partial Fulfillment of the Requirement for the Degree of Doctor of Philosophy ANALYSIS AND DESIGN OF REGENERATIVE LOAD SYSTEM FOR POWER DEVICE TEST By ChinYuan Hsu August 1996 Chairman : Khai D. T. Ngo Major Department : Electrical and Computer Engineering A "regenerative load system" is proposed, replacing the conventional load for the long-term testing of power equipment and motor-generator set. Basically, this system consists of two parts: (1) impedance emulator and (2) inverter with power filtering function. The proposed system has three significant merits: economic, safety and power quality. The first merit involves the recycling of the electrical energy, resulting in the energy consumption less than 20% of the conventional load. If the soft-switching technique is employed for the converter, the total energy dissipation can be even lower than 10%. Second, safety is a consideration. Due to the low energy dissipation, no appreciable Joule heating is observed. The third, power quality, is equally important. Since the current from the ac line is shaped into a pure sinusoidal waveform with

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power factor equal to one, problems such as harmonic currents and EMI will be greatly reduced. Hence the power quality of the utility source can be improved. In order to accomplish the analysis and design of the system, the following contributions have been made. For the active power filter design, a new control method, using an integrator and sampling technique, is proposed to simplify the calculation algorithm for the real fundamental component of load current. In addition, a new simple control scheme, based on the energy balance concept, is proposed to control the voltage of an energy-storage capacitor. The advantages of this active power filter (APF) circuit are simplicity of control circuits, low cost (a smaller energystorage capacitor) and good transient response (less than two cycles of 60 Hz). The feasibility of this theory is verified by using PSpice simulation and experimental results. Secondly, in the design of the system, a memory circuit is used to calculate and memorize the utility source current. This design provides an alternative method to the design of APF control circuits. Third, we have found that the utility source inductance may cause the APF system to become unstable. After the addition of the damping circuit, the system can be stable. However, even with the addition of the damping circuit, the APF or regenerative load system, will still be unstable if the gain of the current controller is greater than one. Therefore, for the stability of the system with utility source inductance, the following conditions must be met: (1) addition of a damping circuit and (2) the current controller gain must be kept smaller than one. This vi

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phenomenon has been verified by Matlab control analysis and PSpice simulation and has never been noted in the literature. Fourth, employment of the equivalent impedance concept separates the regenerative load system into two equivalent subsystems and establishes the "input impedance specification" of the DUT (Device Under Test) for the stability of the "regenerative load system." Fifth, for the improvement of stability margin of the system, a new "two-damping-circuits" concept is proposed. The addition of a second high frequency damping circuit can further improve the stability margin of system. This "two-damping-circuits" concept can be applied also to other circuit design. Sixth, and lastly, when using the active damping circuit to replace the conventional passive damping circuit, the overall system efficiency is improved. Also, a new "reactive-current-compensation" concept is developed to compensate the reactive component absorbed by the damping circuits. Hence the power factor of the utility source current can be increased to nearly one, even in the presence of the damping circuits. vii

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CHAPTER 1 INTRODUCTION If we test power device or equipment where a conventional load is used, a large amount of energy will be dissipated and Joule heat produced. This dissertation develops a "regenerative load system" for long term testing of "power equipment" and "motorgenerator set" to achieve energy conservation. At the same time this system can improve the power quality of the utility source. Basically it consists of two parts: (1) an impedance emulator and (2) an inverter with power filtering function, as shown in Fig. 1.1. Two topics in power electronics are closely related to this study: "power factor correction" [1-23] and "active power filter" [24-56]. The following discusses some of the characteristics and applications. 1 . 1 Impedance Emulator ( related to power factor correction ) For applications in which line pollution in terms of harmonic content and displacement power factor of the input current is of main concern, ac/dc converters featuring almost unity power factor are required. These high quality rectifiers, also called "power factor pre-regulators" (PFPs) replace the conventional capacitive-filter rectifiers, which have the disadvantages of absorbing high peak currents from the utility line. The goal of a high quality rectifier is to emulate a resistive load, achieving 1

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in Device Under Test Regenerative Load (a) utility in "Device" under test Inverter with Active Power Filtering 3F T Impedance Emulator Energy Storage Capacitor (Regenerative Load) (b) Fig. 1 1 The regenerative load system and the internal structural block diagram. (a) The regenerative load system and (b) The internal structural block diagram of the regenerative load system.

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theoretically the unity power factor, even in the presence of distorted line voltage. In order to do that, PFPs (power factor pre-regulators) must be able to shape the input current in such a way that it represents a scaled replica of the line voltage. Among the active methods for input current shaping based on switching dc/dc converters, those employing boost topology are mostly applied [1-3]. Moreover, this resistor emulator concept has also been extended to the "variable active-passive reactance" (VAPAR), which was originally proposed in references [24] to [26], and is one of the new applications of the bilateral converter. The VAPAR works as a variable passive reactive element (or a kind of virtual reactance) including the transient state. Realization conditions and experimental results were introduced by Funato and Kawamura [24]. In these analyses and experiments, however, a dc voltage source was used as an energy storage element. If a dc voltage source is replaced with a capacitor, the VAPAR can be considered as a complete two-terminal element. In Chapter 3, the VAPAR concept is employed to implement the "impedance emulator." 1.2 Inverter with Active Power Filtering Function (related to active power filter) Power electronics are widely used in industrial equipment, such as frequency changer, motor-drive system, etc. Such equipment presents a nonlinear impedance to the utility, generating large harmonic currents with adverse effects, such as low power factor, low efficiency, and destruction of other equipment (e.g. the power capacitor can be damaged by the resonant overvoltage, etc.). Also, EMI interferes with instruments and communication equipment. Therefore, the active power filter was used to reduce the above pollution problems and to compensate the reactive power of the load

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4 simultaneously. Since the active power filter must provide the harmonic and reactive power, it is basically a bilateral converter. Chapter 2 proposes the active power filter with "reduced energy-storage capacitor." Subsequently, in Chapter 3, this APF is re-modified as an "inverter with power filtering function" to become a part of the "regenerative load system." 1 .3 Regenerative Load System In Chapter 3, the above two parts are combined together to form a regenerative load system, used for long term testing of the power equipment and motor-generator set. The proposed system, shown in Fig. 1.1(a), consists of two parts: (1) an impedance emulator and (2) an inverter with power filtering function. The internal structural block diagram is shown in Fig. 1.1(b). In the first, the impedance emulator V, draws currents from the DUT, according to the equation I L = — — . This current related power can be used to charge the "energy-storage capacitor." Therefore, the input of this converter can be viewed as an equivalent load impedance of value "Z L ". The energy stored in the capacitor is inverted into ac current and is fed back into the input of the DUT by the second part of the system, i.e., "inverter with active power filtering function." In addition, this inverter can also provide the compensation current to shape the ac line current i s into a pure sinusoidal waveform with power factor P.F.=1.0. The proposed system has many merits. First, this system is economical because of the recycling of the electrical energy. The energy consumption will be less than 20% of the conventional load. If the "soft-switching" scheme is employed for the converters.

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the energy dissipation can be even lower than 10%. Secondly, safety is a consideration. Due to the low energy dissipation, no appreciable Joule heating is observed. Lastly, since the current from the ac line is shaped into a pure sinusoidal waveform with power factor P.F.=1.0, problems such as harmonic currents and EMI will be greatly reduced. Hence, the power quality of the utility source can be improved. In the whole analysis and design process, we obtained the following new contributions. For the active power filter design in Chapter 2, a new control method using an integrated and sampling technique is proposed to simplify the calculation algorithm for the real fundamental component of load current. In addition, a new simple control scheme based on the "energy balance concept" is proposed to simplify the design of the conventional APF-capacitor-voltage-control circuit. This APF has many merits. First, it simplifies the calculation of the current i s (t) required by the utility source. Next, a larger voltage ripple can be tolerated in the energy storage capacitor; therefore, a smaller energy storage capacitor is needed. Finally, only a proportional capacitorvoltage-control method is applied in the controller design, and the transient response is fast and good (less than two cycles of 60 Hz). In Chapter 3, a new utility source current memory circuit based on the energybalance concept is proposed to simplify the design of the energy-storage capacitor voltage control circuit. This design further simplifies the control circuit of the "regenerative load system." For simplicity, we assume in Chapter 3 that the utility source inductance, Ls, equals zero. The effect of the utility source inductance Ls on the system stability will be reconsidered in Chapter 4 and is a contribution of this research.

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In the stability analysis of the regenerative load system, the research in Chapter 4 indicated that with the existence of utility source impedance L s the system will become unstable. After the addition of damping circuit, the system can be stabilized; however, the current gain of the current controller of the APF or inverter with active power filtering function must be kept below one, i.e., k<1.0, for the stability of the system. If the current gain, k, is greater than one, then the APF or inverter with active power filtering function will become a positive feedback system with loop-gain greater than one and is an unstable system. This phenomenon has not been noted in the literature. Additionally, in Chapter 5, we derived the "input impedance specification" of the DUT for the stability of the regenerative load system. There are many related research works in the literature [57-68]. However, we proposed an "equivalent circuit concept" to transform the system into two subsystems, an utility source subsystem and a DUT load subsystem. Then, the "two subsystem interaction theory" by Schulz [57] and Wildrick et al. [66] is applied to analyze the stability of the integrated system. Based on PSpice simulation, we use a simple current-controller model which is valid up to 1.1 kHz for 20 kHz switching frequency. If the switching frequency is not high, more detailed model needs to be considered [70]. This will remain as an interesting future research work. Finally, the input impedance specification of the DUT is established for the stability of the regenerative load system, assuming the output impedance of the utility source subsystem is known. We also established the "two damping circuits concept." In the analysis of Chapter 5, we found that if only one damping circuit (low-to-medium frequency) is used, the stability margin of the system is not large enough. The addition of a second high

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7 frequency damping circuit can further improve the stability margin of the system. This two damping circuit scheme can be applied to other circuit designs. Lastly, we used the active damping circuit to replace the passive damping circuit since the passive damping circuit will dissipate energy in its resistor and decrease the total efficiency of the system. Also these damping circuits can absorb the capacitivereactive current and cause the power factor of the utility source to be less than one, i.e., p.f. < 1.0. Therefore, in Chapter 6, the active damping circuit is introduced to replace the conventional passive damping circuit. The energy consumption in the active damping resistor is restored into the energy-storage capacitor. Hence the efficiency of the system can be increased. Also, in Chapter 6, a "reactive current compensation concept" is developed to compensate the reactive current component absorbed by the damping circuits. Thus the power factor of the utility source current can be increased to nearly one, i.e., p.f.« 1.0. In addition, it is noted that due to the bandwidth limitation of the current controller, only the low-to-medium frequency damping circuit can be replaced by the active damping circuit, and the high frequency damping circuit still needs to be passive.

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CHAPTER 2 ACTIVE POWER FILTER WITH REDUCED ENERGY-STORAGE CAPACITANCE 2.1 Introduction Power electronics are widely used in industrial equipment, such as frequency changers, motor-drive systems, etc. Such equipment presents a nonlinear impedance to the utility, generating large harmonic currents with adverse effects, such as low power factor, low efficiency, and destruction of other equipment (e.g. the power capacitor can be damaged by the resonant overvoltage, etc.). Also, the EMI will interfere with some precision instruments and communication equipment. Therefore, the active power filter was used to reduce the above pollution problems and to compensate the reactive power of the load simultaneously. As a result, utility power quality has become an important issue. Many research papers and methods have been proposed to solve these problems. Conventionally, a passive LC filter was used to suppress the harmonics and capacitors were used to compensate the lagging power factor. However, they have many disadvantages, such as large size, resonance and fixed compensation characteristics [27,28]. The conventional passive power filter cannot, therefore, provide a complete solution. 8

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Many specialists approach the solution from the viewpoint of preventing the generation of harmonics, such as high-powerfactor switching power supply, frequency changers and uninterruptible power supplies [29-34]. However, existing harmonic pollution sources still need to be improved. Some active power filter (APF) methods have been proposed to compensate the present harmonic loads, to provide the reactive power, and to compensate the harmonic current, in order to achieve the goal of high quality utility sources [25-41]. Since the active power filter must provide the harmonic and reactive power, it is basically a bilateral converter. This chapter proposes a new APF technique, employing a reference voltage in phase with the utility supply, to multiply with the load current and to calculate the real fundamental component of the load current. The difference between the instantaneous load current and this fundamental component is the command current for the APF. This command current includes reactive fundamental power and harmonics. This compensation current is provided by a bilateral converter using the unipolar pulsewidth-modulation (PWM) technique [30,42]. As the reactive power comes from the energy-storage capacitor and this reactive energy transfers between the load and the energy-storage capacitor (charging and discharging the capacitor), the average capacitor voltage can be maintained at a constant value. Owing to the losses in the converter such as switching loss, capacitor leakage current, etc., the utility must provide, not only the real power needed by the load, but also the additional power required by the converter to maintain the capacitor

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10 voltage at a prescribed value. In this chapter, we propose a new dc bus voltage controller, using the energy balance concept. As no delay element (such as LPF or PI control) is used in this control circuit, the transient response is fast and good (less than two cycles of 60 Hz). The advantages of this APF circuit are simplicity of control circuit, low cost (a smaller energy-storage capacitor), and good transient response (less than two cycles of 60 Hz). In theory, the time delay for the compensation of reactive and harmonic currents is zero. The feasibility of this theory is verified by using a PSpice simulation and experimental results. 2.2 Principles of Operation 2.2.1. System Description The fundamental building block of the APF system is shown in Fig. 2.1. Under normal circumstances, the utility can be assumed to be a sinusoidal voltage source. v s(t) = V sm sincot (2.1) If a nonlinear load is applied, the load current consists of the fundamental component and all the higher-order harmonics and can be represented as i L (t) = £l n sin(ncot + O n ) (2.2)

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Ufl i,(t) AC utility V m sin(oi)t) mi Fig. 2.1 Simplified schematic of the active-power-lineconditioner or the active power filter.

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12 Therefore , the load power can be expressed as P L (t) = v s (t)i L (t) = IiV sm sin cotcosG] +I|V wl siil cotcosG! oo +2 V sm sincotI n sin(ncot + 9 n ) n=2 = Ps(t) + Pc(t) (2.3) In Eq. (2.3), the first term is the real power supplied by the utility source, the second term is the reactive power, and the third term is the harmonic power, i.e., Ps( t ) = IiV sm sin 2 cotcos0, p c (t) = 1 1 V sm sincot cos cot sin 0! oo + ]TV sm sin(cot)I n sin(ncot + e n ) (2 .4) n=2 As the APF provides the reactive and harmonic power p c (t) , the current supplied by utility will be h(t) = = I, cosG, sincot v s (t) = I S sincot where I, = I, cosB, (2.5)

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The current is in phase with the utility voltage and is pure sinusoidal. At this time, the APF must provide the following compensation current i c (t) = i L (t)-i s (t) (2.6) Thus the APF needs to calculate the current i s (t) accurately and instantaneously as described below. 2.2.2 Calculation of the Fundamental Component u (t) Now, if a sinusoidal waveform with amplitude 2 and in phase with the voltage source v s (t) is multiplied by i L (t), 00 p' L (t) = 2 sin cot J] I n sin(ncot + 9 n ) .... (2.7) n=l Integrating Eq. (2.7) over a period T, the averaging power can be obtained as P av =:j:(pL(t)dt (21 1 sin 2 cotcos9,)dcot CO J +^ — |(2sincotI n sin(ncot + G n )dcot n=2 frt ~coT 1 |T IiCosGj (2.8)

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14 After integration over a whole period, the second and third terms on the right-hand side of Eq. (2.8) will be equal to zero. Therefore, P av = I, cosGj is the peak value of the current supplied by the voltage source , as seen in Eq. (2.5). The block diagram of the fast utility source current calculation circuit is shown in Fig. 2.2. The voltage source is buffered down and fed through a zero-cross detector (ZCD) to provide a synchronous square wave as the input of the phase-locked-loop (PLL) circuit. The PLL circuit will produce a reference signal 2sincot in phase with the utility voltage source. This signal is multiplied by the load current i L (t) , integrated over a period T, and fed through a sample-and-hold (S/H) circuit to obtain a quantity proportional to Ij cos^ . The control logic resets the integrator at the beginning of every period T and samples the integration results at the end of the integration. In this way, the real power can be calculated. By appropriate adjustment of the gain K, the peak value of the utility source current can be obtained. 2.2.3. Control of the dc-bus Capacitor Voltage The compensation current i c (t) is provided by a bilateral converter with unipolar PWM modulation as shown in Fig. 2.3. The dc source comes from the energy storage capacitor, as it provides only the reactive power to the load. However,

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15 V s (0 Differential amplifier Zero cross detector phase-locked loop 4,(0 Control logic PLL _TL 0_n_ reset Integrator sampling S/H Voc(t) S/H 'ref Fig. 2.2 Block diagram of the fast calculation circuit for the utility source current. PWM CONV. 1 — » — > — Ls K; i^cale ic(0 — Fig. 2.3 The bilateral converter using the unipolar PWM modulation to provide the compensation current i c (t).

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16 owing to the switching loss of the converter, the utility must supply, not only the real power of the load current, but also a small overhead for the capacitor leakage and converter switching losses. In this way, the dc-bus voltage can be maintained on a fixed level. The control strategy, using the energy-balance principle, is described in the following. If the reference voltage across the capacitor is V cr , the reference energy storage will be E cr = ^C c V c 2 r (2.9) while the instantaneous energy in the capacitor is E c (t) = ^C c v c 2 (t) (2.10) Therefore, the energy loss of the capacitor in one period will be AE c (t) = E cr -E c (t) = ^{V c 2 r -v c 2 (t)} = ^{V cr+ v c (t)}{V cr -v v (t)} (2.11) Assuming that, within one period, the variation in capacitor voltage is moderate, the term {V cr + v c (t)} can be approximated as

PAGE 24

17 V cr +v c (t)*2V cr (2.12) AE c (t)*C c V cr {V cr -v c (t)} = K,{V cr -v c (t)} (2.13) Since this energy loss must be supplied by the utility voltage source, the peak value of the charging current I sc can be estimated as f V c sm Therefore I SC =-|-AE C =K 2 AE C 1 V c sm where K 2 = TV 1 v sm Hence, the peak value of the charging current I sc can be obtained as I sc =K 2 AE c = K 2 K,{V cr -v c (t)} = K !2 {V cr -v c (t)} where (2.14) Ki2=K,K 2 =^S(2.15)

PAGE 25

18 As a result, the total peak current provided by the voltage source is Ism=Is+I sc i s ( t ) = I sm sincot (2.16) C(t) = i L (t)-i s (t) (2.17) By multiplying I sm with sincot, we can obtain the utility source current i s (t). The difference between the load current i L (t) and i s (t) will be the command current Either bipolar or unipolar voltage switching of the converter can be used. The latter is selected to reduce converter loss. Thus, the current tracking circuit is a bilateral converter with unipolar PWM technique [30,42] as shown in Fig. 2.3. The switching frequency is 25kHz. Figure 2.4 shows the simulation results using PSpice software, where Li=2.5mH, Ci=10|iF, Cc=660u.F, and f s = 25kHz. When the voltage source is applied, the estimation integration circuit for the current i s (t) has not yet provided the calculated value. Hence, the output is zero, and all the load current is supplied by the converter. The capacitor voltage will drop owing to the release of stored energy. In the second cycle, however, the utility will supplement the energy in the capacitor to i* (t) for the APF converter. 2.3 Simulation Results

PAGE 26

19 (a) (b) (c) (c) 200V, -200V 200 -20A + 200 o v(7,3) -200 + 200. a l(vns) -20B + a I (vac) 300V200V 0s 20*3 40ns 60as a v(71,FGnd) SOas toots 120m I40ai 160«s 180m TIM Fig. 2.4 Simulated current and voltage waveforms for steady-state and transient response. (a) Utility source voltage (b) Load current (c) Utility source current (d) Compensation current (e) Capacitor (Cdc) voltage Load current changes from a peak value of 10A to 20A after the fifth cycle.

PAGE 27

20 raise its voltage to the prescribed value. Even so, the utility current still maintains a pure sinusoidal waveform. Except for the one-period delay by the integrator (this is the minimum time required to calculate the real power), the whole control circuit has no other time delay. Therefore, the transient response will be fast and good. In the simulation circuit, there is a step change of load current, from a peak value of 10A to 20A, after the fifth cycle. However, the utility source current responds immediately at the next cycle and stabilizes at the new value. This behavior demonstrates the fast and good transient response. Figure 2.5 shows the frequency components of load current i L utility source current i s , and converter compensation current i c obtained by PSpice simulation. In Fig. 2.6, the transient response of a step change of load current from peak value of 20 A to 10A at the fifth cycle is presented. From this simulation, a capacitorvoltage rise during the transition cycle can be observed. If limitation of the capacitor voltage is required, the utility current must change just after the voltage boundary is encountered. To achieve this an additional circuit can be added to detect the crossing of the voltage limit and to estimate the extra fundamental utility current needed to return the capacitor voltage to the preset value before the beginning of the next cycle. Figure 2.7 shows the results of PSpice simulation, where the voltage limit is set as v max = 235V and V min = 175V . In addition, the load current changes from peak value of 10A to 20A at the fifth cycle and from peak value of 20A to 10A at the tenth cycle.

PAGE 28

21 (a) (b) (c) 100 -r OA 00 a i(v»i ft a |(VB9) oo OH 1 OKH a I (vac) 2 . OKH 3 OKH Frequency 4 OKH 5 OKH 6. OKH Fig. 2.5 Frequency components of load current i L , utility source current i s and converter compensation current i c (a) Load current i L = i(vm) (b) Utility source current i s =i(vms) (c) converter compensation current i c =i(vmc)

PAGE 29

22 Fig. 2.6 Simulated current and voltage waveforms for steady-state and transient response. (a) Utility source current (b) Load current (c) Utility source current (d) Conpensation current (e) Capacitor (Cdc) voltage Load current changes from a peak value of 20A to 10A after the fifth cycle.

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23 200V (a) (b) (c) (d) (e) -200V + o v(7,3) 20A-20P + a i(vas) 200-150V h r-0s 50as o v(71,FGnd) 100ns 150»s 200.3 250-s Til Fig. 2.7 Simulated current and voltage waveforms for steady-state and transient response. (a) Utility source voltage (b) Load current (c) Utility source current (d) Compensation current (e) Capacitor (Cdc) voltage Maximum and minimum voltages across the capacitor are preset at Vmax = 235V and Vmin= 175 V

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24 2.4 Experimental Results Figure 2.8(a) shows the experiment results where the RMS value of voltage source is 28v (voltage waveform pre-scaled down by 1/3), the load on the dc side is a 4700uF capacitor in parallel with 36Q resistor, and i dc = 0.85A , whereas Fig. 2.8(b) is the result when a 40uF capacitor is placed in front and parallel with the rectifier. The dc-bus voltage of the converter is 50v and Cc is 330uF. Figure 2.9(a) and (b) are the experiment results for transient response. The load current began with a value of 1 p.u. RMS, rose up to 2 p.u. and fell back again to 1 p.u. In Fig. 2.9(a), the energy-storage capacitor is assumed as 1.42 p.u., whereas in Fig. 2.9(b), the capacitor value is 0.46 p.u., and the voltage across capacitor "Cc" is set at 1.76 p.u. From Fig. 2.9(b), it can be seen that even with a large ripple voltage on the energy-storage capacitor, the compensation results are still good. 2.5 Discussion The determination of the value of the energy-storage capacitor is based on the following three conditions: (1) Step increase of the real fundamental component of the load current When the load current has a step increase, the energy stored in the capacitor must be released immediately to support the step increase in the power consumed by the load, i.e., by using energy-balance concept

PAGE 32

25 Fig. 2.8 Experimental results for steady-state where C c = 330uF: (a) Load on dc side is a 4700uF capacitor in parallel with a 36 Q resistor; (b) 40 uP capacitor in front and parallel with the rectifier (1) Utility voltage (voltage waveform pre-scaled down by 1/3) (2) Load current (3) Utility source current (4) Compensation current

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26 (b) Fig. 2.9 Experimental transient-response results: (a) C dc =1.42 p.u.; (b) C dc =0.46 p.u. C cbasc =1 Pu -=(IbaseT)/V basc V base = V s.RMS 'base = h.RMS T=60Hz (1) Utility voltage (voltage waveform pre-scaled down by 1/3) (2) Load current (3) Utility source current (4) Voltage across energy-storage capacitor C c

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27 ^C c {V c 2 r -V c 2 min }=^V sm Al L1 T ' (2.18) where V c min = preset lower limit of the voltage of the energy-storage capacitor, AI L , = step increase of the peak value of the real fundamental component of the load current and T = period of the utility voltage source. Therefore, the value of the capacitor is ^ai^j_ (219) v V T cr T c,min (2) Step reduction of the real fundamental component of the load current While the load current is reduced, the utility source current does not change until the next cycle. Hence, this extra utility source current AI L2 will charge the energy-storage capacitor, i.e., by using the energy-balance concept ^C c {V c 2 max -V c 2 r } = iv sm AI L2 T (2.20) where V c max = preset upper limit of the voltage of the energy storage capacitor and AI L2 = step reduction of the peak value of the real fundamental component of load current. Therefore, the value of the capacitor required is

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28 (3) Reactive and harmonic components of the load current During the steady state, the reactive and harmonic components of the load current will charge and discharge the energy-storage capacitor during the period. Therefore, using the energy balance concept 2 c (V c 2 A-V c 2 r )=^V sm AI L3 ^(2.22) 1-. T where AI L3 = the peak value of the RMS of the reactive and harmonic component of load current and V cA = maximum or minimum voltage of the energy-storage capacitor during one period. Therefore, using the energy balance concept V sm AI L 3T C c3 = (v c 2 A -v c 2 r ) (2.23) where the half period T/2 is selected as the maximum charging or discharging times of the reactive and harmonic components will be less than T/2. If the sinusoidal current waveform during the transient is to be preserved, the largest of C cl , C c2 , and C c3 is selected as the value of the energy-storage capacitor. If the sinusoidal current waveform is not needed during the transient, the value of C c3 is chosen as the value of the energy-storage capacitor. In Fig. 2.7, the latter case is applied in order to reduce the value of the maximum voltage across the energy-storage capacitor.

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29 2.6 Summary Owing to the nonlinear load of much electronic equipment, the utility power system is polluted by harmonics and the power factor is reduced. In this chapter, a new APF technique is proposed, using integration of the power and a sampling technique to simplify the calculation of the real fundamental component of load current. In addition, the energy-balance concept in the energy-storage capacitor is used to simplify the design of the conventional APF-capacitor-voltage-control circuit. This APF has three merits. To begin with, the calculation circuit for the utility source current i s (t) is simplified. Second, a larger ripple voltage can be tolerated in the energy storage capacitor; therefore, a smaller energy storage capacitor is needed. Third, only a proportional capacitor-voltage-control method is applied in the controller design. Hence, the transient response is fast and good (less than two cycles). The feasibility of the above scheme is verified by PSpice simulation and experimental results. The results demonstrate that harmonics are suppressed and a nearly unity power factor is obtained.

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CHAPTER 3 REGENERATIVE LOAD SYSTEM 3.1 Introduction For testing the power device, if a conventional load is used, a large amount of energy will be dissipated and Joule heat will be produced. Hence, the focus of this chapter is trying to develop a regenerative load for long term testing of power equipment and motor-generator set to achieve energy conservation and improve the power quality. The proposed system is shown in Fig. 3.1. Basically this system will consist of two parts: an impedance emulator and an inverter with active power filtering function. The internal structural block diagram is shown in Fig. 3.2. In the first place, the impedance emulator draws current from the DUT, according to the equation Il=Vl/Il. This current related power can be used to charge the energy storage capacitor; therefore, the input of this converter can be viewed as an equivalent load impedance of value Zl The energy stored in the capacitor is inverted into ac current and fed back into the input of the DUT by the second part of the system, i.e., the inverter with active power filtering function. In addition, this inverter can also provide the compensation 30

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31 in Device Under Test Regenerative Load Fig. 3.1 The regenerative load system.

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32 utility in in "Device" under test Inverter with Active Power Filtering T Impedance Emulator Energy Storage Capacitor (Regenerative Load) Fig. 3.2 The internal structural block diagram of the regenerative load system

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33 current to shape the ac line current i s into pure sinusoidal waveform with power factor P.F.=1.0. Hence, the proposed system has three merits. Because the system recycles the electrical energy, the energy consumption will be less than 20% of the conventional load. If the soft-switching scheme is employed for the converters, the dissipation can be even lower than 10%. Additionally, the system is safe. Due to the low energy dissipation, no appreciable Joule heating is observed. Lastly, since the current from the ac line is shaped into sinusoidal waveform with power factor P.F.=1.0, problems such as harmonic currents and EMI will be greatly reduced. Thus, the power quality of the utility source can be improved. In this chapter, a new dc capacitor voltage controller using a new utility source current memory circuit and the energy-balance concept is proposed. In order to concentrate on the description of the energy-balance concept and the utility source current memory circuit, we assume, temporarily, the utility source is an ideal voltage source, i.e., the source inductance, Ls, is zero. The effect of utility source inductance, Ls, on the system stability will be discussed in Chapter 4. 3.2 Principles of Operation The example schematic of the regenerative load system is shown in Fig. 3.3, and consists of the impedance emulator and the inverter with active power filtering function.

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34 Fig. 3.3 The schematic circuit diagram of the regenerative load system.

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3.2.1 Impedance Emulator For the impedance emulator, a simple dc-to-dc boost converter is employed as a dc current controller with the reference current such that I* ef = V o / Rl (3.1) where Vo is the output voltage of the device under test and Rl is the emulated value of the load. Therefore, the output current of the device under test, Io, will track the reference current, I ref . The energy into the impedance emulator is used to charge the capacitor Cdc. The control circuit of the impedance emulator is shown in Fig. 3.4. Switches S el and S e2 are used to select a reference current I ref . Once the reference current I ref is selected, the actual current into the boost converter will track the reference value I ref . The current tracking scheme used is conventional bang-bang hysteresis controller. The output signal is used to control the power stage switch Sie of the impedance emulator shown in Fig. 3.3. 3.2.2 Invertor with Active Power Filtering Function Calculation of the command current i g *(t) for the inverter As for the second part, the inverter with active power filtering function consists of a single-phase bridge converter acting as a single-phase current controller. The voltage across the capacitor Cdc acts as the voltage source of this inverter.

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Fig. 3.4 The control circuit of the impedance emulator.

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37 The command current ic*(t) for this inverter is calculated as shown in Fig. 3.5. The control strategy, using the energy-balance principle, is described below. If the reference voltage across the capacitor is Vcr, the reference energy storage will be Ecr = I Cc V c 2 r (3.2) while the instantaneous energy in the capacitor is 1 Ec(t) = ^Ccv c 2 (t) (3.3) 2 Therefore, the energy loss of the capacitor in one period will be AEc(t) = Ecr Ec(t) Cc _ c r-w2 ..2, = y{Vcr + Vc(t)}{Vcr-Vc(t)} (3.4) Assuming that, within one period, the variation in capacitor voltage is moderate, the term {Vcr + v e (t)} can be approximated as Vcr + Vc(t) « 2Vcr (3.5) AEc(t) * CcVcr{Vcr Vc(t)} = Kl{VcrVc(t)} (3.6)

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38 differential zero-crossing V.(t) amplifier detector control ZCD logic 'ref [Note:] delay and resample can be replace d by sampling. Fig. 3.5 The block diagram of the calculating circuit for the utility source current.

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Since this energy loss must be supplied by the utility voltage source, the change of the peak value of the charging current, A Isc, can be estimated as f Vsm sincotAIsc sincotdt = AEc (3.7) Therefore Alsc = AEc = K.2 AEc TVsm (3.8) where K2 = TVs Hence, the variation of the peak value of the charging current, Alsc, can be obtained as follows Alsc = K2AEc = K2Kl{Vcr vc(t)} = Kl2{Vcr-Vc(t)} (3.9) where Ki2= K2Ki = 2CcVcr TV sm In the next period, if this amount of peak value A Isc = A Ii is added to the steady-state utility current Isci, the capacitor voltage will be restored by an amount of A V| as shown in Fig. 3.6. However, the steady-state utility source current must also be updated by an amount AI2 = Alsc in order to prevent capacitor voltage from continuing

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40 * t (a) Voltage change of the energy storage capacitor Cdc. *sc2 |ai, \**2 l sc3 -* t \ / sampling at zero crossing of 60Hz (b) Peak value of the charging current I Fig. 3.6 The concept for the memory of the peak value of steady-state utility source current, ig. 1 . AIj is used to adjust the steady-state charging current Isc in order to prevent v c (t) from continuing change (e.g., voltage drop AV 2 ). 2. AI, is used to raise the v c (t) for an amount AV, = AV. 3. AV, = AV 2 = AV and AI, = AIj = AI K . 4. 1^, is the previous memory of the peak value of steady-state utility current. 5. 1^ is the updated memory of the peak value of steady-state utility current. 6. is the actual peak value of 1^ during t, ~ tj.

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41 to change (e.g. another voltage drop AV 2 ). Therefore, the memory of the peak value of the updated steady-state utility current needs to be I SC 3 =I scl +AI 2 (3.10) where Al2 = AIscSKl2{Vcr-Vc(t)} As a result, during the next period, the total peak value of source current will be Isc2=AI,+I sc3 = AI, +AI 2 +I SC| = 2AI + I scl (3.11) where AI = All = AI2 = Kl2{Vcr Vc(t)} By multiplying Isc2 with sincot, it is possible to obtain utility source current i s (t). The difference between the load current it(t) and i s (t) will be the command current ic('t) for the inverter with active power filtering function. is(t) = Isc2 sincot (3.12) i c (t) = i L (t)-is(t) (3.13) During steady-state, the capacitor voltage v c (t) at the sampling instant will equal to reference voltage Vcr.

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42 V c (0 sampling =Vcr (3.14) Hence, the variation of the charging current AI will be AI = AIsc = Kl2{Vcr-Vc(t)} =0 (3.15) Consequently, in the steady-state, the utility source current will become Isc2 = 2AI + Iscl = Iscl is(t) = Isc2 sincot = Isci sincot = Iss sincot (3.16) where Iss = steady-state peak value of utility source current In addition, the updated memory of ISC3, will be re-sampled as the previous memory for the following cycle as shown in Fig. 3.5. The detailed schematic diagram of the calculation circuit of the command current ic*(t) for the inverter with filtering function is shown in Fig. 3.7.

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43

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Current-mode control scheme of the inverter Either bipolar or unipolar voltage switching of the inverter can be used. The latter is selected to reduce the inverter loss. Hence, the current tracking circuit is a bipolar converter with unipolar PWM technique [30, 42], as shown in Fig. 3.8. The detailed control circuit is shown in Fig. 3.9, and the switching frequency is 25 kHz. 3.3 Simulation Results Figure 3.10 shows the simulation results, using PSpice software, where Li = 2.5mH, Ci = lOuF, Cdc = 660uF (or 470uF) and fs =25 kHz. When the utility source current is applied, the impedance emulator has not been turned on. Hence, all the currents are nearly zero and the capacitor voltage is kept at the reference voltage V ref = 285v. After the fifth cycle, the impedance emulator is turned on, and there is a step change of the output current of the DUT from i 0 = OA to i 0 = 10A. The input current to the DUT is stabilized at the seventh cycle; however, the capacitor voltage v dc is lower than V ref . Hence, the capacitor voltage is charged to V ref in the eighth cycle. The whole system is stabilized at the beginning of the ninth cycle. Therefore, the transient response is two cycles longer than that of DUT. When the DUT is stabilized, the capacitor voltage may not be at the V ref value. As a result, there is one more cycle needed for the capacitor voltage to be charged to V ref .

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45 in© uS K> PWM Converter Ls K: locale Fig. 3 .8 The bilateral current controller using the unipolar PWM modulation. Fig. 3 .9 The detailed control circuit of the bilateral current controller with unipolar PWM modulation.

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46 Fig. 3.10 Simulated current and voltage waveforms for the regenerative load system. (a) Utility source voltage v s = v(7,3) ; utility source current i s = i(vms) (b) DUT input current i L = i(vm) (c) Current controller current i cc = i(vmc) (d) DUT output voltage v 0 = v(l) ; DUT output current i 0 =i(vmle) (e) Capacitor (Cdc) voltage Vdc = v(71,FGnd) DUT output current changes from a peak value of OA to 10A at the fifth cycle.

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In Fig. 3.1 1, the transient response of a step change of DUT output current from i 0 (t) OA to i 0 (t) OA is presented. From this simulation, a two cycle longer transient response than that of DUT can be observed. Figure 3.12 shows the results of PSpice simulation, where the output current of DUT changes from i 0 (t) = OA to 10A at the fifth cycle and from 10A to OA at the tenth cycle. The determination of the value of energy-storage capacitor is based on the following three conditions: (1) Step increase of the real fundamental component of the DUT input current When the DUT input current has a step increase, the energy stored in the capacitor must be released immediately to support the step increase in the power consumed by the DUT, i.e., by using the energy-balance concept where Vc,min = preset lower limit of the voltage of energy-storage capacitor, AIli a step increase of the peak value of the real fundamental component of the DUT input current and T = period of the utility voltage source. Therefore, the value of the capacitor is 3.4 Discussion 5 <*0£ v . 2 m in} = v smAl L1 T c,min J 2 (3.17)

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48 Fig. 3.11 Simulated current and voltage waveforms for the regenerative load system. (a) Utility source voltage v s = v(7,3) ; utility source current i s = i(vms) (b) DUT input current i L = i(vm) (c) Current controller current i cc = i(vmc) (d) DUT output voltage v 0 = v(l) ; DUT output current i 0 = i(vmle) (e) Capacitor (Cdc) voltage Vdc = v(71 ,FGnd) DUT output current changes from a peak value of 1 OA to OA at the fifth cycle.

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49 Fig. 3.12 Simulated current and voltage waveforms for the regenerative load system. (a) Utility source voltage v s = v(7,3) ; utility source current i s = i(vms) (b) DUT input current i L = i(vm) (c) Current controller current i cc =i(vmc) (d) DUT output voltage v 0 = v(l) ; DUT output current i 0 =i(vmle) (e) Capacitor (Cdc) voltage Vdc = v(71,FGnd) DUT output current changes from a peak value of OA to 10A at the fifth cycle and from 10A to OA at the tenth cycle.

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50 r V sm AI Ll T n ,ox Ccl "r 2 -v 2 '-cr v c.min (2) Step increase of the real fundamental component of the DUT output current While the DUT output current is increased, its input current may not change as quickly and as large until the next cycle. Hence, this extra DUT output current AI L 2 will charge the energy storage capacitor, i.e., by using the energy balance concept ^Cc{V 2 max V 2 } = lvsmAI L2 T (3.19) where Vc,max = preset upper limit of the energy storage capacitor and AI L 2 = step increase of the peak value of the real fundamental component of DUT output current. Therefore, the value of the capacitor required is Cc2= Vs m Al L2 T (32Q) V 2 V 2 Y cmax T cr (3) Reactive and harmonic components of the DUT input current During the steady-state, the reactive and harmonic components of the DUT input current will charge and discharge the energy-storage capacitor during the period. Therefore, using the energy balance concept ICC 2 (v c 2 A -v c 2 r ) = l Vsm AI L3 | (3.21)

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51 where AI L 3 = the peak value of the RMS of the reactive and harmonic component of DUT input current and Vca = maximum or minimum voltage of the energy-storage capacitor during one period. Therefore, using the energy balance concept T VsmAI L3 — Cc3 = -— 2(3.22) (V C 2 A -V c 2 r ) where the half period 172 is selected, so that the maximum charging or discharging times of the reactive and harmonic components will be less than T/2. If the transient response waveform of the system is to be preserved, the largest of Cci, Cc 2 and Cc 3 is selected as the value of the energy-storage capacitor. If the transient response waveform of the DUT is not needed, the value of Cc 3 is chosen as the value of the energy-storage capacitor. 3.5 Summary For the long term testing of power equipment and motor-generator set, a regenerative load system is proposed, based on the energy balance concept. In addition, a memory circuit is added to the dc capacitor voltage controller to store the value of the utility source current needed to maintain the capacitor voltage during steady-state. This memory circuit concept can simplify the design of the capacitor voltage controller. This regenerative load system has three advantages: (1) economic, the energy consumption will be less than 20% of the conventional load; (2) safety, due

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to the low energy dissipation, no appreciable Joule heating is observed; and (3) power quality, since the ac line current is shaped into sinusoidal waveform with P.F. = 1.0, problems such as harmonic currents and EMI are greatly reduced and the power quality of the utility source is also improved. In addition, only a proportional capacitor-voltage-control method is applied in the controller design. Thus, the transient response is fast and good. The feasibility of this regenerative load system is verified by PSpice simulation.

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CHAPTER 4 STABILITY ANALYSIS OF REGENERATIVE LOAD SYSTEM WITH UTILITY SOURCE INDUCTANCE 4.1 Introduction For the regenerative load system in Chapter 3, we assumed that the utility source is an ideal voltage source and has no series inductance with itself. However, actually, there will be some leakage inductance of the power transformer, Ls, in series with the utility source. When this series inductance is taken into consideration, the regenerative load system will become marginally stable or unstable. This chapter will discuss the stability problem of the regenerative load system with the source inductance taken into consideration, and proposes a R,C damping circuit added to the system to obtain stability. In addition, the analysis also shows that in order to maintain the stability of the system, the current gain of the current controller must be smaller than one, i.e., k(s) = I 0 /I in <1.0. In the analysis, first, we use an ideal current-controller, i.e., k=real constant. Then, based on PSpice simulation, we use a simple current-controller model which is valid up to 1.1 kHz for 20 kHz switching frequency. From these two kinds of analyses, the effect of the bandwidth limitation of the inverter on the system stability is 53

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revealed. If the switching frequency is not high enough, more detailed model needs to be considered [70]. 4.2 Stability Analysis of the Regenerative Load System with Source Inductance When a regenerative load is connected to the utility source, the system may oscillate because of the presence of the utility source impedance, Ls. The schematic of the regenerative load system with source inductance, Ls, is shown in Fig. 4.1. The PSpice simulation results are shown in Fig. 4.2. The occurrence of such instability is the motivation for the investigation reported here. There are many related research works on the stability of distributed power supply system [57-68]. The nature of the problem can be understood by consideration of the equivalent circuit of the feedback port of the regenerative load system as shown in Fig. 4.3. For concreteness, we consider the case for the DUT without loading. Hence, the input impedance of the DUT can be represented by an inductance Zli = sLl, where Ll is the magnetization inductance of the input transformer. This equivalent circuit can be further reduced to that shown in Fig. 4.4, where k is the gain of the current controller. The terminal voltage Vi(s), i.e., V(7,3), can be obtained as

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55 Fig. 4.1 The schematic circuit diagram of the "regenerative load system" with utility source inductance L s .

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56 Fig. 4.2 Simulated current and voltage waveforms for the regenerative load system with utility source inductance Ls =0.02mh. (a) Utility source voltage v s = v(7,3) ; utility source current i s = i(vms) (b) DUT input current i L = i(vm) (c) Current controller current i cc = i(vmc) (d) DUT output voltage v 0 = v(l) ; DUT output current i 0 = i(vmle) (e) Capacitor (Cdc) voltage Vdc = v(71,FGnd)

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57 Fig. 4.3 The equivalent circuit of the feedback port of the regenerative load system.

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58 Fig. 4.4 The reduced equivalent circuit of Figure 4.3.

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where T = ZL|| " SCi 1-k 1-k k = gain of the current controller (inverter) As discussed in references 57 and 66, the impedance ratio at the interface, defined as T = Zs/Zeq', can be considered as the loop-gain of the system and can be used to determine the stability. The root-locus of the characteristic equation is shown in Fig. 4.5 for k = 0 to k = 0.99, where Ls 2mH, L,i = 600mH, r ti = 0.00 1Q, CI = lOuF. Figure 4.5 clearly shows one pair of roots on the imaginary axis. Hence, the system is marginally stable and has sustained oscillations. The simulated results, using Matlab, is shown in Fig. 4.6 for k = 0.99. As shown in Fig. 4.6, the oscillation frequency is opproximately f os = U KH Z . This is in agreement with f = a>/2n = 1 1 .5kHz, which is calculated from the root-locus in Fig. 4.5 for k = 0.99. If the gain of the current controller is increased beyond k >1 where the rootlocus is shown in Fig. 4.5(b), we can then see that there is one pole in the RHP. The 1+T=1+ = 0 (4.2)

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60 Root Locus (a) (b) imag 1 0.8 0.6 0.4 0.2 imag 0 -0.2 -0.4 -0.6 -0.8 -1 ' 1 — -1.5 -1 -0.5 0 0.5 1 1.5 real x 1CT 3 Root Locus i 1 1 — © 8 Q— — • I. 3 -2 -1 0 1 2 3 real x10 5 Fig. 4.5 Root-locus of the regenerative load system with source impedance Ls, where Ls = 2mH, Li = 600mH, Ci= lOuF. (a) stable system, k=0 to 0.99,+ for k=0, x for k=0.99; (b) unstable system, k=1.001 to 1.10, * for k=1.001, o fork=1.10.

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61 id(t) 1 .5 1 1 1 1 1 1 1 r -0.5" 1 1 1 1 1 1 1 1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 v1(t) x 10 3 100 1 1 1 1 1 1 1 1 1 Fig. 4.6 Matlab simulation results of the regenerative load system with utility source impedance Ls, where Ls=2mH, L/ = 600mH, r/ = 0.00 1Q, and Ci =10uF. (a) current of capacitor Ci; (b) voltage at the interface of utility source and the DUT. The oscillation frequency is approximately, f os * 1.1 kHz for the current gain k=0.99.

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62 system will become unstable because for k >1, there is a positive feedback with loopgain greater than one. In order to stabilize the system, the root-locus must be shifted from the imaginary axis into the LHP. Employment of state feedback and pole placement can achieve this goal. However, the simple method is to add an R,C damping circuit across the terminal as shown in Fig. 4.7. The Rp,Cp damping circuit is used to damp out the oscillation for the case of current gain k < 1 . Therefore, the characteristic roots of the system will move into the LHP as shown in Fig. 4.8, and the system will become asymtotically stable by adding this damping circuit Rp,Cp. In the case of the gain of the current controller increasing beyond one, k > 1, there will be one pole moved into the RHP as shown in Fig. 4.9 and the system will become unstable again. The reason for this instability is due to the positive feedback with loop-gain greater than one, k > 1 . For the stability of the system, the damping circuit must be added and at the same time, the current gain of the current controller need to be smaller than one, i.e., k < 1 . 4.3 Simulation Results When the damping circuit, Rp,Cp, is added to the terminal, the system will become asymptotically stable for k < 1, as the root-locus of Fig. 4.8 (a) shows. The schematic of the regenerative load system with the damping circuit is shown in Fig. 4.10. Figure 4.11 shows the simulation results, using PSpice software, where

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63 Fig. 4.7 The equivalent feedback port circuit with the damping circuit included.

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64 Root Locus (a) imag Root Locus (b) Fig. 4.8 Root-locus of the regenerative load system with source impedance Ls, and having the damping circuit Rp=10Q,Cp=10uF added, (a) stable system, k=0 to k=0.99, + for k=0, x for k=0.99; (b) Zoom of (a) around the origin of the s plane.

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65 (a) (b) 8000 6000 4000 2000 0 imag -2000-4000-6000— r-8000-1 8000 imag -2000IRoot Locus -I 1 1 r 2 3 real Root Locus 5 6 x 10 6 Fig. 4.9 Root-locus of the regenerative load system with source impedance Ls, and having the damping circuit Rp=10Q, Cp=10uF added, (a) unstable system, k= 1.001 to 1 . 1 0, * for k= 1 .00 1 , o for k= 1 . 1 0; (b) Zoom of (a) near the imaginary axis.

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66 Fig. 4. 10 The schematic circuit diagram of the "regenerative load system" with the damping citcuit "R^Cp."

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67 (a) (b) (c) (d) (e) « VII) • n«*ui.|0 Fig. 4. 1 1 Simulated current and voltage waveforms for the regenerative load system with utility source inductance Ls =2mH, after the damping circuit Rp=10 Q, Cp=10uP, is added. fa) Utility source voltage v s = v(7,3) ; utility source current i s = i(vms) (b) DUT input current i L = i(vm) (c) Current controller current i cc = i(vmc) (d) DUT output voltage v 0 = v(l) ; DUT output current i 0 = i(vmle) (e) Capacitor (Cdc) voltage Vdc = v(71,FGnd) DUT output current changes from a peak value of OA to 10A at the fifth cycle and from 1 OA to OA at the tenth cycle.

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68 Ls=2mH, Ci = lOuF and f s = 25 kHz. In the simulation circuit, the DUT output current changes from peak value of OA to 10A at the fifth cycle and from peak value of 10A to OA at the tenth cycle. 4.4 Discussion Up to this point, the current gain of the inverter is assumed as a real constant. In reality, however, the current gain will be a function of complex frequency s, i.e., k(s), as derived in the following. The equivalent circuit of the current controller is shown in Fig. 4.12. From Fig. 4.12, the output current I L 2(s) is obtained as . k cl2 [ i; ef -k isca i e I L2 ]-V(7,3) I L2 (s) = (4.3) where k cl2 k c , k c2 Therefore, sL 2 = k c ik c2 V dc 285 V tri 3 :50 e =k i =0.l(v/a) 2.5mh v 0 L2 ' sL 2 +kik cl2 sL 2 +kjk cl2 (4.4) If the term (sL 2 + k, k| 2 ) is very large, i.e., k ki 2 = loop-gain » 1, then the second term Vo / (sL 2 + k, ki 2 ) can be neglected, and thus

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69 I u (s) sL 2 o — A rcm-J CONV. V(7,3) PWM 4 O (l { (s) + I cl (s))K SaHa]a Fig. 4. 12 The equivalent circuit of the unipolar PWM current controller.

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70 kjk c i2 T , 1 (4.5) ML2L 2 _ 1 1 ref S + 1 + L 2 W p where P T For I* ef = k 0 [ II (s) + Ici (s) ] at s=0, the actual current gain will be given as k(s) = ^ sk 0 — (4.6) I L (s) + I cl (s) ° l + J_ where k 0 = dc current gain of the inverter By applying k (s) of Eq. (4.6) to Eq. (4.1), the terminal voltage of the system without damping circuit is obtained as v,(s) = v s — ! 1 + T(s) _ y a,s + a 0 (4.7) S b 3 s 3 + b 2 s 2 + b,s+ b 0 where ai = L|, ao = kj kci2 U/L 2 \ b 3 = Ls L| C|, b 2 = Ls L,C, (1-ko) kikci2/L 2 , bi = Ls + Li, b 0 = k, kci2 L|/L 2 + (1-ko) (kj ken/ L 2 ) Ls

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Hence, the characteristic equation of the system without damping circuit is b 3 S 3 + b 2 S 2 + b,S+bo = (4.8) From Eq. (4.8), the root-locus can be plotted as shown in Fig. 4.13. In Fig. 4.13, there is one complex pair of poles in the RHP. As a result, the system will be unstable, and the oscillation will increase with time. These results are verified in Fig. 4.2 for the actual circuit simulated using PSpice software. This is different from the simulation results in Fig. 4.3, which assumes k = real constant, and the oscillation amplitude will not grow with time. Similarly, the system with the damping circuit can also be re-examined, assuming the current gain K(s) of Eq. (4.6). The terminal voltage Vi(t) will be obtained as V,(s) = V s 1 + T(s) (4.9) 1 + where damp ^ p Therefore

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72 x io 4 Root Locus xlO 4 Fig. 4.13 Root locus of the regenerative load system with utility source impedance Ls=2mH, and without damping circuit, assuming that the current gain, i.e., k(s) = k 0 (kjk l2 / L 2 )/(s+ kjk^ / L 2 ), is a function of frequency, where k 0 = 0 to 1.02 ; "+" for k o =0, "x" for k 0 =1.0 and "o" for k o =1.02. (a) entire root locus; (b) Zoom of (a) near the imaginary axis.

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73 2 Vfs) = V a2S +a ' s + a o (4.10) 1 s b 4 s 4 +b 3 s 3 +b 2 s 2 +b,s+b 0 where a 2 = RpCpL,, ai = L, (1 + RpCp kj kci2/L 2 ), ao = Li k, k C i2/L 2 ; b 4 = LsL,RpCpC,, b 3 LsL, [ C, + Cp + (l-k 0 )RpCp(k, kci 2 /L 2) C, ], b 2 = Ls {L, [ (l-kO)( ki kc,2/L 2 ) C, + (kj k C i2/L 2 ) Cp] + RpCp} + RpCpL,, b, = Ls { 1 + (1-kO) RpCp(ki kc 12 /L2) } + L, [ 1 + RpCp(k, kci 2 /L 2 ) ], b 0 (1-kO) Ls (kj kci2/L 2 ) + U (ki kci2/L 2 ) and the characteristic equation of the system with damping circuit is given as b 4 S 4 + b 3 S 3 + b2S 2 + b,S + bo = 0 (4-11) The root-locus of the system can be obtained from Eq. (4.11) as shown in Fig. 4.14. When the root-locus in Fig. 4.14 is compared with that of Fig. 4.8 and Fig. 4.9, which assume current gain k = real constant, it can be seen that the complex dominant pole pairs in Fig. 4.8 (b) and Fig. 4.14 (b) are almost the same, and, thus, are related to the damping circuit Rp,Cp. The difference between these two root-locus is in the other pole pairs, which are influenced by the current gain k(s) of the inverter. We can see, however, from Fig. 4.14 (a), that the system is stable for current gain k 0 < 1 . Therefore, the requirement for the system stability is that the dc current

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74 Root Locus (a) Root Locus (b) 8000r imag -200flFig. 4.14 Root locus of the regenerative load system with utility source impedance Ls=2mH, and with damping circuit, R p = 10Q , C p = lOuP , assuming that the current gain, i.e., k(s) = k 0 (kjk 12 / L 2 )/(s+ kjk 12 /L 2 ), is a function of frequency, where k 0 = 0 to 1.02; "+" for k o =0, "x" for k o =1.0 and "o" for k o =1.02. (a) entire root locus; (b) Zoom of (a) near the imaginary axis.

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75 gain k 0 of the inverter is less than one, i.e., k 0 < 1, and the damping circuit Rp,Cp is added to the regenerative load system. 4.5 Summary This chapter presented an analysis of the stability of the regenerative load system with the utility source inductance, Ls, taken into consideration. It was shown that the system will be exponentially unstable, using PSpice simulation, i.e., assuming that the current gain k(s) of the current controller is a function of complex frequency s. If the current gain is assumed as a constant, for k < 1, the system is still marginally stable with sustained oscillation, as shown in the results of simulation using Matlab software. These instability phenomena are corroborated by the root-locus analysis of the regenerative load system. Although employment of state feedback and pole placement can relocate these RHP poles into the LHP, the simple method is to add an R,C damping circuit across the interconnection terminal of the utility source and the DUT. This R,C circuit can damp out the oscillation for the case of current gain k < 1. Therefore, the characteristic roots of the system will move into the LHP as shown in the root-locus analysis. The effect of the R,C damping circuit on the stability of the system is verified using PSpice simulation. Even with the addition of this damping circuit, the system will still become unstable if the current gain of the current controller is greater than one, i.e., k > 1 .

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This instability is demonstrated by the movement of poles into the RHP, using the root-locus analysis. The physical explanation for the instability is that if the current gain, k, of the current controller is greater than one, then it is the situation of positive feedback with loop-gain greater than one that will cause instability. In summary, for the stability of the system, the damping circuit must be added across the utility source terminal, and at the same time, the current gain of the current controller must be kept below one, i.e.,|k(s)| < 1 .

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CHAPTER 5 INPUT IMPEDANCE SPECIFICATION OF DEVICE UNDER TEST FOR STABLE REGENERATIVE LOAD SYSTEM 5.1 Introduction In order to find the input impedance specification of DUT for the stability of the system, there are many related methods in the literature [57-68]. Among these methods, the two subsystems interaction theorem is an adequate one and is adopted here [57,66]. First, the regenerative load system is transformed into two equivalent subsystems; then the two subsystems interaction theorem can be applied to analyze the stability of the system. This provides an alternative analysis method in addition to the root-locus used in Chapter 4. In addition, the input impedance specification of the DUT is also presented, using the subsystem interaction theorem [57,66]. At first, in Sec. 5.2, the equivalent impedance concept is proposed to transform the impedance and its associated controlled current source into an equivalent Z impedance such that Z eq = where Z is the original impedance and k is the gain (1 — k) of the current controller. After this transformation, the system can be further divided into two equivalent subsystems. Then, in Sec. 5.4, the two subsystems interaction theorem is applied to analyze the stability of the system. We found that the system has potential stability problems for the active DUT load (e.g., regulated power converters) 77

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78 due to the phase characteristics of the small signal dynamic input impedance of the active DUT (negative resistance in the low-to-medium frequency range). In order to clarify the effect of bandwidth limitation of the current controller on the system stability, we analyze the system using both the ideal model, i.e., current gain k=real constant, and the simple frequency-dependent model which is valid up to 1.1 kHz for 20 kHz switching frequency, based on PSpice simulation. If the switching frequency is not high enough, more detailed model by Tan and Middlebrook [70] needs to be considered. From the stability analysis, we found that the bandwidth limitation of the current controller has an adverse effect on the system stability. Therefore, a two damping circuits concept is proposed in Sec. 5.5 to improve the stability margin of the system. With the addition of a high frequency damping circuit, the stability margin increases remarkably. Subsequently, in Sec. 5.6, the input impedance specification of the DUT for a specified stability margin is presented. From this input impedance specification of DUT, we concluded in Sec. 5.7 that the proposed regenerative load system will be stable for the practical DUT and even for the active DUT. The only requirement of the input impedance of DUT is that its magnitude is greater than 0.1Q for all the frequency range of interest. The validity of this study is verified by PSpice simulation.

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79 5.2 Defining the Regenerative Load System as Two Cascaded Subsystems In order to find the input impedance specification of the DUT for a stable regenerative load system, the utility source port can be transformed into two equivalent subsystems as shown in Fig. 5.1. Figure 5.1(a) shows the original input port equivalent circuit with the inverter represented as a controlled current source. This controlled current source can be split into two controlled current sources as shown in Fig. 5.1(b). One controlled current source is parallel with the capacitor Ci, and the other is parallel with the input impedance of the DUT. Since the controlled current source, k I/, supplies current to the impedance Z,, the input current to this parallel combination will be I /t>£? =I,-kI, =(l-k)I, (5.1.) Hence the equivalent load impedance is given as Z V v, l.eq ~ I (l-k)I, l,eq z (5.2) 1-k where input impedance of DUT k= current gain of the controlled current source (inverter)

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80 Fig. 5.1 The transformed equivalent subsystems of the regenerative load system.

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sL s =Z s 6 ; ' a I | ^-(1-K)I ( -o— 3B Z *.«i Z < l-K ci (c) z 1 1 c "» sC,'l-K "S,TH 6 ; . B V = V "Cl.eq 'S.TH *S Z s + Z cleq 7 =7 II 7 = Z S Z Cl.eq s »™ Z sll z ci,«, Z s + Z cleq 09 Fig. 5.1 Continued.

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Similarly, the parallel combination of the l/(sCi) and klci can be transformed into an equivalent impedance, Zci, eq , as Z c.e q =^^ (5-3) This transformed equivalent system can be further divided at the terminal A, B as shown in Fig. 5.1(c). The left part will be represented by a Thevenin's equivalent circuit with the Vs, eq and Zs, eq given as V s , eq = V s Zc ' eq (5.4) + ^cl,eq IZjZqJ gq ^cl,eq = ~Z j (5-5) When the DUT is connected to the Thevenin's equivalent source circuit, the regenerative load system will be reduced to two cascaded subsystems as shown in Fig. 5.1(d). These two subsystems are the (1) equivalent source subsystem and (2) equivalent DUT load subsystem. In the next section, a methodology for developing the input impedance specification of an unknown DUT subsystem for stable system operation is introduced. The method assumes that the output impedance of the utility source subsystem is known. If the DUT meets the input impedance specification, the stability of the regenerative load system will be ensured, despite allowing impedance overlap at the interface of the subsystems [57,66].

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83 5.3 S ystem Interaction Analysis 5.3.1 Impedance Ratio as a Loop-Gain Consider the integration of the two subsystems as shown in Fig. 5.2. Assuming that each subsystem is individually stable, the overall transfer function of the integrated system can be expressed as the product of the individual subsystem transfer functions ( Fa and Fb ) and a loading factor [57-68]. where V 2B _ F A F B 7. FaFb 1 + T m (5.6) Z T m = = Equivalent loop-gain of the integrated system Zin F A = Forward transfer function of load subsystem without load impedance , i.e., Zl= <» F B = Forward transfer function of load subsystem without source impedance , i.e.,Zs= 0 Zo= Output impedance of the source subsystem Zin= Input impedance of the load subsystem 1 „ Zin . 1 + T m Z 0 +Z in Loading factor

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84 Subsystem A Subsystem B o + Fa — o-^ V2A *1 + v, IB 2B IB '2B Fig. 5.2 Two cascaded subsystems.

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Both Zo and F A are input-to-output transfer functions of the source subsystem and have common denominators (characteristic equation of the source subsystem). Also, Yin ( 1/Zin ) and F B are input-to-output transfer functions of the load subsystem and have common denominators (characteristic equation of the load subsystem). The above statement is true when both the subsystems are observable at the interface [71]. Since the denominator of F A F B is canceled by the numerator of the loading factor in Eq. (5.6) (also the denominator of Tm), the characteristic equation of the integrated system will be 1 + T m =0 (5.7) As discussed in references 58 and 66, the impedance ratio at the interface, defined as Tm=Zo/Zin, can be viewed as the equivalent loop-gain of the system. This equivalent loop-gain can be used to determine the stability and performance of the system. The stability of the integrated system can be determined by calculating the zeros of Eq. (5.7), i.e., root-locus plot, or by applying the Nyquist criteria to this loopgain Tm. The root-locus method is adopted in Chapter 4 and in this chapter, the Nyquist criteria is used. The root-locus method requires analytical models; however, the Nyquist plot can easily be determined from either analytical models or measurement data. Also, it should be noted that the choice of source and load subsystems is not dependent on the direction of power flow. However, the source subsystem must be chosen such that its output impedance at the interface bus is an input-to-output transfer function of the source subsystem. Similarly, the load

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subsystem must be chosen such that its input admittance at the interface bus is an input-to-output transfer function of the load subsystem. If |Z in |»|Z 0 | for all frequencies, the loading effect is negligible and the system stability will depend only upon the stability of the individual subsystems. When |Z 0 | is larger than |Z in |, a considerable loading effect exists. However, a loading effect does not necessarily imply a stability problem. In this case, the Nyquist criteria can be applied to the loop-gain, Tm, to determine the system stability. 5.3.2 Effect of Impedance Overlap on System Stability and Performance For the case where |Z 0 | exceeds |Z in | for some frequencies, further analysis is needed to determine the system stability as discussed in references 57 and 66. An example of two impedance overlapping is shown in Fig. 5.3. In the frequency range where I Zin I < I Zo I , the magnitude of loop-gain Tm is greater than 0 dB, as shown in Fig. 5.3(a), (b), (c). The magnitude of Tm crosses the 0 dB line at the two frequencies where I Zin I = I Zo I [points A and B in Fig. 5.3 (a), (b), (c)]. In addition, the magnitude of Tm must approach zero as the angular frequency, (D=2nf, becomes infinity for the applicability of the Nyquist criteria.

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87 Fig. 5.3 Impedance overlap at the interface, (a) impedance comparison; (b) phase plot of impedance; (c) Bode magnitude plot of T m = Z 0 /Z in ; (d) Bode phase plot of T m ; (e) polar plot of T m = Z 0 /Z in (on the next page).

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Fig. 5.3 Continued, (e) polar plot of T m = Z 0 /Zj

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89 Since the |T m | crosses the 0 dB line twice, two different phase margins can be defined assuming the subsystems are individually stable, one at the initial point of the overlap [point A in Fig. 5.3 (a), (b), and (c)] and the other at the final point of the overlap [point B in Fig. 5.3(a), (b), (c)]. For this example, the phase margin at the initial point of overlap, PMi , is given by PM,=180°-ZT m (5.8) and the phase margin at the final point of overlap, PM2 , is given by PM 2 =180°+ZT m (5.9) Figure 5.3(d) shows the polar plot of Tm together with two phase margins. In addition to the stability of the loop-gain, Tm, the phase margins of Tm are also of particular importance in the cascading of two subsystems. A small phase margin drastically increases the magnitude of the loading factor 1/(1+Tm), resulting in severe peaking in the closed-loop transfer function of the integrated system. As a conservative design practice, a phase margin of 60° can be applied for most practical applications.

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90 5.4 Stability Analysis of the Regen erative Load System as Two Cascaded Subsystems 5.4. 1 . Stability of Subsystems Section 5.3 mentioned that if the two subsystems are individually stable, the impedance ratio at the interface as in Eq. (5.6) can be considered as the loop-gain of the integrated system, and the Nyquist criterion can be applied to the loop-gain, Tm, as defined in Eq. (5.6) to determine the system stability. Therefore, the source subsystem needs to be stabilized by adding a damping circuit Rp,Cp as shown in Fig. 5.4. In addition, this compensated regenerative load system can be transformed into two equivalent subsystems, as shown in Fig. 5.4(c), (d), and (e) where V TH V s Z P Zcl.eq z s + (z p Zcl.eq ) (5.10) Z-th z s |z p 'cl.eq (5.H) and where J cl.eq J 1_ sC, 1-k z >= R > + A Z s = sL s The stability of the compensated source subsystem, where Rp=10Q and Cp=10uF, is investigated by the root-locus plot of the source subsystem, using the

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91 6 damping circuit (a) Equivalant circuit sL„ 6 v > 1 sC p *C1 u KI, CI sC, Subsystem A Subsystem B (b) Two Subsystems Fig. 5.4 The transformed equivalent subsystems of the compensated regenerative load system.

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(c) two subsystems with equivalent impedance: (d) two cascaded subsystems o-o(e) represented as Thevenin's equivalent circuit. Fig. 5.4 Continued.

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93 current gain K(s) as the varying parameter, where the current gain is given as in Eq. (4.6) and where K(s) = k 0 k jki2 s+ k|kl2 L 2 (5.12) 1 1 + p k 0 = dc current gain of the controlled current source (inverter) kj =0.1 [V/A] k 12 kjk 2 V v tn k 2 =50 L 2 =2.5mH= inductance of the current controller kjkj2 co n = The root-locus in Fig. 5.5 shows that if the dc current gain, i.e., k 0 in Eq. 5.12 is greater than one, then the root-locus will enter into the RHP (indicated as point o), and the source subsystem will become unstable. Hence, the dc current gain, k 0 , of the inverter must remain smaller than one, i.e., k 0 < 1, for stability. Figure 5.6 shows

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94 (a) (b) 5 4 3 2 1 0 imaq _ -2-3-410 4 Root Locus -20 10 4 0 imag -2 -4 + : k0=0 x : k0=0.99 o : k0=1.1 -15 -10 -5 real Root Locus 10 4 1 i i 1 1 + : k0=0 x : k0=0.99 f o : k0=1.1 ! * H : — h I 1, l i i -1 0 real x 10 s Fig. 5.5 Root-locus of the source subsystem as the function of current gain,k(s) = k 0 (kjk 12 / L 2 )/(s+ kjk| 2 / L 2 ), where k 0 from 0 to 1.10, and damping circuit Rp=10Q, Cp=10uP. (a) entire root locus; (b) zoom of (a) near the imaginary axis; (c) Zoom of (b) around the origin (on the next page).

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95 Root Locus (c) 8000 6000 4000 2000 imag -20001-4000-6000-8000j + : k0=0 x : k0=0.99 o : k0=1.1 real 10 4 Fig. 5.5 Continued, (c) zoom of (b) around the origin.

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96 Fig. 5.6 Root locus of source subsystem as function of damping resistor Rp,where the current gain k 0 = 0.95. (a) entire root locus; (b) Zoom of (a) near the imaginary axis; (c) zoom of (b) around the origin (on the next page).

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Fig. 5.6 Continued, (c) zoom of (b) around the origin.

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98 another root-locus of the source subsystem, where dc current gain k 0 -0.95, and the damping resistor Rp is used as a varying parameter. Figure 5.6 shows there are a pair of poles on the imaginary axis when Rp=0 as shown in Fig. 5.6(c), marked as points +. However, as Rp increases from zero to Rp=50Q, the other pair of poles will move from the far end of LHP towards the imaginary axis as shown in Fig. 5.6(a) and (b). Based on these observations, the value of the resistance, Rp=10Q, is chosen as the adequate one. This choice has been justified by the PSpice simulation of the source subsystem. The DUT subsystem in Fig. 5.4 can be divided into two modes, nonconduction and conduction, as shown in Fig. 5.7(a) and (b), depending on the conduction conditions of the bridge rectifier of Fig. 3.3 in Chapter 3. In Fig. 5.7(a), the L/i represents the leakage inductance, and the L/ t is the magnetization inductance of the transformer. The r/i and Vr are the coil resistance and equivalent resistance of core losses, respectively. The C and Rl of Fig. 5.7(b) represent the passive DUT load in conduction mode. Figure 5.7(c) shows the equivalent small signal DUT subsystem, where the negative resistance, Rn= -10Q, represents the worst case small signal impedance of the dc-to-dc regulator [9]. The Rb,Cb circuit in Fig. 5.7(c) is used to damp the oscillation caused by the negative dynamic resistance Rn of the regulated dcto-dc converter. The stability of all the modes in Fig. 5.7 have been verified through the PSpice simulation where k=0.99 (or k 0 =0.99).

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99 AAA — «™ r fl hi r fl =0.00 in L {1 =25uH = 600uH ^ = 0.010 AAA/ — f T m 'it C = 2000uF Z in = ^.eq (b) conduction mode with passive load = 10ft (a) nonconduction mode -AAA/ — nmn L ii kL IT c * C = 2000uP Z in ^.eq C^OOOuF Rb = 0.1Q C = lOOOuP Rn = -10Q (c) conduction mode with small signal equivalent active load •L. Fig. 5.7 The equivalent DUT load subsystems.

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100 5.4.2 Stability of the Integrated System The stability of the regenerative load system can be investigated by cascading the three modes of DUT subsystems of Fig. 5.7 to the source subsystem as shown in Fig. 5.4. The stability analysis for the non-conduction mode of DUT is shown in Fig. 5.8 where r/i=0.001Q and L/i=25uH are the internal resistance and leakage inductance of the transformer, and L/ t =600mH and r/ t =0.01Q are the magnetization inductance and equivalent resistance of core losses. Figure 5.7(a) represents an equivalent circuit of the transformer with its secondary open circuited. In Fig. 5.8(a), the current gain is assumed as a real constant, i.e., k=0.99. We can see I Zo I « I Zin I for all frequencies, and therefore, there is no impedance overlap and the loop-gain | Tm | « 1 from co « 0 to co « qo. Since there is no encirclement of the (-1,0) point in the polar plot of Tm in Fig. 5.8(d), the integrated system will be stable by applying the Nyquist criterion. Fig. 5.9 shows the same analysis as in Fig. 5.8; the current gain, however, is assumed as a function of frequency, i.e., K(s) as in Eq. (5.12). Figures 5.9(a) and (d), clearly show that there is no impedance overlap and the equivalent loop-gain | Tm | « 1. Hence the polar plot of Tm will not encircle the (-1,0) point, and the system will be stable. For the conduction mode with passive load resistance as in Fig. 5.7(b), the results of stability analysis of the regenerative load system are shown in Fig. 5.10,

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101 (a) (b) (c) (d) 200 100 dB -100 10' 100 -100 10' dB -100 -200 -300 10 100 -100 -200 1CT 10" 10° 10" 10 u Magnitude 1 — | i i 1 ziri^J — — 1 i • > * 1 10 2 10 4 Hz Phase 10 2 10 4 Magnitude 10 2 10 4 Hz Phase 10 2 10 4 10° 10° 10° 10° 10° T^^v zin : : zo \. 10 s , Tm 1 1 1 i i i i L > 10° . , , , . 1 Tm 10° Fig. 5.8 Stability analysis of the regenerative load system for the nonconduction mode of DUT, i.e. Fig. 5.7(a), and the current gain is assumed as k=0.99(real constant), (a) impedance comparison; (b) phase plot of impedance; (c) Bode magnitude plot of T m = Z 0 /Z m ; (d) Bode phase plot of T m ; (e) polar plot of T m (on the next page).

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102 Fig. 5.8 Continued, (e) polar plot of T,

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103 (a) (b) 200 100dB -100 10 100 -100 -200 10' 10 u 10° Magnitude 1 r— ' • zin^ — zo — 10 2 10 4 Hz Phase 10° 10 2 10 4 10° 10° t 1 ; i : .''an ZO 10 s (c) (d) dB -100 -200 -300 10' 100 0 -100 -200 10" 10" 10" Magnitude ' 1 1 ; 1 1 1 1 : : ; Tm 10 2 10* Hz Phase 10 2 10 4 10° 10 6 10 8 1 1 i 1 1 1 Tm • ; • i i 10* Fig. 5.9 Stability analysis of the regenerative load system in the non-conduction mode DUT of Fig. 5.7(a), assuming k(s) = k 0 (kjk 12 / L 2 )/(s + kjk 12 / L 2 ), and k 0 =0.99. (a) impedance comparison; (b) phase plot of impedance; (c) Bode magnitude plot of T m = Z 0 / Z in ; (d) Bode phase plot of T m ; and (e) polar plot of T m (on the next page).

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Fig. 5.9 Continued, (e) polar plot of T,

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105 Magnitude 200 100 (a) dB r— J 1 1 1 i ** i i » j (c) (d) o dB 100 -200 10 200 -200 1010° 10 2 10 4 Hz Phase 10° 10* 10 4 10 6 10 s 1 ' ] 1 i a if Tm 10 s j : x i | pmi : Tm / : a mB : ; PM2 \ 10 1 Fig. 5.10 Stability analysis for the conduction mode of Fig. 5.7(b), where the current gain k=0.99 (real constant), (a) impedance comparison; (b) phase plot of impedance; (c)Bode magnitude plot of T m = Z 0 /Z in ; (d) Bode phase plot of T m ; (e) polar plot of T m ; and (f) zoom of (e) around the origin (on the next page).

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Fig. 5.10 Continued, (e) polar plot of T m ; and (f) zoom of (e) around the origin.

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107 where current gain is assumed as a real constant of value k=0.99. In Fig. 5.10(a), there is impedance overlap between points A and B, such that the equivalent loop-gain, Tm=Zo/Zin, will be greater than one in the frequency interval from A to B. However, there are phase margins PM| and PM2 as can be seen in Fig. 5.10(d) and (e). The polar plot will not encircle the (-1,0) point as shown in Fig. 5.10(e) and therefore, the regenerative load system will be stable. In Fig. 5.1 1, the same conduction mode of Fig. 5.7(b) is analyzed, assuming the current gain K(s) as in Eq. (5.12), where the resistance R p is changed to 2Q in order to make the system stable. Fig. 5.1 1(a) shows two times of impedance overlaps. Hence, the equivalent loop-gain Tm will, be greater than one over two intervals as shown in Fig. 5.1 1(c), (e), and (f). For the second interval of impedance overlap, the equivalent loop gain Tm will almost contact the (-1,0) point as shown (point C) in Fig. 5.1 1(f). Therefore, the regenerative load system will become only marginally stable. If the DUT is a regulated dc-to-dc converter, the equivalent small signal dynamic input impedance will be a negative resistance Rn as in Fig. 5.7(c). The above negative load resistance can be considered as a worst-case when performing subsystem interaction analysis as done by Lewis et al. [63]. The results of stability analysis of two subsystems interaction with negative dynamic load resistance is shown in Fig. 5.12 where the current gain of the inverter is assumed as a constant of k=0.99. Figure 5.12 shows only one interval of impedance overlap between points A and B, and the polar plot of equivalent loop-gain, Tm=Zo/Zin as in Fig. 5.12(e), shows there are large phase margins PMi and PM 2 . Therefore, the regenerative load system will be stable.

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108 (a) (b) (c) (d) Magnitude 100 dB -100 10 100 I p ' . ' " — _ " "> 1 •s A 8 i i , zo^ I 1 1 > i i . — i-2 -100 -200 10 100 dB 100 -200 10° 10 2 10* 10° Hz Phase 10" 10* 10 4 Magnitude 10° 10 s N , 1 r V zo \ab: ^_ T. ' — * zin\ % • j • s ! *.v J 10* 1 1 ' \ 1 : a , b i Tm 1 1 i i i i . 1 Fig. 5.11 Stability analysis for the conduction mode of Fig. 5.7(b), assuming current gain is a function of frequency, i.e., k(s) = k 0 (kjk 12 / L 2 )/(s+ kjk^ / L 2 ) and k 0 =0.99. R p is 2 Q. (a) impedance comparison; (b) phase plot of impedance; (c)Bode magnitude plot of T m = Z 0 /Z in ; (d) Bode phase plot of T m ; (e) polar plot of T m ; and (f) zoom of (e) around the origin (on the next page).

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Fig. 5.11 Continued, (e) polar plot of T m ; and (f) zoom of (e) around the origin.

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110 However, if the current gain is assumed as frequency dependence, i.e., K(s), as in Eq. (5.12), there will be two impedance overlaps as shown in Fig. 5.13(a) where the R p is equal to 2Q. The polar plot of equivalent loop-gain as in Fig. 5.13(e) will have two loops intersected with the unit circle. The second loop intersects the unit circle at point C as shown in Fig. 5.13(e) with a small phase margin. Therefore, the regenerative load system will have only marginal stability if current gain is frequency dependent as in Eq. (5.13). Comparing Fig. 5.13(a) with Fig. 5.12(a), we see that the second impedance overlap interval occurs approximately at frequency m 2 x 10 4 Hz. From Fig. 5.4 and Fig. 5.7, we can see that both the Zo and Zin are functions of current gain k(s). The Bode plot of k(s) is shown in Fig. 5.14. As shown in Fig. 5.14(b), the phase of current gain k(s) has appreciable lag around frequency * 2 x 10 4 Hz. This phase lag causes I Zin I to decrease and I Zo I to peak around f * 2 x 10 4 Hz as shown in Fig. 5.13(a). This impedance overlap causes another loop of Tm with magnitude greater than one, as shown in Fig. 5.13(e). This loop intersects the unit circle at point C, near the (-1,0) point, thus the system is marginally stable. We concluded that the bandwidth limitation or non-ideality of current gain k(s) at high frequency will deteriorate the stability of the integrated system.

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Fig. 5.12 Stability analysis for the conduction mode of Fig. 5.7(c), i.e., negative small signal dynamic resistance and assuming current gain k=0.99 (real constant), (a) impedance comparison; (b) phase plot of the impedance; (c) Bode magnitude plot of T m = Z 0 /Z in ; (d) bode phase plot of T m ; (e) polar plot of T m (on the next page).

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Fig. 5.12 Continued, (e) polar plot of T,

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113 Fig. 5.13 Stability analysis for the conduction mode of Fig. 5.7(c), i.e., negative small signal dynamic resistance, and assuming the current gain is a function of freqency, i.e. k(s) = k 0 (kik 12 /L 2 )/(s+kik 12 /L 2 ), where k 0 =0.99(real constant). R p is 2 Q. (a) impedance comparison; (b) phase plot of impedance; (c) magnitude plot of T m ; (d) phase plot of T m ; (e) polar plot of T m (on the next page).

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115 5.5 Stability Improvement of Regenerative Load System In Section 5.4, there is an additional impedance overlap around f = 2 x 10 4 Hz as shown in Fig. 5.11(a) and Fig. 5.13(a) due to the non-ideality of the current gain k(s) as shown in Fig. 5.14. This additional impedance overlap will cause another intersection of the polar plot of Tm with the unit circle at point C as shown in Fig. 5.1 1(e) and Fig. 5.13(e), respectively. The phase margin at point C is very small and will deteriorate the stability of the regenerative load system. The remedy for this stability deterioration is to add another high frequency damping circuit Rpi,Cpi to the source subsystem as shown in Fig. 5.15 such that f 3 dB = 0 * *2xl0 4 Hz (5.13) Z P1 f=f,3dB = V2R pl (5.14) If R pl is chosen as 1 Q, then Z pl » 1.414Q and Cp * 8uF. Actually, if Cpl=2uF and Rpl=lQ is used as the high frequency damping circuit for the source subsystem, an adequate stability improvement of the regenerative load system can be obtained. Fig. 5.16(a) shows only one impedance overlap between points A and B compared to the two overlaps in Fig. 5. 1 1(a). The elimination of the second overlap is due to the lowering of |Zo | around the frequency f » 2 x 10 4 Hz by the damping

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116

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117 (a) Equivalent circuit sCp, 1 t IT sC, KI, ci Source Subsystem KI, DUT in DUT Subsystem (b) Two subsystems Fig. 5 .15 The equivalent subsystems of the regenerative load system with two damping circuits RppCp, and Rp,C p .

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118 Fig. 5.16 Stability analysis for the conduction mode of Fig. 5.7(b), i.e. passive resistance DUT, and assuming the current gain is a function of frequency, i.e. k(s) = k 0 (kik I2 /L 2 )/(s + kjk 12 /L 2 ), where k o =0.99. Rp is 2 Q and the high frequency damping circuit, R pl =1Q, C pl =2uF, is added, (a) impedance comparison; (b) phase plot of impedance; (c) Bode magnitude plot of T m ; (d) Bode phase plot of T m ; (e) polar plot of T m (on the next page).

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120 circuit Rpi and Cpi. The polar plot of the loop-gain Tm=Zo/Zin has only one loop as shown in Fig. 5.16(e) with quite large phase margins PMi and PM2. Compared to the polar plot of Tm in Fig. 5.1 1(f), Fig. 5.16(e) shows that the stability of the regenerative load system has been improved notably. Similarly, Fig. 5.17 shows the stability analysis for the conduction mode of the active regulated dc-to-dc converter with the high frequency damping circuit Rpi=lQ, Cpi=2uF added to the source subsystem. In comparison with Fig. 5.13(a), we can see that there is no impedance overlap in Fig. 5.17(a). Hence, the regenerative load system will be stable as shown in the polar plot of Fig. 5.17(e). 5.6 Input Impedance Specification of Device Under Test We have seen in Sec. 5.4 and 5.5 that by applying the Nyquist criteria to a polar plot of the loop-gain, Tm, we can examine both the stability and relative stability. In this section, we develop a methodology for deriving the DUT input impedance specification, assuming that the output impedance of the source subsystem is known. The method ensures desired stability margins despite allowing impedance overlap at the interface between subsystems. 5.6.1 Forbidden Region In considering Fig. 5.18, suppose that the loop gain, Tm, never enters the shaded portion of the polar plot. In such a case, assuming that the individual

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121 (a) (b) (c) (d) 100 dB -100 10 500 -500 10" dB -50 -100 -150 Id 2 500 -500 -1000 Magnitude — zin r " — 1 — •v _ r 1 1 — r z 3^*~ i I • 10° 10* 10 4 Hz Phase 10° 10 2 10* Magnitude 10° 1lf 10 4 Hz Phase 10° 10 2 10 4 10 9 10* 10 s 10* 10P — T ' 1 ' zin : / . zq 7~"^-^. • j : ' i 10f ! y 3 i — — Tm • 1 1 -1 Tm . \ . — i . i 10P Fig. 5.17 Stability analysis for the conduction mode of Fig. 5.7(c), i.e., negative small signal dynamic resistance, and assuming the current gain is function of frequency, i.e., k(s) = k 0 (kik, 2 /L 2 )/(s+kik| 2 /L 2 ), where k o =0.99. Rp is 2 Q and the high frequency damping circuit, R pl =1Q, C pl =2uF, is added, (a) impedance comparison; (b) phase plot of impedance; (c) Bode magnitude plot of T m ; (d) Bode phase plot of T m ; and (e) polar plot of T m (on the next page).

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123

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subsystems are stable and all eigenvalues are observable, it is not possible for the polar plot of Tm to encircle the (-1,0) point and so the integrated system stability is guaranteed. Also, anytime Tm crosses the unit circle, the phase of Tm will always be such that there is at least 60° of the phase margin. Furthermore, anytime Tm crosses the negative portion of the real axis, the magnitude of Tm will be less than 0.5, ensuring at least 6 dB of gain margin. If the polar plot of Tm avoids this forbidden region, this condition guarantees that the integrated system will be stable, will not be conditionally stable, will have a desired stability margin, and will have minimal performance degradation. 5.6.2 Formation of the Load Impedance Specification By using the output impedance curve of the source subsystem, it can be shown how to generate an impedance specification for the input impedance of the subsystem which causes Tm=Zo/Zin to avoid the forbidden region of Fig. 5.18. The forbidden region shown in Fig. 5.18 corresponds to the shaded area determined by the following two inequalities |Z 0 |-|Z in |>-GM[dB] (5.15) 360°N + (180° -PM,)< ZZ 0 -ZZ in < 360° N + (180° + PM 2 ) (5.16) where N=0, ±1 , ±2,... 124

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125 Based on Eq. (5.15) and Eq. (5.16), two important concepts of gain limit and unacceptable phase band can be developed. Gain limit The gain limit, | Z | Limit , is defined as l Z l Limit =|Z 0 | + GM [dB] (5.17) When |Z in | stays above the gain limit for all frequency, the polar plot does not enter the forbidden region, and the load subsystem automatically meets the input impedance specification. When |Z in | falls below the gain limit for some frequency, the polar plot of Tm could enter the forbidden region. In this case, the phase of the load impedance should be tested. Unacceptable phase band The unacceptable phase band defines the region that the ZZ in should not enter to achieve the desired phase margin. For a given ZZ 0 and desired phase margin, the unacceptable phase band can be easily obtained, using Eq. (5.16) as ZZ 0 -[360°N + (180° +PM 2 )] < ZZ in>forbidden < ZZ o -[360°N + (180°-PM,)] (5.18)

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126 In order to avoid the forbidden region, ZZ in should not enter the unacceptable phase bands for all frequencies where the |Z in | is lower than the gain limit. 5.6.3 Equivalent Input Impedance Specification The use of the input impedance specification applied to the conduction mode of Fig. 5.7(b) is shown in Fig. 5.19, assuming GM=6dB and PM=50° . Since the |Z in | is lower than the gain limit around the 10 3 Hz and 2 x 10 4 Hz as shown in Fig. 5.19(a), the ZZ in must be checked against the phase specification. As shown in Fig. 5.19(b), the phase of the ZZ in enters the unacceptable phase bands at points A and C, where |Z in | falls below the magnitude limit . Therefore, as shown in Fig. 5.19(f), the polar plot of the loop-gain Tm does enter the forbidden region, although the integrated system is still marginally stable. If the high frequency damping circuit Rpl=lQ, Cpl=2uF is added to the source subsystem, the equivalent DUT input impedance specification becomes easier to satisfy as shown in Fig. 5.20. In Fig. 5.20(a), the input impedance magnitude, |Z in | , is lower than the magnitude limit only at f = 10 3 Hz, hence the phase, ZZ in , must be checked against the phase specification around f = 10 3 Hz. As shown in Fig. 5.20(b), the phase, ZZ in , enters slightly the unacceptable phase bands only at point A where |Z in | falls below the magnitude limit. Therefore, as shown in Fig. 5.20(e), the polar plot of the loop-gain Tm enters slightly the forbidden region only at point A,

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Fig. 5.19 Equivalent DUT input impedance specification applied to the conduction mode of Fig. 5.7(b),i.e., passive DUT, assuming the current gain is function of frequency, i.e., k(s) = k 0 (kjk 12 / L 2 )/(s+ kjk 12 / L 2 ), where k o =0.99. Rp is 2 Q. and the high frequency damping circuit , R p , , C pl , has not been added, (a) magnitude specification; (b) phase specification; (c) Bode magnitude plot of T m ; (d) Bode phase plot of T m ; (e) polar plot of T m ; and (f) zoom of (e) around the origin (on the next page).

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128 Fig. 5.19 Continued, (e) polar plot of T m ; and (f) zoom of (e) around the ori

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Fig. 5.20 Equivalent DUT input impedance specification applied to the conduction mode of Fig. 5.7(b), i.e. passive DUT, assuming the current gain is a function of frequency, i.e., k(s) = k 0 (kjk^ / L 2 )/(s + kjk, 2 / L 2 ), where k o =0.99. Rp is 2 Q. and the high frequency damping circuit R pl =lQ, C p , =2uF is added, (a) magnitude specification; (b) phase specification; (c) Bode magnitude plot of T m ; (d) Bode phase plot of T m ; and (e) polar plot of T m (on the next page).

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Fig. 5.20 Continued, (e) polar plot of T,

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131 confirming that the equivalent DUT input impedance almost satisfies the input impedance specification. For the active dc-to-dc regulator, the equivalent small signal dynamic impedance at low-to-medium frequency will be negative resistance Rn [60,61], as shown in Fig. 5.7(c). Figure 5.21 shows the equivalent DUT input impedance specification, without the addition of the high frequency damping circuit R pl ,C pl . This input impedance specification is applied to the negative dynamic load resistance, Rn. We see that |Z in | is lower than the magnitude limit around frequencies f = 10 3 Hz and f = lxl0 4 Hz as shown in Fig. 5.21(a). The phase ZZ in must then be checked against the phase specification around these frequencies. As shown in Fig. 5.21(b), the phase ZZ in enters the unacceptable phase bands at points A and C where |Z in | falls below the magnitude limit. The polar plot, therefore, of the loop-gain Tm enters the forbidden region as shown in Fig. 5.21(e), although the integrated system is marginally stable. If the high frequency damping circuit Rpi=lQ,Cpi=2uf is added to the source subsystem, however, the equivalent DUT input impedance specification will become easier to be satisfied as shown in Fig. 5.22. Figure 5.22(a) shows no impedance overlapping, therefore, the equivalent DUT input impedance will satisfy the input impedance specification. As shown in Fig. 5.22(e), the polar plot of the loop-gain Tm always remains in the 0.5 circle and does not enter the forbidden region, confirming that the equivalent DUT subsystem satisfies the input impedance specification.

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132 Magnitude (a) (b) (c) (d) 100 dB -100-200 Magnitude ' 1 ' 1 1 1 ' ! ABJa C r ' j Tm i i 1 i 1 i . i , 10' -400-600 10' 10° 10° 10 2 10 4 Hz Phase 10 2 10* vf 10* 1 1 ' 1 ' 1 1 ' Tm i ~— . Xdih X ' | a\b J 1; • X :-l PM2 X 1 , 1 , i , i_ C 10 s Fig. 5.21 Equivalent DUT input impedance specification applied to the conduction mode of Fig. 5.7(c), i.e., negative small signal dynamic resistance, assuming the current gain is a function of frequency, i.e., k(s) = k 0 (kjk 12 / L 2 )/(s+ kjk 12 /L 2 ), where k 0 = 0.99 . Rp is 2 Q and the high frequency damping circuit, R pl , C pl , has not been added, (a) magnitude specification; (b) phase specification; (c) Bode magnitude plot of T m ; (d) Bode phase plot of T m ; (e) polar plot of T m ; and (f) zoom of (e) around the origin (on the next page).

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Fig. 5.21 Continued, (e) polar plot of T m ; and (f) zoom of (e) around the origin.

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134 (a) (b) 100 Magnitude 0 • dB -100 i — — r~ zin J. — ^ : * 1 J*' ' 1 1 1 1 1 1 — . . 1 ^ s.^. 1(T 10° 10 2 10 4 Hz Phase 500 -500 I lnarr.pptahl<=i ph a
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Fig. 5.22 Continued, (e) polar plot of T,

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136 5.6.4 Actual PUT Input Impedance Specification From Fig. 5.15(b), we can see that Z in is only the equivalent DUT impedance. The actual DUT input impedance will be Zjt = ZduL (1 _ k) 11 (1-k) where = Z iB (l-k) = Z DUT (5.19) k = current gain of the controlled current source (inverter) If the output impedance of the source subsystem, Zo, is multiplied by the factor ( 1 -k), a reduced output impedance Zot is obtained Z ot =Z 0 (l-k) (5.20) The loop-gain Tm of the integrated system can be defined as (5.21) Therefore, the actual DUT input impedance specification can be obtained by substituting Z ot for Z 0 in Eq. (5.17) and Eq. (5.18).

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137 If the equivalent DUT input impedance specification in Fig. 5.20, which has the high frequency damping circuit added and is applied to the conduction mode of Fig. 5.7(b), is multiplied by (1-k), the actual DUT input impedance specification can be obtained as shown in Fig. 5.23 where the high frequency damping circuit R p ,,C p | is also added and the conduction mode of Fig. 5.7(b) is applied. Comparing Fig. 5.20(a), (b) to Fig. 5.23(a), (b), the input impedance specification of Fig. 5.23 is only an impedance level shifting of that in Fig. 5.20 by the factor (1-k). Since k * ko = 0.99 at low-to-medium frequency, the curves in these two figures will be similar except at the high frequency end, i.e., for f > 10 4 Hz. Through the same transformation, using formulas from Eq. (5.19) to Eq. (5.21), the equivalent DUT input impedance specification in Fig. 5.22, which has the high frequency damping circuit added and is applied to the conduction mode of Fig. 5.7(c), can be transformed into the actual DUT input impedance specification as shown in Fig. 5.24. 5.7 Discussion The regenerative load system is transformed into two subsystems, the utility source subsystem and the equivalent DUT subsystem. The stability of the integrated system can be analyzed using the impedance ratio Tm=Zo/Zin as a loop-gain of the system. Hence, the impedance overlap may cause instability of the system. An

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138 Fig. 5.23 DUT input impedance specification applied to the conduction mode of Fig. 5.7(b), i.e. passive DUT, assuming the current gain is function of frequency, i.e., k(s) = k 0 (kik 12 /L 2 )/(s+kik 12 /L 2 ), where k o =0.99. Rp is 2 Q and the high frequency damping circuit, R pl =lQ, C pl =2uF, is added. (a) magnitude specification; (b) phase specification; (c) Bode magnitude plot of T m ; (d) Bode phase plot of T m ; and (e) polar plot of T m (on the next page).

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139 Polar plot 270 Fig. 5.23 Continued, (e) polar plot of T,

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140 Magnitude (a) (b) (c) (d) o -50 dB -150 -1000 1 Magnitude ! ! \ | Tm I i . i_ i . i . i Fig. 5.24 DUT input impedance specification applied to the conduction mode of Fig. 5.7(c),i.e. negative small signal dynamic resistance, assuming the current gain is function of frequency, i.e., k(s) = k 0 (kjk 12 / L 2 )/(s+ kjk 12 / L 2 ), where k 0 =0.99. Rp is 2 Q and the high frequency damping circuit ,R pl = 1Q, C pl = 2uF, is added, (a) magnitude specification; (b) phase specification; (c) Bode magnitude plot of T m ; (d) Bode phase plot of T m ; and (e) polar plot of T m (on the next page).

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142 impedance overlap does not, however, necessarily imply a stability problem. In this case, the Nyquist criterion can be applied to the loop-gain Tm to determine the system stability. If the load were passive, the phase of the load subsystem would always be between -90° and 90° , which is generally the same range of phase that the output impedance of the source subsystem has. Therefore, in the case of a passive load, the phase of Tm generally cannot be worse than ±180° , so the polar plot of the loop-gain, Tm, cannot encircle the (-1,0) point, and the worst possible case is a marginally stable system. However, the phase characteristic of the active load (e.g. regulated dcto-dc converter) is what allows the interaction between the source and load, subsystems to cause potential stability problems in the system. For the active load as shown in Fig. 5.21, Fig. 5.22, and Fig. 5.24, the phase of Tm can have a value greater than 180°, which presents the opportunity for the polar plot of the loop gain to encircle the (-1,0) point and for stability problems to result. The addition of the damping circuit Rp,Cp can stabilize the system. The effect of this damping circuit is to stabilize the source subsystem and at the same time to decrease the output impedance |Z 0 | of the source subsystem. However, due to the non-ideality of the current controller, i.e., bandwidth limitation, a second impedance overlap will result around the high frequency f * 2 x 10 4 Hz as shown in Fig. 5.1 1(a), and Fig. 5.13(a). This second impedance overlap will cause the system to become only marginally stable. The addition of a high frequency damping circuit can improve the stability remarkably, as shown in Fig. 5.16 and Fig. 5.17.

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143 After the high frequency damping circuit Rpi,Cpi is added to the regenerative load system, the magnitude of the output impedance of the equivalent source subsystem will be decreased to almost OdB, i.e., 1Q, around its peak value in the frequency range of 10 2 Hz to 5x 10 4 Hz as seen in Fig. 5.16(a), Fig. 5.17(a) and Fig. 5.22(a). For the actual input impedance specification of the DUT, the equivalent output impedance of the source subsystem is at the level of -40dB , i.e., |Z 0 | = 0.01 , as shown in Fig. 5.23(a) and Fig. 5.24(a). This means that for the stability of the system, the input impedance of the DUT only needs to be larger than 0.01Q, i.e., |Z jt | > 0.01, as shown in Fig. 5.23(a) and Fig. 5.24(a). Additionally, we have observed that in Fig. 5.23(a) and Fig. 5.24(a) an input impedance drop of the DUT around frequency f = 10 Hz exists. This is due to the series resonance of the leakage inductance of the transformer and the large capacitance of C in Fig. 5.7(b) and (c). Thus, the input impedance of DUT will be approximately equal to series resistance of the transformer and equivalent core loss r ft where r/j =0.001 and r /t =0.01 as assumed in the analysis. However, in a real situation, the coil resistance of the transformer will be greater than 0.00 1Q and, together with the equivalent resistance of the core loss r /t , will make the |Z it | larger than 0.1Q at this resonance frequency f*10 3 Hz. Therefore, the stability of this regenerative load system will be guaranteed for all practical DUT.

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5.8 Simulation Results Figure 5.25 shows the PSpice simulation results, when the low-to-medium frequency damping circuit, Rp=10Q Cp=10uF, and the high frequency damping circuit, R p i = 1Q C p , = 2uF , are added to the regenerative load system with source inductance Ls = 2mH. From Fig. 5.25, we saw that all the waveforms are clean, i.e., there is no potential instability in the system. Finally, the transient response is fast and good, i.e., less than two cycles after the steady-state of DUT. 5.9 Experimental Results Figure 5.26 shows the simulation results, where V s = 32 v RMS (voltage waveform pre-scaled down by 1/3), the source inductance Ls= the leakage inductance of power transformer, the low-to-medium frequency damping circuit Rp=3.3Q Cp=12uF, and the high frequency damping circuit R pl =2Q C pl =2|iF and C dc =680uF. The energy-storage capacitor voltage is set at 100V. The DUT is as that in Fig. 4.10. The output voltage of the DUT is 40 V and the output current of the DUT began with a value of 0.3A, rose up to 2A and fell back again to 0.3A. From Fig. 5.26, we see that all the waveforms are clean, i.e., there is no potential instability in the system.

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145 (a) (b) (c) (d) (e) « "ii . iiv-itmo Fig. 5.25 Simulated current and voltage waveforms for the regenerative load system with utility source inductance Ls =2mh , after both the low-to-medium frequency damping circuit "Rp=10Q Cp=10uT" and high frequency damping circuit "R pl =lQ C pl =2uF" are added. (a) Utility source voltage v s = v(7,3) ; utility source current i s = i(vms) (b) DUT input current i L = i(vm) (c) Current controller current i cc = i(vmc) (d) DUT output voltage v 0 = v(l) ; DUT output current i 0 =i(vmle) (e) Capacitor (Cdc) voltage Vdc = v(71,FGnd) DUT output current changes from a peak value of OA to 10A at the fifth cycle and from 1 OA to OA at the tenth cycle.

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146 (a) 1 L I r i j iHhr I Ch.l Ref. 2 3 (b) 7
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147 5.10 Summary In this chapter, we presented the input impedance specification of DUT for the system stability. At first, the whole regenerative system is transformed into two subsystems, using the proposed equivalent impedance concept. This equivalent impedance concept combines the controlled current source with its associated Z impedance to become an equivalent impedance, Z ea = , where Z is the original impedance and k is the gain of controlled current source. After this equivalent impedance transformation, the whole system can be divided into two equivalent subsystems. These two subsystems are equivalent source subsystem and equivalent DUT subsystem. The two subsystem interaction theorem [57,66] is employed to analyze the stability of the integrated system using the impedance ratio as the equivalent loop-gain of the system. It is found that for the passive DUT load, the phase of the equivalent 2 loop-gain, T m = — — , cannot be worse than ±180° , so the polar plot of the loop-gain ^in T m cannot encircle the (-1,0) point, and the worst possible case is a marginally stable regenerative load system. However, the phase characteristic of the small signal dynamic input impedance of the active DUT (e.g. regulated dc-to-dc converters) is what allows the interaction between the source and DUT subsystems to cause potential stability problems in the system. Additionally, the bandwidth limitation of the current controller has an adverse effect on the system stability.

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148 We found that the addition of a second high frequency damping circuit to the system can increase the stability margin of the system. This two-damping-circuits concept can also be applied to other places of circuit design and is one of the contributions of this study. With the addition of these two damping circuits, low-to-medium frequency damping circuit and high frequency damping circuit, the proposed regenerative load system will have enough stability margin for the practical DUT, even for the case of active power regulators. The simple and enough condition for the system stability is that the magnitude of the input impedance of the DUT needs to be greater than 0.1Q for all the frequency range of interest.

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CHAPTER 6 ACTIVE DAMPING AND COMPENSATION OF THE REACTIVE CURRENT 6.1 Introduction In Chapter 5, the two damping circuits were needed to make the regenerative load system satisfy the DUT input impedance specification. These two damping circuits are Rp,Cp and Rpi,Cpi Since these circuits are passive, they will cause energy dissipation in the resistors Rp and Rpi and decrease the total efficiency of the system. Also, these damping circuits can absorb the capacitive reactive current and cause the power factor of the source current i s to be less than one, i.e., P.F. < 1 .0. The active damping circuit is introduced in Sec. 6.2 to replace the passive damping circuits. The energy consumption in the active damping resistor R p act is restored in the energy storage capacitor C dc . Therefore, the efficiency of the system can be increased. For the compensation of the reactive current in the damping circuits, the current controller needs to supply additional compensation current i comp60Hz t0 balance out the reactive component current produced by the damping circuits at the 149

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150 frequency of 60 Hz. The power factor can then be increased to nearly one, i.e., P.F. * 1.0. The details are presented in Sec. 6.3. The switching frequency of the current controller is f s = 20kHz in this design. The bandwidth of the current controller will, therefore, be smaller than f s according to the sampling theorem [72]. In practice, however, the bandwidth is further limited to approximately — f s [69,70]. This bandwidth limitation will restrict the frequency range of the active damping circuit to the low-to-medium frequency. Hence, only the low-to-medium frequency damping circuit Rp,Cp can be replaced with the active damping circuit. For the high frequency damping circuit Rpi.Cpi the passive damping is still needed. The bandwidth of the current controller is discussed Sec. 6.4. The whole composite control circuit for the active damping and compensation of the reactive current is presented in Sec. 6.5. The validity of this modified current controller design with active damping and reactive current compensation is verified by using a PSpice simulation. The results show that the regenerative load system is still stable and has better overall efficiency and nearly unity power factor, i.e., P.F. « 1.0. 6.2 Active Damping Since the resistor Rp in the passive damping circuit Rp,Cp in Fig. 6.1(a) will dissipate energy, the passive damping circuit can be replaced with an active damping circuit as shown in Fig. 6.1(a), represented by the current source I pacl .

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151 passive damping active damping (a) main system V(7,3) 81 differential amplifier T -» V(81) = 82 :R p.eq Voltage Scale (b) calculation of I re£damp Fig. 6. 1 The active damping circuit.

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152 The current in the active damping circuit, I pact must be equal to I ppassive of the passive damping circuit. Ip.act 1 p. passive (6.1) Therefore, the current controller needs to provide additional current, I p-act . The reference control current I* ef for the current controller will be ^ref — ^i,scale^(^cl + ^in) ^ref.damp (6.2) where the minus sign comes from the direction of I pact opposite to the direction of k(I c i +Ij n )The additional reference control current Iref damp of the active damping will be T — V T 1 ref,damp "-i.scale 1 p.active k T "N.scale 1 ?, passive (6.3) where kj scale = current scale of the current controller Hence, the I p , pa ssive can be calculated as follows

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153 where ' p, passive ^v, scale . , 7 k v, scale ^z.scale ^p K z,scale v(81,0) ~ 7 ^v, scale ^z.scale (6.4) ^p,eq Z p,eq — ^p.eq + p ^z,scale^p SU p,eq v k v = 5 — = voltage scale in Fig. 6.1(b) v,scale v (g 1>0 ) : z,scaie = = impedance scale in Fig. 6.1(b) Z p Since v ^'^ = v ^^'^ as i n Fig. 6.1(b), Eq. (6.4) can also be written as Zp,eq R peq 'p, passive p *v, scale *-z,scale p.eq v(82,0) _ K v, scale lv p,eq ' ^-z.scale v(82 ; 0) . 6 D *-v,scale IP'?)

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Substituting Eq. (6.5) into Eq. (6.3) results in ^ref.damp — v(82,0)k v sca j e ^i.scale P where = v(82,0)A v (6.6) A -k , 1 1 v v.scale R k scale For this design, the following scaling are assumed v — 10 v.scale ~ JU ki.sca.e=0.1 [V/A] and the damping resistor Rp is equal to 10Q. Hence, Av in Eq. (6.6) will be 0.3. In addition, the relation between Zp and Zp,eq leads to Rp.eq = kz,scale R p (6.7)

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155 6.3 Compensation of the Reactive Current In order to balance out the reactive current component of the damping circuit, Zp and Zpi, the current controller must supply another 60 Hz compensation current, 1 comp,60Hz ' such that i comp ,60Hz = idamp.60Hz . as shown in Fig6 4 Then the P ower factor of the utility source current, i s , will approach one, i.e., P.F.w 1.0. Figure 6.2 shows the calculation circuit for the reference 60 Hz compensation current, I refcomp , which is added to the reference control current I* ef of the current controller. The main concern of Fig. 6.2 is that the voltage across the equivalent impedance Z peq and Z p i eq must be 60 Hz pure sinusoidal waveform and in phase with the utility voltage, v s . This voltage, v(59a2,0) in Fig. 6.2(a), is obtained by multiplying the phase locked signal v sr with the scaled down peak value of the source voltage, v(59al,0), as shown in Fig. 6.2(c). The low pass filter in Fig. 6.2(c) is used to filter out the high frequency oscillation noise. Therefore, the voltage v(59a2,0) will be a 60 Hz pure sinusoidal voltage and in phase with the voltage source, v s . The voltage scale between v s and v(59a2,0) is k v scale = v s /v(59a2,0) = 30 for this design. Through a similar derivation process as in Sec. 6.2, the reference 60 Hz compensation current for the current controller is obtained as

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156 differential amplifier sampling S/H full-wave rectifier and low pass filter sample and hold phase-locked loop 50a2 85 C pl.eq tn pl.eq 87 86 88 ref.comp — (a) Fig. 6.2 The calculation circuit for the reference compensation current I (a) Block diagram (b) Sampling control logic (c) Full-wave rectifier and low pass filter

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157 0.02ms 15 n 81 differential amplifier differential buffer amplifier 57 4>HWV Fig. 6.2 The calculation circuit for the reference compensation current ^ . (b) Sampling control logic (c) Full-wave rectifier and low pass filter

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158 1 ref ,zp.60Hz v(85,0)k v sca)e — — k , sca [ e (6.9) p = v(86,0) in Fig. 6.2(a) \ ref ,zpl.60Hz = v(87,0)k v scale — — k j sca i e (6. 1 0) K pl = v(88,0) in Fig. 6.2(a) where V k v sca)e = voltage scale = 5 =30 used in this design v(59a2,0) kj scale = current scale = ref ' comp = 0.1(v/a) used in this design ^comp Also, the relation between Z p and Z pl eq is as follows ^pl.eq = ^z,scale R pl (6.1 1) 1 ^pl,eq^7 C pl ( 612 ) K z.scale scale = P ' eq = impedance scale

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159 6.4 Bandwidth of the Current Controller From Eq. (4.6), it can be seen that the bandwidth of the current controller could be as high as f B = ^-^r^ 2 = 30kHz (6.13) 2n L 2 However, according to the sampling theorem [72], the bandwidth of the current controller will be limited to half of its switching frequency as f B <^f s = 10kHz (6.14) where f s = 20kHz is the PWM switching frequency . In practice, the bandwidth of the current controller is further reduced in Eq. (6.15) [69] f B *If s (6.15) Figure 6.3 shows the PSpice simulation results of the current controller. In Fig. 6.3(a), the frequency of the control current I* ef is set at f = 2kHz, where we noted that the output current waveform of the current controller becomes triangular and distorted. If the frequency is decreased to f = 1 .5 kHz, the output current waveform in Fig. 6.3(b) still shows notable distortion.

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Fig. 6.3 Simulation results of the bandwidth of the current controller. (a) Reference control current I* ef at f = 2 kHz (b) Output current of current controller at f = 2 kHz (c) Reference control current I* ef at f = 1.5 kHz (d) Output current of current controller at f = 1 .5 kHz (e) Reference control current I* ef at f = 1 kHz (f) Output current of current controller at f = 1 kHz

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161 When the frequency is further reduced to f = 1kHz, the result in Fig. 6.3(c) shows that the output current waveform is almost sinusoidal and the distortion is small. Therefore, the actual bandwidth of this current controller will be slightly higher than 1 kHz, based on the distortion criterion f B *UkHz (6.16) This bandwidth limitation of the current controller will restrict the emulation of the active damping circuit to only the low-to-medium frequency damping, i.e., Rp,Cp circuit. However, for the high frequency damping, the passive damping circuit Rpi Cpi is still needed, as described in the following section. 6.5 Combination of the Active Damping and Compensation of the Reactive Current The active damping circuit and the compensation of reactive current can be combined together and built into the current controller as shown in Fig. 6.4. Because of the bandwidth limitation of the current controller, f B W « 1.1 kHz, only the low-tomedium frequency damping circuit Rp,Cp can be built as an active damping circuit. The high frequency damping circuit Rp^Cpi still needs to remain as a passive circuit.

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162 passive high freq. damping V(7,3) *2 ( Kdci + yKu-i. (Fig. 3.7) (Fig. 6.2) (Fig. 6.1) retcomp,60Hz ref.damp.Zp +T T_ (b) Fig. 6.4 The incorporation of active damping and compensation of reactive current into the current controller. (a) main power circuit (b) calcuation circuit for the reference control current I,. * ret

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163 Figure 6.4(a) shows the block diagram of the main power circuit of the regenerative load system. The calculation circuit for the reference control current I* ef , is shown in Fig. 6.4(b) where I* ef consists of three components. ^ref — ki,scalekOcl + Ij n ) + ^ ref ,comp,60Hz 1 ref ,damp,zp (6-17) where ki.scale = current scale of the current controller The minus sign in front of Iref^amp.zp ' s due t0 tne reference direction of the I ref damp zp and is downward, opposite to the reference direction of the controller. The value of the equivalent impedance Z peq in Sec. 6.3 is determined as follows Zp,eq ~ Rp.eq + ~ ~ k z , sca | e (R p + ~ ) (6.18) S^p.eq SC p For k z,scaie = 100 > men R P .eq and C peq are R peq = 100R p = 1 kQ C^-^Cp-O-liiF (6.19)

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164 Similarly, using k zsca , e = 10, the R pleq and C pUq in the compensation current calculation circuit are R pleq =10R p = ion C p ,, eq =^C p = 0.2uF (6.20) However, due to the bandwidth limitation of the current controller, the actual value of c P ,eq adopted is C p , eq = 0.2uF C p = 20uF (6.21) Therefore, the 3dB frequency of the active damping circuit will be f _ 3dB 27iR peq C peq 2nR p C p 796 Hz (6.22) This f 3dB frequency is within the bandwidth of the current controller . This composite circuit has two advantages: (1) a nearly unit power factor, P.F.« 1.0, of the source current, i s , due to the compensation of the reactive current and (2) low energy dissipation in the damping circuit, because the only energy dissipation in

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165 the passive damping circuit Rpi Cpi is less than 0.1 W. These advantages are verified through PSpice simulation. 6.6 Simulation Results Figure 6.5 shows the simulation results, using PSpice software, where the active damping circuit Cp=20uF, Rp=10Q, high frequency passive damping circuit Cpi=2uF, Rpi=lQ, with the reactive current compensation. The value of capacitance Cp is changed from the original lOuF to 20uF because of the bandwidth limitation of the current controller. If the Cp=10uF is used, the f 3dB of the active damping circuit will be f 1 1 3dB 27TR p C p 27r.xl0xl0xl(T 6 s 1.6 kHz (6.23) This frequency is higher than the actual bandwidth of the current controller, f Bw * 1.1 kHz as in Eq. (6.16). Hence, the PSpice simulation shows an instability phenomenon. If Cp=20uF is used, the f 3dB will be approximately 0.8 kHz, within in the bandwidth of the current controller. However, the replacement of Cp=10uF with 20uF

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166 Fig. 6.5 Simulated results of the regenerative load system with the active damping and compensation of reactive current components. The DUT is non-regulated. (a) Utility source voltage v s = v(7,3) ; utility source current i s = i(vms) (b) DUT input current i L = i(vm) (c) Current controller current i cc = i(vmc) (d) DUT output voltage v 0 = v(l) ; DUT output current i 0 = i(vmle) (e) Capacitor (Cdc) voltage Vdc = v(71,FGnd) DUT output current changes from a peak value of OA to 10A at the fifth cycle and from 10A to OA at the tenth cycle.

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167 is equivalent to the replacement of C p eq = 0.1 uF with 0.2uF. The cost of the circuit almost remains unchanged. The simulation results of Fig. 6.5 show that the reactive current component of utility source current, i s , is very small and the power factor is nearly one, i.e., P.F.« 1.0. In addition, the power dissipation in the passive high frequency damping circuit is less than 0. 1 W. In Fig. 6.6, the DUT is replaced with a regulated Buck converter. This is seen from the output voltage v(5) in the simulation of the Buck converter, which remains constant during the transient response. Also, the regenerative load system is stable, even though the dynamic small signal resistance of the regulated Buck converter is negative in the low -to-medium frequency range [60,61]. 6.7 Summary Because the damping circuit is used to stabilize the regenerative load system, these conventional passive damping circuits will have power dissipation and also produce line frequency (60 Hz) reactive current. Therefore, the overall efficiency of the system will be decreased and the power factor of the utility source current, i s , is reduced. In this chapter, an active damping technique was proposed, using the impedance emulator concept to absorb the power into the energy storage capacitor Cdc and reuse it. Hence, the overall efficiency of the system can be increased. Owing to the bandwidth limitation of the current controller, only the low-to-medium frequency damping circuit can be replaced with the active damping circuit. However, the

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168 (a) (b) (c) (d) (e) « v."i • Fig. 6.6 Simulated results of the regenerative load system with the active damping and compensation of reactive current components. However the DUT is regulated "Buck" converter. (a) Utility source voltage v s = v(7,3) ; utility source current i s = i(vms) (b) DUT input current i L = i(vm) (c) Current controller current i cc = i(vmc) (d) DUT output voltage v 0 = v( 1 ); DUT output current i 0 =i(vmle) (e) Capacitor (Cdc) voltage Vdc = v(71,FGnd) DUT output current changes from a peak value of OA to 10A at the fifth cycle and from 10A to OA at the tenth cycle.

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remaining passive high frequency damping circuit has power dissipation less than 0.1 W. In addition, the line frequency (60 Hz) reactive current in the damping circuit can also be compensated by the compensation current supplied from the current controller. Both the active damping and the compensation of the line frequency reactive current can be built into the current controller, using the superposition principle. The merits of this composite design are (1) an increase in the overall system efficiency and (2) an increase of the power factor of the utility source current to nearly one. The feasibility of this scheme is verified by PSpice simulation. The results demonstrate that the integrated system is stable even during the transient response and nearly unity power factor of the utility source current is obtained. Also, the overall efficiency is improved.

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CHAPTER 7 CONCLUSIONS AND FUTURE WORKS 7.1 Conclusions This dissertation has presented the analysis and design of the regenerative load system. This system consists of two parts: (1) an impedance emulator and (2) an inverter with power filtering function. The proposed system can be used for long-term testing of power equipment and motor-generator set and has the following merits. 1. Economic, because of the recycle of electrical energy, the energy consumption will be less than 20% of the conventional load. If the soft switching scheme is employed for the converters, the energy dissipation can be even lower than 10%. 2. Safety, due to the low energy dissipation, no appreciable Joule heating is observed. 3. Power quality, since the current of the utility source is shaped into pure sinusoidal waveform with p.f. « 1.0, problems such as harmonic currents and EMI will be greatly reduced. In Chapter 2, a new APF technique is proposed, using integration of power and a sampling technique to simplify the calculation of the real fundamental component of the load current. Also, the energy-balance concept in the energy-storage capacitor is used to simplify the design of the conventional APF-capacitor-voltage-control circuit. The merits of this APF are (1) the calculation of the current i s (t) required by the utility source is simplified; (2) a larger ripple voltage can be tolerated in the energy 170

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171 storage capacitor, therefore, a smaller energy storage capacitor is needed; and (3) only a proportional capacitor-voltage-control method is applied in the controller design. Hence, the transient response is fast and good (less than two cycles of 60 Hz). For the stability analysis of the regenerative load system, we found that with the existence of utility source inductance, L s , the system will become unstable. After the addition of a damping circuit, the system can be stabilized. However, even with the addition of a damping circuit, the current gain of the APF must be kept below one, i.e., k < 1.0, for the stability of the regenerative load system. The reason for this phenomenon is that if the current gain of the current controller is larger than one, the system will be a positive-feedback system with loop-gain greater than one. Under this condition, this system is unstable. This conclusion has been verified by using the rootlocus analysis and PSpice simulation. Therefore, the criterion for a stable APF or regenerative load system is that the damping circuit must be added, and at the same time, the current gain of the current controller needs to be smaller than one, i.e., k < 1 . In order to generate the input impedance specification of the DUT for the system stability, the whole system is transformed into two subsystems using the proposed equivalent circuit concept. This equivalent circuit concept is to merge the controlled current source into the associated impedance to form an equivalent 2 impedance, Z eq = , where Z is the original impedance and k is the gain of the (1 — k) controlled current source. Therefore, the system can be divided easily into two subsystems. Thus the two subsystem interaction theorem [57,66] can be employed to analyze the system stability. In Chapter 5, a methodology for deriving the DUT input

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172 . impedance specification is presented. We also found that the addition of a second high frequency damping circuit can increase the stability margin. This two-dampingcircuits concept is a new contribution of this work and can be applied to other places of circuit design. With these two damping circuits added, it is guaranteed that the whole system will be stable for all practical DUT. The conventional passive damping circuits will consume energy and decrease the overall system efficiency. In addition, the passive damping circuits can absorb the reactive current and degrade the power factor of utility current. Therefore, in Chapter 6, an active damping circuit is proposed to replace the passive one. Due to the bandwidth limitation of the controlled current source, only the low-to-medium frequency damping circuit can be replaced with the active damping circuit. The high frequency damping circuit is still passive. However, the power dissipation of this damping circuit is less than 0.1W. In addition, the reactive current of the damping circuits is compensated by the compensation current supplied from the current controller. The merits of this composite current controller design are (1) the increase of the system efficiency and (2) the power factor of the utility source can be increased to nearly one, i.e., p.f. * 1.0. Further research is recommended in the following areas: • Design of the bandwidth of the Active Power Filter and analysis of the system stability using more detailed current-controller model. • Investigation of the pole placement as an alternative analysis and design method.

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BIOGRAPHICAL SKETCH ChinYuan Hsu was born on January 21, 1948, in Nanking, China. He received the B.S. and M.S. degrees in electrical engineering from the National Cheng-Kung University, Taiwan, R.O.C., in 1970 and 1972, respectively. He is an associate professor with the National Kaohsiung Institute of Technology, Dept. of Electrical Engineering, Taiwan, R.O.C. 180

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I certify that I have read this study and that in my opinion it conforms to acceptable standards of scholarly presentation and is fully adequate, in scope and quality, as a dissertation for the degree of Doctor of Philosophy. Khai D. T. Ngo, Chairman' Associate Professor of Electrical and Computer Engineering I certify that I have read this study and that in my opinion it conforms to acceptable standards of scholarly presentation and is fully adequate, in scope and quality, as a dissertation for the degree of Doctor of Philosophy. Sheng S. Li Professor of Electrical and Computer Engineering I certify that I have read this study and that in my opinion it conforms to acceptable standards of scholarly presentation and is fully adequate, in scope and quality, as a dissertation for the degree of Doctor of Philosophy. Dennis P. Carroll Professor of Electrical and Computer Engineering I certify that I have read this study and that in my opinion it conforms to acceptable standards of scholarly presentation and is fully adequate, in scope and quality, as a dissertation for the degree of Doctor of Philosophy. Alexander Domijan Associate Professor of Electrical and Computer Engineering

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I certify that I have read this study and that in my opinion it conforms to acceptable standards of scholarly presentation and is fully adequate, in scope and quality, as a dissertation for the degree of Doctor of Philosophy. B. L. Capehart Professor of Industrial an Systems Engineering This dissertation was submitted to the Graduate Faculty of the College of Engineering and to the Graduate School and was accepted as partial fulfillment of the requirements for the degree of Doctor of Philosophy. August 1996 Winfred M. Phillips Dean, College of Engineering Karen A. Holbrook Dean, Graduate School