Citation
A methodology for physical modeling of high-voltage/power integrated-circuit devices for circuit simulation

Material Information

Title:
A methodology for physical modeling of high-voltage/power integrated-circuit devices for circuit simulation
Creator:
McDonald, Robert James, 1954-
Publication Date:
Language:
English
Physical Description:
vii, 158 leaves : ill. ; 28 cm.

Subjects

Subjects / Keywords:
Anodes ( jstor )
Cathodes ( jstor )
Electric current ( jstor )
Electric potential ( jstor )
Electrons ( jstor )
Latch up ( jstor )
Modeling ( jstor )
Narrative devices ( jstor )
Simulations ( jstor )
Spices ( jstor )
Diodes, Switching -- Mathematical models ( lcsh )
Dissertations, Academic -- Electrical Engineering -- UF
Electrical Engineering thesis Ph. D
Integrated circuits ( lcsh )
Transistors ( lcsh )
Genre:
bibliography ( marcgt )
theses ( marcgt )
non-fiction ( marcgt )

Notes

Thesis:
Thesis (Ph. D.)--University of Florida, 1987.
Bibliography:
Includes bibliographical references.
Additional Physical Form:
Also available online.
General Note:
Typescript.
General Note:
Vita.
Statement of Responsibility:
by Robert James McDonald.

Record Information

Source Institution:
University of Florida
Rights Management:
All applicable rights reserved by the source institution and holding location.
Resource Identifier:
0023923904 ( ALEPH )
19473937 ( OCLC )

Downloads

This item has the following downloads:


Full Text












A METHODOLOGY FOR PHYSICAL MODELING OF

HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICES FOR CIRCUIT SIMULATION








By



ROBERT JAMES MCDONALD











A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL

OF THE UNIVERSITY OF FLORIDA IN

PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY



UNIVERSITY OF FLORIDA 1987































it is a tale told by an idiot, full of sound and fury, signifying nothing.


Shakespeare




















ACKNOWLEDGMENTS

The support of the IEC at the University of Florida, the NSF, and the SRC is acknowledged.

The technical guidance of Dr. M. A. Shibib of AT&T Bell Laboratories in designing and fabricating the special test structures used in this dissertation is appreciated. His participation on the qualifying exam and on the final defense also merits a note of gratitude.











TABLE OF CONTENTS





ACKNOWLEDGEMENTS ........................................

ABSTRACT ................................................. vi

CHAPTERS

1 INTRODUCTION ............................................ 1

2 A PHYSICAL MYDEL fOR THE CONDUCTANCE
OF LATERAL p pnpn STRUCTURES FOR HVICs ................. 7

2.1 Introduction ......................................... 7
2.2 Model Development ........ ............................ 9
2.3 Physical Insight (Simplified Model) ................. 20
2.4 Experimental Corroboration and Discussion ........... 27
2.5 Summary ............................................. 39

3 CHARGE-CONTROL ANALYSIS OF THE IGBT
TURN-OFF TRANSIENT ..................................... 40

3.1 Introduction ........................................ 40
3.2 Model ... ... *-, 44
3.3 Discussion ..... .. ..... ........ 58

4 HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICE
MODELING--A FIRST APPROACH ............................. 64

4.1 Introduction ........................................ 64
4.2 Modeling Methodology ................................ 67
4.3 SPICE Simulations and Discussion .................... 81
4.4 Summary ............................................. 95

5 HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICE
MODELING ............................................... 97

5.1 Introduction ........................................ 97
5.2 Modeling Methodology ............................... 100
5.3 Application/Demonstration ........................... 109
5.4 Simulation/Verification ............................ 121
5.5 Summary

6 SUMMARY AND CONCLUSIONS WITH RECOMMENDATIONS .......... 134


iv









6.1 Summary and Conclusions.............................. 134
6.2 Recommendations.............................................. 136

APPENDICES

A HIGH CURRENT CARRIER TRANSPORT IN WIDE-BASE BJTs .......139 B UDCS/SLICE/SPICE MODEL IMPLEMENTATION................... 142

REFERENCES.................................................. 152

BIOGRAPHICAL SKETCH........................................ 158































V















Abstract of Dissertation Presented to the Graduate School of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy


A METHODOLOGY FOR PHYSICAL MODELING OF
HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICES FOR CIRCUIT SIMULATION


By


ROBERT JAMES MCDONALD


December 1987


Chairman: Dr. J.G. Fossum
Major Department: Electrical Engineering



This dissertation presents a modeling methodology for the construction of physical network representations for high-voltage/power integrated-circuit (HV/P IC) devices. The effects of multidimensional carrier flow, base-region conductivity modulation, significant emitter recombination, nonreciprocal transcapacitance, and the onset of latch-up (static and dynamic), heretofore unaccounted for in

empirical circuit models, are physically accounted for in our charge-based formalism. The methodology is applied to vi









a representative HV/P IC device, the LIGBT, and the derived model is implemented in SPICE via user-defined controlled sources (UDCSs).

The methodology is supported by rigorous theoretical analyses of several HV/P IC devices, two-dimensional numerical device simulations with PISCES, and experimental results obtained from specially fabricated test structures. The resulting physical network representations, in addition to the CAD ability they afford, will facilitate optimal device (process) design under an actual circuit (transient) environment, a capability that most device simulators do not have.




















vii
















CHAPTER 1
INTRODUCTION



The field of high-voltage and power integrated

circuits is a rapidly emerging and expanding technology. Three basic processing efforts have made high-voltage/power (HV/P) devices practical for circuit integration: one, the advent of a lateral, double-diffused MOS (DMOS) process [De86], which produced integrated high-speed, high-voltage display drivers; two, improved isolation techniques, such as dielectric isolation [Be85, Sh80] and field reduction techniques such as RESURF [Ap79], which reduced parasitic interactions and provided higher breakdown voltages; three, the functional integration of bipolar and MOS devices [Ru83J, which dramatically lowered device on-resistance and consequently increased the power handling capability of HV/P integrated circuits (ICs), while maintaining the advantages of the MOS gate. However, although great

strides in the process technology of HV/P ICs have taken place, the area of circuit modeling for

computer-aided-design (CAD) of HV/P ICs, especially for






2

those ICs employing MOS-controlled bipolar devices, has been at a near standstill. Common high-injection effects, such as conductivity modulation and enhanced back injection, are not properly accounted for in existing, empirical circuit models for HV/P devices [Pa86]. Furthermore, these models vitually ignore multidimensional carrier flow, which is typical in integrated HV/P devices. Thus, there exists a need for developing new physically based models for HV/P devices and implementing these models in a circuit simulator, e.g., SPICE [Na75J.

This dissertation is concerned with the development and implementation of network representations for a general class of merged 7405-controlled bipolar structures, e.g., the lateral insulated-gate bipolar transistor (LIGBT) [Da84, Si85]. The major contributions made in this work are as follows:

(1) the general formulation and solution of the

steady-state transport problem for the

basic p + ppn + structure, in terms

of quasi-Fermi level potentials, explicitly

showing the effect of the p punch-through

shield on the transport problem;

(2) the physical (charge-control) characterization of

the IGBT turn-off transient, clearly identifying

the device parameters controlling the important

charging mechanisms;







3


(3) the development and experimental verification

of a physical (charge-based) methodology for

modeling HV/P IC structures including the effects of multidimensional carrier flow, base-region conductivity modulation, and

enhanced back injection;

(4) the implementation of the LIGBT model into SPICE

through user-defined controlled sources (UDCSs)

with implicit characterizations and numerical

representations for transconductances and

transcapacitances.

In Chapter 2, we develop analytic models for the steady-state forward current-voltage characteristic of a (p +pnpn +) gated-diode switch (GDS) [We823. The models, which apply generally to gated bipolar switches, are based on a system of equations derived from basic pin-diode theory. They provide physical insight into GDS operation and suggest optimal design criteria to minimize the dc and incremental resistances at high currents. measured data taken from a variety of GDS test structures are discussed in support of the models.

In Chapter 3, a quasi-static charge-control analysis of the unique transient turn-off characteristic of the IGBT [Be85] is developed. The analysis describes the transient behavior in terms of steady-on-state current components that flow in the constituent MOSFET and BJT in the basic






4


IGBT structure. The effects of the expanding depletion region at the cathode and of minority-carrier injection into the anode are properly accounted for. Consequently the physics underlying the turn-off time is clarified, and device design criteria for shortening it, without considerably degrading the on-state current conduction capability, are suggested.

In Chapter 4, a novel methodology for flexible SPICE implementation of Ohysical models for HV/P devices, accounting for their unique characteristics, is presented and demonstrated. The implementation is achieved, without having to modify the simulator code, by utilizing UDCSs that reference a subroutine which defines, not necessarily in explicit form, the system of model equations. The simultaneous solution of the equations, which describes the integrated charges in the device and the quasi-static terminal currents in terms of the terminal voltages, is effected by the SPICE2 nodel analysis. The methodolgy is exemplified by modeling a particular high-voltage device, the IGBT, in which conductivity modulation and latch-up are accounted for. SPICE simulations of dc and transient characteritics of IGBT switching circuits are discussed and shown to be representative of measurements. The flexibility of the modeling methodolgy for HV/P IC CAD is demonstrated by simulating effects of both static and dymanic latch-up in the merged bipolar/MOS structure of the IGBT.







5


In Chapter 5, to enable CAD of power integrated circuits, new physical models for lateral HV/P devices, in particular LIGBT [Da84, Si85, Mu87] structures, are developed and implemented in SPICE. The models are charge-based, and, via regional partitioning, account for the unique features of HV/P devices unaccounted for in conventional equivalent-circuit models. The implementation of the models in the circuit simulator is flexible and allows these features (e.g., multidimensional carrier flow, conductivity modulation, latch-up, transcapacitance) to be simulated without having to sacrifice much physics through excessive empiricism. Device measurements of specially designed test structures, supplemented with two-dimensional numerical device simulations, support the modeling methodology and the model parameter extraction.

We summarize, in Chapter 6, the main conclusions and accomplishments of this dissertation. We also suggest ideas and avenues for future research.

In Appendix A, we briefly describe high-current carrier transport in wide-base transistor structures. The resulting simplified model predicts a fundamental difference for the high-current Os of pnp and npn transistors. The physical insight afforded by the simplified analysis will be useful for device engineers designing complementary IGBTS.






6


In Appendix B, we briefly overview a representative UDCS SLICE/SPICE implementation of a charge-based network representation for a wide-base, low-0 pnp bipolar transistor, a key model in the methodology for modeling

HV/P devices as dicussed in Chapter 5.

















CHAPTER 2
A PHYSICAL MODE, FOR THE CONDUCTANCE
OF LATERAL p +pitpn IrSTRUCTURES FOR HVICs



2.1 Introduction


This chapter concerns the forward, steady-state current-voltage characteristics I(VA) of a p +pnpn+ structure, the GDS [We82,Ha8l], used in HVICs. We develop an analytic model for I(V A) based on a one-dimensional regional representation of the device. The model yields physical descriptions of R ON (=AVA/AI) and the dc resistance R DC (=V A/I) at high operating currents where these resistances must be minimized to ensure efficient GDS operation ESm82]. Such minimization is aided by the model, which clearly identifies the underlying physical mechanisms and the associated parameters.

The resulting model also has applications to other HV/P IC devices employing punch-through shields (aka buffer regions) for which the development of effective and efficient network models for circuit simulation is of primary interest. In addition, the proper modeling of the


7






8


anode and cathode recombination, when high-injection obtains in the low doped-base region, provides the impetus for developing a new BJT model as derived in Chapters 4 and

5 and highlighted in Appendix A.

The gated diode switch (GDS), illustrated in Figure 2-1, is a dielectrically isolated high-voltage integrated circuit silicon device used in monolithic crosspoint arrays applicable to telephone switching networks. The device is basically a PIN-diode with an n + gate in the i(nt) region and p shields surrounding the p + anode and the n + cathode. The n +gate facilitates the turn-off of the switch, but does not affect the forward bias (ON) characteristics, which closely resemble those of a PIN-diode at high-current levels. The cathode shield prevents punch-through between the gate and the cathode in the off-state, and has been shown to limit the injection of electrons into the nt region and hence increases the incremental on-resistence of the device [Sm82]. The "anode shield" facilitates a reliable contact to the anode, but does not provide any electrical benefit.

our one-dimensional analytic model, which can be applied generally to gated bipolar switches, and hence has application to HV/P ICs, is based on a system of equations derived from previously developed PIN-diode theory [Ha52,He68,F157,Be79] for high-injection conditions. The equations are solved numerically to yield the desired I( VA)







9


characteristic. The model is more useful as an engineering-design aid than is a direct numerical solution of the fundamental carrier transport equations (Sm82] because it is simpler and because it affords physical insight. The role of the cathode p-shield, as well as those of the n + cathode, the p + anode, and the n region, in defining I(VA) is clearly described by the model, thereby aiding optimal GDS design.

The physical insight provided is utilized to develop an even simpler model, valid for high currents at which R ON and R DC are of interest, that requires n o recourse to numerical techniques. This model, although not as accurate as the other, is useful because it enables quick

assessments of possible device design modifications not only for the GDS, but also, as shown in Appendix A, for the BJT portion of the LIGBT. The models are supported by

measured data taken from a variety of GDS structures fabricated at Bell Laboratories (Reading).



2.2 model Development


The structure of the GDS, fabricated in a "tub" of dielectrically isolated (DI) silicon, is illustrated in Figure 2-1. Because the (anode-cathode) length is typically much longer than the tub thickness, the one-dimensional p + pnpn + model, also shown in Figure 2-1, for the GDS is representative of the basic operation of the





10




Anode Gate Cathode

T nnt

Tr Si1
[Si~g


Poly-Si Substratel I I
I I
I 1
I I
+ +

Anode po- P p T p n+ Cathode


-x W
0




Figure 2-1. Gated-diode switch (GDS) cross section and
corresponding one-dimensional model.







11


device. We are interested in t he steady-state current-voltage characteristic of the GDS with the gate floating; the gate can therefore be ignored in the one-dimensional model.

In our development of the physical model, we use the quasi-Fermi levels to link the anode-cathode terminal conditions to the internal device physics. This approach facilitates physical insight into the operation of the device, especially with regard to how changes in excitation (carrier injection) at the cathode affect the excitation and recombination current at the anode. The energy-band diagram for a forward-biased GDS is shown in Figure 2-2. It implies how the applied anode-cathode voltage defines the hole and electron quasi-Fermi levels, E Fp and E Fn' and hence the carrier density and electric field in the device.

The applied voltage (VA>O) equals the sum of the internal voltage drops:




V Vp p + Vpn + V + Vnp + Vpn (2-1)
A J J J J




where VP P is the drop across the high-low junction in the
J
anode, which is virtually zero because the p shield is doped high enough to prevent high-injection for all normal operating conditions; VPn is the drop across the p-n






12









pn












PP w
AEFA E~p E,



0W















Figure 2-2. Energy-band diagram for a forward-biased
GDS.







13

junction near the anode; V is the drop across the i region; VRp is the drop across the i-p junction near the
J +
cathode; and Vpn is the drop across the p shield-cathode
J
junction. Referring to Figure 2-2 and assuming high-injection (p=n>>NAn) where NAn is the acceptor doping density) in the n region, we have then from (2-1)



AEFA AEFC
qVA +----- + + EFn qVK (2-2)




where AE FA and AE FC are the E Fn-E Fp separations at the pand i-p junctions respectively, and AE Fn is the change in EFn across the p shield at the cathode. We assume that the majority-hole quasi-Fermi level is virtually flat across the p shield, in which the injection level is low; thus qv n +=EFn+AEFc. In deriving (2-2) we used the quasi-equilibrium relations qVp'=-E /2-(kT)In(NA/n and
qvnP =AE c/2+(kT)In(NA /ni)

Hence for a given GDS current density J, A FA' EFC, AEFn, and V must be determined before (2-2) can be used to give the desired J(VA) characteristic. These

determinations are made by incorporating into basic PIN-diode theory a model for carrier transport in the p shield, which reduces the injection of electrons into the R region.






14


To account for the effect of the shield, i.e., to define AEFn, we neglect recombination in the shield, which is typically much less than the carrier fluxes through the shield. Then AE Fn can be related to the electron current density JS flowing in the shield, which constitues part of the total current density J described by basic PIN-diode theory.

For simplicity, we assume an (effective) uniformly doped shield. Since the shield-cathode junction is in low injection, the uniform-doping assumption implies that JN is diffusion current, which is nearly constant:


2
S qDn EFc EFn
JN = qR_ N eXp(--R)[exp(--) 1] (2-3)
N nS AWS


where D n is the (average) electron diffusion coefficient in the shield, N A is the (- peak) doping density, and W is the (effective) width of the shield. From (2-3),


JS Fexp(- AE F
EFn = kT n[l + j~ T)] (2-4)
kTn
i



where

kTNAWS
FS qDn (2-5)







15


is a shield factor that can be used to relate AE Fn to the

actual properties of the (diffused or implanted) p shield.

To relate F Sto an actual p shield in which N Avaries, note that generally



kTJ5 sJ dx ,(2-6)
AFn 21q N D n(x)n(x)
(shield)


and that n(x)-l/N A(x). Since the greatest contribution to the integral in (2-6) comes from the region of the shield where NA()is a aiu adDn(x) a minimum), F S in (2-5)

can be evaluated for this region, the width W S of which can be estimated from the actual N A(x).

We now incorporate (2-4) into basic PIN-diode theory to characterize the conduction properties of the GDS. This involves generating a system of equations, the simultaneous solution of which for a specified J yields AE Fn' AE FA,

AE C'V ,V A The resulting J(V A) characteristic, with the cross-sectional area A (I=JA), then defines R DCand RON We note, based on results of calculations discussed in Section 2.4, that typically AE Fn_ kT, which means that the shield reduces considerably the carrier injection level in the n region near the cathode and hence increases R DC and R ON*






16


The carrier transport (drift, diffusion, and recombination) in the n region is defined by the ambipolar transport equation [Ha52,He68]



d n n = 0 (2-7)
dx LA



where



kT PnP p )0] 1/2 (2-8)
L A = 2 [-q( Pn+/Jp0





In writing (2-7), we have assumed, in addition to high injection (p=n), that the electron and hole mobilities, in and pn' are constant, and that the electron and hole (SHR) recombination times are equal (to T0) and constant. Effects of carrier-carrier scattering [Gh771 and band-band Auger recombination [Gh77], which tend to invalidate these assumptions, will be discussed later.

The high-injection assumption, which requires that TO be long enough to avoid space-charge-limited flow [Ba70], is not restrictive with regard to modeling RDC and RON. These resistances are defined for the GDS at relatively high values of J, which for typical values of T0 ensure high-injection levels. The boundary conditions for (2-7)






17

are thus simplified to


SE FA
p(0) = n(0) = niexp(-ky ) (2-9)




and



p(W) = n(W) = niexp( EFC) (2-10)




where x=0 and x=W denote the anode and cathode ends of the n region, the length of which is W (see Figure 2-1). The solution to (2-7) is then


n(0)sinh(W- ) + n(W)sinh( x) p(x) = n(x) L A A (2-11)
sinh(-.W(2-11) sinh( -)
A


This solution is coupled to the carrier transport in the anode and cathode by defining the minority-carrier recombination currents in those regions. In the p+p anode, this current, which can be expressed as [Fo81]




A AEFA (2-12)
JN = JNOexp(--)






18

is supported by electron injection from the n region:



b j 2kTpnqp dn
J=J(0) = J + +P d
= N0 = + p x x=0 (2-13)




where bAp n/p The expression for J (0) in (2-13),

which is evaluated using (2-11), derives [F157] from J=J N+Jp with p=n. In the n+ cathode, the hole recombination current can be expressed as [Fo81]



C AE +AE
Jp = JP0exp( FC +Fn) (2-14)
kT



and is supported by hole injection from the n region [F157]:



C 1 2kTnPp dn
.. .. (-J n+p [x+ x=W (2-15)
P", P- B-+T I~P lx=W




In (2-12) and (2-14), JNO and JPO are constant

parameters (saturation current densities) that are defined by the properties of the heavily doped anode and cathode [Fo811.






19


Combining (2-4) with (2-12)-(2-15), we obtain the following system of three equations in the three unknowns, AEFA, AEFC, AEFn:


AEFA b FC AE FA W
JN0exp(-T-)=b--)J+[exp(7 -)-exp( --)cosh() ],
A

(2-16)






EFC +EFn b FC EFA
JP0exp( kT ) =[+Blexp(7-F)-exp(2]FT-)cosh( '
kT L A

(2-17)



where


-EFC EFn FS
AEFn=kTln{l+[Jexp(--R )-Jp0exp(-kn)] _-2} (2-18) kTn.
1



p=2kTniPnp /LA(n+ p)sinh(W/LA). To solve the system, we must specify JPO' JNO' W, -r0, and FS. Then, for a given J, a suitable numerical method must be used to derive AEFA, AEFC, AEFn. We have used an IMSL subroutine to solve the system with a high degree of accuracy. From the solution n(x), JN A, and JNC are determined.







20


To generate the J(VA) characteristic, we must now determine V ., which is the integral of the electric field across the n region. Again using basic PIN-diode theory [Ha52,He68], we have




j W dx + kb- T ln[n(0),.
n p 0 q n(W) (2-19)





The integration in (2-19) can be done analytically. Thus the combination of (2-19) with (2-9) and (2-10) defines, for a given J, V Our characterization of J(VA) is then given by (2-1), (2-16)-(2-18), and (19), the solution of which must be obtained numerically. Representative results will be presented in Section 2.4.



2.3 Physical Insight (Simplified Model)


A numerical solution to the system of equations described in Section 2.2 is not necessary to gain useful physical insight into the GDS operation. In this section we describe this insight, and in doing so define a simpler analytic model for J(VA) that is valid for high values of J (100-1000 A/cm 2) of practical concern.

The total current J is the sum of the recombination currents in the p+p anode, n, and n+ cathode regions






21


[He68]:



A jC
J = JA + Ji + i
T p (2-20)





From (2-9), (2-10), (2-12), and (2-14), we see that JNA and jpC are proportional to [n(0)]2 and [n(W)]2 respectively. In contrast, using (2-11) we see that



W n(x)dx -Wn
z 1qf 22 = 20 (2-21)
0



where

L cosh( W)-l}
LA A [n(0)+n(w)] (2-22)


A


is an average carrier density in the n region. Thus as J increases, a larger portion of the current is supported by recombination in the anode and cathode regions; J becomes negligible. Furthermore, since dn/dx -n, as can be seen by differentiating (2-11), the diffusion current in the n region becomes negligible as J increases [He68I; the holes and electrons predominantly drift across the n region.






22


Therefore for sufficiently high J, (2-13) and (2-15) can be simplified IHe68] to



SA b (2-23)
N BT




and



SC 11 (2-24)





These simplifications can be easily checked for self-consistency with presumed high values of J using the model in Section 2.2. In fact it can be shown that for a given J, (2-23) and (2-24), with (2-12) and (2-14), yield valid approximations for AE FA and (AE FC +AEFN ) even when the diffusion current in the nt region, reflected by the second terms in (13) and (15), is comparable to the drift current.

The approximation (2-24) 'enables an additional

simplification regarding AE Fn across the p shield. Combining (14), (18), and (24) yields




AE "1 Ln 21 PO2-5
Fn ~kTn 2(-5







23




Hence for sufficiently high J, AE Fn is a constant, independent of J as well as W and parameters associated with the anode.

The approximations (2-23)-(2-25) are insightful. They imply that for a given high J, the injection level in the n region near the anode, i.e., n(O), is defined primarily by J NO' and that the injection level near the cathode, i.e., n(W), is defined primarily by J PO and F S, This means that Vpn is independent of W and the anode parameters, even
J
though J A is a significant component of J.
Consistent with the simplifications in (2-23)-(2-25) is the neglect of the second term in the expression (2-19) for V., which is typically -kT/q. Thus for high J,


w

Vi q(. - ) fn(x), (2-26)
n ~pn + p)0.




in which the integral is evaluated using (2-11). A further crude approximation can be made by writing (2-26) as




VJW (2-27)
q(p n +#p )ni






24


where Ri is given by (2-22). Although not as accurate as (2-26), (2-27) is insightful as we demonstrate later.

We have now defined a simpler analytic model for the high-current J(VA) charactersitic of the GDS. For a given J, VA is given by (2-2), in which V n is approximated by (2-26) or (2-27), A~EFn is approximated by (2-25), AE FC is approximated by (2-14) and (2-24), and AE FA is approximated by (2-12) and (2-23). We discuss the accuracy of this model in Section 2.4.

Using the insight accompanying the development of this model, we now offer a qualitative explanation of the complete current-voltage characteristic of the GDS. Typical measured characteristics are shown in Figure 2-3. The data were taken from a GDS test structure having two anodes placed at different lengths from the cathode. Figure 2-3 includes plots of I(Vpn )as well as I(VA for
J +A
both anodes. Note that the I(Vpn ) characeristics are
J
virtually coincident.

To explain the characeristics, we consider three distinct regions of the curves as indicated in Figure 2-3. Our models are applicable in region III where high-injection obtains in the nt region. We note in this region that Iepqn k)except for very high I where

series resistance in the cathode (=39 ) causes the characteristic to bend. Further, the I(Vpn)
3
characteristics appears to be independent of W. These






25






100


id2 o-4
10 Slope/


10, X Wgl1il4pan


10 /, anodes
SIoP )/ 31 cathod oe-p n





-=W0
10 1 2 3
V (V)












Figure 2-3. Measured GDS current versus applied voltage
(V A) and shield-cathod voltage drop (V"
for two different n-region lengths (Wi
and W2). Three distinct regions
(I,II,III) of operation are indicated.







26

observations are consistent with (2-14) and (2-24), which imply

+

qV (2-28)
J = (b+l)jP0ep-kT




for high J.

The difference between the I(Vn and I(VA) curves in region III is


+
VA Vpn V (2-29)




The approximation (2-29) follows from (2-2) since AEFAO FC' i.e., n(O)-n(W), for high J as discussed
previously. The two I(VA) characteristics in Figure 2-3 are thus described in essence by (2-27), except for very high J where V is influenced by carrier-carrier scattering [Gh77] and band-band Auger recombination [Gh77]. Carrier-carrier scattering reduces the hole and electron mobilities, which tends to increase V R as indicated in (2-27). Auger recombination reduces the carrier lifetime, which tends to decrease n in (2-22) and hence also increase Vn.







27


In the lower-current regions I and II in Figure 2-3, the I(Vpn )and 1(VA curves are coincident and are
JVA
independent of W. In region I, I~exp(qV A/2kT) is predominantly recombination in the shield-cathode junction space-charge region. Low injection prevails everywhere, and hence =Vp For higher currents, but still low
VAJ
injection, in region II, J becomes important. However because V =0, still VA Vpn and J mexp(qV /2kT). The onset of high injection in the n region occurs near the transition point between regions II and III, where still Vp _< -VA Above this point our model applies.



2.4 Experimental Corroboration and Discussion


In this section we present experimental data, taken from a variety of GDS structures fabricated at Bell Laboratories (Reading), that support the model described in Section 2.2. We also use the simpler analytic model developed in Section 2.3 to qualitatively explain the data. Finally we discuss model calculations that reveal the dependences of the current-voltage characteristic on critical device and material parameters.

Measured I(Vpn )and I(VA) in the high-injection
J
regime are plotted in Figure 2-4. The data are taken from a GDS test structure having four anodes placed at different lengths from the cathode, two (W=228pm, 615pm) of which correspond to the data plotted. Also plotted in Figure 2-4






28









1.1= 2.03 x 10 exp (qV"/kT) A

W2= 228at (VA) and.. ) Th s l d u v 13 .615psm 1-2
100


10




1d'0 1 2 3 4 5
V (V)














Figure 2-4. GDS current versus applied voltage +
(V ) and shield-cathode voltage drop (Von
for two different n-region lengths (W
and W ). The solid curves represent
experimental measurements and the points
represent calculations using the
model derived in Section 2.2.






29


are the corresponding predictions yielded by the model in Section 2.2 through computer-aided numerical solution of the model equations.

The model parameter values used are listed in Table 2-1. They were initially estimated from knowledge of the device structure and of typical ranges of their values, using the insight afforded by the simpler model in Section 2.3, and then altered such that excellent correlation with the measured data was obtained. Hence the

experimental-theoretical agreement not only supports the model, but also provides estimations of the important device and material parameters. we stress that these estimations are not a unique set; relatively small perturbations about these values do not significantly change the experimental-theoretical correlation.

The inferred value T 0=10 psec is not significantly

influenced by band-band Auger recombination [Gh77] because Ri<101 cm- as implied by the calculations. However, the values u n=2c2 /V-sec and pp=33Ocm 2/V-sec are in effect average values that reflect significant

carrier-carrier scattering [Gh77] at the higher currents, an effect that we have not explicitly accounted for. This effect could be incorporated into the model if more exact parameter determinations were desired, but no additional insight into the operation of the GDS would be gained (Ch7O].







30

The area A=5Xl0-5cm2 of the one-dimensional is merely an effective representation of the actual three-dimensional geometry. It is reasonable because it is comparable to the actual cathode and anode areas. The anode area is actually larger than the cathode area, which implies that JN0 and JPO are perhaps more comparable in value than shown in

Table 2-1.

We now discuss measured and predicted resistances of the GDS. The dc resistance, RDC=VA/I at I=25mA, is plotted versus W2 in Figure 2-5. The fact that both the experimental and theoretical plots become linear for long W supports in essence our model. This dependence is explained as follows. From (2-2) and (2-27),




R W + 1 6EFA +EFC +AE (2-30)
DC qA(p n+/I p i 2 + + 2 EFn




where I=25m.A. We note the actual RDC differs from (2-30) by a constant series resistance, (Rs+Rs), associated with the anode and cathode. Using (2-22), we see that for W>3LA,



W 2 1 AEFA 6EFC
DC qA(n+/jp)LA[n(O)+n(W)] + qI( + 2 Fn
(2-31)






31



200
/

/ /
/7o

160
/ /
/ /,Theoretical Experimental N ///


120- /





so- *
C., / /










40 /
"I/








/1


40 I i,


C 20 40
W2 (10 o-8m2)





Figure 2-5. Measured and calculated dc resistance
versus the square of the n-region length.
The dashed lines emphasize the linear
dependences.







32

and that for W<0.3LA, the first term in (2-30) is linear in W, independent of LA. We note, based on the discussion in Section 2.3, that the second term in (2-31), as well as n(0) and n(W), is virtually independent of W. Thus (2-31) correlates well with the plots in Figure 2-5. Discrepancies between the two slopes, i.e., in the slopes and in the extrapolated intercepts, can thus be attributed to the uncertainties in A, n and p (carrier-carrier scattering), and to the neglect of (Rs+Rs) respectively.

Measured and predicted values of the incremental

(quasi-static) resistance, RON=AVA/AI centered at I=3OmA, are plotted versus W2 in Figure 2-6. Referring to (2), we can write



AV
RON (2-32)





since the quasi-Fermi level terms vary little relative to AV at high currents. Differentiating (27) then, in which we note based on Section 2.3 that J=I/A~n and that for W>3LA, n=(LA/W)[n(0)+n(W)], we obtain



RON = qA(pn +/p )L A2[n(0)+n(W)-33)






33


100

I

-I
/
/
I
80 i
I
/
I




-I
/
/
60 / /
Experimenta / /
-- / /
o /
CC / / 'kTheoretical
/ /
40- / /
/! g / / / /
/ / /
/o /


/

/

20 40
W2 (10o-Sm2)




Figure 2-6. Measured and calculated incremental
ON-resistance versus the square of the
n-region length. The dashed lines
emphasize the linear dependences. The
determination of the extrinsic series
resistance from the extrapolation of the
experimental data is illustrated.







34

which corresponds well to the plots in Figure 2-6. W< 3LA n=[n(O)+n(W)I/2 and




RON qA(p n+Pp ) [n (0) +n(W)] 234




As additional support for our theory, we note that (2-31) and (2-33) imply a factor of two difference between the slopes of the R DC VS. W2 and R ON VS. 2

characteristics, which is reflected by the measured data. We note further, since (2-33) does not account for (RsC+Rs)A that the extrapolation of the measured R ON VS. 2 characteristic yields directly this series resistance. We

find (RsC+RsA)=69, which is about twice the value of RC inferred from the measured (Vn)characteristic. Since
weexect A_ C
we epec R SR S this result provides additional support for our model. The significant discrepancy between the experimental and theoretical values of R ON plotted in Figure 2-6 is due to, as we show later, our omission of an explicit accounting of the reduction in mobility caused by carrier-carrier scattering.

GDS design criteria to minimize R DC and R ON are suggested by (2-31), (2-33), and (2-34). From (2-9), (2-12), and (2-23),







35

(Q) bI 1/2 (2-35)
iN A(b+ OJN0




and from (2-10), (2-14), and (2-24),



[ _1/2 (2-36)
n(W) = n EFn




where 6EFn is constant as given by (2-25). Thus, reduction in both JN0 and JP0 would reduce RDC and RON, but because a reduction in JPO will also decrease 6EFn, this will produce larger reductions in the resistances than a reduction in JNO We note from (2-25) also that designing the p shield such that FS40 would reduce the resistances, but would also tend to negate its shielding effect.

An increase in T0 will also decrease the resistances. For W>3LA, (2-31) and (2-33)-(2-36) show that RON and RDC vary as 1/,r01/2. However, for long O, or short W

(W<0.3LA), RON and RDC are independent of r0; further decreases in w produce no additional reduction in the resistances. Because of the effects of carrier-carrier scattering, changes in parameters that increase n(O) and n(W), which tend to decrease the resistances, will also cause a reduction in carrier mobility, and hence the

decreases in RON and RDC predicted by (2-31) and (2-33) can be overestimated.







36

To demonstrate in more detail the influences of JO

SPIand -r 0 on he GDS resistance, we give in Table 2-2 calculated (using the model in Section 2.2) values of R DC (I=25mA) and R ON (I=3OmA) for various values of these parameters. We chose an intermediate value for

W=357pm, and we used the remaining parameter values in Table 2-1. The cathode and the anode series resistances were not included. We see from Table 2-2 that the resistances are most sensitive to JP,0, even though the "intrinsic" current-voltage characteristic, J(V ipn ),can be independent of J PO [see (2-28)]. Both R DC and R ON can be reduced considerably by increasing T 0 and/or deceasing SNO0 as well as Jpo.
The resistance values in parentheses in Table 2.2 were calculated by accounting for the carrier-carrier scattering using an iterative technique [Ch70]. That is, the carrier mobility values used in the final model calculation were chosen to be compatible with the calculated average carrier density in the R region as defined by empirical characterizations of the mobility-density dependences for holes and electrons. The calculations show that carrier-carrier scattering tends to diminish the reductions in resistance discussed above, especially with regard to R O' Nonetheless we can conclude, based on these calculations and others, that R ON (intrinsic) for a typical







37








Table 2-1. GDS parameter values inferred from
theoretical-experimental current-voltage
correlation.






JNO 4X10-12 A/cm2


JPO = X10-12 A/cm2


S0 = 1X10-5 sec



F = 1.5X1011 V-sec/cm2


Pn = 920 cm2/V-sec


p = 330 cm2/V-sec


A = 5X10-5 cm2






38







Table 2-2. Calculated dependences of R and R
on J0,. JP0, and To for W=35YCpm. Tie remaining parameter values are given in Table 2-1. The values of R and
RON in parentheses were calculated accounting explicitly for carriercarrier scattering [Ch70].




JN0 (A/cm2) JPO (A/cm2) to0 (Ps) RDC (Q) RON ()

4X10-12 1X10-12 10 81.7 21.5
(77.7) (27.5)
4X10-12 5X10-13 10 69.4 16.1
(71.3) (25.1)
5X10-13 1X10-12 10 62.3 12.5
(67.2) (22.5)
4X10-12 1X10-12 50 68.5 16.5
(69.2) (23.0)
4X10-12 5X10-13 50 59.6 12.4
(64.0) (21.0)
5X10-13 1X1012 50 54.2 9.6
(60.7) (18.6)
5X10-13 5X10-13 50 50.2 7.7
(57.7) (16.9)







39


GDS (W-200pum, A1-4cm- ) can be reduced to <109 by decreasing J NO and J Oto <10-12 A/cm 2 and increasing T 0 to

-50 pisec.



2.5 Summary


A one-dimensional, regional model for the forward current-voltage characteristic of the GDS, as described in Section 2.1, has been presented and supported

experimentally. It requires generally numerical evaluation of the analytic expressions, although for high currents it can be simplified to avoid the numerical characterization. The model yields expressions for the dc and incremental resistance of the GDS at high currents, which show for the GDS test structures used (W>3L A) that the R DC and R ON have

W2dependence, that the slope of the R ONvs. W curve should be one-half of the slope of the R DC VS. W curve, and that the extrapolated intercept of the R ON VS. 2 curve should yield the series contact resistance (R C+R5)A In addition to the familiar parametric dependences, the resistances were shown to decrease with increasing carrier lifetime in the n region and with decreasing saturation current desities for both the cathode and the anode.

















CHAPTER 3
CHARGE-CONTROL ANALYSIS OF THE IGBT TURN-OFF TRANSIENT



3.1 introduction


This chapter concerns the modeling of another common HV/P IC device, the IGBT [Ba85ll. In Chapter 2, an analytical model for the steady-state I-V characteristics of a GDS was developed and experimentally verified. In this chapter we utilize the physical insight gained in modeling the GDS to develop a quasi-static charge control model for the IGBT turn-off transient [Ba85]. The model, with minor modifications, is also applicable to the hybrid IGBT (HIGBT) [Fo87,Si85] turn-off transient, as

demonstrated in Chapter 5.

The analysis presented in this chapter describes the transient behavior of the IGBT in terms of its steady-state current components. The effects of minority-carrier injection into the anode are properly accounted for, within the limits of the quasi-static approximation, by using the physically correct PIN-diode boundary condition at the 40






41


anode. The resulting analysis identifies important charging mechanisms and suggests device design criteria for decreasing the turn-off time. The analysis subsequently aids in developing accurate and simple equivalent network representations for LIGBT structures, as shown in Chapters

4 and 5.

Until recently, high-voltage power-switching devices were either bipolar (e.g. gated PIN-diode [Sm82]) or MOS (e.g., power MOSFET [Ba8l]). A particular application dictated the technology to be used based on a tradeoff between its advantages and disadvantages. Bipolar power devices generally yield low on-resistance R ON

(high-current-density operation) because of conductivity modulation, but slow switching because of the

minority-carrier storage. MOS power devices are fast switching because of short minority-carrier (channel) transit time, but generally have high R ON because of the lightly doped drift region.

Recently a new family of power semiconductor devices based on integrating bipolar and field-effect technologies was introduced. The IGBT [Ru83,Ba84b] is basically a MOSFET (VDMOS) having a pn junction connected to the drain that, in the on-state, injects minority carriers into, and modulates the conductivity of, the drain (drift) region. The basic IGBT structure is shown in Figure 3-1. With it, virtually any desired tradeoff between switching speed and





42










Cahd-I .. VGII
VG Gate
CatAhode





n- / I I,
W, / I


I ctan) / I
/n
IB IC(BJT)i






V p A | C(BJT)+ 'MOS
Anode





Figure 3-1. IGBT unit cell and current components.
The solid arrows depict hole flow and
the dashed arrows depict electron flow.






43


RON can be effected by controlling the carrier (recombination) lifetime in the n- drift (epitaxial) region [Ba84a]. The device retains the high-input-impedance gate of the MOSFET, and has the added advantage of reverse-blocking capability.

The IGBT structure does, however, contain a parasitic pnpn thyristor that can latchup at high currents and thereby negate the gate control. Below the latchup current, the steady-state current-voltage characteristic (in the on-state) is defined by the DMOS, in series with the underlying (foward-biased) pn junction and in parallel with the parasitic vertical pnp bipolar-junction transistor (BJT). That is, the anode-cathode current comprises the DMOS channel current, which supplies electrons that

recombine in accord with with the properties of the forward biased pn junction, and the BJT collector current, which results from holes injected from the underlying (emitter-base) junction.

The electrical coupling between the constituent MOSFET and BJT in the basic IGBT structure results in a unique transient turn-off characteristic [Ru83,Ba84b,

Ba84a,Ba85,Ku85] comprising an initial rapid drop in forward current, followed by a slower decay. Previous analyses [Ru83,Ba84b,Ba84a,Ba85,Ku85] of this

characteristic are either qualitative or incomplete, and do not adequately reflect the underlying physics to facilitate







44

optimal device design. In this chapter we develop a quasi-static charge-control (analytic) description of the transient turn-off characteristic, which is physically insightful and which suggests device design criteria for shortening the turn-off time, without increasing R ON considerably.

The charge-control model we develop is similar to one previously developed Kuo et al. [Ku85], but does not involve the assumptions and approximations implicit in Kuo et al. [Ku85] that limit the validity of the model and in fact result in misconceptions concerning the physics underlying the turn-off transient. In particular, the effects of the expanding depletion region at the cathode and of minority-carrier injection into the anode, which are not currently accounted for in [Ku85I, nor in earlier work [Ba84a], are represented in our model.



3.2 Model


The basic (unit-cell) structure of the (n-channel) IGBT, shown in Figure 3-1, comprises a DMOS FET merged with a BJT. The components of current, which is

multidimensional, are indicated in the Figure 3-1 for the steady on-state (gate voltage V G sufficiently positive to induce an n-channel between the the n4 cathode an the nepi region, and the anode-cathode voltage VA>0). The ?4OSFET channel (electron) current I MOS supports carrier recombination in the BJT







45


IMOS = B(BjT) (3-1)



where IB(BJT) is the base current in the p+n-p BJT, which comprises recombination in both the base (n epi) and emitter (p+ anode) regions. The IGBT (anode-cathode) current I is


I = B(BJT) + IC(BJT) (3-2)



where IC(BJT) is the collector current in the BJT, i.e., the base transport (hole) current. Note that the actual current gain of the BJT, = 'C(BJT)/IB(BJT), depends

critically on the geometry of the IGBT structure. Consequently, analysis of the device for the transient as well as steady-state conditions must somehow account for the multidimensional carrier flow.

The IGBT voltage VA can be written as the sum of four voltage drops


VA = + Ve+IRs+I (RE+R (3-3)
Jep S IMOS(RERD)







46

where VP n is the drop across the underlying p +nJ
junction; Vepi is the vertical drop across the (conductivity-modulated) epi region; IRs is the drop across the extrinsic series resistance RS; and the last term is the (lateral) drop across the channel of the MOSFET, where, following [Su80], RE and RD represent effective lumped-channel resistances of the "series-connected" enhancement- and depletion-mode devices. The implicit

formulation in terms of the junction voltages for the steady-state IGBT transport problem, and its corresponding numerical solution, are given in chapters 4 and 5.

The conductivity modulation that produces the excellent steady-state forward current-voltage

characteristic, viz., low RON, of the IGBT can unfortunately cause the turn-off time to be much longer than that of a conventional power MOSFET. A typical IGBT turn-off transient [Ru83,Ba84b,Ba84a,Ba85,Ku85] is unique as illustrated in Figure 3-2. It shows an initial rapid drop in the forward current, followed by a slower decay, which reflects the lifetime of the carriers stored in the epi region. The turn-off time can be shortened by reducing the carrier lifetime, for example, via electron irradiation [Ba84a] or intentional metallic impurity doping [Go83].

Such techniques have resulted in turn-off times of less than 200ns, but with accompanying increases in RON because of the reduced carrier injection levels in the epi region.





47













Al Phase 1: Rapid Drop



I II

II 'Phase 2: Slower Decay
___ I

II
0.110


0 To
t







Figure 3-2. Typical IGBT turn-off transient showing
two distinct phases.







48

The IGBT is turned off by removing the gate voltage, and hence the MOS channel through which electrons flow for recombination in the p + anode. and n- epi regions. The removal of the channel occurs quickly, on the order of the electron transit time which is typically a few tenths of a nanosecond (Ba8l]. In order to characterize the IGBT turn-off transient, the external circuit, represented in Figure 3-3, must be considered. When the channel is removed (virtually instantaneously), I MOS -+0, but I cannot drop instantaneously because the reverse bias on the pn junction (J2 in Figure 3-3) does not increase abruptly; the depletion capacitance of J2 is (partially) charged in short but finite time, as controlled by the external circuit. This initial phase is completed when I, defined by the external circuit and developed reverse bias on J2 (V J2), equals the time-dependent BJT collector current, defined by the (time-dependent) depletion-region width of J2. Little carrier recombination occurs during this fast transient. The second phase of the turn-off, however, is controlled by carrier recombination in the epi region (and perhaps in the anode region), and hence the completion of the development of V J2 is slower than the first phase. The carrier lifetimes are typically longer than the time constant that characterizes the initial transient.

Since the first phase is usually much faster than the second, we will characterize the composite turn-off by





49





4 t
0

J2"
Depletion Region Xd(t)






Ji
p


:P+
I(t) IRL

VB





Figure 3-3. External biasing and turn-off circuitry
for the IGBT transient analysis.






1 50


first describing only the fast drop AI in the current that occurs in the first phase, and then modeling the subsequent decay of I(t) in the second phase, which defines the turn-off time. if V G is removed at t=0, and 1=1 0 in the steady-state for t<0 as described by (3-2), then for t>0




1t (BT(t) + dQ J2(t) (3-4)




where Q J2 is the charge associated with the depletion capacitance of J2. For t=0+, I is I01and ICBT and

dQ,2/dt, which equals IMOS in (3-1), are defined by the steady-state characterization of the IGBT, I(V A) Hence our transient analysis is dependent on the steady-state model. We stress, however, the utility of the transient model, independent of the steady-state analysis. As we will show, the dc current components in (3-1) and (3-2) become parameters of the transient model and can evaluated by comparing theoretical and experimental characterizations of the turn-off transient.

Using a charge-control representation, we express the transient BJT collector current in (3-4) as



QCBT = t(t) (3-5)







51


where Q p(t) is the hole charge stored in the quasi-neutral n base region and T pis base transit time for holes. The

transit time in (3-5) is time-dependent because the depletion region (width x d of J2 is expanding. This moving boundary, which is not accounted for properly in previous work (Ba85,Ku85], is most important in the first phase of the as we demonstrate below. For prevalent high-injection conditions, we assume [Gh77]



frM W Bxd(t)] 2 (3-6)
tp 4K AD



where W B is the metallurgical base width of the vertical p + np BJT and K Ais a constant less than unity discussed below. Rigorously (3-6) (with K A=l1) applies to a one-dimensional device in which there is no recombination in the base nor back injection into the emitter. However,

we assume that it (with K A<1) is representative of the actual IGBT structure illustrated in Figure 3-1. Independent of the finite base current, K A accounts for the multidimensional carrier flow in the epi, in which case to first order it could be given as the ratio of the BJT collector and emitter areas. We note also that K A 1 can effectively account for the influence of the base current (recombination in both the n- epi and the p + anode) on the transit time tKu85].







52


Because the carrier lifetime (in the base) is long relative to the duration of the initial fast transient, we assume that Q pis invariant in the first phase, even though the holes (and electrons) are redistributed in time in the epi region. Thus as holes are swept out of the collector to increase Q 12l electrons are forced toward the emitter, thereby increasing the hole injection from the emitter to maintain neutrality. This increase in Q which approximately equals the increase in Q J21 is much smaller than Q pand hence does not threaten the validity of (3-5). From (3-1), (3-2), (3-5), and (3-6) then, we can write




10 BO W/4K A Dp (3-7)





since x d=0 for t
The fast transient subsides when dQJ2 /dt40O, or from (3-4)-(3-7) when 1-*11 where




1 0 = W~d)2 2 O (3-8)
(W d )/4K AD p (1x dm/WB)2






53

In (3-8), Xdm is the "final" value of xd corresponding to the "final" reverse bias VJ2m' which for 11 low enough that the hole density in the depletion region is indeed negligable, is [Gh77]


28sVJ 1/2
Xdm ( ) (3-9)
dm~qN .
qepi



The external circuit (Figure 3-3) in which RL is chosen so that 1=10 in the steady on state defines VJ2m (>0):


I
VJ2m V (i ). (3-10)

0
Vj2m B( I0




From (3-7) and (3-8) then,



A 1- 1 1 MOS{1-[ 2 i]} (3-11)
(1-Xdm/WB)



where I, IMOS, and [ (10o-IMos/IMos] are described by

the steady-state analysis. Note that AI (steady-state) MOSFET current. Only for Xdm <





54


IMOS, which is wrongly implied in Baliga [Ba85] and Kuo et al. [Ku85].

To demonstrate the virtual independence of the transient result (3-11) from the steady-state analysis, which defines 10 and IMOS, we combine (3-9)-(3-11) to obtain


2ssVBI
X0d 2e S B )]1/2 (3-12)
qNepi 0




Thus measurement of the first phase of the turn-off

transient, i.e., of 10 and 61, enables evaluation of Xdm, which from (3-11) describes the constitution (IMos and IC(BJT)) of the steady-on-state current 10.

The slower decay of I [from 10- AI) to zero] in the second phase of the turn-off is similar to the transient response of a BJT in the active mode following the abrupt removal of the base current [Mu77]. Whereas the first-phase transient is controlled predominantly by the charging of the J2 depletion capacitance, we assume that the second-phase transient is controlled by carrier recombination. Thus the J2 displacement current [dQj2/dt in (3-4)] is neglected, and we write, based on (3-5),


I(t) = Q p(t)

-t (3-13)
Ttp







55



where _tp is an average transit time, which can be crudely approximated based on (3-6), as


(WB-Xdm)2
T tp 4K AD p (3-14)





with Xdm given by (3-12). The use of (3-14) greatly simplifies the analysis of the second transient, and hence facilitates physical insight and identification of critical device parameters that define the turn-off. The simplication is representative because typically the increase in xd beyond Xdm is less than xdm; the relative change in -rtp during the transient during the transient is smaller than that of Q The decay of I(t) in our model is thus defined predominantly by the time-dependence of Qp (t) [Ku77]; and errors resulting from the use of (3-14) are minor and do not derogate the utility of the model.

In BJT terminology, I(t) is the emitter current, which is equated in (3-13) to the collector current because the base current is constrained to zero [Mu77]:



Q p(t) + dQ (t) + Qn(t) + dQ n(t)
n dt = 0. (3-15)
THn






56




We are assuming that high injection (p=n) prevails in the base region throughout the main turn-off transient, and hence we use the high-injection carrier lifetime TH as defined by SRH theory [Gh77]. This is a reasonable assumption for a device in which conductivity modulation is essential in the on-state. In (3-15), Qn is the minority electron charge in the quasi-neutral p + anode (emitter) reqion and cn is an average (effective) electron lifetime (charge-control time). The dynamics of Qn' which is not accounted for properly in previous work [Ba85,Ku85], can influence the second-phase transient as we show below.

For quasi equilibrium and negligible recombination in the p+n- junction space-charge region, Qn can be related to Qp using the quasi-static approximation. In the quasi-steady state, the solution [Gh77] to the ambipolar transport equation in the quasi-neutral base region (with p=n) yields, for (WB-Xdm) less than the ambipolar diffusion length, Qp=qA(WB-Xdm)P(0)/2 where p(O) is the hole density at the edge of the space-charge region and A is the device area. Using Qn /,n=JNO[p(0)/nil2 [Gh77], where J is the saturation current density associated with the electron injection (recombination) into the p+ anode, we have







57
Qn

n (3-16)




where Q is a constant charge given approximately by


Aq 2ni2(WB-Xdm)
Q0 n B dm (3-17)
0TJN
4-rn NO



With (3-16), (3-15) is a first-order, nonlinear differential equation for the quasi-static Q p(t), which can be solved analytically. If we assume n <

likely for the asymmetrically doped p +n- junction, we get



Qp0exp(- tH

Qp(t) Qp0TH [l-exp(- t_)(3-18)
1 + QH



where t=0 is now taken as the start of this second-phase transient. Now I(t) is defined by (3-13), (3-14), and (3-18), which with (3-8) yield



I exp(-t-)
I(t) = T H (3-19)

SJNoTH [-exp(--)]
AKq 2n2Dp






58


Thus I(t) can decay faster than exponentially if currents associated Q n (t), reflected by the second term in the denominator of (3-19), are significant. if j NO is negligibly small, then (3-19) reduces to a simple exponential decay defined by the numerator. However for typical values of the model parameters, the second term in the denominator of (3-19) can be significant.



3.3 Discussion


Our analysis of the IGBT turn-off transient is first order, and describes, in terms of the steady-on-state current components, an initial fast drop AI of the current, followed by a slower decay of I(t), which can be, depending on J NO' somewhat sharper than an exponential fall-off having a time constant equal to T H* In Figure 3-4 we plot the composite turn-off characteristic for a typical IGBT predicted by our analysis for three assumed values of T H and of J NO' the two most significant material parameters that must be controlled for optimal device design. As noted previously, a steady-state analysis is needed to evaluate parameters in our transient model. In the derivation of the I(t) characteristics plotted in Figure 3-4, we first used a numerical solution of the steady-state ambipolar transport in a quasi-two-dimensional

representation of the wide-base p +n p BJT to estimate the constitution of 1 0 in (3-1) and (3-2). Then, with I o and





59


Curve _H (Gs) JNo (10-12A/cm2
A 2. 1.
B 2. 5.
C 2. 0.2
D 10 1.
E 0.4 1.














E DC
BA


0 12 3 4 5

t (G s)





rae 3-4. Calculated IGBT turn-off transient for
three values of TH and of J Device
H NO
parameter values used are A = 0.1 cm2 ,
S = 60 pm, N = 5 x 104 cm3, and
KA =0.5; I0 0 A.






60

evaluated for a specified I0, (3-9)-(3-11) give AI and

(3-19) describes the transient decay I(t). The value of KA (=0.5) used in the transient analysis is consistent with the quasi-two-dimensional treatment of the steady-state carrier transport: K A=Acollector/A.

Comparisons of the predicted characteristics in Figure 3-4 with published data [Ru83,Ba84b,Ba84a,Ba85,Ku85,Go83] indicate that our model is representative of typical IGBTs. The dependence on TH of both AI and I(t) is consistent with corresponding measurements. The dependence on JNO has not been studied experimentally, but is, we believe, depicted faithfully. The predicted &I increases with increasing JNO' for 10 held constant, because p decreases. For the same reason, 61 increases with increasing -rH, but the dependence is not unrelated to the value of JNO' and the change is not simply equal to IMOS (=I0/0) as implied in previous work [Ba85,Ku85].

The I(t) dependence also may be more complex than previously indicated [Ba84a,Ba85,Ku85]. Whereas the time dependence predicted for JN0=2X10-13 A/cm2 is nearly exponential [a exp(-t/TH)], indicating that the second term in the denominator of (3-19) is unimportant, the predicted transients become supra-exponential as JNO increases. This dependence of course is related to T H, becoming significant as TH decreases. For TH sufficiently short, and/or for JNO sufficiently small, I(t) is exponential and T0 is defined directly by TH"


60







61


The dependence of T 0 on carrier lifetime illustrated by the carrier lifetimes plotted in Figure 3-4 is consistent with other measurements [Ba84a,Ba85] that show T 0 decreasing strongly with increasing electron irradiation dose. Calculations and measurements imply T 0 H ,which implies that the time dependence in the denominator of (3-19) is unimportant for these devices (that have low T) We note further that measured dependences [Ba84a,Ba85] of T0 onVB an n10 ae explained well by our first-order
model. For a given ~TH' calculations show To increasing weakly with increasing VB for constant I00 and decreasing

with increasing 1 0 for constant V B. The TO0(V B) dependence is weak because x dm in (3-12) and implicitly in (3-13), which defines Tor does not change appreciably when 1 0 is held constant, as can be seen from (3-10) and (3-11). The

T 0(1 0) dependence is more pronounced (T 0can be halved by increasing 1 0) because AI in (3-11) increases more rapidly than Io; viz., IMOS' which includes the p+ anode recombination component, increases faster than 1 0. We infer from the model however that T 0 will saturate for sufficiently high 1 0 becauses ultimately I MOS' which comprises predominantly the anode recombination current, becomes proportional to 1 0.

From our analysis, we can suggest a way to quicken the turn-off, independent of shortening T H which increases R ON







62


because Vepi in (3-3) increases. For a given TH, the turn-off time can be reduced by increasing AI, which decreases the second-phase decay in I(t) needed to turn off the device, and by enhancing the significance of the denominator in (3-19), which exploits the supra-exponential decay. Physically, these changes lower 0 and make MS which is controlled directly and without delay by the gate, a larger component of the steady-on-state current, and they make carrier removal through the p + anode more significant in the transient. They can be effected by increasing J NO' which could be done perhaps by reducing the doping density and the electron lifetime and/or transit time in the heavily doped p~anode region [Fo8l]. The benefit of such an increase is illustrated in Figure 3-4. Reducing K A in (3-19), for example by decreasing the BJT collector-emitter area ratio, would produce similar benefit. We note however from (3-3) that if the MOSFET resistances R E and RD are substantial, then increasing JNO and/or decreasing K A (i.e., reducing 0) could significantly increase R ON.

An n +punch-through shield (buffer region), as described in Chapter 2, may also be used in IGBT structures. The n+ buffer region reduces the emitter efficiency of the constituent wide-base BJT and, for a given current level, makes IMOS a larger component of the steady-on-state current, thus subsequently decreasing the turn-off time. The methodology for characterizing the







63


effects of a buffer region on device performance, as presented in Chapter 2, may be applied to IGBT structures to study the trade-off between decreased turn-off time and increased on-resistance arising from the buffer-induced reduction in base-region mobile carrier concentration.

The utility of the physical insight afforded by our model for the transient turn-off should be stressed. Whereas previous work has shown that T 0 is reduced by decreasing -r H and increasing 61, it has not demonstrated how the reduction obtains and it has not clearly revealed how AI can be increased most effectively. Furthermore the previous work, which is based strictly on one-dimensional analysis, did not reveal the subtle but critical influence of the IGBT geometry on its transient turn-off characteristic. The constant K A <1 in our model, although somewhat empirical, reflects this influence. our analysis can further facilitate model parameter evaluation for IGBT circuit simulation. For example, it is possible to interpret a measured turn-off transient using our analysis and extract, for a given on-state current I001 values for I MOS (and hence 0), T H and JNO This utility should be of interest in the general area of CAD of HVICs.

















CHAPTER 4
HIGH-VOLTAGE/POWER INTEGRATED CIRCUIT DEVICE
MODELING--A FIRST APPROACH



4.1 Introduction


This chapter introduces a novel methodology for flexible SPICE2 implementation of physical models for HV/P IC devices developed in chapters 2 and 3. The model implementation is applied to the IGBT of Chapter 3 and is achieved without modification of the SPICE2 source code by utilizing UDCSs that access FORTRAN subroutines which define, implicitly, the current and charge as functions of the controlling node voltages. The implicit problem is numerically solved in a FORTRAN subroutine and its solution (a current or charge) is referenced by the SPICE2 main program. This highly flexible means (first approach) of model implementation differs from that presented in Chapter 5, where the implicit model equations are solved by the SPICE2 main program, thus trading model flexibility for computational efficiency. SPICE2 simulations of dc and transient characteristics of IGBT switching circuits are 64






65


shown to be representative of measurements taken from the literature. Both static and dynamic latch-up for the IGBT are simulated, thus demonstrating the flexibility of the modeling methodolgy for HV/P IC CAD.

Recent advances in silicon IC processing technologies have intensified development of "smart" high voltage/power (HV/P) circuits, in which low-power logic and high-voltage devices are integrated on the same chip. Computer-aided design (CAD) of such circuits is critically dependent on reliable device simulation, for example with SPICE2 [Na75]. HV/P devices have unique characteristics that are not amenable to lumped-element, equivalent-circuit

representation, and hence the built-in device models in SPICE2 are generally inadequate. Such characteristics include effects of merging bipolar and MOS structures,

latch-up, conductivity modulation, and moving-boundary (during transient) conditions. The inadequacy of the SPICE2 MOSFET models for HV/P IC simulations is clearly inferable from [Su80]. The SPICE2 BJT (Gummel-Poon [Ge78]) model is clearly deficient; for example, its basic (integral-charge-control [Ge78]) assumption is invalid for HV/P BJTs having significant back injection or relatively low currents gains.

Therefore to enable reliable CAD of HV/P ICs, new device models must be implemented in SPICE2, or in comparable circuit simulators. Because of the unique






66

device characteristics and model complexities, such implementation will require either modifying existing simulator codes to accommodate new specific models, or developing new methodologies for general model

incorporation. This paper describes a simple, flexible and physical approach to the latter implementation. The

methodoly is exemplified through an application to a representative device, the insulated gate transistor (IGBT) [Ba84b], an HV/P switch comprising merged bipolar and r4OS structures. Although the (vertical) IGBT is not a common integrated device, we use it to demonstrate the modeling methodology, which is intended primarily for CAD of HV/P ICS, because (i) it is well documented, and (ii) its basic operation is not unlike that of other merged bipolar/MOS devices which are integrated, e.g., the lateral IGBT (LIGBT) [Ro86].

We stress that this chapter introduces and demonstrates a novel device modeling concept for HV/P circuit simulation, but does not include the simulation of any actual device nor a complete corroboration of model assumptions. The viability of the methodology is implied by the physical nature of the models and is shown through qualitative comparisons between model predictions and published measured characteristics.

The new SPICE modeling approach, presented in Section 4.2 and demonstrated in Section 4.3, utilizes expressions,






67

not necessarily in explicit form, for the quasi-static device terminal currents and charges (the models are charge-based) in terms of the terminal voltages. This system of equations, i.e. a physical device model, is part of a subroutine that is referenced by user-defined controlled sources (UDCSs) in SLICE [Ha84], one of the many enhanced versions of SPICE2 that have been written. The

UDCSs generally available in enhanced versions of SPICE2, are simple FORTRAN subroutines [Ve86] that constitute the "equivalent-circuit" model, which simulates both steady-state and (quasi-static) transient device characteristics. With judicious programming and data storage, UDCSs can be used effectively for simulation of circuits in which the number of HV/P devices is not excessive.



4.2 Modeling Methodology

The utility of the novel methodoly is demonstrated by its application to the IGBT [Ba84b], as illustrated in Figure 4-1. The IGBT is representative of emerging HV/P devices that merge MOS and bipolar structures to exploit the advantages of both. The (n-channel) IGBT shown is effectively a vertical pnp BJT, the base of which is driven by a DMOST, with a parasitic npn BJT at the cathode that can cause latch-up and loss of gate control of the IGBT switch. In contrast to the conventional DMOST, the





68





Cathode FoGate

n+
P
Depletion Region Xd


Wg%
n- W


p

SAnode





Figure 4-1. Basic IGBT structure.






69

conductivity of the n- epitaxial region (base) of the IGBT is modulated by carrier injection from the p+ anode (emitter), thereby lowering the on-resistance but also increasing the turn-off time because of the excess carrier storage. The device has been previously modeled [Yi85] by connecting numerical models for the DMOST and pnp BJT through a modulated base resitance. Such modeling aids optimal device design, but is impractical for circuit

simulation and provides little insight into how device parameters affect the dynamic response of the IGBT in a

circuit, or an HVIC.

We emphasize in this paper the SPICE simulation of the constituent wide-base (low-current-gain) pnp BJT and parasitic npn BJT. We thereby stress the inclusion in the model of unique characteristics like low BJT gain, base-region conductivity modulation, and latch-up, which are not properly accounted for in the built-in SPICE2 models. The DMOST is modeled using a standard level-2

SPICE2 MOSFET model [Ha84]. Because of the high level of conductivity modulation in the n- base region, effects of the parasitic JFET [Yi85] at the drain of the DMOST can, to first order, be ignored when calculating the on-resistance. The methodolgy presented, however, is flexible enough to model the JFET effects if desired, but at the cost of

increased model complexity.






70







Gate
JIO OG

r 4

















AnodepA
CathFigurode 4-2. UDCS representation of the IGBT











implemented in SLICE/SPICE2. This is not an equivalent circuit; the node B
is labeled merely to signify the internal connection between the base region of the
K R dQ
BN JiC
di











pnp BJT and the drain of the DMOST. The
Vepi







anode of the IGBT is referred to as the
Figure 4-2. UDCS representation of the IGBT
implemented in SLICE/SPICE2. This is not an equivalent circuit; the node B
is labeled merely to signify the internal connection between the base region of the pnp BJT and the drain of the DMOST. The anode of the IGBT is referred to as the emitter of the pnp BJT, and the cathode
as the collector.






71

The UDCS [Ve86] "circuit" model for the IGBT is shown in Figure 4-2. In fact, the model is not an equivalent circuit, but is a physical representation comprising six UDCSs, each of which is defined implicitly by the system of model equations in terms of the emitter-base and base-collector voltages (VAB and VBK) of the pnp BJT. The choice of node voltages used to define the UDCSs is not unique. Alternative choices, as demonstrated in Chapter 5, can be considered for a particular device to effect a trade-off among model flexibilty, complexity, and computational efficiency. The steady-state characteristics of the IGBT are simulated by the UDCSs IMOS (the component of the pnp BJT base current supplied by the DMOST), IC (the pnp BJT collector current), and Vepi (the voltage drop across the n- base region). The transient characteristics are simulated by the charge-based UDCSs [Ve86] dQPB/dt (the charging current defined by the carriers in the quasi-neutral base region of the pnp BJT) and dQjc/dt (the charging current defined by the depletion charge at the

base-collector junction of the pnp BJT). Charging currents associated with free carriers in other regions of the device are typically negligible. For example, the charging current defined by the minority electrons in the quasi-neutral p+ emitter (anode) region is negligible, even though the total pnp BJT base current (IMos + ICN) must include a component due to recombination in the emitter, as shown in Chapter 3 [Fo86a]. The resistance RBN simulates






72


the lateral voltage drop in the base region of the npn BJT, which is important only near latch-up as we discuss later.

The six UDCSs reference the same user-defined subroutine that defines the system of model equations. This set of equations is quasi-static; that is, QPB and QJC, as well as IMOS, ICp, ICN, and Vepi, are described in the steady state in terms of VAB and VBK, and then the transient currents are characterized through the quasi-static approximation [Va76I which equates the time-dependences to the steady-state dependences in terms of VAB(t) and VBK(t). Virtually all device models used today for circuit simulation are quasi-static. Although we use the quasi-static approximation here, with some support for its validity, we recognize the need to consider the

possible occurence of non-quasi-static (NQS) effects in each particular model development. Proper accounting for the NQS effects in SPICE models is a formidable task, but can be facilitated [Fo86b] by the new methodology presented in this chapter.

We now describe the physical model equations in detail. The sytem of equations is based on the solution to the one-dimensional ambipolar transport equation [Gh77]

describing the carrier densities in the quasi-neutral nbase region. Two-dimensional effects are considered later. Since the IGBT operates under high-injection (conductivity modulated) conditions in the n base region (p n >>






73

N epi), the base transport equation simplifies to




d2p(x)- p(x) 0 (4-1)
d2x LA



where LA [=(DA TH)1/2] is the ambipolar diffusion length [Gh77]. The solution to (4-1), precluding a forward bias on the base-collector junction, is


p(0)sinh(W-x

p(x) = A
sinhW L) (4-2)





where p(0) is the hole (or electron) density at the edge (x=0) of the emitter-base junction space-charge region and W is the effective base width. From Figure 4.1,




W = WB xd (4-3)



where WB is the metallurgical n base width and xd, which is a function of VBK, is the width of the depletion region at the one-sided base-collector junction of the pnp BJT. We define xd(VBK) based on the depletion approximation, and






74

neglect any mobile carrier charge that might exist in the space-charge region for very high current densities [Gh77].

To relate p(0) in (4-2) to VAB' it is necessary to characterize Vepi since
ept



VAB = Vepi + VJEB (4-4)




where


P(0)Nep
VJEB =VTIn[ n epi (4-5)
n
1



is the emitter-base junction voltage (not equal to the quasi-Fermi potential separation) [Wa83]. In (4-5), Nepi is the doping density in the n epitaxial base of the pnp BJT and V T=kT/q is the thermal voltage. Accounting for the conductivity modulation, we give Vepi by the integral of the electric field across the quasi-neutral base, where the field is related to p(x) through a combination of the hole and electron current expressions [Gh77]:


W
VJ A dx (b-l) kT in(N()
ep q(In+p) p(x) ) epi (4-6)
e n+ p ( -X epi (4-6)






75

where WM(
For negligible recombination in the emitter junction space-charge region, JA is related to p(O) as follows [Be791:



b+l -2 -D d (4-7)
A = I JNO n Ax x=0




where DA is the ambipolar diffusivity [Gh77] and JNO is the saturation current density defined by the back injection of electrons into the quasi-neutral emitter region [Fo8l].

Equations (4-4)-(4-7) relate p(O) to VAB and VBk, the independent node-voltage differences in the model. Now (4-2) and (4-3) can be used with these relations, and the quasi-static approximation, to characterize the UDCSs in terms of these voltages. We note that although these characterizations are implicit, the model is implemented in SPICE2 directly via access of the UDCSs by the nodal

analysis [Ve86].

The UDCS Vepi is given by (4-6). The quasi-static depletion charge density at the base-collector junction is



QJC = qANepiXd (4-8)






76



where AC is the (effective) base-collector junction area. The quasi-static carrier charge in the quasi-neutral base region is the integral of (4-1) from x=0 to x=W:


W
QB = qA f p(x)dx (4-9)
0



where AE is the emitter, or anode, area. The charging-current UDCSs in the model are derived from (4-8) and (4-9):



dQi 9Q. dV.
-1 = at (4-10)
3 j



where i=JC, PB and j=AB, BK. Therefore the

"transcapacitance" SQi/j must also be described in the

UDCS, either analytically or numerically. We note from (4-9) and (4-10) that the transcapacitances associated with QPB cannot be described in closed form, and hence finite-difference approximations are used in the UDCS

dQPB/dt to characterize them numerically.







77

The composite base current IB of the pnp BJT, in the steady-state, is the sum of recombination current from the n- base region and that from the p+ emitter region. It is expressed as

QPB + AJ p (112 (4-11)

IB =TH E ANO nwhere -H is the high-injection carrier lifetime [Gh77] in the base. The second term in (4-11) obtains for quasi-equilibrium because low injection prevails in the emitter. The electrons that support the recombination current IB are supplied by the DMOST (IMoS) under normal operation, but in part also by the npn BJT (ICN) near latch-up:




IMOS = IB ICN (4-12)




Analytical decomposition of IB, as well as characterization of the n- base transport current ICp, must be done

implicitly and hence demonstrates poignantly the essence (flexibility) of the modeling methodolgy, in contrast to the less-flexible equivalent-circuit modeling built into SPICE2.







78


The lateral flow of the collected holes I in the base of the npn BJT forward-biases the emitter-base

junction and causes electrons to be injected into the base of the pnp BJT (see Figure 4-1). This p-base transport

current can be approximated by [Ha85]



ICN ISN exp( VT ) (4-13)




where ISN is the collector saturation current of the npn BJT and RBN is an average, or lumped, base resistance [La85], both of which vary inversely with the p-base Gummel number [Ge78]. However note that because of the exponential dependence of ICN on Icp, only for conditions near latch-up is the contribution of ICN to the anode current I =AEJA significant. When ICN=0, I MOS=IB and the DMOST supplies all the electrons necessary for recombination in the pnp BJT. However when the IGBT is latched, the electrons necessary for recombination are

supplied by the npn BJT (ICN), and IMOS=0.

The implicit description of the current UDCSs is completed by equating the pnp BJT collector current (I CP) to the difference between the emitter current (IA) and the base current (IB):






79
AC
1- B) (4-14)




In (4-14), and in (4-8), (4-9), and (4-11), we have crudely accounted for the two-dimensionality of the pnp BJT by including the (constant) collector-emitter area ratio, which is less than unity. Although this accounting is

semi-empirical it does reflect the reduced base transport factor in a typical IGBT due to hole injection into a portion of the base that is laterally removed from the collector, as shown in Chapter 3 [Fo86a]. Model predictions made without the area ratio do not compare favorably with experimental results, whereas those made with it do. We note that for lateral devices,discussed in Chapter 5, however, a more physical accounting for the multidimensional effects is essential.

Because of the implicit nature of the model equations (4-2)-(4-14), it is not possible to express p(O), and hence the terminal currents, as explicit functions of VAB and

VBK. Thus, for a given VAB and VBK supplied by the SPICE2 nodal analysis, (4-4) is solved iteratively (Newton's

method) for p(O) in a FORTRAN (UDCS) subroutine, and the model equations are then used to determine IMOS, Icp, ICN' Vepi' QPB' and QJC" The model is clearly quasi-static; at each point in time, the steady-state model equations are solved in a UDCS subroutine and the solution (a terminal






80

current or charge density) is then referenced by the main SPICE2 nodal analysis program (Ve86]. We note that in

addition to the transcapacitances in (4-10), the transconductances B1i/aV for each current UDCS must be evaluated in the nodal analysis. These evaluations are done numerically using first-order finite-difference approximations.
The merged structure of the IGBT makes model parameter evaluation difficult because of two-dimensional current flow and inaccessibility of internal model nodes for measurement. Model parameters for the DMOST and BJT components of the IGBT can be estimated from a knowledge of processing variables, doping density profiles, and geometry. The threshold voltage for the DMOST can be estimated from measurements of IA(VGK), although the channel conductance cannot be inferred experimentally without a special test structure. The two most important parameters for the pnp BJT are TH and JNO* As will be shown in Section 4.3, these two parameters greatly influence the steady-state on-resitance and turn-off time of the IGBT. From a knowledge of the pnp BJT emitter doping density, JNO can be estimated analytically [Fo8l]; and rH can be obtained from a fitting of a measured turn-off transient once JNO is known, as described in

Chapter 3. For the npn BJT, ISN and RBN can be estimated from a knowledge of the p-base doping density, or Gummel






81


number [Ge78]. Parameter exractions from latch-up measurements could be done, but would not be straight

forward because of the difficulty in isolating important current components, e.g., I



4.3 SPICE Simulations and Discussion

In this section we demonstrate the utility of the modeling methodology used to develop the SPICE IGBT model in Section 4.2. Results of representative IGBT circuit simulations on SPICE are presented and discussed. Figure 4-3 shows simulated dc IGBT current-voltage characteristics for various values of gate-to-cathode voltage, VGK. Typical parameter values were used for these simulations, and the results shown are representative of typical vertical IGBTs. For VGK sufficiently high, the DMOST operates in the linear region, and the IA-VAK relationship, where VAK is the anode-cathode voltage, is linear. This

linearity indicates that the on-resistance of the IGBT in this case is not affected by the nonlinear Vepi, but is controlled by the DMOST channel conductance and by contact resistance. For lower VGK, IA tends to saturate with increasing VAK. This saturation occurs because the DMOST is driven to the saturation region, and therefore IMOs (=IB), and hence ICP are limited. For VA less than about 0.6 V, the IGBT does not conduct any appreciable current because the unmodulated n epi resistance is so large; Nepi






82



20


VGK =20V
16
10V


12





6V



4


4V
0
0 1 2 3 4
VAK (V)



Figure 4-3. Simulated IGBT anode current versus
anode-cathode voltage for various gate-cathode voltages. The DMOST
threshold voltage is 3 V.






83


is low to provide high voltage blocking. A forward bias of approximately 0.6 V is required to produce high injection and conductivity modulation, which lowers the resistance of the epi region. our model equations are valid only in this region of operation; for low-injection conditions, I A is in the milliamp-range and is well below any current of practical concern. No attempt has been made to model the reverse-blocking mode of operation, where VAK<0. The methodology is flexible and this region of operation could be modeled by including UDCSs, or modifying existing ones to account for the leakage (generation) current associated with the reverse-biased emitter junctions of the npn and pnp BJTs. In this extension, the effects of an n + buffer layer at the anode, modeled for the GDS in Chapter 2, would have to be included.

To exemplify transient IGBT simulations, we use the representative gate-drive circuit [Ba84c] shown in Figure 4-4. The diode isolates the pulse generator during turn-off transients. The impedance Z L r epesents a load on the IGBT, which typically is resistive, inductive, or a combination of both. The resistor R GK provides a path to discharge the gate-to-cathode capacitance; it influences the turn-off characteristic by limiting the rate of change of V GK and hence limits the rate of change of the anode current, I A* If R GKis sufficiently small (-109), then depending on the steady-state value of I A' the IGBT may






84












G A ZL

K

VG RGK T



0

















Figure 4-4. Gate-drive circuitry for IGBT transient
simulations. The pulse voltage, Vr, was defined to fall from 10.7 to zero in 50
ns. The voltage Vcc was set at 350 V.






85



10 10



8 -8




.6- 6




4 4


ID VGK

2 2




o 0
0.0 0.2 0.4 0.6 0.5 1.0
t (lgs)




Figure 4-5. IGBT anode current, DMOST drain current,
and gate-cathode voltage versus time from simulation of turn-off transient defined in Figure 4-4 with resistive load ZL = 35
2 and R = 200 9 (TH = 0.8 ps, JN0 =
1 0o-12 A % /CIM2 .






86


latch during turn-off. Mechanisms that produce latch-up in the IGBT will be simulated and discussed later.

In Figure 4-5 we show a simulated turn-off transient for a typical IGBT in Figure 4-4 with a resistive load. The turn-off delay reflected by I A(t) results because of the finite time needed to discharge the gate-to-cathode capacitance of the DMOST, and is a function of R GK' This discharging time is evident in the V GK (t) decay shown, which is much slower than the fall of the V G(t) pulse. Note that V GK (t) influences I A(t) by controlling the conductance of the DMOST. As shown in Figure 4-5, the DI4OST transient drain current, I D(t), which, from Figure 4-2, equals I MOS + dQ PB /dt dQjc /dt, does not begin to fall until V GK (t) has decreased to a value that causes the DMOST to saturate (see Figure 4-3). Further reduction of V GK (t) decreases the DMOST (saturation) current I D(t), and hence I A(t) as well. Eventually V GK (t) becomes less than the DMOST threshold voltage, and I D(t) drops to zero. I A(t), which includes I D(t), follows the decrease in I D(t) until it becomes a negligible component, after which I AMt decays in accordance with the recombination in the pnp BJT [Fo86a]. if V GK is reduced very rapidly, for example by decreasing R GK' then IDfalls to zero very quickly, resulting in the more idealized two-phase turn-off transient [Fo86a,Ba85,Ku85] shown by simulation in Figure 4-4. In contrast to previous analytical results





87


10 10




8 8




6 6




4 4




2 2

VGK


0.0 0.2 0.4 0.6 0.8 1.0
t (gs)






Figure 4-6. IGBT anode current, DMOST drain current,
and gate-cathode voltage versus time from
simulation of turn-off transient defined in Figure 4-4 with resistive load Z = 35
2and RGK = 5 S? ( = 0.8 ps, JNO = J0
A/cm2)






88

[Ba85,Ku85], our SLICE/SPICE2 simulations show that the abrupt drop in I A(t) is not equal to the steady-state DMOST current I =IMs(even when I CNis zero), and that the slow

decay of the second phase is not a simple exponential function of the high-injection lifetime IrH* These differences result, respectively, from the unique effects of the expanding depletion region at the base-collector junction and the back injection of electrons into the emitter characterized by J NO' poignantly demonstrated in Chapter 3.

In Figure 4-7 we show simulated IGBT resistive turn-off transients for various values of T H and J NO* To stress the influence of these parameters, we used a small value for R GK that ensured the insignificance of transients associated with the gate-to-cathode capacitance. The

magnitude of the fast initial drop in anode current and subsequent slower decay are both dependent on -rH and J NO* These simulations and others have shown that changes in J NO should be considered as a means of optimizing the trade-off between turn-off time and on-resistance. We stress that these results could not be obtained using standard SPICE2 BJT models because of the limitations inherent in the Gummel-Poon model [Ge78] and its implementation in SPICE2.

We stress that the results in Figure 4-7 are ideal in that, in addition to negligible gate delay, there is also no inductance in the load. For contrast, we show in





89


10 Curve H (is) JNO (10-12A/cm2)

A 0.8 3

B 0.8 1
8 C 2.4 1




6




4


A B C

2




0.0 0.2 0.4 0.6 0.8 1.0
t (Is)





Figure 4-7. IGBT anode current versus time from
simulation of resistive turn-off transient
for various values of TH and JNO (RGK = 5
2).






90



15 15




12 -AK/3 -12




9 9


C,

6 6




3 3 >




0 0
0.0 0.2 0.4 0.6 0.8 1.0
t (s)





Figure 4-8. IGBT anode current, (normalized)
anode-cathode voltage, and gate-cathode voltage versus time from simulation of turn-off transient with inductive load.
In Figure 4-4, ZL is a series combination
of 8 pH and 35 9; RGK = 100 2.






91


Figure 4-8 a simulated turn-off transient for an IGBT in Figure 4-4 with an inductive load, including a gate delay. A distinctive characteristic of this turn-off transient is the sharp rise of the anode-to-cathode voltage VAK(t), which even shows overshoot and ringing as do corresponding measurements [Ba84c]. This unique VAK( t) transient results from a damped resonance defined by the load inductance in combination with the junction capacitance repesented by the charging current dQic /dt in our model.

To further demonstrate the utility of the modeling methodology, we simulate the static latch-up of a representative IGBT, but with a larger npn BJT base resistance R BN. As mentioned previously, the IGBT may latch, causing loss of gate control, if driven too hard. For the static case, depicted in Figure 4-9 by the simulated I A(V AK), latch-up is approached by increasing IA* As characterized in Section 4.2, 1 C also increases, and subsequently, because of the increased forward bias I CPR BN on the emitter-base junction of the npn BJT, so does I CN' At the onset of latch-up, I CN increases abruptly, thereby reducing I O in accordance with the recombination in the pnp BJT. The reduction of I M decreases the voltage

dropped across the DMOST and results in the

negative-resistance region shown in Figure 4-9. The process is regenerative, and as the applied current is increased further, ultimately I CN supplies all the





92



20



1714




11




8





1.0 1.4 1.8 2.2 2.6
VAK (V)




Figure 4-9. Simulation of static latch-up in the IGBT:
driving anode current versus the resulting
anode-cathode voltage with gate-cathode voltage equal to 10 V (ISN = 2 x 10-12 A
and R = 0.175 ).






93

electrons supporting the recombination current in the pnp BJT, and IMOS is reduced to zero. In this condition, the device is latched, and removal of the gate voltage will have no effect on the IA. The transition from a stable

operating point to the latched condition requires only a small increase in applied current because of the exponential dependence of ICN on Icp.

The IGBT can also latch during turn-off transients if the lateral hole current in the base of the npn BJT, which, at the start of the transient, consists of ICp plus the displacement current dQjc/dt, is sufficiently high to

effectively forward-bias the npn BJT emitter-base junction. The magnitude of dQjc/dt depends on the rate of change of the gate-to-cathode voltage as defined by the IGBT model and the external circuitry. In the ideal case, if VGK is removed instantaneously, then the initial magnitude of dQjc/dt is equal to the steady-state current I MOS supplied by the DMOST, as discussed Chapter 3 [Fo86a]. If VGK is removed slowly, then the initial magnitude of dQjc/dt will be negligible, and the IGBT will not latch. In Figure 4-10 we show a simulation of dynamic latch-up in the IGBT, which occurs because VGK(t) drops abruptly (due to a small RGK as discussed previously). The turn-on of the BJT, which triggers the latch-up, is indicated by the rapid increase in its collector current ICN(t) shown in Figure 4-10. Beyond this point in time, IA(t) remains finite even though VGK(t) has dropped to zero.




Full Text
115
anode (Q^) becomes forward-biased and begins to inject
holes into the base region, subsequently modulating
and increasing the conductance of the device. Experimental
decomposition of the total current into its constituent
anode end drain components has revealed that this abrupt
increase in conductance, after the LIGBT is activated,
results primarily from the modulation of R and not from
epi
an increase in the anode (BJT) current. The modulation of
this resistance tends to increase the DMOST current, but
also tends to limit the excitation of which is driven
by the internal voltage drop. We note that physical
insight predicts and experimental results confirm that this
drop activates predominantly and not Q2, which is one
reason why our assumed partitioning is representative.
In Figure 5-5 we show the experimental decomposition
of anode and drain current for the HIGBT mode of operation.
Also shown, for comparison, is the LIGBT current-voltage
characteristic. Figure 5-5 clearly illustrates that the
anode current in the HIGBT mode is only a small fraction of
the total current, and furthermore, only a fraction of the
IGBT current. This decompostion and comparison of internal
currents verifies our partioning scheme and also explains
why the latch-up onset for the HIGBT mode is much greater
than that for the LIGBT mode. In both modes of operation
the emitter current of I is approximately the same
at the onset of latch-up. Obviously however, the primary
(


104
EB
= V
JEB
q("n+V
W
M
rJ i
dx
p( x)
(b-1)
T5TT)
kT
q
ln(
£(01
N
)
epi
(5-3)
where WM equals Nep' the base-region doping density JE is the
emitter (anode) current density, and b /^//Wp is the
electron/hole mobility ratio. (We generically refer to the
n base region as also the epi region, even though it may
not have been produced by epitaxial growth as in the case
for our devices modeled in Section 5.3.)
Using the quasi-equilibrium assumption, we express
p(0), and hence V in terms of VTC,D:
Sp 1 J IjD
p( o)
n. 2
i
N
exp(-
qV
JEB .
epi
kT
(5-4)
(If in a simulation p(0) is calculated to be less than or
equal to Nepi' the model is defaulted to the off-state
since the high-injection analysis is inapplicable.) For
negligible recombination in the emitter-base junction
space-charge region, JE can be related to p(0) following
conventional PlN-diode theory [Be79]:
Jn =
b+1
~b~
* JNO*
pm
n.
]
qA IS
x = 0
(5-5)


74
neglect any mobile carrier charge that might exist in the
space-charge region for very high current densities [Gh77].
To relate p(0) in (4-2) to VAB, it is necessary to
characterize V since
epi
V = v + V
AB epi JEB
(4-4)
where
VJEB vijln t
P( 0)N
££i]
n.
(4-5)
is the emitter-base junction voltage (not equal to the
quasi-Fermi potential separation) [Wa83]. In (4-5), Nep
is the doping density in the n~ epitaxial base of the pnp
BJT and VT=kT/q is the thermal voltage. Accounting for the
conductivity modulation, we give V ^ by the integral of
the electric field across the quasi-neutral base, where the
field is related to p(x) through a combination of the hole
and electron current expressions [Gh77]:
dx
epi q ( v+fJ ) J p(x)
11 V n
WM
M
rJ
(b-l) kT
(b+1) q
In (
P(0)
N
epi
(4-6)


155
[Je87]
[Ku85]
[La85]
[ L i 6 7 ]
[Mc87]
[Mc85]
[Mu87]
[Mu77]
[Na75]
[Pi8 4 ]
H. Jeong and J.G. Fossum, "Physical Modeling
of High-Current Transients for Bipolar
Transistor Circuit Simulation," IEEE Trans.
Electron Devices, vol. ED-34, pp. 848-905,
April 1987.
D.S. Kuo, J.Y. Choi, D. Giadomenico, C. Hu,
S.P. Sapp, K.A. Sassaman, and R. Bregar,
"Modeling the Turn-off Characteristics of the
Bipolar-MOS Transistor," IEEE Electron Device
Lett., vol. EDL-6, pp. 211-214, May 1985.
J.E. Lary and R.L. Anderson, "Effective Base
Resistances of Bipolar Transistors," IEEE
Trans. Electron Devices, vol. ED-32, pp.
2503-2505, Nov. 1985.
J. Lindmayer and W. Schneider, "Theory of
Lateral Transistors," Solid-State Electron.,
vol. 10, pp. 225-234, 1967.
R.J. McDonald, J.G. Fossum, "Physical Modeling
of LIGT Structures for SPICE Simulation of Power
Integrated Circuits," ECS Symposium, Philadelphia,
PA, May 10-15, 1987.
R.J. McDonald, J.G. Fossum, and M.A. Shibib,
"A Physical Model for the Conductance of
Gated PIN Switches," IEEE Trans. Electron
Devices, vol. ED-32, pp. 1314-1320, July 1985.
S. Mukherjee, M. Amato, and V. Rumennik,
"Influence of Device Structures on the
Transient and Steady State Characteristics
of LIGT," ECS Symposium, Philadelphia, PA,
May 10-15, 1987.
R.S. Muller and T.I. Kamins, Device
Electronics for Integrated Circuits.
New York: Wiley, 1977.
L.W. Nagel, "SPXCE2: A Computer Program to
Simulate Semiconductor Circuits," Electronics
Research Lab., University of California,
Berkeley, Memo. ERL-M250, May 1975.
M.R. Pinto, C.S. Rafferty, and R.W. Dutton,
PISCES-II User's Manual. Stanford,
CA: Stanford University, 1984.


ACKNOWLEDGEMENTS
The support of the IEC at the University of Florida,
the NSF, and the SRC is acknowledged.
The technical guidance of Dr. M. A. Shibib of AT&T
Bell Laboratories in designing and fabricating the special
test structures used in this dissertation is appreciated.
His participation on the qualifying exam and on the final
defense also merits a note of gratitude.
iii


130
during phase two, then the solution to (5-12) implies a
fast linearly decaying current, inversly proportional to
RnB" 0ur mdel simulations for the HIGBT turn-off
transient (Figure 5-11) clearly show the predicted linear
nature of the second phase. Experimental corroboration of
this analysis can be inferred from [Go86], where the decay
during phase two is found to be approximately linear in
time. Thus, to effect a fast turn-off, R should be made
ni5
as small as possible, but consistent with the constraint
for a low onset voltage (R _< nb m3
The circuit topology as depicted in Figure 5-4, and
used in our simulations, is not capable of maintaining a
latched state (steady-state solution) during transient
operations in SPICE. As a consequence, it is not possible
to observe dynamic latch-up directly, i.e., to see the
anode current remain constant with time when the gate
voltage is removed. However, the onset of dynamic latch-up
may be indirectly observed by monitoring the current *CNPNf
which represents the injection of electrons by the
parasitic n+pn~ BJT.
We demonstrate the ability of the modeling methodology
to predict the onset of dynamic latch-up in Figure 5-12,
where we have plotted the current, ICNPN/ as a function of
time for a resistively loaded LIGBT turn-off transient.
The sharp increase in IcNPN during the fast turn-off
transient (TFa^=2ns) indicates the onset of dynamic
latch-up and is consistent with


21
[He68]:
(2-20)
From (2-9), (2-10), (2-12), and (2-14), we see that JNA and
C 2 2
Jp are proportional to [n(0)] and [n(W)] respectively.
In contrast, using (2-11) we see that
(2-21)
where
(2-22)
is an average carrier density in the ji region. Thus as J
increases, a larger portion of the current is supported by
recombination in the anode and cathode regions; becomes
negligible. Furthermore, since dn/dx H, as can be seen
by differentiating (2-11), the diffusion current in the n
region becomes negligible as J increases [He68]; the holes
and electrons predominantly drift across the n region.


102
gain in the BJT modules, which invalidates the commonly
used SPICE Gummel-Poon model [Ge78], necessitate new (more
physical) models.
We first focus our attention on the one-dimensional
low-gain pnp BJT constituent module (see Figure 5-1), and
overview the development given in Chapter 4. The low
doping density in the wide n~ base region implies that,
under normal forward-mode operation, high injection will
prevail throughout the base. Consequently, the base
transport problem is described by the ambipolar transport
equation with p=n, the solution of which gives
n ( x ) = p ( x ) =
P(0)sinh(^^)
LA
sinh(^)
la
(5-1)
where p(0) is the hole density at the edge of the
emitter-base (p+n~) junction space-charge region, L is the
~ n
ambipolar diffusion length, and W is the voltage-dependent
width of the quasi-neutral base region. We describe W
through the depletion approximation at the reverse-biased
collector-base (pn~) junction:
" WB Xd
W
(5-2)


Figure 4-1. Basic IGBT structure.


48
The IGBT is turned off by removing the gate voltage, and
hence the MOS channel through which electrons flow for
recombination in the p+ anode and n- epi regions. The
removal of the channel occurs quickly, on the order of the
electron transit time which is typically a few tenths of a
nanosecond [Ba81]. In order to characterize the IGBT
turn-off transient, the external circuit, represented in
Figure 3-3, must be considered. When the channel is
removed (virtually instantaneously), but 1 cannot
drop instantaneously because the reverse bias on the pn-
junction (J2 in Figure 3-3) does not increase abruptly; the
depletion capacitance of J2 is (partially) charged in short
but finite time, as controlled by the external circuit.
This initial phase is completed when I, defined by the
external circuit and developed reverse bias on J2 (V^)
equals the time-dependent BJT collector current, defined by
the (time-dependent) depletion-region width of J2. Little
carrier recombination occurs during this fast transient.
The second phase of the turn-off, however, is controlled by
carrier recombination in the epi region (and perhaps in the
anode region), and hence the completion of the development
of Vj2 is slower than the first phase. The carrier
lifetimes are typically longer than the time constant that
characterizes the initial transient.
Since the first phase is usually much faster than the
second, we will characterize the composite turn-off by


54
^MOS' wrongly implied in Baliga [Ba85] and Kuo et
al. [Ku85].
To demonstrate the virtual independence of the
transient result (3-11) from the steady-state analysis,
and
which defines I
obtain
0
IMOs' we combine (3-9)-(3-ll) to
r2eSVB,AI,1
xdm f qN i I
M epi 0
1/2
(3-12)
Thus measurement of the first phase of the turn-off
transient, i.e., of IQ and Al, enables evaluation of x^m,
which from (3-11) describes the constitution (an<^
I c ( b jt ) ^ f t^ie steacJy-on-state current Ig.
The slower decay of I [from Ig-AI) to zero] in the
second phase of the turn-off is similar to the transient
response of a BJT in the active mode following the abrupt
removal of the base current [Mu77]. Whereas the
first-phase transient is controlled predominantly by the
charging of the J2 depletion capacitance, we assume that
the second-phase transient is controlled by carrier
recombination. Thus the J2 displacement current [dQ^/dt
in (3-4)] is neglected, and we write, based on (3-5),
Qp(t)
'tp
Kt)
(3-13)


51
where Qp
(t) is
the
hole charge
n base
region
and
Ttp is
base
transit
time
in
(3-5)
is
depletion regi
on
(width
xd>
moving boundary, which is not
previous work [Ba85,Ku85], is
phase of the as we demonstr
high-injection conditions, we a
stored in the quasi-neutral
transit time for holes. The
ime-dependent because the
of J2 is expanding. This
accounted for properly in
most important in the first
ate below. For prevalent
ssume [Gh77]
TtP(t)
[WB-Xd(t))
(3-6)
where Wg is the metallurgical base width of the vertical
p+n-p BJT and KA is a constant less than unity discussed
below. Rigorously (3-6) (with KA=1) applies to a
one-dimensional device in which there is no recombination
in the base nor back injection into the emitter. However,
we assume that it (with KA<1) is representative of the
actual IGBT structure illustrated in Figure 3-1.
Independent of the finite base current, KA accounts for the
multidimensional carrier flow in the epi, in which case to
first order it could be given as the ratio of the BJT
collector and emitter areas. We note also that KA*1 can
effectively account for the influence of the base current
(recombination in both the n epi and the p+ anode) on the
transit time [Ku85].


CHAPTER 6
SUMMARY AND CONCLUSIONS WITH RECOMMENDATIONS
6.1 Summary and Conclusions
The culmination of this dissertation manifests itself
in Chapter 5 where we brought together the physical
insights and techniques presented in earlier chapters to
develop a methodology for constructing, and implementing in
SPICE, physical network representations for a general class
of HV/P IC devices exemplified by the LIGBT. We verified
our network models by comparison with PISCES simulations
and by comparison with experimental results obtained from
specially designed test structures. Included in the novel
network representations were several high-injection and
unique effects inherent in HV/P IC devices, heretofore not
represented in more empirical (less accurate) equivalent
circuit models. The effects characterized included
conductivity modulation, enhanced back injection,
multidimensional current flow, and the onset of static and
dynamic latch-up.
134


121
the onset of latch-up is properly accounted for in the
dQjCi
models as the charging current, gt-' contributes to the
voltage drop across and hence helps to induce latch-up.
5.4 Simulations/Verification
In Figure 5-7 we show model-simulated and measured
current-voltage curves for the LIGBT mode of operation for
three different values of the gate voltage. For
illustrative clarity, the measured curves were cut off just
prior to latch-up. The agreement between experiment and
theory is good (~10% error), thus lending support to our
particular partitioning and modeling methodology.
Discrepancies between the model predictions and
experimental results may be attributed to the first-order
DMOST model (SPICE/Level 2) that we used.
In Figure 5-8 we compare measured and model-simulated
transient turn-off characteristics of the LIGBT. At time
t=0 the gate voltage is removed and a typical two-phase
turn-off transient, as discussed in Chapter 3, is observed.
Our model simulations are in good agreement with
experiment. Discrepancies between the model and experiment
may be attributed to parasitics associated with the probe
station, since our transient measurements were performed on
a wafer and not on mounted devices. The turn-off time may
seem faster than expected for a lifetime of 2.6//S, but
this is due to the large proportion of base current, a


113
experimental results. To first order, they may be
estimated from PISCES results. This particular partition
is indeed representative of the device as implied by (a)
PISCES simulations, (b) experimental decomposition of
current voltage characteristics, and (c) relative
excitations of Q-^ and Q2 in the hybrid HIGBT mode of
operation discussed later.
The SPICE model for the LIGBT mode is shown in Figure
5-4. It consists of a simple MOSFET and 11 UDCSs. The
UDCSs labeled with the subscript one represent and those
with the subscript two represent Q2. The current source
ICNPN moc^e-*-s the third constituent BJT at the cathode as
it, when activated by the voltage drop in the p-base
reflected by RpB> effects the onset of latchup, which is
discussed later.
In the hybrid HIGBT mode of operation, the anode and
drain are tied together and raised to a positive voltage
relative to the source. The gate voltage, as in the the
LIGBT mode, is above the threshold voltage. For low drain
voltages, the device behaves as a DMOST, in series with a
large resistance, R .. The anode does not inject because
epi J
it is at the same potential as the drain. As the drain
current through R ^ is increased, an internal voltage drop
develops (vertically in this particular device) across a
portion of the epi region. When this voltage drop becomes
approximately 0.6V (viz., a diode drop) a portion of the


105
where DA is the ambipolar diffusivity, and Jnq is the
saturation current density that defines the back injection
of electrons into the quasi-neutral eitter region. The
base current density, JB, is the sum of the back injection
current plus the integrated recombination current in the
base region:
JB =
JN0[
ElSi^
n.
i
w
q J
0
p( x)
TH
dx
(5-6)
where xH is the high-injection carrier lifetime [Note that
1/2
La=(Dath) 7 ]. The collector current density, Jc, is
expressed as J-J. The cross-sectional area A relates the
terminal currents l_ and l_ (and In) to the respective
current densities.
The transient modeling of the transistor is done using
a charge-based method employing the quasi-static
approximation. This approximation, which is used
extensively for IC modeling [Ge78], is generally adequate
except for circuits much faster than typical power ICs
[Fo86b].
The predominant charges in the wide-base BJT module
(in the forward-active mode) are the quasi-neutral


14
To account for the effect of the shield, i.e., to
define AEfn, we neglect recombination in the shield, which
is typically much less than the carrier fluxes through the
shield. Then AE^ can be related to the electron current
Fn
c
density JN flowing in the shield, which constitues part of
the total current density J described by basic PIN-diode
theory.
For simplicity, we assume an (effective) uniformly
doped shield. Since the shield-cathode junction is in low
g
injection, the uniform-doping assumption implies that JN is
diffusion current, which is nearly constant:
N
_ An
q nws
qD n?
M n i
naws
AE
exp(-
FC w ,
£y~)[exp(
AE
Fn
kT
) 1]
(2-3)
where Dr is the (average) electron diffusion coefficient in
the shield, NA is the (~ peak) doping density, and Wg is
the (effective) width of the shield. From (2-3),
AE
FC
AE
Fn
4
kT In 1 +
JN FsexP(- -kf->
kTn?
i
(2-4)
where
A kAWS
S qDn
(2-5)


BIOGRAPHICAL SKETCH
Robert James McDonald was born in Queens, New York, in
1954. He received the BSEE degree (Magna Cum Laude,
3.75/4.0) from Virginia Tech in 1982 and the ME degree in
electrical engineering from the University of Florida in
1984. His doctoral research involves modeling of HV/P IC
devices.
He received a General Moters Scholarship in 1980, a
Graduate Council Fellowship from the University of Florida
in 1982, and an SRC Fellowship in 1986.
He is a member of Phi Kappa Phi, Eta Kappa Nu, and
IEEE.
158


79
CP
A (IA IB)
hi
(4-14
In (4-14), and in (4-8), (4-9), and (4-11), we have crudely
accounted for the two-dimensionality of the pnp BJT by
including the (constant) collector-emitter area ratio,
which is less than unity. Although this accounting is
semi-empirical it does reflect the reduced base transport
factor in a typical IGBT due to hole injection into a
portion of the base that is laterally removed from the
collector, as shown in Chapter 3 [Fo86a]. Model
predictions made without the area ratio do not compare
favorably with experimental results, whereas those made
with it do. We note that for lateral devices,discussed in
Chapter 5, however, a more physical accounting for the
multidimensional effects is essential.
Because of the implicit nature of the model equations
(4-2)-(4-14), it is not possible to express p(0), and hence
the terminal currents, as explicit functions of V.D and
At)
BK'
Thus, for a given VAB and VRK. supplied by the SPICE2
BK
nodal analysis, (4-4) is solved iteratively (Newton's
method) for p(0) in a FORTRAN (UDCS) subroutine, and the
model equations are then used to determine IM, IOT,, I..,
^ MOS CP CN
Vepi' PB' an<^ JC The moc*e-*- clearly quasi-static; at
each point in time, the steady-state model equations are
solved in a UDCS subroutine and the solution (a terminal


67
not necessarily in explicit form, for the quasi-static
device terminal currents and charges (the models are
charge-based) in terms of the terminal voltages. This
system of equations, i.e. a physical device model, is part
of a subroutine that is referenced by user-defined
controlled sources (UDCSs) in SLICE [Ha84], one of the many
enhanced versions of SPICE2 that have been written. The
UDCSs generally available in enhanced versions of SPICE2,
are simple FORTRAN subroutines [Ve86] that constitute the
"equivalent-circuit" model, which simulates both
steady-state and (quasi-static) transient device
characteristics. With judicious programming and data
storage, UDCSs can be used effectively for simulation of
circuits in which the number of HV/P devices is not
excessive.
4.2 Modeling Methodology
The utility of the novel methodoly is demonstrated by
its application to the IGBT [Ba84b], as illustrated in
Figure 4-1. The IGBT is representative of emerging HV/P
devices that merge MOS and bipolar structures to exploit
the advantages of both. The (n-channel) IGBT shown is
effectively a vertical pnp BJT, the base of which is driven
by a DMOST, with a parasitic npn BJT at the cathode that
can cause latch-up and loss of gate control of the IGBT
switch. In contrast to the conventional DMOST, the


a representative HV/P IC device, the LIGBT, and the derived
model is implemented in SPICE via user-defined controlled
sources (UDCSs).
The methodology is supported by rigorous theoretical
analyses of several HV/P IC devices, two-dimensional
numerical device simulations with PISCES, and experimental
results obtained from specially fabricated test structures.
The resulting physical network representations, in addition
to the CAD ability they afford, will facilitate optimal
device (process) design under an actual circuit (transient)
environment, a capability that most device simulators do
not have.
vi 1


109
simulation process. This implementation of an implicitly
formulated model allows for flexibilty in the modeling
methodolgy, and enables truly physical device models to be
incorporated into the device simulator.
We now exemplify the modeling methodogy by applying it
to the LIGBT test structure, and partitioning the structure
into one-dimensional modules for each mode of operation.
5.3 Application/Demonstration
Test structure of LIGBTs were fabricated using the
dielectric-isolation (DI) BCMOS technology [Go87] developed
at ATT Bell Laboratories. The LIGBT is dielectrical
isolated from the substrate and from other components to
minimize parasitic effects, thus allowing access to the
drain of the DMOST separately from the anode of the LIGBT
and making it easier to measure electrical parameters of
the structure. This facilities the demonstration of our
modeling methology, including the parameter extraction and
comparisons between model predictions and device
measurements.
The LIGBT structure shown in Figure 5-1 can operate in
several modes (PIN, DMOST, LIGBT, HIGBT) depending on the
terminal configuration. We must therefore develop a
systematic and consistent approach to modeling the various
modes of operation. The physical nature of our constituent
modules facilitates parameter extraction by minimizing the


63
effects of a buffer region on device performance, as
presented in Chapter 2, may be applied to IGBT structures
to study the trade-off between decreased turn-off time and
increased on-resistance arising from the buffer-induced
reduction in base-region mobile carrier concentration.
The utility of the physical insight afforded by our
model for the transient turn-off should be stressed.
Whereas previous work has shown that TQ is reduced by
decreasing th and increasing AI, it has not demonstrated
how the reduction obtains and it has not clearly revealed
how AI can be increased most effectively. Furthermore the
previous work, which is based strictly on one-dimensional
analysis, did not reveal the subtle but critical influence
of the IGBT geometry on its transient turn-off
characteristic. The constant KA<1 in our model, although
somewhat empirical, reflects this influence. Our analysis
can further facilitate model parameter evaluation for IGBT
circuit simulation. For example, it is possible to
interpret a measured turn-off transient using our analysis
and extract, for a given on-state current Iq, values for
IMOS (an<^ hence 3)/ th/ and jno* This utility
interest in the general area of CAD of HVICs.
should be of


37
Table 2-1. GDS parameter values inferred from
theoretical-experimental current-voltage
correlation.
JN0
=
4X10~12
A/cm2
JP0
-
lxlO-12
A/cm2
T0
=
1X10-5
sec
Fs
_
1.5x1011
2
V-sec/cm
"n

920
cm /V-sec
"p
=
330
2
cm /V-sec
A

5X10-5
2
cm


137
(subcircuit) for a particular HV/P structure, without
recourse to UDCSs. We now outline several research areas
essential for the construction of a CAD library for HV/P IC
design.
First, we recommend the extension of our empirical
DMOST model. Since the DMOST is an integral part of many
HV/P devices, it is essential that a simple and accurate
model for this common HV/P device be developed. The device
physics underlying the DMOST when the drain region becomes
conductivity modulated needs clarification. The simple Sun
and Plummer [Su78] model is not applicable to DMOSTs in
which the drain undergoes significant
conductivity-modulation, as in the LIGBT.
Second, we recommend extending our wide-base BJT model
(Appendix A) for all regions of operation, thus making it a
viable circuit-simulation tool. In addition, since nearly
all LIGBTs employ punch-through shields, a more
representative wide-base BJT would be a p+n+n-p structure.
The insights gained from modeling the GDS in Chapter 2
would be helpful in characterizing such a transistor
structure.
Third, we recommend the creation of a standard
PIN-diode model for circuit simulation. Many HV/P
structures contain this basic device, and such a model
would be useful for parameter-extraction methods involving
optimization techniques, as was done in Chapter 5.


38
Table 2-2. Calculated dependences of R and R
on Jtgo' Jpo' and To for w=35' /um. The
remaining parameter values are given
in Table 2-1. The values of R and
Ron in parentheses were calculated
accounting explicitly for carrier-
carrier scattering [Ch70].
JN0 (A/cm2)
Jp0 (A/cm2)
tQ (/vs)
V (2)
eon (a)
4XlO~12
-12
1X10
10
81.7
(77.7)
21.5
(27.5)
4X10-12
5X10_13
10
69.4
(71.3)
16.1
(25.1)
5X10-13
-12
1X10
10
62.3
(67.2)
12.5
(22.5)
-12
4X10
-12
1X10 1Z
50
68.5
(69.2)
16.5
(23.0)
4X10~12
5X10-13
50
59.6
(64.0)
12.4
(21.0)
5X10-13
-12
1X10
50
54.2
(60.7)
9.6
(18.6)
5X10-13
5X10-13
50
50.2
(57.7)
7.7
(16.9)


77
The composite base current IB of the pnp BJT, in the
steady-state, is the sum of recombination current from the
n base region and that from the p+ emitter region. It is
expressed as
XB "
-PB
TH
aejno[
p(0) i2
n. J
(4-11)
where xH is the high-injection carrier lifetime [Gh77] in
the base. The second term in (4-11) obtains for
quasi-equilibrium because low injection prevails in the
emitter. The electrons that support the recombination
current IB are supplied by the DMOST (iMqs^ under normal
operation, but in part also by the npn BJT (1CN) near
latch-up:
IM0S 1B ICN '
(4-12)
Analytical decomposition of ID, as well as characterization
O
of the n base transport current ICp/ must be done
implicitly and hence demonstrates poignantly the essence
(flexibility) of the modeling methodolgy, in contrast to
the less-flexible equivalent-circuit modeling built into
SPICE2.


45
IMOS IB(BJT)
(3-1)
where I
is the base current in the p+n p BJT, which
comprises recombination in both the base (n epi) and
+
emitter (p
anode) regions. The IGBT (anode-cathode)
current I is
(3-2)
I = I
+ I
B(BJT)
C(BJT)
the base transport (hole) current. Note that the actual
current gain of the BJT, |3 = Ic ( b JT)/JB ( B JT ) dePends
critically on the geometry of the IGBT structure.
Consequently, analysis of the device for the transient as
well as steady-state conditions must somehow account for
the multidimensional carrier flow.
The IGBT voltage VA can be written as the sum of four
voltage drops
+
(3-3)


112
Figure 5-3
PISCES simulation for the
shown in Figure 5-1. The
the negative hole current
current vectors around the
LIGBT structure
arrows indicate
vectors. The
junctions (high
grid density) have been removed for
illustrative clarity.


55
where rfcp is an average transit time, which can be crudely
approximated based on (3-6), as
(WB-Xdm
4K- D
A p
(3-14)
with x^m given by (3-12). The use of (3-14) greatly
simplifies the analysis of the second transient, and hence
facilitates physical insight and identification of critical
device parameters that define the turn-off. The
simplication is representative because typically the
increase in x^ beyond x^m is less than x^ ; the relative
change in during the transient during the transient is
smaller than that of Qp. The decay of I(t) in our model is
thus defined predominantly by the time-dependence of Qp(t)
[Ku77]; and errors resulting from the use of (3-14) are
minor and do not derogate the utility of the model.
In BJT terminology, I(t) is the emitter current, which
is equated in (3-13) to the collector current because the
base current is constrained to zero [Mu77]:
p(t) + dP(t) +
th dt
n(t)
n
+ dQn(t:
dt
0.
(3-15)


4
IGBT structure. The effects of the expanding depletion
region at the cathode and of minority-carrier injection
into the anode are properly accounted for. Consequently
the physics underlying the turn-off time is clarified, and
device design criteria for shortening it, without
considerably degrading the on-state current conduction
capability, are suggested.
In Chapter 4, a novel methodology for flexible SPICE
implementation of physical models for HV/P devices,
accounting for their unique characteristics, is presented
and demonstrated. The implementation is achieved, without
having to modify the simulator code, by utilizing UDCSs
that reference a subroutine which defines, not necessarily
in explicit form, the system of model equations. The
simultaneous solution of the equations, which describes the
integrated charges in the device and the quasi-static
terminal currents in terms of the terminal voltages, is
effected by the SPICE2 nodel analysis. The methodolgy is
exemplified by modeling a particular high-voltage device,
the IGBT, in which conductivity modulation and latch-up are
accounted for. SPICE simulations of dc and transient
characteritics of IGBT switching circuits are discussed and
shown to be representative of measurements. The
flexibility of the modeling methodolgy for HV/P IC CAD is
demonstrated by simulating effects of both static and
dymanic latch-up in the merged bipolar/MOS structure of the
IGBT.


2
those ICs employing MOS-controlled bipolar devices, has
been at a near standstill. Common high-injection effects,
such as conductivity modulation and enhanced back
injection, are not properly accounted for in existing,
empirical circuit models for HV/P devices [Pa86].
Furthermore, these models vitually ignore multidimensional
carrier flow, which is typical in integrated HV/P devices.
Thus, there exists a need for developing new physically
based models for HV/P devices and implementing these models
in a circuit simulator, e.g., SPICE [Na75],
This dissertation is concerned with the development
and implementation of network representations for a general
class of merged MOS-controlled bipolar structures, e.g.,
the lateral insulated-gate bipolar transistor (LIGBT)
[Da84, Si85], The major contributions made in this work
are as follows:
(1) the general formulation and solution of the
steady-state transport problem for the
basic p+pnpn+ structure, in terms
of quasi-Fermi level potentials, explicitly
showing the effect of the p punch-through
shield on the transport problem;
(2) the physical (charge-control) characterization of
the IGBT turn-off transient, clearly identifying
the device parameters controlling the important
charging mechanisms;


80
current or charge density) is then referenced by the main
SPICE2 nodal analysis program [Ve86]. We note that in
addition to the transcapacitances in (4-10), the
transconductances 9I^/3Vj for each current UDCS must be
evaluated in the nodal analysis. These evaluations are
done numerically using first-order finite-difference
approximations.
The merged structure of the IGBT makes model parameter
evaluation difficult because of two-dimensional current
flow and inaccessibility of internal model nodes for
measurement. Model parameters for the DMOST and BJT
components of the IGBT can be estimated from a knowledge of
processing variables, doping density profiles, and
geometry. The threshold voltage for the DMOST can be
estimated from measurements of Ia^VGK^' although the
channel conductance cannot be inferred experimentally
without a special test structure. The two most important
As will be
shown in Section 4.3, these two parameters greatly
influence the steady-state on-resitance and turn-off time
of the IGBT. From a knowledge of the pnp BJT emitter
doping density, Jnq can be estimated analytically [Fo81];
and th can be obtained from a fitting of a measured
turn-off transient once Jnq is known, as described in
Chapter 3.
from a knowledge of the p-base doping density, or Gummel
parameters for the pnp BJT are xH and jnq
NO
For the npn BJT, I_.T and Rn,, can be estimated
c SN BN


153
[ B e 8 5 ]
[Be79]
[Ch70]
[Da84]
t De86 ]
[ F15 7 ]
t Fo77 ]
[Fo86a]
[Fo87 ]
[Fo81 ]
H.W. Becke, "Approaches to Isolation in High
Voltage Integrated Circuits," IEDM Tech. Dig.,
pp. 724-727, 1985.
F. Berz, R.W. Copper, and S. Fagg,
"Recombination in the End Regions of PIN
Diodes," Solid-State Electron., vol. 22,
pp. 293-301, 1979.
S.C. Choo, Effect of Carrier Lifetime on the
Forward Characteristics of High-Power Devices,"
IEE trans. Electron Devices, vol. ED-17,
pp. 647-652, Sept. 1970.
M. Darwish and K. Board, "Lateral Resurfed
Comfet," Electron. Lett., vol. 20, pp. 519- 520,
June 1984.
M.J. Declereq and J.D. Plummer, "Avalanche
Breakdown in High Voltage D-MOS Devices,"
IEEE Trans. Electron Devices, vol. ED-23,
pp. 1-6, Jan. 1976.
N.H. Fletcher, "The High Current Limit for
Semiconductor Junction Devices," Proc. IRE,
vol. 22, pp. 862-872, June 1957.
J.G. Fossum and F.A. Lindholm, "The Dependence
of Open-Circuit Voltage on Illumination Level
in P-N Junction Solar Cells," IEEE Trans.
Electron Devices, vol. ED-24, pp. 325-329,
April, 1977.
J.G. Fossum and R.J. McDonald, "Charge-Control
Analysis of the COMFET Turn-off Transient,"
IEEE Trans. Electron Devices, vol. Ed-33,
pp. 1377-1382, Sept. 1986.
J.G. Fossum and R.J. McDonald, "Analysis of
the Unique Characteristics of the Hybrid
LIGT/DMOST (HIGT)," IEEE Device Research Conf.
Santa Barbara, CA, June 22-24, 1987.
J.G. Fossum and M.A. Shibib, "An Analytic Model
for Minority-Carrier Transport in Heavily
Doped Regions of Silicon Devices," IEEE Trans.
Electron Devices, vol. Ed-28, pp. 1018-1023,
Sept. 1981.


APPENDIX A
HIGH-CURRENT TRANSPORT IN WIDE-BASE BJTs
In this appendix we briefly overview carrier transport
in wide-base (p+n~p and n+p~n) BJT structures. The
approach is based on an ambipolar transport analysis and
has its historical roots set in PIN-diode theory [He68].
Consider a p+n p transistor structure operating in the
forward-active mode for which high injection (p=n>>ND)
obtains in the n~ base region. A straightforward ambipolar
analysis [He68] can be used to equate the electron
recombination current density in the p+ emitter, JN, to the
electron current density in the n- base at the edge (x=0)
of the emitter-base junction space-charge region
(neglecting any space-charge region recombination), thereby
yielding the following relation between JN and the total
emitter current density, JE:
N
b
F+T
qDAnf
x=0
(A1 )
139


5
In Chapter 5, to enable CAD of power integrated
circuits, new physical models for lateral HV/P devices, in
particular LIGBT [Da84, Si85, Mu87] structures, are
developed and implemented in SPICE. The models are
charge-based, and, via regional partitioning, account for
the unique features of HV/P devices unaccounted for in
conventional equivalent-circuit models. The implementation
of the models in the circuit simulator is flexible and
allows these features (e.g., multidimensional carrier flow,
conductivity modulation, latch-up, transcapacitance) to be
simulated without having to sacrifice much physics through
excessive empiricism. Device measurements of specially
designed test structures, supplemented with two-dimensional
numerical device simulations, support the modeling
methodology and the model parameter extraction.
We summarize, in Chapter 6, the main conclusions and
accomplishments of this dissertation. We also suggest
ideas and avenues for future research.
In Appendix A, we briefly describe high-current
carrier transport in wide-base transistor structures. The
resulting simplified model predicts a fundamental
difference for the high-current 8s of pnp and npn
transistors. The physical insight afforded by the
simplified analysis will be useful for device engineers
designing complementary iGBTs.


132
experimental results. Note that for a slower turn-off
transient (TFal^=200ns), ICNPN remains unchanged during the
time period shown in Figure 5-12. Eventually, for such a
slow transient, -^cnpn decrease to zero and the onset
of dynamic latch-up will not manifest itself. Our
simulations indicate that the primary current responsible
for initiating the onset of dynamic latch-up for the above
dQjCi
circuit conditions is the displacement current, Jt-'
However, for other circuit conditions the increase in the
transient collector current could be made significant. We
note that the utility of the model to predict the onset of
dynamic latch-up will make it useful for optimizing device
design under an actual circuit (transient) environment.
5.5 Summary
We have developed a device modeling methodology needed
for the CAD of HV/P ICs that is also useful for optimal
device (process) design. The methodology is based on a
regional partitioning of LIGBT structures through physical
insight gained from numerical simulations (PISCES) and
experimental results (special test devices). The regional
partitioning of a lateral structure defines an array of new
one-dimensional device modules, which properly (physically)
model the unique features of HV/P devices. We have
demonstrated this flexible quasi-2-D methodology on an
LIGBT test structure for all possible active modes of


70
Gate
Figure 4-2. UDCS representation of the IGBT
implemented in SLICE/SPICE2. This is
not an equivalent circuit; the node B
is labeled merely to signify the internal
connection between the base region of the
pnp BJT and the drain of the DMOST. The
anode of the IGBT is referred to as the
emitter of the pnp BJT, and the cathode
as the collector.


65
shown to be
representative of
measurements taken
from
the
literature.
Both static and
dynamic
latch-up for
the
IGBT
are simulated, thus demonstrating the
flexibility
of
the
modeling methodolgy for HV/P IC CAD.
Recent advances in silicon IC processing technologies
have intensified development of "smart" high voltage/power
(HV/P) circuits, in which low-power logic and high-voltage
devices are integrated on the same chip. Computer-aided
design (CAD) of such circuits is critically dependent on
reliable device simulation, for example with SPICE2 [Na75].
HV/P devices have unique characteristics that are not
amenable to lumped-element, equivalent-circuit
representation, and hence the built-in device models in
SPICE2 are generally inadequate. Such characteristics
include effects of merging bipolar and MOS structures,
latch-up, conductivity modulation, and moving-boundary
(during transient) conditions. The inadequacy of the
SPICE2 MOSFET models for HV/P IC simulations is clearly
inferable from [Su80]. The SPICE2 BJT (Gummel-Poon (Ge7 8])
model is clearly deficient; for example, its basic
(integral-charge-control [Ge78]) assumption is invalid for
HV/P BJTs having significant back injection or relatively
low currents gains.
Therefore to enable reliable CAD of HV/P ICs, new
device models must be implemented in SPICE2, or in
comparable circuit simulators. Because of the unique


125
t (ns)
Figure 5-9. Measured HIGBT anode/drain current versus
anode/drain voltage for three values of
gate voltage (VQ = 6V, 8V and 10V from right
to left respectively). The measured curves
are terminated just prior to the onset of
latch-up.


88
[Ba85,Ku85], our SLICE/SPICE2 simulations show that the
abrupt drop in IA(t) is not equal to the steady-state DMOST
current = (even when I.T is zero), and that the slow
decay of the second phase is not a simple exponential
function of the high-injection lifetime tH.
These
differences result, respectively, from the unique effects
of the expanding depletion region at the base-collector
junction and the back injection of electrons into the
emitter characterized by Jnq, poignantly demonstrated in
Chapter 3.
In Figure 4-7 we show simulated IGBT resistive
turn-off transients for various values of x and To
H NO
stress the influence of these parameters, we used a small
value for RGR that ensured the insignificance of transients
associated with the gate-to-cathode capacitance. The
magnitude of the fast initial drop in anode current and
subsequent slower decay are both dependent on th and JNg
These simulations and others have shown that changes in Jnq
should be considered as a means of optimizing the trade-off
between turn-off time and on-resistance. We stress that
these results could not be obtained using standard SPICE2
BJT models because of the limitations inherent in the
Gummel-Poon model [Ge78] and its implementation in SPICE2.
We stress that the results in Figure 4-7 are ideal in
that, in addition to negligible gate delay, there is also
no inductance in the load. For contrast, we show in


15
is a shield factor that can be used to relate AE_ to the
Fn
actual properties of the (diffused or implanted) p shield.
To relate Fg to an actual p shield in which NA varies,
note that generally
dx
(2-6)
S
N J D
n
(shield)
and that n(x)1/NA(x). Since the greatest contribution to
the integral in (2-6) comes from the region of the shield
where N (x) is a maximum (and D (x) a minimum), F in (2-5)
n q
can be evaluated for this region, the width W of which can
O
be estimated from the actual NA(x).
We now incorporate (2-4) into basic PIN-diode theory
to characterize the conduction properties of the GDS. This
involves generating a system of equations, the simultaneous
solution of which for a specified J yields AEFn, AE ,
AEfc, V VA* The resulting J(VA) characteristic, with the
cross-sectional area A (I=JA), then defines RDC and RQN-
We note, based on results of calculations discussed in
Section 2.4, that typically AEFn~kT, which means that the
shield reduces considerably the carrier injection level in
the ji region
R
'ON*
near the cathode and hence increases R
and


133
operation. Both dc and transient measurements, including
static and dynamic latch-up, support the modeling
methodolgy. In addition, this study points out the need
for further work in extending previous DMOST models [Su80]
for cases when the enhancement-mode device has its bulk
region conductivity-modulated, as is the case for the
LIGBT. Also, the physics underlying the onset of latch-up
needs clarification, especially in regards to the
conductivity modulation of prior to latch-up.
The constituent charge-based modules, which are easily
implemented into SPICE via UDCSs, allow for a network
representation of the structure that can be used to
simulate the device under actual circuit (transient)
conditions, a feature most device simulators do not have.
Consequently, the methodology may be useful in optimizing
device design under an actual transient environment, in
addition to the CAD capability it affords.


CHAPTER 5
HIGH-VOLTAGE/POWER INTGRATED CIRCUIT DEVICE MODELING
5.1 Introduction
This chapter combines and extends much of the work and
insight gained in previous chapters. In this chapter, new
physical models, and a general modeling methodology, for
lateral HV/P devices, in particular LIGBT structures, are
developed, and the models are implemented in SPICE via
UDCSs. The
models are charge-based, and via regional
partitioning,
account for the unique features of lateral
HV/P devices
(multidimensional carrier flow, conductivity
modulation, latch-up, transcapacitance) unaccounted for in
conventional
equivalent-circuit models. Device
measurements
of specially designed test structures,
supplemented
with two-dimensional numerical device
simulations, support the modeling methodolgy and the model
parameter extraction.
The implementation of the models in the circuit
simulator is flexible, and differs from the implementation
in Chapter 4 in that the model is implicitly formulated
97


C SET Y VALUE OF DIE1/DVBE
C
IF(FLGY.LT.l.0)THEN
Y Q*A£1*DA/WB*P0/VT
GOTO 876
END IF
Z1 2*(B+1)/B*AE1*JN0*P0**2/NI**2/VT
Z2 (B+l)/B*Q*DA*AEl*PO/LA/VT/TANH(W/LA)
Y Z1 + Z2
876 CONTINUE
GOTO 39910
300 CONTINUE
C
C SET Y VALUE OF DIE1/DVBC BY FINITE DIFFERENCE
C
IFCFLGY.LT.1.0)THEN
Y0 .0
GOTO 765
END IF
W WB -<2*ES*(PHI+ABS(VBC))/(ND*Q))**.5
Y1 VBC VBC + H
W WB -C2*ES*(PHI+ABS(VBC))/CND*Q))**.3
Y2 IHCW/LA) )
Y -(Y2-YD/H
VBC-VBC-H
GOTO 99910
765 CONTINUE
99910 CONTINUE
RETURN
END
C
C THE FOLLOWING LISTING IS A SUBROUTINE WHICH CALCULATES
C THE COLLECTOR CURRENT, IC, GIVEN THE NODE VOLTAGES VBE
C AND VBC THE SLICE USERS MANUAL SHOULD BE CONSULTED FOR
C THE SPECIAL FORMAT USED IN UDCS IMPLEMENTATION
C
SUBROUTINE U1CLT1(Y,IFLAG,LP,NP,LC,NC,JERR0R)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND,NI, JNO,I Cl, LA
SPECIAL COmON BLANK
COPWCN/BLANK/XC 64)
60TOC50,100,200,300),IFLAG+2
50 CONTINUE
IFCNC.NE.2) JERROR -99010
GOTO 99910
100 CONTINUE
PHI.6
ES-1.035E-12
NI-1.3E10
UN-1350.0
UP-4B0.0
BUN/UP
0-1.6E-19
VT.02586
DA-2*VT*UN*UP/( UN+UP )
C
C SET Y VALUE OF I Cl
C
WB-
XCLP+l)
T0-
XCLP4-2)
JNO
XCLP+3)
ND-
XCLP+4)
AE1*
XCLP+5)
H
XCLP+6)


32
and that for W<0.3La, the first term in (2-30) is linear in
W, independent of LA. We note, based on the discussion in
Section 2.3, that the second term in (2-31), as well as
n(0) and n(W), is virtually independent of W. Thus (2-31)
correlates well with the plots in Figure 2-5.
Discrepancies between the two slopes, i.e., in the slopes
and in the extrapolated intercepts, can thus be attributed
to the uncertainties in A, p and p
n p
C A
(carrier-carrier scattering), and to the neglect of (R^+R^)
respectively.
Measured and predicted values of the incremental
(quasi-static) resistance, RQN=AVA/AI centered at I=30mA,
2
are plotted versus W in Figure 2-6. Referring to (2), we
can write
R
ON
AV
AI
(2-32)
since the quasi-Fermi level terms vary little relative to
AV^ at high currents. Differentiating (27) then, in which
_2
we note based on Section 2.3 that J=I/An and that for
W>3La, =(La/W)[n(0)+n(W)], we obtain
R ~
ON qA(//n+// )LA[n(0)+n(W) ] '
(2-33)


71
The UDCS [Ve86] "circuit" model for the IGBT is shown
in Figure 4-2. In fact, the model is not an equivalent
circuit, but is a physical representation comprising six
UDCSs, each of which is defined implicitly by the system of
model equations in terms of the emitter-base and
base-collector voltages (VAB and VBR) of the pnp BJT. The
choice of node voltages used to define the UDCSs is not
unique. Alternative choices, as demonstrated in Chapter 5,
can be considered for a particular device to effect a
trade-off among model flexibilty, complexity, and
computational efficiency. The steady-state characteristics
of the IGBT are simulated by the UDCSs IM0S (the component
of the pnp BJT base current supplied by the DMOST), Icp
(the pnp BJT collector current), and Vepi (the voltage drop
across the n~ base region). The transient characteristics
are simulated by the charge-based UDCSs [Ve86] dQpB/dt (the
charging current defined by the carriers in the
quasi-neutral base region of the pnp BJT) and dQT/dt (the
charging current defined by the depletion charge at the
base-collector junction of the pnp BJT). Charging currents
associated with free carriers in other regions of the
device are typically negligible. For example, the charging
current defined by the minority electrons in the
quasi-neutral p+ emitter (anode) region is negligible, even
though the total pnp BJT base current (lM0S + ICN) must
include a component due to recombination in the emitter, as
shown in Chapter 3 [Fo86a]. The resistance RpN simulates


56
We are assuming that high injection (p=n) prevails in the
base region throughout the main turn-off transient, and
hence we use the high-injection carrier lifetime th as
defined by SRH theory [Gh77]. This is a reasonable
assumption for a device in which conductivity modulation is
essential in the on-state. In (3-15), Qn is the minority
electron charge in the quasi-neutral p+ anode (emitter)
reqion and Tn is an average (effective) electron lifetime
(charge-control time). The dynamics of Qn, which is not
accounted for properly in previous work [Ba85,Ku85], can
influence the second-phase transient as we show below.
For quasi equilibrium and negligible recombination in
the p+n~ junction space-charge region, Qn can be related to
Qp using the quasi-static approximation. In the
quasi-steady state, the solution [Gh77] to the ambipolar
transport equation in the quasi-neutral base region (with
p=n) yields, for less than the ambipolar diffusion
length, Qp^qAfWg-x^) p( 0 )/2 where p(0) is the hole density
at the edge of the space-charge region and A is the device
_ 2
area. Using Qn/Tn=AJNQ[p(0)/ni] [Gh77], where Jnq is the
saturation current density associated with the electron
injection (recombination) into the p+ anode, we have


118

Figure 5-6. Network representation for the HIGBT mode
of operation.


Anode
Figure 3-1.
IGBT unit cell and current components.
The solid arrows depict hole flow and
the dashed arrows depict electron flow.


96
order-of-magnitude longer than those for the built-in
models. For larger-scale HVICs, new HV/P device models,
once they are developed and standardized based on the
methodolgy presented in this paper, could be written into
the SPICE2 code to reduce CPU times to acceptable values.


53
in (3-8),
the "final
the hole
negligable
xdm the
" reverse
density
"final"
bias vj2m
in the
value of
, which for
depletion
, is [Gh77]
corresponding to
low enough that
region is indeed
xdm
2gSVJ2m
qN
^ epi
1/2
(3-9)
The external circuit (Figure 3-3) in which is chosen so
that I = Iq in the steady on state defines Vj2m (>0):
V
J2m
(3-10)
From (3-7) and (3-8) then,
AI *
T T
IMOS ^1
1
1]} (3-11)
I0 I1
'^dn/V'
where
V
IMOS' and ^ (I0
~IMOS//IMOS ^
are described
by
the
steady-state
analysis.
Note that
ai the
fast
drop
in the
current is,
in general
, less than
the
(steady-state) MOSFET current. Only for xcjm<

36
To demonstrate in more detail the influences of JTri,
NO
Jp0, and Tq on he GDS resistance, we give in Table 2-2
calculated (using the model in Section 2.2) values of R
DC
(I=25mA) and RQN (l=30mA) for various values of these
parameters. We chose an intermediate value for
W=357//m, and we used the remaining parameter values in
Table 2-1. The cathode and the anode series resistances
were not included. We see from Table 2-2 that the
resistances are most sensitive to Jpg, even though the
"intrinsic" current-voltage characteristic, J(VTF ), can
J
be independent of Jon [see (2-28)]. Both RDC and
pn
R,
can
p0 t__ v- DC ** *'0N
be reduced considerably by increasing Tq and/or deceasing
JN0 as well as Jp.
The resistance values in parentheses in Table 2.2 were
calculated by accounting for the carrier-carrier scattering
using an iterative technique [Ch70]. That is, the carrier
mobility values used in the final model calculation were
chosen to be compatible with the calculated average carrier
density in the it region as defined by empirical
characterizations of the mobility-density dependences for
holes and electrons. The calculations show that
carrier-carrier scattering tends to diminish the reductions
in resistance discussed above, especially with regard to
Rq^. Nonetheless we can conclude, based on these
calculations and others, that RQN (intrinsic) for a typical


93
electrons supporting the recombination current in the pnp
BJT, and I
MOS
is reduced to zero. In this condition, the
device is latched, and removal of the gate voltage will
have no effect on the IA The transition from a stable
operating point to the latched condition requires only a
small increase in applied current because of the
exponential dependence of ICN on Icp.
The IGBT can also latch during turn-off transients if
the lateral hole current in the base of the npn BJT, which,
at the start of the transient, consists of Icp plus the
displacement current dQJC/dt, is sufficiently high to
effectively forward-bias the npn BJT emitter-base junction.
The magnitude of dQJC/dt depends on the rate of change of
the gate-to-cathode voltage as defined by the IGBT model
and the external circuitry. In the ideal case, if is
VJI\
removed instantaneously, then the initial magnitude of
dQJC/dt is equal to the steady-state current supplied
by the DMOST, as discussed Chapter 3 [Fo86a]. If is
removed slowly, then the initial magnitude of dQJ(_,/dt will
be negligible, and the IGBT will not latch. In Figure 4-10
we show a simulation of dynamic latch-up in the IGBT, which
occurs because VGR(t) drops abruptly (due to a small RGK as
discussed previously). The turn-on of the BJT, which
triggers the latch-up, is indicated by the rapid increase
in its collector current ICN(t) shown in Figure 4-10.
Beyond this point in time, I^(t) remains finite even though
VGR(t) has dropped to zero.


52
Because the carrier lifetime (in the base) is long
relative to the duration of the initial fast transient, we
assume that Q is invariant in the first phase, even though
XT
the holes (and electrons) are redistributed in time in the
epi region. Thus as holes are swept out of the collector
to increase Qj2' electrons are forced toward the emitter,
thereby increasing the hole injection from the emitter to
maintain neutrality. This increase in Q which
approximately equals the increase in is much smaller
than Q and hence does not threaten the validity of (3-5).
Jr
From (3-1), (3-2), (3-5), and (3-6) then, we can write
I0 = IMOS +
-pO
WV4K. D
B/ A p
(3-7)
since x^O for t<0. Equation (3-7) defines Q^q, the
steady-state value of Q which remains virtually intact
ir
during the initial first transient.
The fast transient subsides when dQ^/dt^O, or from
( 3 4 ) ( 3 7 ) when I-I^ where
Q
*0 "
/4KADt
I0 IMOS
(1-wv2
(3-8)


27
In the
lower-current
regions
I and II in Figure
2-3,
|
the I(vPn )
J
and l(VA)
curves
are coincident and
are
independent
of W. In
region
I, Iaexp(qVA/2kT)
is
predominantly recombination in the shield-cathode junction
space-charge region. Low injection prevails everywhere,
+
and hence VA=vPn For higher currents, but still low
injection, in region II, J becomes important. However
+
because V -0, still V and J.aexp(qV./2kT) The onset
of high injection in the it region occurs near the
transition point between regions II and III, where still
Vn< Above this point our model applies.
2.4 Experimental Corroboration and Discussion
In this section we present experimental data, taken
from a variety of GDS structures fabricated at Bell
Laboratories (Reading), that support the model described in
Section 2.2. We also use the simpler analytic model
developed in Section 2.3 to qualitatively explain the data.
Finally we discuss model calculations that reveal the
dependences of the current-voltage characteristic on
critical device and material parameters.
+
Measured I(V^n ) and I(VA) in the high-injection
regime are plotted in Figure 2-4. The data are taken from
a GDS test structure having four anodes placed at different
lengths from the cathode, two (W=228/vm, 615/ym) of which
correspond to the data plotted. Also plotted in Figure 2-4


REFERENCES
[Ap79] J.A. Appels and H.M.J. Vaes, "High Voltage
Thin Layer Devices (RESURF devices)," IEDM
Tech. Dig., pp. 238-241, 1979.
[Ba81] B.J. Baliga, "Silicon Power Field Controlled
devices and Integrated Circuits," in Silicon
Integrated Circuits, D. Kahng, Ed., Applied
Solid State Science Series, Supplement 2B.
New York: Academic Press, 1981.
[Ba84a] B.J. Baliga, "Switching Speed Enhancement
in Insulated Gate Transistors by Electron
Irradiation," IEEE Electron Devices, vol.
ED-31, pp. 1790-1795, 1984.
[Ba85] B.J. Baliga, "Analysis of Insulated Gate
Transistor Turn-off Characteristics," IEEE
Electron Device Lett.,vol. EDL-6, pp. 74-77,
Feb. 1985.
[Ba84b] B.J. Baliga, M.S. Adler, R.P. Love, P.V. Gray,
and N.D. Zommer, "The Insulated Gate
Transistor: A New Three-Terminal MOS-Controlled
Bipolar Power Device," IEEE Trans. Electron
Devices, vol. ED-31, pp. 821-828, 1984.
[Ba84c] B.J. Baliga and D.Y. Chen (eds.), Power
Transistors: Device Design and Applications.
New York: IEEE Press, 1984.
[Ba70] R. Baron and J.W. Mayer, Double Injection in
Semiconductors," in Semiconductors and
Semimetals, vol. 6, pp. 202-313. New York:
Academic Press, 1970.
152


35
n ( O ) = n t
r bI i1/2
i A(b+i)JNoJ
(2-35)
and from (2-10), (2-14), and (2-24)
I
1/2
(2-36)
n(W)
A( b+1) JpQexp (
where AEpn is constant as given by (2-25). Thus, reduction
in both Jnq and Jpg would reduce RDC and RqN> but because a
reduction in will also decrease AE this will produce
PO Fn c
larger reductions in the resistances than a reduction in
Jnq. We note from (2-25) also that designing the p shield
such that Fg->0 would reduce the resistances, but would also
tend to negate its shielding effect.
An increase in Tq will also decrease the resistances.
For W>3La, (2-31) and (2-33 )-(2-36 ) show that RQN and RDC
1/2
vary as 1/Tq However, for long Tq, or short W
(W<0.3La), Rqn and RDC are independent of ; further
decreases in W produce no additional reduction in the
resistances. Because of the effects of carrier-carrier
scattering, changes in parameters that increase n(0) and
n(W), which tend to decrease the resistances, will also
cause a reduction in carrier mobility, and hence the
decreases in RQN and RDC predicted by (2-31) and (2-33) can
be overestimated.


89
t (ns)
IGBT anode current versus time from
simulation of resistive turn-off transient
for various values of th and JN0 (RGK = 5
52) .
Figure 4-7.


31
200
160
120
a
o
o
ce
80
40
//
/ /
/ /
/ /
/ ^Theoretical
Experimental^ / /
> /
¡f
/ /
/ /
/ /
* /
/?
//
L .//
}/
20
40
W2(10*Vm2)
Measured and calculated de resistance
versus the square of the it-region length.
The dashed lines emphasize the linear
dependences.
Figure 2-5.


I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
ssum, Cnairman
(e^try G. /Possum, Chairman
Professor of Electrical Engineering
I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
Fred A. Lindholm
Professor of Electrical Engineering
I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
Arnost Neugro
Professor of
Electrical Engineering
I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
Edward K. Walsh
Professor of Engineering Sciences


19
Combining (2-4) with (2-12)-(2-15), we obtain the
following system of three equations in the three unknowns,
AE
FA'
AE
FC'
AE
Fn'
JN0exp(n^)=BTrJ+e[exP(2T^£)-exP(2i^)cosh(r-) ]'
A
(2-16)
^FC+^Fn 5 ^^FC ^^FA W
Jp0exp( ^ )=BbTj + p[eXp(21~)-exp(7j^)cosh(i-)],
A
(2-17)
where
-AE AE F
AEpn=kTln{l+[Jexp(- -^(-^oexpl-jS)] -Sj) (2-18)
k Tn
i
|3=2kTn./7 u /L. (¡j +/j )sinh(W/L.). To solve the system,
i n p a n p A
we must specify Jpg JNg, W' T0' ant^ FS" Then for a given
J, a suitable numerical method must be used to derive AEpA,
AE_, AE^ We have used an IMSL subroutine to solve the
system with a high degree of accuracy. From the solution
A C
n(x), JK and JN are determined.


91
Figure 4-8 a simulated turn-off transient for an IGBT in
Figure 4-4 with an inductive load, including a gate delay.
A distinctive characteristic of this turn-off transient is
the sharp rise of the anode-to-cathode voltage vAK(t),
which even shows overshoot and ringing as do corresponding
measurements [Ba84c]. This unique vAR(t) transient results
from a damped resonance defined by the load inductance in
combination with the junction capacitance repesented by the
charging current dQJ(_,/dt in our model.
To further demonstrate the utility of the modeling
methodology, we simulate the static latch-up of a
representative IGBT, but with a larger npn BJT base
resistance
latch, causing loss of gate control, if driven too hard.
For the static case, depicted in Figure 4-9 by the
simulated IA(VAK)/ latch-up is approached by increasing IA>
As characterized in Section 4.2, Icp also increases, and
subsequently, because of the increased forward bias I_RD.T
on the emitter-base junction of the npn BJT, so does lCN-
At the onset of latch-up, ICN increases abruptly, thereby
reducing IM0S accordance with the recombination in the
RBN. As mentioned previously, the IGBT may
pnp BJT. The reduction of IMQS decreases the voltage
dropped across the DMOST and results in the
negative-resistance region shown in Figure 4-9. The
process is regenerative, and as the applied current is
increased further, ultimately ICN supplies all the


Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy
A METHODOLOGY FOR PHYSICAL MODELING OF
HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICES
FOR CIRCUIT SIMULATION
By
ROBERT JAMES MCDONALD
December 1987
Chairman: Dr. J.G. Fossum
Major Department: Electrical Engineering
This dissertation presents a modeling methodology for
the construction of physical network representations for
high-voltage/power integrated-circuit (HV/P IC) devices.
The effects of multidimensional carrier flow, base-region
conductivity modulation, significant emitter recombination,
nonreciprocal transcapacitance, and the onset of latch-up
(static and dynamic), heretofore unaccounted for in
empirical circuit models, are physically accounted for in
our charge-based formalism. The methodology is applied to
vi


20
To generate the
determine V which
across the it region.
[Ha52,He68], we have
J(VA) characteristic, we must now
is the integral of the electric field
Again using basic PIN-diode theory
V_ =
9 w
I
0
dx
n (x)
, b-1, kT
5+T ~q
, r n(0 ) 1
1 'lwT1
(2-19)
The integration in (2-19) can be done analytically. Thus
the combination of (2-19) with (2-9) and (2-10) defines,
for a given J, V Our characterization of J(V ) is then
It
given by (2-1), (2-16)-(2-18 ) and (19), the solution of
which must be obtained numerically. Representative results
will be presented in Section 2.4.
2.3 Physical Insight (Simplified Model)
A numerical solution to the system of equations
described in Section 2.2 is not necessary to gain useful
physical insight into the GDS operation. In this section
we describe this insight, and in doing so define a simpler
analytic model for J(VA) that is valid for high values of J
2
(100-1000 A/cm ) of practical concern.
The total current J is the sum of the recombination
currents in the p+p anode, it, and n+ cathode regions


92
vAk (V)
Figure 4-9.
V'-'i
Simulation of static latch-up in the IGBT:
driving anode current versus the resulting
anode-cathode voltage with gate-cathode
voltage equal to 10 V (ISN = 2 x 10-12 A
and Rbn = 0.175 ) .


154
[Fo86b]
t Ge78]
[Gh77]
[Go8 3]
[Go87]
[G086]
[Ha85]
[Ha52 ]
t Ha84]
[Ha81]
J.G. Fossum and S. Veeraraghavan, "Partitioned
Charge Based Modeling of Bipolar Transistors
for Non-Quasi-Static Circuit Simulation,"
IEEE Electron Device Lett., vol. EDL-7,
pp. 652-654, Dec. 1986.
I.E. Getreu, Modeling the Bipolar Transistor.
New York: Elsevier, 1978.
S.K. Ghandi, Semiconductor Power Devices.
New York: Wiley, 1977.
A.M. Goodman, J.P. Russel, L.A. Goodman,
C.J. Neuse, and J.M. Neilson, "Improved
COMFET's with Fast Switching Speed and
High Current Capability," IEDM Tech. Dig.
pp. 79-82, 1983.
C.A. Goodwin, M.A. Shibib, R.A. Furnanage,
C.Y. Lu, P.C. Riffe, N.S. Tsai, and J.L.
Schmoyer, "A Dielectrically Isolated Bipolar-
CMOS-DMOS (BCDMOS) Technology for High Voltage
Applications," ECS Symposium, Philadelphia, PA,
May 10-15, 1987.
P.A. Gough, M.R. Simpson, and V. Rumennik,
"Fast Switching Lateral Insulated Gate
Transistors," IEDM Tech. Dig., pp. 218-221,
1986.
S. Hachad, C. Cros, D. Darees, J. M. Dorkel,
and P. Leturcq, "Latch-up Critria in Insulated
Gate p-n-p-n Structures," IEEE Trans. Electron
Devices, vol. ED-32, pp. 594-598, March 1985.
R.N. Hall, "Power Rectifiers and Transistors,"
Proc. IRE, vol. 40, pp. 1512-1518, Nov. 1952.
Harris Semiconductor Corp., SLICE Manual Rev.
4.08. Melbourne, FL: Harris Semiconductor
Corp., Jan. 1984.
A.R. Hartman, J.E. Berthold, T.J. Riley,
J.E. Kohl, Y.H. Wong, H.T. Weston, and
R.S. Scott, "530V Integrated Diode Switch
for Telecommunications," IEDM Tech. Dig.
pp. 250-257, 1981.
A. Herlet, "Forward Characteristics of
Silicon Power Rectifiers at High Current
Densities," Solid-State Electron., vol. 11,
pp. 717-742, 1968.
[He68]


128
In Figure 5-11 we show a model-simulated transient
turn-off characteristic for the HIGBT. Because the HIGBT
current for our test structure consists mainly of DMOST
drain current, the magnitude of the first phase is quite
large, but the conventional two-phase IGBT turn-off
transient is clearly manifested. However, the influence of
RnB' Provides a path for carrier removal during the
transient, needs to be physically characterized so that
design criteria for an optimal HIGBT structure may be
suggested [Fo87], A cursory analysis of how RnB affects
the HIGBT transient turn-off is presented below.
To develop physical insight into how Rnfi affects
transient response, we extend the analysis in Chapter 2 by
adding a term ^vjgB//RnB^ to equation (2-15), thus
accounting for carrier removal through the drain during
phase two. If we neglect all components of recombination
current, assuming the dominant component of current is
carrier removal through R
differential equation for the charge residing in the base
region during phase two results:
nB, then the following simple
dQ
B
V
dt
JEB
lnB
( 5-13
If one assumes that VJEB remains relatively constant ()


61
The dependence of Tq on carrier lifetime illustrated
by the carrier lifetimes plotted in Figure 3-4 is
consistent with other measurements [Ba84a,Ba85] that show
Tq decreasing strongly with increasing electron irradiation
~ -1
dose. Calculations and measurements imply Tqth which
implies that the time dependence in the denominator of
(3-19) is unimportant for these devices (that have low t ) .
We note further that measured dependences [Ba84a,Ba85] of
Tq on VB and on Iq are explained well by our first-order
model. For a given th, calculations show Tq increasing
weakly with increasing VB for constant Iq, and decreasing
with increasing IQ for constant Vfi. The Tq(Vb) dependence
is weak because x^m in (3-12) and implicitly in (3-13),
which defines Tq, does not change appreciably when Iq is
held constant, as can be seen from (3-10) and (3-11). The
Tq(Iq) dependence is more pronounced (Tq can be halved by
increasing Iq) because AI in (3-11) increases more rapidly
than Iq; viz., IMOS' which includes the p+ anode
recombination component, increases faster than Iq. We
infer from the model however that Tq will saturate for
sufficiently high Iq becauses ultimately iMqs' which
comprises predominantly the anode recombination current,
becomes proportional to IQ.
From our analysis, we can suggest a way to quicken the
turn-off, independent of shortening th which increases RQN


149
C INITIALIZE THE VOLTAGES WD MAKE CURRENT 0.0 IN OC CASE
C
VBE XCLC+l)
VBC XCLC+2)
1F(TIME.EQ.0.0)THEN
1RVBE.LT.0.56)THEN
P0 NI**2/ND*EXP(VBE/VT)
Y 0.0
FLGY-0.0
GOTO 987
END IF
FLGY 2.0
IF< VBE.GT.0.78)P0-3E16
IF((VBE.GT.0.36).AND.(VBE.LT.O.7B))
P0NI**2/ND*EXP(VBE/VT)
END IF
WNB-(2*ES*(PHI+ABS(VBC))/(ND*Q))**.5
QBlQ*A*LA*P0*(COSH(W/LA)-1.0)/SINH(W/LA)
XCLP+8) QB1
Y-0.0
X(LP+9)-Y
X XCLP+ll)- QB1
X(LP+i2)-Y
RETURN
ELSE
C
C UPDATE CHARGE AND CURRENT IF LOCAL TRUNCATION ERROR CRITERIA ARE MET
C
!F( ( INITF.EQ.6) .AND. (DELTA.GE.XCLP+10) ) )THEN
X(LP+8)-XCLP+ll)
X(LP+9)*X(LP+12)
END IF
QB1Q*A*LA*P0*(COSH(W/LA)-1.0)/SINH(W/LA)
X(LP+11)QB1
X(LP+10)-DELTA
IF(DELTA.EQ.O.O)THEN
Y-0.0
ELSE
Y-((QB1-X(LP+8))*2.O/DELTA)-X(LP+9)
ENDIF
X(LP+12)-Y
ENDIF
C NO ERROR CHECKING
YNOER 0
987 CONTINUE
RETURN
200 CONTINUE
C
C SET Y VALUE OF DQB/DVBE
C
IFCFLGY.LT.1.0)THEN
Y 0.0
GOTO 876
END IF
IFCDELTA.EQ.O.O)THEN
Y-0.0
ELSE
y -Q*A*LA*PO*(COSH(W/LA)-1.0)/SINH(W/LA)/VT
Y- 2.0+Y/DELTA
ENDIF
876 CONTINUE
RETURN
300 CONTINUE
C


108
B
Figure 5-2.
Charge-based network representation for a
wide-base, low-f3 pnp BJT.


34
which corresponds well to the plots in Figure 2-6.
W<0.3L>a, =[ n( 0 )+n(W) ]/2 and
R
ON
W
qA(//n+/Vp) [ n( 0 )+n(W) ]
(2-34)
As additional support
(2-31) and (2-33) imply a
the slopes of the RDC
characteristics, which is
We note further, since (2-3
that the extrapolation
characteristic yields direc
find (Rg+Rg)=6S2, which i
inferred from the measured
we expect RsRS' this re
for our model. The signif
experimental and theoreti
Figure 2-6 is due to, as we
explicit accounting of the
carrier-carrier scattering.
GDS design criteria
for our theory, we note that
factor of two difference between
2 2
vs. W and R., vs. W
ON
reflected by the measured data.
C A
3) does not account for (Rg+Rg),
of the
measured R_.T vs.
ON
W 2
tly this
series resistance.
We
s about
+
twice the value
of Rg
>
characteristic.
Since
suit provides additional support
icant discrepancy between the
cal values of RQN plotted in
show later, our omission of an
reduction in mobility caused by
to minimize RQC and RQN are
and (2-34).
suggested by (2-31), (2-33)
(2-12), and (2-23),
From (2-9)


73
Nepi>'
the base transport equation simplifies to
d2p(x)~ p(x) n
,2 2 U
d x L.
A
1 /2
where LA t=(DATH) 1 is the ambipolar diffusion length
[Gh77]. The solution to (4-1), precluding a forward bias
on the base-collector junction, is
p(x)
p(0)sinh(^)
la
sinh(^)
(4-2)
where p(0) is the hole (or electron) density at the edge
(x=0) of the emitter-base junction space-charge region and
W is the effective base width. From Figure 4.1,
W = Wb xd (4-3)
where WB is the metallurgical n- base width and x^, which
is a function of VBR, is the width of the depletion region
at the one-sided base-collector junction of the pnp BJT.
We define X[(VBK) based on the depletion approximation, and


6
In Appendix B, we briefly overview a representative
UDCS SLICE/SPICE implementation of a charge-based network
representation for a wide-base, low-3 pnp bipolar
transistor, a key model in the methodology for modeling
HV/P devices as dicussed in Chapter 5.


120
Experimental results and computer simulations have
indicated that the latch-up point is only a weak function
of the gate voltage and that the base resistance, R^g, is
the most important parameter in determining the onset of
latch-up because of the exponential voltage dependence of
the injected electrons. We note that the gain of the n+pn~
BJT also has an influence on the latch-up point, albeit not
a strong one. In the dynamic case, both the charging
dQ
cu
JC
rrent, ^ £ and the transient collector current
contribute to the voltage drop across R^g and hence aid in
inducing latch-up.
The onset of latch-up in both the LIGBT and HIGBT
modes is simulated by the network models in Figure 5-4 and
Figure 5-6 via a voltage-controlled current source I
CNPN
(-Igsexp (VriR/VT) ) in which the controlling voltage, V^R, is
pB' T
pB'
developed across the assumed constant n+pn base
resistance, RpB* T^e Pre-exponential factor, Igs, is
related to the gain of the n+pn~ BJT through the Gummel
number. However, PISCES simulations have shown that R _
pb
undergoes significant conductivity modulation just prior to
latch-up, and hence R D and Icc should be considered as
p D O
semi-empirical modeling parameters. Because of the
SS
physical nature of our models, the values used for I
(2X10 ^A) and R (888) are close to those predicted from
pb
PISCES simulations. Note in Figure 5-4 and Figure 5-6 that


78
The lateral flow of the collected holes Icp in the
base of the npn BJT forward-biases the emitter-base
junction and causes electrons to be injected into the base
of the pnp BJT (see Figure 4-1). This p-base transport
current can be approximated by [Ha85]
JCN = 1SN exp(-^-M) (4-13)
where IgN is the collector saturation current of the npn
BJT and Rbn is an average, or lumped, base resistance
[La85], both of which vary inversely with the p-base Gummel
number [Ge78]. However note that because of the
exponential dependence of ICN on Icp, only for conditions
near latch-up is the contribution of to the anode
current I.=A_J. significant. When I.T=0, IMrk£.=ID and the
A E A J CN MOS B
DMOST supplies all the electrons necessary for
recombination in the pnp BJT. However when the IGBT is
latched, the electrons necessary for recombination are
supplied by the npn BJT (ICN), and IMOS=0-
The implicit description of the current UDCSs is
completed by equating the pnp BJT collector current (Icp)
to the difference between the emitter current (1^) and the
base current (ID):
Jd


59
Curve
^ H 0s)
t Ois)
Calculated IGBT turn-off transient for
three values of th and of J Device
parameter values used are an= 0.1 cm2,
6 0 /m,
0.5; I,
1014 cm3
and
&


157
[Wa83] R.M. Warner and B.L. Grung, Transistors:
Fundamentals for the Integrated-Circuit
Engineer. New York: Wiley, 1983.
[We82] H.T. Weston, H.W. Becke, J.E. Berthold, J.C.
Gammel, A.R. Hartman, J.E. Kohl, M. A. Shibib,
R.K. Smith, and Y.H. Wong, "Monolithic High
Voltage Gated Diode Crosspoint Array IC," IEDM
Tech. Dig., pp. 1-4, 1982.
[Yi85] H. Yilmaz, W. Ron Van Dell, K. Owyang, and
M.F. Chang, "Insulated Gate Transistor Physics:
Modeling and Optimization of the On-State
Characteristics," IEEE Trans. Electron Devices,
vol. Ed-33, pp. 1377-1382, Sept. 1986.


I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
Dorothea E. Burk
Associate Professor of Electrical
Engineering
This dissertation was submitted to the Graduate Faculty
of the College of Engineering and to the Graduate
School and was accepted as partial fulfillment of the
requirements for the degree of Doctor of Philosophy.
December 1987
Dean, Graduate School


119
R
nS
L
avct
L
MVNepi + P>
(5-11)
where L is the
cross-sectional
depends on p.
substitution for
resistor
area, and
A simple
p yields:
length, Av is the vertical
a is the conductivity, which
algebraic manipulation and
nS
1 +
B1
qAWN
epi
(5-12)
where Rq is the value of Rfig when p=0.
Both the LIGBT mode and the HIGBT mode can undergo
static or dynamic latch-up. Static latch-up occurs when
the collector current of Ic^, produces approximately a
diode voltage drop across the lateral resistance RpB in the
base of the parasitic n+pn- transistor. When this voltage
drop develops, electrons are injected by the n+pn_ BJT into
the base of Q1, increasing its conduction, and hence
triggering the regenerative process associated with the SCR
[Gh77] defined by and the n+pn~ BJT. Removal of the
gate voltage at this point will not turn off the LIGBT or
HIGBT since the DMOST supplies only a small fraction of the
base current for and the main path for current flow is
now through the SCR, which can only be turned off by
reducing the total current below the holding point.


101
I
Figure 5-1. Special LIGBT test structure (symmetric
about the axis shown). The spacing between
the 10 fjm deep p+ anode and the cathode is
78 /jm. The thickness of the n~ ( 5 x 1014
cm-3) layer is 35 //m and the depth is 300
/jm.


C SET Y VALUE OF DQB/DVBC
c
IF(FLGY.LT.1.0)THEN
Y 0.0
SOTO 765
END IF
IF(DELTA.EQ.0.0)THEN
Y-0.0
ELSE
Y-Q*A*P0*ES^)D/O^ (2*ES* ( PH I+ABS (VBC))/ND*Q) *. 5
Y- 2.0*Y/DELTA
ENDIF
763 CONTINUE
RETURN
END
CA****-** ********* A ******* A** ********** *********************
C THIS SUBROUTINE CALCULATES THE CHARGE ASSOCIATED
C WITH THE REVERSE-BIASED COLLECTOR-BASE JUNCTION AS A
C FUNCTION OF THE NODE VOLTAGES VBE AND V8C FOR
C CHARACTERIZATION OF THE TRANSIENT CHARGING CURRENTS
C BY A UDCS IVE86]
C
C*************A *********************************** *********
SUBROUTINE UQJC1(Y,I FLAG,LP,NP,LC,NC,JERROR)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND
SPECIAL COMMON BLANK
COMMON/BLANK/X( 64)
COMMON/STATUS/OMEGA,TIME,DELTA,DEL0LDC7) ,AG(7) ,VT,XNI ,
£ EGFET .MODE .MODEDC, I CALC, INITF .METHOD IORD ,MAXORD,NONCON,
£ ITERNO,ITEMNO,NOSOLV
COMMON/KNSTNT/TWOPI ,XL0G2.XLOGIO,R00T2,RAD,BOLTZ,CHARGE,
£ CTOK,GMIN,RELTOL,ABSTOL,VNTOL,TRTOL,CHGTOL,EPSO,EPSSIL,EPSOX
IF(TIME.EQ.O.O) THEN
AC X(LP+1)
ND- X(LP+2)
XI -X(LP+3)
X2- X(LP+4)
X3-XCLP+5)
ENDIF
GOTO!50,100,200).IFLAG+2
30 CONTINUE
RETURN
100 CONTINUE
C
C INITIALIZE THE VOLTAGES AND MAKE CURRENT 0.0 IN DC CASE
C
VBC- XCLC+l)
IF(TIME.EQ.O.O)THEN
QJCAC*(2.07E-12A1.6E-19*ND*ABS(.6+VBC))**.3
QJC-Y
X(LP+8)- QJC
Y-0.0
X(LP+9)Y
X X(LP+11)- QJC
X(LP+12)-Y
RETURN
ELSE
C
C UPDATE CHARGE AND CURRENT IF LOCAL TRUNCATION ERROR CRITERIA ARE MET
C
IF((INITF.EQ.6).AND.(DELTA.GE.X(LP+10)))THEN


110
empirical optimization needed. In addition, the modular
approach allows for a straightforward network
representation of the LIGBT structure as will be shown in
this section. We note that in all cases, the simulation of
the actual symmetrical device involves area doubling of the
model derived from the half-structure shown in Figure 5-1.
With the cathode floating, the drain tied to ground
and the anode biased to a positive voltage, the LIGBT
structure operates as a forward-biased PIN-diode. The
PIN-diode current-voltage characteristic can be used to
obtain information regarding recombination properties of
the n epi region (xH) and of the p+ anode region (JNg).
An optimization program was written to extract from
measured I-V characteristics the three adjustable
parameters (th, Jnq, and JpQ, the cathode counterpart of
Jnq) of a one-dimensional PIN-diode model [Mc85]. The
-13 2
optimization yielded th=2.6/us and JnQ = 6x10 A/cm at
room temperature. These parameter values were found to be
commensurate with measured turn-off transients of the
LIGBT, discussed below.
In the DMOST mode, the anode is left floating and the
drain is set at a positive voltage relative to the source
(cathode). The DMOST is empirically modeled as a simple
MOSFET (SPICE/level 2 [Ha84]) with a resistor, R ., tied
' epi
to the drain which accounts for the large n~ epi
resistance. Although this model is inadequate in general,


106
base-region charge QB and the collector-base junction
depletion-region charge Qj^. For quasi-static conditions,
Qb is given by the integral of (5-1) from x=0 to x=W:
W
Qb = qA J p(x)dx ; (5-7)
0
and
Q= qAN .x ,
JC M epi d
(5-8)
The charging currents are derived from (5-7) and (5-8):
dQ. r 9Q. dV.
= 2 1
^Tt j 9Vj dt
(5-9)
9Qi
where i=B,JC and j=JEB,BC. The transcapacitances, in
j
(5-9) can be nonreciprocal, and hence the charge-based
model is more representative of the actual charge dynamics
than a conventional capacitance-based model.
Our low-3 BJT (with wide, lightly doped base) module
differs significantly from the conventional Gummel-Poon


A METHODOLOGY FOR PHYSICAL MODELING OF
HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICES
FOR CIRCUIT SIMULATION
By
ROBERT JAMES MCDONALD
A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL
OF THE UNIVERSITY OF FLORIDA IN
PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE DEGREE OF DOCTOR OF PHILOSOPHY
UNIVERSITY OF FLORIDA
1987


18
is supported by electron injection from the it region:
- vo)
5TT J +
2kT"n"p
"n+"p
dn
Hi
x=0
(2-13)
where bAThe expression for JN(0) in (2-13)
which is evaluated using (2-11), derives [F157]
J=JN+Jp with p=n. In the n+ cathode, the
recombination current can be expressed as [Fo81]
from
hole
JP JP0
exp(AEFC+AEFn)
if
(2-14)
and is supported by hole injection from the n region
[Fl57 ] :
Jp Vw) ETT
J -
2kTVp
"n^p
dn
Hi
x=W
(2-15)
In (2-12) and (2-14), Jnq and JpQ are constant
parameters (saturation current densities) that are defined
by the properties of the heavily doped anode and cathode
[Fo81].


90
t ((IS)
Figure 4-8. IGBT anode current, (normalized)
anode-cathode voltage, and gate-cathode
voltage versus time from simulation of
turn-off transient with inductive load.
In Figure 4-4, Z is a series combination
of 8 /t/H and 35 S31; RQK = 100 S3.
/ 30 (V)


(mA)
116
Measured LIGBT current versus the anode
voltage and measured HIGBT current and
anode component of HIGBT current versus
the anode/drain (shorted) voltage.
Figure 5-5.


124
substantial fraction (-1/2) of which is p+-emitter
recombination (first term in (5-4)). The expeditious
effects of anode recombination on the LIGT turn-off
transient have been demonstrated in Chapter 3. We stress
that such transient simulations are not possible with
conventional SPICE transistor models. We also note that if
the gate voltage is removed fast enough, then the sum of
the transient collector current and collector-base junction
displacement current may be sufficient to forward bias the
n+pn transistor and subsequently cause dynamic latch-up.
For the circuit conditions shown in Figure 5-8, dynamic
latch-up will occur if the gate voltage is removed in less
than five nanoseconds.
In Figure 5-9 we show measured current-voltage curves,
terminating at latch-up, for the HIGBT mode of operation
for three different values of gate voltage. It can be seen
that the trigger current for the LIGBT (Q^) excitation is
approximately 13mA, independent of VG, implying that an
internal voltage drop is responsible for the triggering.
The onset voltage may be estimated by using our network
model for the HIGBT shown in Figure 5-6 and noting that the
applied voltage splits between RnB' RnS' an<^ tlie DM0ST
channel resistance. The total voltage across the HIGBT,
just prior to triggering, consists of three terms: a
channel drop, VCH> which depends on the DMOST gate voltage,
a drop across Rng, and a drop across RnB, which is


156
[Pa86]
D.N. Pattanayak, A.L. Robinson, T.P. Chow,
M.S. Adler, B.J. Baliga, and E.J. Wildi,
"N-Channel Lateral Insulated Gate Transistors:
Part I Steady-State Characteristics," IEEE
Trans. Electron Devices, vol. ED-33, pp. 1956-
1963, Dec. 1986.
[R086]
A.L. Robinson, D.N. Pattanayak, M.S. Adler,
B.J. Baliga, and E.J. Wildi, "Lateral
Insulated Gate Transistors with Improved
Latching Characteristics," IEEE Electron
Device Lett., vol. EDL-7, pp. 61-63, Feb. 1986.
[Ru8 3]
J.P. Russel, A.M. Goodman, L.A. Goodman, and
J.M.Neilson, "The COMFET: A New High
Conductance MOS-Gated Device," IEEE Electron
Device Lett., vol. EDL-4, pp. 63-65, 1983.
[Sh80]
P.W. Shackle, A.R. Hartman, T.J. Riley,
J.C. North, and J.E. Berthold, "A 500 V
Monolithic Bidirectional 2x2 Crosspoint
Array," ISSCC Tech. Dig. pp. 170-171, 1980.
[Si 8 5]
M.R. Simpson, P.A. Gough, F. Hshich, and
V. Rumennik, "Analysis of the Lateral Insulated
Gate Transistor," IEDM Tech. Dig., pp. 740-743,
1985.
[Sm82]
R.K. Smith, H.W. Becke, J.C. Gammel, M.A.
Shibib, and Y.H. Wong, "An Analytic Model
for the Forward Characteristics of Gated
P-I-N Switches Applied to Lateral Structures,"
IEDM Tech. Dig., pp. 11-14, 1982.
[Su80]
S.C. Sun and J.D. Plummer, "Modeling of the
On-Resistance of LDMOS, VDMOS and VMOS Power
transistors," IEEE Trans. Electron Devices,
vol. ED-27, pp. 356-367, Feb. 1980.
[Va76]
A. Van der Ziel, Solid State Physical
Electronics. Englewood Cliffs, New Jersey:
Prentice-Hall, 1976.
[Ve86]
S. Veeraraghavan, J.G. Fossum, and W.R.
Eisenstadt, "SPICE Simulation of SOI MOSFET
Integrated Circuits," IEEE Trans. Computer-
Aided Design of ICAS, vol. CAD-5, pp. 653-658,
Oct. 1986.


CHAPTER 2
A PHYSICAL MODEL FOR THE CONDUCTANCE
OF LATERAL p pixpn STRUCTURES FOR HVICs
2.1 Introduction
This chapter concerns the forward, steady-state
current-voltage characteristics I(VA) f a P+P^Pn+
structure, the GDS [We82,Ha81], used in HVICs. We develop
an analytic model for I(VA) based on a one-dimensional
regional representation of the device. The model yields
physical descriptions of RQN(=AVA/AI) and the dc resistance
Rdc(=Va/I) at high operating currents where these
resistances must be minimized to ensure efficient GDS
operation [Sm82]. Such minimization is aided by the model,
which clearly identifies the underlying physical mechanisms
and the associated parameters.
The resulting model also has applications to other
HV/P IC devices employing punch-through shields (aka buffer
regions) for which the development of effective and
efficient network models for circuit simulation is of
primary interest. In addition, the proper modeling of the
7


CN Sa(A)
94
Figure 4-10. Simulation of dynamic latch-up in the
IGBT: anode current, npn BJT collector
current, and driving gate-cathode voltage
versus time with R = 15 S! (I = 2 x
10-12 A and R = 0.175 Q).
n N


95
4.4 Summary
A methodology for SPICE implementation of
high-voltage/power integrated circuit device models has
been presented and demonstrated. The methodology is
flexible and enables an accounting for the unique
characteristics associated with HV/P IC devices, such as
merging bipolar and MOS structures, latch-up, conductivity
modulation, and moving boundary conditions. A
representative HV/P device, the IGBT, was modeled using a
system of implicit equations relating the quasi-static
device terminal currents and charges to the terminal
voltages. The physical IGBT model was implemented in
SLICE/SPICE2 by using UDCSs, simple FORTRAN subroutines
referenced in the SPICE2 nodal analysis. Simulations of
IGBT circuits, reflecting dc and transient characteristics
of the HV switch were described. These simulations, which
included static and dynamic latch-up, are not possible with
built-in SPICE2 lumped-element models, and thus poignantly
demonstrate the need for and utility of the new flexible
and physical modeling methdology. CPU times required to do
the simulations with the UDCS model are substantially
longer than times for (invalid) simulations with built-in
models in SPICE2. However they are not prohibitive for
small-scale circuits; typically the new models necessitated
CPU times, for both dc and transient simulatons, about an


107
model in several ways that make it physically
representative of high-voltage devices. The charge-based
formalism (5-9) properly accounts for transcapacitances,
which cannot be represented faithfully by reciprocal
capacitors [Fo86b], The base-region voltage drop vep in
(5-3) is modeled directly and generally (even for (3<1,
viz., very high Jg). The relationship (5-5) from PIN-diode
theory ensures the proper simulation of the emitter
efficiency for high-injection conditions in the base
region. For example in the limit of very high injection,
the model with (5-5) correctly predicts |3-l/b
(base-region mobilities). Thus, high-voltage p+n~p and
n+p n BJTs have different limiting current gains (Appendix
A) .
The network representation of the charge-based low-(3
pnp BJT module is shown in Figure 5-2. The module is
implemented in SPICE via user-defined controlled sources
(UDCSs) [Ve86] in a novel manner which allows the circuit
simulator to solve the nonlinear equations implied by
(51)(58). UDCSs are FORTRAN subroutines in SLICE
[Ha84], an enhanced version of SPICE2. Each element of the
module is a UDCS that describes the current (and associated
transconductance or transcapacitance calculated numerically
using finite-difference approximations) via the system of
equations described above (Appendix B). The SPICE nodal
analysis accesses the subroutines iteratively in the


41
anode. The resulting analysis identifies important
charging mechanisms and suggests device design criteria for
decreasing the turn-off time. The analysis subsequently
aids in developing accurate and simple equivalent network
representations for LIGBT structures, as shown in Chapters
4 and 5.
Until recently, high-voltage power-switching devices
were either bipolar (e.g. gated PIN-diode [Sm82]) or MOS
(e.g., power MOSFET [Ba81]). A particular application
dictated the technology to be used based on a tradeoff
between its advantages and disadvantages. Bipolar power
devices generally yield low on-resistance RQN
(high-current-density operation) because of conductivity
modulation, but slow switching because of the
minority-carrier storage. MOS power devices are fast
switching because of short minority-carrier (channel)
transit time, but generally have high RQN because of the
lightly doped drift region.
Recently a new family of power semiconductor devices
based on integrating bipolar and field-effect technologies
was introduced. The IGBT [Ru83,Ba84b] is basically a
MOSFET (VDMOS) having a pn junction connected to the drain
that, in the on-state, injects minority carriers into, and
modulates the conductivity of, the drain (drift) region.
The basic IGBT structure is shown in Figure 3-1. With it,
virtually any desired tradeoff between switching speed and


Figure 5-
114
r
Network representation for the LIGBT mode
of operation.


TABLE OF CONTENTS
ACKNOWLEDGEMENTS iii
ABSTRACT vi
CHAPTERS
1 INTRODUCTION ..1
2 A PHYSICAL MODEL FOR THE CONDUCTANCE
OF LATERAL p pnpn STRUCTURES FOR HVICs ...7
2.1 Introduction 7
2.2 Model Development 9
2.3 Physical Insight (Simplified Model) 20
2.4 Experimental Corroboration and Discussion 27
2.5 Summary 39
3 CHARGE-CONTROL ANALYSIS OF THE IGBT
TURN-OFF TRANSIENT 4 0
3.1 Introduction 40
3.2 Model 44
3.3 Discussion. 58
4 HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICE
MODELINGA FIRST APPROACH 64
4.1 Introduction 64
4.2 Modeling Methodology 67
4.3 SPICE Simulations and Discussion 81
4.4 Summa ry 9 5
5 HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICE
MODELING 97
5.1 Introduction 97
5.2 Modeling Methodology 100
5.3 Application/Demonstration .109
5.4 Simulation/Verification 121
5.5 Summary
6 SUMMARY AND CONCLUSIONS WITH RECOMMENDATIONS ..134
iv


13
junction
nea
r the
anode;
V is
n
the
drop
region;
vnp
J
is
the dr<
op across
the
n-p j
cathode;
and
vpn
J
i s the
drop acri
oss the p
junction,
Ref ei
rring
to Figure
2-2
high-inj
?cti
on (p:
=n>>N
An
) where NAji is
the
density)
in
the it
region
, we have
then
from
across the n
unction near the
shield-cathode
and assuming
acceptor doping
(2-1)
qVA
+ AEFn + ^Vn
(2-2)
where AEpA and AEFC are the EFn-EFp separations at the p-n
and n-p junctions respectively, and AEfn is the change in
EFn across the p shield at the cathode. We assume that the
majority-hole quasi-Fermi level is virtually flat across
the p shield, in which the injection level is low; thus
qVpn =AEFn+AEFC. In deriving (2-2) we used the
quasi-equilibrium relations qVpn; = AEFA/2-( kT ) In( NAjl/n^ ) and
qvJP=AEFC/2+(kT)ln(NAn/n.).
Hence for a given GDS current density J, AEFA, ^efc'
AEFn, and must be determined before (2-2) can be used to
give the desired J(VA) characteristic. These
determinations are made by incorporating into basic
PIN-diode theory a model for carrier transport in the p
shield, which reduces the injection of electrons into the n
region.


75
where WM( equals N ^; JA is the anode (emitter) current density and
b=/un//Up is the electron/hole mobility ratio.
For negligible recombination in the emitter junction
space-charge region, is related to p(0) as follows
[Be79]:
(4-7)
x=0
where is the ambipolar diffusivity [Gh77] and Jnq is the
saturation current density defined by the back injection of
electrons into the quasi-neutral emitter region [Fo81].
Equations ( 4 4 ) ( 4 7 ) relate p(0) to VAB and V^, the
independent node-voltage differences in the model. Now
(4-2) and (4-3) can be used with these relations, and the
quasi-static approximation, to characterize the UDCSs in
terms of these voltages. We note that although these
characterizations are implicit, the model is implemented in
SPICE2 directly via access of the UDCSs by the nodal
analysis [Ve86].
The UDCS is given by (4-6). The quasi-static
depletion charge density at the base-collector junction is
CJC ^ep^d
(4-8)


o o o
X(LP+8)-X(LP+11)
X(LP+9)X(LP+12)
ENDIF
QJCAC*(2.07E-12*1. 6E-19*ND*ABS( .6-WBC) )**.3
QJC-Y
X(LP+11)QJC
X(LP+10)DELTA
IF(DELTA.EQ.0.O)THEN
Y-0.0
ELSE
Y-CCQJC-X(LP+8))*2.0/DELTA)-X END IF
X(LP+12)Y
ENDIF
C NO ERROR CHECKING
YNOER O
RETURN
200 CONTINUE
SET Y VALUE OF DQJC/DUBC
IF Y-0.0
ELSE
Y AC*.5*(2.07E-12*1.GE-19*ND)*(ABS<.64VBC)**-.3)
Y- 2*Y/DELTA
Y-0.0
ENDIF
RETURN
END


CHAPTER 1
INTRODUCTION
The field of high-voltage and power integrated
circuits is a rapidly emerging and expanding technology.
Three basic processing efforts have made high-voltage/power
(HV/P) devices practical for circuit integration: one, the
advent of a lateral, double-diffused MOS (DMOS) process
[De86], which produced integrated high-speed, high-voltage
display drivers; two, improved isolation techniques, such
as dielectric isolation [Be85, Sh80] and field reduction
techniques such as RESURF [Ap79], which reduced parasitic
interactions and provided higher breakdown voltages; three,
the functional integration of bipolar and MOS devices
[Ru83], which dramatically lowered device on-resistance and
consequently increased the power handling capability of
HV/P integrated circuits (ICs), while maintaining the
advantages of the MOS gate. However, although great
strides in the process technology of HV/P ICs have taken
place, the area of circuit modeling for
computer-aided-design (CAD) of HV/P ICs, especially for
1


72
the lateral voltage drop in the base region of the npn BJT,
which is important only near latch-up as we discuss later.
The six UDCSs reference the same user-defined
subroutine that defines the system of model equations.
This set of equations is quasi-static; that is, and
r d
QJC, as well as IMQS, Icpr ICN/ and Vepi, are described in
the steady state in terms of V.n and VDI,, and then the
transient currents are characterized through the
quasi-static approximation [Va76] which equates the
time-dependences to the steady-state dependences in terms
of VAB(t) and VBK(t). Virtually all device models used
today for circuit simulation are quasi-static. Although we
use the quasi-static approximation here, with some support
for its validity, we recognize the need to consider the
possible occurence of non-quasi-static (NQS) effects in
each particular model development. Proper accounting for
the NQS effects in SPICE models is a formidable task, but
can be facilitated [Fo86b] by the new methodology presented
in this chapter.
We now describe the physical model equations in
detail. The sytem of equations is based on the solution to
the one-dimensional ambipolar transport equation [Gh77]
describing the carrier densities in the quasi-neutral n~
base region. Two-dimensional effects are considered later.
Since the IGBT operates under high-injection (conductivity
modulated) conditions in the n~ base region (p = n >>


8
anode and cathode recombination, when high-injection
obtains in the low doped-base region, provides the impetus
for developing a new BJT model as derived in Chapters 4 and
5 and highlighted in Appendix A.
The gated diode switch (GDS), illustrated in Figure
2-1, is a dielectrically isolated high-voltage integrated
circuit silicon device used in monolithic crosspoint arrays
applicable to telephone switching networks. The device is
basically a PlN-diode with an n+ gate in the i(n) region
and p shields surrounding the p+ anode and the n+ cathode.
The n gate facilitates the turn-off of the switch, but
does not affect the forward bias (ON) characteristics,
which closely resemble those of a PIN-diode at high-current
levels. The cathode shield prevents punch-through between
the gate and the cathode in the off-state, and has been
shown to limit the injection of electrons into the n region
and hence increases the incremental on-resistence of the
device [Sm82]. The "anode shield" facilitates a reliable
contact to the anode, but does not provide any electrical
benefit.
Our one-dimensional analytic model, which can be
applied generally to gated bipolar switches, and hence has
application to HV/P ICs, is based on a system of equations
derived from previously developed PIN-diode theory
[Ha52,He68,Fl57,Be79] for high-injection conditions. The
equations are solved numerically to yield the desired I(VA)


it is a tale told by an idiot,
full of sound and fury,
signifying nothing.
Shakespeare


Gate-drive circuitry for IGBT transient
simulations. The pulse voltage, V wai
defined to fall from 10.7 to zero
ns. The voltage Vcc was set at 350 V.
igure 4-4.
crH


58
Thus I(t) can decay faster than exponentially if currents
associated Qn(t), reflected by the second term in the
denominator of (3-19), are significant. If J
NO
is
negligibly small, then (3-19) reduces to a simple
exponential decay defined by the numerator. However for
typical values of the model parameters, the second term in
the denominator of (3-19) can be significant.
3.3 Discussion
Our analysis of the IGBT turn-off transient is first
order, and describes, in terms of the steady-on-state
current components, an initial fast drop AI of the current,
followed by a slower decay of I(t), which can be, depending
on somewhat sharper than an exponential fall-off
having a time constant equal to tH. In Figure 3-4 we plot
the composite turn-off characteristic for a typical IGBT
predicted by our analysis for three assumed values of th
and of JN0, the two most significant material parameters
that must be controlled for optimal device design. As
noted previously, a steady-state analysis is needed to
evaluate parameters in our transient model. In the
derivation of the I(t) characteristics plotted in Figure
3-4, we first used a numerical solution of the steady-state
ambipolar transport in a quasi-two-dimensional
representation of the wide-base p+n p BJT to estimate the
constitution of Iq in (3-1) and (3-2). Then, with IM0S and


IEl-( B+l )/B*( AE1*JNO*PO**2/NI**2+Q*DA*AE1*PO/LA/TANH(W/LA) )
VDEM-VT*(B-l)/(B+l)*LOG(PO/ND)
VEPIVDEM-SINH(W/LA)*IE1*LA/AE1/Q/(UN+UP)/P0*
SLOG(TANH( (W-XS)/LA)/TANH(W/LA) )
Z2-VEPI
IF(IFLG.EQ.1)THEN
Zl-VEPI
VBC-VBC+H
IFLG-2
GOTO 789
END IF
VBC-VBC-H
Y-CZ2-ZD/H
765 CONTINUE
GOTO 99910
99910 CONTINUE
RETURN
END
C************ A******* A**** ********* A A A ****** ******
C THIS SUBROUTINE CALCULATES THE CHARGE IN THE BASE
C REGION AS A FUCTION OF THE NODE VOLTAGES VBE &D VBC
C FOR THE CHARACTERIZATION OF THE TRANSIENT CHARGING
C CURRENTS BY A UDCS [VE86]
C* ** ***************** ******** *"* ********** *** A A** *
c
SUBROUTINE UQB1( Y, I FLAG,LP,NP,LC,NC,JERROR)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND, JNO.NI.JNOl
SPECIAL COMMON BLANK
COMMON/BLANK/X ( 64 )
COMMON/STATUS/OMEGA ,T1ME, DELTA DELOLDC 7) ,AG(7) ,VT,XNI ,
6 EGFET .MODE .MODEDC I CALC, INITF .METHOD, IORD .MAXORD .NONCON,
6 1TERNO.ITEJMO.NOSOLV
COMMON/KNSTNT/TWOPI.XL0G2.XL0G10.R00T2,RAD,BOLTZ,CHARGE,
& CTOK,GMIN,RELTOL,ABSTOL.UNTOL.TRTOL,CHGTOL,EPSO,EPSSIL,EPSOX
IF(TIME.EQ.O.O) THEN
WBl-XILP+l)
TO- XCLP+2)
JN01-XCLP+3)
ND-XCLP+4)
AEl-X(LP+5)
H-XC LP+6)
WB-WB1
jno-jnoi
A AE1
ENDIF
VT-.02586
NI-1.3E10
UN-1350
UP-480
B-UN/UP
PHI-.6
ES-1035E-12
Q-1.6E-19
DA-2*VT*UN*UP/( UN+UP)
TH-2*T0
LA-SQRT(DA*TH)
GOTO(50,100,200,300),!FLAG+2
50 CONTINUE
RETURN
100 CONTINUE


Ill
it suffices here for assessing the validity of the modeling
methodology applied predominantly to the bipolar aspects of
the LIGBT. Fitting this model to the measured
linear-region transconductance, we extract values for R
eP1
(325 9), the threshold voltage (2.6 V), and the
transconductance factor (1.9X10-^ A/V).
In the LIGBT mode, the drain is left floating and a
positive voltage is applied to the anode. With the gate
biased above the threshold voltage, the n-channel supplies
base current for the lateral p+n~p BJT. Our
quasi-two-dimensional modeling of this transistor is done
by partitioning it into two one-dimensional transistors,
and Q2, each represented by BJT modules described in
Section 5.2. The partitioning is defined based upon
results we obtained from PISCES simulations, which show
that the ratio of lateral-to-vertical injection from the p+
anode (emitter) is nearly excitation-independent. Figure
5-3 shows a typical PISCES result for the hole current
distribution in our test structure for the LIGBT mode of
operation. The one-dimensional current flow in the center
section of the structure is clearly seen and demonstrates
that the quasi-two-dimensional modeling via partitioning is
a viable approach. The active area and base width for
are defined by the anode diffusion depth and the geometry,
as illustrated in Figure 5-1. The base width and area for
Q2 are defined to make the simulated current agree with


CHAPTER 4
HIGH-VOLTAGE/POWER INTEGRATED CIRCUIT DEVICE
MODELINGA FIRST APPROACH
4.1 Introduction
This chapter introduces a novel methodology for
flexible SPICE2 implementation of physical models for HV/P
IC devices developed in chapters 2 and 3. The model
implementation is applied to the IGBT of Chapter 3 and is
achieved without modification of the SPICE2 source code by
utilizing UDCSs that access FORTRAN subroutines which
define, implicitly, the current and charge as functions of
the controlling node voltages. The implicit problem is
numerically solved in a FORTRAN subroutine and its solution
(a current or charge) is referenced by the SPICE2 main
program. This highly flexible means (first approach) of
model implementation differs from that presented in Chapter
5, where the implicit model equations are solved by the
SPICE2 main program, thus trading model flexibility for
computational efficiency. SPICE2 simulations of dc and
transient characteristics of IGBT switching circuits are
64


49
External biasing and turn-off_circuitry
for the IGBT transient analysis.
Figure 3-3.


140
where
increasing
is
the ambipolar di
ffusivity,
dp/dx
i s the
of
the hole
(elect
ron) conce
nt
ration. For
current densi
ties,
the second
term
on the
s j
Lde of A-l
will
always bee
ome ne
gligible
i s
proportional
to p( 0
) (p(x): x
= 0
) wh
ereas JN
tional to p(0)
2 [ Gh7
7]. Thus,
at
high
current
the
base current
consis
ts primari
iy
of
emitter
ion
current, as
shown
in Chapter
2,
and
equation
used to to find
a limi
ting value
for
the BJT
current gain:
e
pnp
JE JN
JN
1
B
(A-2 )
A similar analysis for an n+p n structure yields a
different high current limit for the gain:
8 b .
Hnpn
(A-3 )
Physically, the difference between the high-current 8s
for pnp and npn transistors results from the unequal
electron and hole mobilities. Thus typical npn and pnp
BJTs used in HV/P ICs have very different limiting 8s. If


6.1 Summary and Conclusions 134
6.2 Recommendations 136
APPENDICES
A HIGH CURRENT CARRIER TRANSPORT IN WIDE-BASE BJTs 139
B UDCS/S LICE/S PICE MODEL IMPLEMENTATION 142
REFERENCES 152
BIOGRAPHICAL SKETCH 158
v


129
t (ns)
Figure 5-11. Model-simulated HIGBT anode/drain current
versus time for a resistive load of 100 G
and off-state voltage of 6 V. The gate
voltage of 10 V falls to zero in 25 ns.


23
Hence for sufficiently high J, AEpn is a constant,
independent of J as well as W and parameters associated
with the anode.
The approximations (2-23)-(2-25) are insightful. They
imply that for a given high J, the injection level in the n
region near the anode, i.e., n(0), is defined primarily by
Jnq, and that the injection level near the cathode, i.e.,
n(W), is defined primarily by Jp^ and Fg. This means that
V^n is independent of W and the anode parameters, even
A
though JN is a significant component of J.
Consistent with the simplifications in (2-23)-(2-25)
is the neglect of the second term in the expression (2-19)
for V^, which is typically ~kT/q. Thus for high J,
W
VE ~ q{fJn+fJ )
r dx
J n( x)
(2-26)
in which the integral is evaluated using (2-11). A further
crude approximation can be made by writing (2-26) as
Vn =
JW
q(VVn
(2-27


66
device characteristics and model complexities, such
implementation will require either modifying existing
simulator codes to accommodate new specific models, or
developing new methodologies for general model
incorporation. This paper describes a simple, flexible and
physical approach to the latter implementation. The
methodoly is exemplified through an application to a
representative device, the insulated gate transistor (IGBT)
[Ba84b], an HV/P switch comprising merged bipolar and MOS
structures. Although the (vertical) IGBT is not a common
integrated device, we use it to demonstrate the modeling
methodology, which is intended primarily for CAD of HV/P
ICs, because (i) it is well documented, and (ii) its basic
operation is not unlike that of other merged bipolar/MOS
devices which are integrated, e.g., the lateral IGBT
(LIGBT) [R086].
We stress that this chapter introduces and
demonstrates a novel device modeling concept for HV/P
circuit simulation, but does not include the simulation of
any actual device nor a complete corroboration of model
assumptions. The viability of the methodology is implied
by the physical nature of the models and is shown through
qualitative comparisons between model predictions and
published measured characteristics.
The new SPICE modeling approach, presented in Section
4.2 and demonstrated in Section 4.3, utilizes expressions,


50
first describing only the fast drop AI in the current that
occurs in the first phase, and then modeling the subsequent
decay of X(t) in the second phase, which defines the
turn-off time. If VG is removed at t=0, and I = Iq in the
steady-state for t<0 as described by (3-2), then for t>0
I(t) ~ 1C(BJT)(+
dQj2(t)
~St
(3-4)
where is the charge associated with the depletion
capacitance of J2. For t=0+, I is Iq, and and
dQj2/dt, which equals IM0S in (3-1), are defined by the
steady-state characterization of the IGBT, KV^). Hence
our transient analysis is dependent on the steady-state
model. We stress, however, the utility of the transient
model, independent of the steady-state analysis. As we
will show, the dc current components in (3-1) and (3-2)
become parameters of the transient model and can evaluated
by comparing theoretical and experimental characterizations
of the turn-off transient.
Using a charge-control representation, we express the
transient BJT collector current in (3-4) as
Qp(t)
IC(BJT) = Tt (t)
(3-5)


IGBT
CHAPTER 3
CHARGE-CONTROL ANALYSIS OF THE
TURN-OFF TRANSIENT
3.1 Introduction
This chapter concerns the modeling of another common
HV/P IC device, the IGBT [Ba85]. In Chapter 2, an
analytical model for the steady-state I-V characteristics
of a GDS was developed and experimentally verified. In
this chapter we utilize the physical insight gained in
modeling the GDS to develop a quasi-static charge control
model for the IGBT turn-off transient [Ba85]. The model,
with minor modifications, is also applicable to the hybrid
IGBT (HIGBT) [Fo87,Si85] turn-off transient, as
demonstrated in Chapter 5.
The analysis presented in this chapter describes the
transient behavior of the IGBT in terms of its steady-state
current components. The effects of minority-carrier
injection into the anode are properly accounted for, within
the limits of the quasi-static approximation, by using the
physically correct PXN-diode boundary condition at the
40


76
where Ac is the (effective)
The quasi-static carrier
region is the integral of (
base-collector
charge in the qua
4-1) from x=0 to
junction
si-neutral
x=W:
area.
base
W
Qb = qA J p(x)dx
0
(4-9)
where A^ is the emitter, or
charging-current UDCSs in the model
and (4-9):
anode, area. The
are derived from (4-8)
dQ. 8Q. dV.
i = x i 1
dt L 9V. dt
j 3
where i=JC, PB
and j =AB,
BK.
Therefore
the
" transcapacitance"
3Qi/8Vj must
also be
described
in the
UDCS, either analyti
cally or numerically.
We note
from
(4-9) and (4-10) that the transcapacitances associated with
QpB cannot be described in closed form, and hence
finite-difference approximations are used in the UDCS
dQpB/dt to characterize them numerically.


60
|3 evaluated for a specified IQ, ( 39 ) ( 311) give AI and
(3-19) describes the transient decay I(t). The value of KA
(=0.5) used in the transient analysis is consistent with
the quasi-two-dimensional treatment of the steady-state
carrier transport: K . /A.
a collector
Comparisons of the predicted characteristics in Figure
3-4 with published data [Ru83,Ba84b,Ba84a,Ba85,Ku85,Go83]
indicate that our model is representative of typical IGBTs.
The dependence on xH of both AI and I(t) is consistent with
corresponding measurements. The dependence on JNg has not
been studied experimentally, but is, we believe, depicted
faithfully. The predicted AI increases with increasing
Jnq, for Iq held constant, because 8 decreases. For the
same reason, AI increases with increasing xH, but the
dependence is not unrelated to the value of JnQ, and the
change is not simply equal to IM0S (=Iq/3) as implied in
previous work [Ba85,Ku85].
The I(t) dependence also may be more complex than
previously indicated [Ba84a,Ba85,Ku85]. Whereas the time
-13 2
dependence predicted for Jnq=2X10 A/cm is nearly
exponential [ exp(-t/xH)], indicating that the second term
in the denominator of (3-19) is unimportant, the predicted
transients become supra-exponential as Jnq increases. This
dependence of course is related to xH, becoming significant
as xH decreases. For xR sufficiently short, and/or for Jnq
sufficiently small, I(t) is exponential and Tq is defined
directly by xH.
60


26
observations are consistent with (2-14) and (2-24), which
imply
+
qvPn (2-28)
J = (b+l)JpQexp(j^i)
for high J.
+
The difference between the I(vPn ) and I(VA) curves in
region III is
(2-29)
The approximation (2-29) follows from (2-2) since
AEpA=AEF£, i.e., n(0)~n(W), for high J as discussed
previously. The two I(VA) characteristics in Figure 2-3
are thus described in essence by (2-27), except for very
high J where is influenced by carrier-carrier scattering
[Gh77] and band-band Auger recombination [Gh77].
Carrier-carrier scattering reduces the hole and electron
mobilities, which tends to increase as indicated in
(2-27). Auger recombination reduces the carrier lifetime,
which tends to decrease in (2-22) and hence also increase


11
device. We
are interested in
the steady-
state
cur rent-voItage
characteristic of
the GDS with
the
gate
floating; the
gate can therefore
be ignored
in
the
one-dimensional
model.
In our development of the physical model, we use the
quasi-Fermi levels to link the anode-cathode terminal
conditions to the internal device physics. This approach
facilitates physical insight into the operation of the
device, especially with regard to how changes in excitation
(carrier injection) at the cathode affect the excitation
and recombination current at the anode. The energy-band
diagram for a forward-biased GDS is shown in Figure 2-2.
It implies how the applied anode-cathode voltage defines
the hole and electron quasi-Fermi levels, EFp and EFn, and
hence the carrier density and electric field in the device.
The applied voltage (V^>0) equals the sum of the
internal voltage drops:
V. = VP P + v?11 + V + v!JP + Vpn (2-1)
A J J It J J
+
where Vp p is the drop across the high-low junction in the
anode, which is virtually zero because the p shield is
doped high enough to prevent high-injection for all normal
operating conditions; Vpn; is the drop across the p-n


39
-4 -2
GDS (W~2Q0/vm, A~10 cm ) can be reduced to <1052 by
12 2
decreasing Jnq and Jpg to <10 A/cm and increasing Tq to
~50 /usec.
2.5 Summary
A one-dimensional, regional model for the forward
current-voltage characteristic of the GDS, as described in
Section 2.1, has been presented and supported
experimentally. It requires generally numerical evaluation
of the analytic expressions, although for high currents it
can be simplified to avoid the numerical characterization.
The model yields expressions for the dc and incremental
resistance of the GDS at high currents, which show for the
GDS test structures used (W>3LA) that the RDC and RQN have
2 2
W dependence, that the slope of the R^ vs. W curve
2
should be one-half of the slope of the RDC vs. W curve,
2
and that the extrapolated intercept of the RQN vs. W
C A
curve should yield the series contact resistance (Rg+Rg).
In addition to the familiar parametric dependences, the
resistances were shown to decrease with increasing carrier
lifetime in the ji region and with decreasing saturation
current desities for both the cathode and the anode.


83
is low to provide high voltage blocking. A forward bias of
approximately 0.6 V is required to produce high injection
and conductivity modulation, which lowers the resistance of
the epi region. Our model equations are valid only in this
region of operation; for low-injection conditions, I is in
the milliamp-range and is well below any current of
practical concern. No attempt has been made to model the
reverse-blocking mode of operation, where VAK<0. The
methodology is flexible and this region of operation could
be modeled by including UDCSs, or modifying existing ones
to account for the leakage (generation) current associated
with the reverse-biased emitter junctions of the npn and
pnp BJTs. In this extension, the effects of an n+ buffer
layer at the anode, modeled for the GDS in Chapter 2, would
have to be included.
To exemplify transient IGBT simulations, we use the
representative gate-drive circuit [Ba84c] shown in Figure
4-4. The diode isolates the pulse generator during
turn-off transients. The impedance Z repesents a load on
the IGBT, which typically is resistive, inductive, or a
combination of both. The resistor R_ provides a path to
discharge the gate-to-cathode capacitance; it influences
the turn-off characteristic by limiting the rate of change
of VGK, and hence limits the rate of change of the anode
current,
A'
If R_ is sufficiently small (-109), then
depending on the steady-state value of 1^,
the IGBT may


87
Figure 4-6. IGBT anode current, DMOST drain current,
and gate-cathode voltage versus time from
simulation of turn-off transient defined
in Figure 4-4 with resistive load Z = 35
SJ and Rqk = 5 ffi (th = 0.8 //s, JN0 = I0"12
A/cm2) .


47
t
Figure 3-2. Typical IGBT turn-off transient showing
two distinct phases.


16
The carrier transport (drift, diffusion, and
recombination) in the 11 region is defined by the ambipolar
transport equation [Ha52,He68]
(2-7)
where
(2-8)
In writing (2-7), we have assumed, in addition to high
injection (p=n), that the electron and hole mobilities,
u and u are constant, and that the electron and hole
n n
(SHR) recombination times are equal (to Tq) and constant.
Effects of carrier-carrier scattering [Gh77] and band-band
Auger recombination [Gh77], which tend to invalidate these
assumptions, will be discussed later.
The high-injection assumption, which requires that Tq
be long enough to avoid space-charge-limited flow [Ba70],
is not restrictive with regard to modeling RDC and r0n
defined for the GDS at relatively
for typical values of Tq ensure
The boundary conditions for (2-7)
These resistances are
high values of J, which
high-injection levels.


98
such that the circuit simulator derives the solution to the
implicit nonlinear system of equations. In Chapter 4, the
implementation required the implicit system of model
equations to be solved by a FORTRAN algorithm accessed by
the SPICE nodal analysis, and consequently the implemented
SPICE model was computationly inefficient. The new
implementation presented in this chapter, although not as
flexible as that of Chapter 4, is nearly twenty times
faster.
We describe in this chapter the development of new
models for HV/P devices, in particular for lateral IGBT
[Da84,Pa86,Mc87,Si85] structures which are representative
of the HV/P devices in power ICs. The models are physical,
yet are implemented in SPICE, as we describe, through
flexible techniques which do not require sacrificing
physics through excessive empiricism. Thus the models can
be used to aid optimal device (process) design as well as
for CAD of HV/P ICs.
In the application of the modeling methodolgy to the
LIGBT, the device is regionally partitioned into three
one-dimensional bipolar transistors (BJTs) coupled to the
DMOS transistor, yielding a quasi-two-dimensional model for
the LIGBT. The consistuent device structures are
reresented by physical charge-based models in which
currents and charges are related to junction voltages
implicitly by sets of equations derived by solving the


C THIS SUBROUTINE CALCULATES THE VOLTAGE DROP DUE
C TO CONDUCTIVITY MODULATION IN THE BASE REGION
C AS A FUNCTION OF THE NODE VOLTAGES VBE AND VBC
C THE SLICE USERS MANUAL SHOULD BE CONSULTED FOR
C DETAILS IN USING THIS SUBROUTINE IN A UDCS CIRCUIT
C FILE
SUBROUTINE IVEPTKY IFLAG,LP,NP,LC,NC, JERROR)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND,NI,JNO,I El,LA
SPECIAL COMMON BLANK
COHMON/BLANK/X (S4 )
GOTOC 50,100*200,300),IFLAG+2
50 CONTINUE
IF(NC.NE.2) JERROR -99010
GOTO 99910
100 CONTINUE
PHI-.S
ES1.035E-12
NI-1.3E10
UN-1330.0
UP-A80.0
B-UN/UP
VT-.02586
Q-1.6E-19
DA 2*VT*UN*UP/(UN+UP)
C
WB-XCLP+1)
TO- XC LP+2)
JNO XCLP+3)
ND-XCLP+4)
AE1 X(LP+5)
H XCLP+G)
XX1-XCLP+7)
XX2-X(LP+B)
XX3-X(LP+9)
VBE- X(LC+1)
VBC- X(LC+2)
TH-2*T0
LA SQRT(DA*TH)
C
C CONVERGENCE ENHANCEMENT
lF(VBE.GT.O.eO)THEN
VBE-VT*LOG (VBE/VT )
END IF
IF(VBE.LT.0.53)THEN
FLGY -0.0
P0NI**2*EXP(VBE/VT)/ND
Y 0.0
GOTO 987
END IF
IF((VBE.8T.0.55).AND.(VBE.LT.0.80))
P0-NI**2/ND*EXP(VBE/VT)
END IF
FLGY 2.0
CALCULATE W THE ACTIVE BASE WIDTH AND
CALCULATE XS, THE POINT AT WHICH P(X)-ND
W- WB (2*ES*(PHI+ABS(VBC))/(ND*Q))** .5
ZZ- ND/PO*SINH(W/LA)
XS-W-LA*LOG(ZZ + SORT(ZZ**2+1))
SET Y VALUE OF VEPI
IE1-(B+1)/B*(AE1*JNO*PO**2/NI**2+0*DA*AE1*PO/LA/TANH(W/LA))
VDEM-VT*(B-1)/(B+1)*LOG(PO/ND)
VEPI -VDEM-SINH(W/LA)*I El*LA/AEl/Q/( UN+UP)/PO*
8L0G(TANH( (W-XS)/LA)/TANH(W/LA) )


Y VEPI
987 CONTINUE
GOTO 99910
200 CONTINUE
C
C SET Y VALUE OF DVEP/DVBE
c
IFCFLGY.LT. l.OUHEN
Y 0.0
GOTO 876
END IF
IFLG-1
567 CONTINUE
C
C CALCULATE W THE ACTIVE BASE WIDTH AND
C CALCULATE XS, THE POINT AT WHICH PCXJ-ND
C
W- WB C2*ES*CPHI+ABSCVBC))/CND*Q))**.5
ZZ- ND/P0*SINH(W/LA)
XS-W-LA*LOG(ZZ + SQRT(ZZ**2+1))
C
C SET Z VALUE OF VEPI .
C
IE1-(B+1)/B*(AE1*JNO*PO**2/NI**2+0*DA*AE1*PO/LA/TANH(W/LA) )
VDEMVT*CB1)/< B+l)*LOGC PO/ND)
VEPI -VDEM-SINH ( W/LA) I E1*LA/AE1/Q/ ( UN+UP ) /PO*
SLOGCTANHC (W-XS)/LA)/TANH(W/LA) )
Z2-VEPI
IFCIFLG.EO.DTHEN
Zl-VEPI
VBE-VBE+H
IFLG-2
GOTO 567
END IF
VBE-VBE-H
Y-CZ2-ZD/H
876 CONTINUE
GOTO 99910
300 CONTINUE
C
C SET Y VALUE OF DVEP/DVBC
C
IFCFLGY.LT.1.0)THEN
Y 0.0
GOTO 765
END IF
IFLG-1
789 CONTINUE
C
C CALCULATE W THE ACTIVE BASE WIDTH AND
C CALCULATE XS, THE POINT AT WHICH PCXI-ND
C
W- WB C2*ES*CPHI+ABSCVBC))/CND*Q))**.5
ZZ ND/PO*SINHCW/LA)
XSHJ-LA*LOGCZZ + SQRTCZZ**2+1) )
C
C SET Z VALUE OF VEPI


44
optimal device design. In this chapter we develop a
quasi-static charge-control (analytic) description of the
transient turn-off characteristic, which is physically
insightful and which suggests device design criteria for
shortening the turn-off time, without increasing RQN
considerably.
The charge-control model we develop is similar to one
previously developed Kuo et al. [Ku85], but does not
involve the assumptions and approximations implicit in Kuo
et al. [Ku85] that limit the validity of the model and in
fact result in misconceptions concerning the physics
underlying the turn-off transient. In particular, the
effects of the expanding depletion region at the cathode
and of minority-carrier injection into the anode, which are
not currently accounted for in [Ku85], nor in earlier work
[Ba84a], are represented in our model.
3.2 Model
The basic (unit-cell) structure of the (n-channel)
IGBT, shown in Figure 3-1, comprises a DMOS FET merged with
a BJT. The components of current, which is
multidimensional, are indicated in the Figure 3-1 for the
steady on-state (gate voltage VG sufficiently positive to
induce an n-channel between the the n+ cathode an the n~
epi region, and the anode-cathode voltage V->0). The
MOSFET channel (electron) current IMOs suPPorts carrier
recombination in the BJT


99
pertinent ambipolar transport problems. Charging currents
in the transient model are represented by time-derivatives
of the quasi-static charges, which implicitly (without
capacitors) account for charge conservation and
nonreciprocal transcapacitance.
The models are implemented in SPICE via user-defined
controlled sources (UDCSs), which are FORTRAN subroutines
accessed by the SPICE nodal analysis. The UDCSs define the
systems of model equations, which are analytic but must be
solved simultaineously and hence numerically. The solution
of the equations is derived by the nodal analysis.
The LIGBT model and the methodology are supported by
measurements of specially designed test structures, which
also support the model parameter extraction. This
verification is facilitated by two-dimensional numerical
device simulations with PISCES [Pi84] that provide needed
physical insight regarding, for example, current-crowding
effects, and imply how the partitioning of the LIGBT should
be done to effectively account for coupling among the
constituent devices. The test devices are lateral
structures designed to allow experimental access to
different regions of the LIGBT, for different modes of
operation, i.e., as a DMOS transistor, as an IGBT, or as a
"hybrid LIGT/DMOST" (HIGBT) [Si85,Fo87] with the anode
terminal shorted to the DMOST drain. This latter mode of
operation depends on an internal voltage drop to


APPENDIX B
UDCS/SLICE/SPICE MODEL IMPLEMENTATION
In this appendix we briefly overview a representative
UDCS SLICE/SPICE implementation of a charge-based network
representation for a wide-base, low-|3 pnp BJT, as depicted
in Figure 5-2.
The general theory and mechanical details behind the
implementation of steady-state UDCS network models into
SLICE/SPICE can be found in the SLICE Manual Rev. 4.08
[Ha84]. The general theory behind the implementation of
transient UDCS network models in SLICE is discussed in
Veeraraghavan et al. [Ve86].
The implicit nature of the network model and the novel
use of numerical derivatives (finite differences) for the
transconductances and transcapacitances are delineated via
comment statements in the following FORTRAN code listing,
which details each UDCS subroutine for the BJT model shown
in Figure 5-2.
142


43
Rqn can be effected by controlling the carrier
(recombination) lifetime in the n- drift (epitaxial) region
[Ba84a]. The device retains the high-input-impedance gate
of the MOSFET, and has the added advantage of
reverse-blocking capability.
The IGBT structure does, however, contain a parasitic
pnpn thyristor that can latchup at high currents and
thereby negate the gate control. Below the latchup
current, the steady-state current-voltage characteristic
(in the on-state) is defined by the DMOS, in series with
the underlying (foward-biased) pn junction and in parallel
with the parasitic vertical pnp bipolar-junction transistor
(BJT). That is, the anode-cathode current comprises the
DMOS channel current, which supplies electrons that
recombine in accord with with the properties of the forward
biased pn junction, and the BJT collector current, which
results from holes injected from the underlying
(emitter-base) junction.
The electrical coupling between the constituent MOSFET
and BJT in the basic IGBT structure results in a unique
transient turn-off characteristic [Ru83,Ba84b,
Ba84a,Ba85,Ku85] comprising an initial rapid drop in
forward current, followed by a slower decay. Previous
analyses [Ru83,Ba84b,Ba84a,Ba85,Ku85] of this
characteristic are either qualitative or incomplete, and do
not adequately reflect the underlying physics to facilitate


123
Figure 5-8. Model-simulated and measured LIGBT anode
current versus time for a resistive load
of 300 52 and off-state voltage of 4.5 V.
The gate voltage of 10 V falls to zero in
200 ns.


A METHODOLOGY FOR PHYSICAL MODELING OF
HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICES
FOR CIRCUIT SIMULATION
By
ROBERT JAMES MCDONALD
A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL
OF THE UNIVERSITY OF FLORIDA IN
PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE DEGREE OF DOCTOR OF PHILOSOPHY
UNIVERSITY OF FLORIDA
1987

it is a tale told by an idiot,
full of sound and fury,
signifying nothing.
Shakespeare

ACKNOWLEDGEMENTS
The support of the IEC at the University of Florida,
the NSF, and the SRC is acknowledged.
The technical guidance of Dr. M. A. Shibib of AT&T
Bell Laboratories in designing and fabricating the special
test structures used in this dissertation is appreciated.
His participation on the qualifying exam and on the final
defense also merits a note of gratitude.
iii

TABLE OF CONTENTS
ACKNOWLEDGEMENTS iii
ABSTRACT vi
CHAPTERS
1 INTRODUCTION ..1
2 A PHYSICAL MODEL FOR THE CONDUCTANCE
OF LATERAL p pnpn STRUCTURES FOR HVICs ...7
2.1 Introduction 7
2.2 Model Development 9
2.3 Physical Insight (Simplified Model) 20
2.4 Experimental Corroboration and Discussion 27
2.5 Summary 39
3 CHARGE-CONTROL ANALYSIS OF THE IGBT
TURN-OFF TRANSIENT 4 0
3.1 Introduction 40
3.2 Model 44
3.3 Discussion. 58
4 HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICE
MODELINGA FIRST APPROACH 64
4.1 Introduction 64
4.2 Modeling Methodology 67
4.3 SPICE Simulations and Discussion 81
4.4 Summa ry 9 5
5 HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICE
MODELING 97
5.1 Introduction 97
5.2 Modeling Methodology 100
5.3 Application/Demonstration .109
5.4 Simulation/Verification 121
5.5 Summary
6 SUMMARY AND CONCLUSIONS WITH RECOMMENDATIONS ..134
iv

6.1 Summary and Conclusions 134
6.2 Recommendations 136
APPENDICES
A HIGH CURRENT CARRIER TRANSPORT IN WIDE-BASE BJTs 139
B UDCS/S LICE/S PICE MODEL IMPLEMENTATION 142
REFERENCES 152
BIOGRAPHICAL SKETCH 158
v

Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy
A METHODOLOGY FOR PHYSICAL MODELING OF
HIGH-VOLTAGE/POWER INTEGRATED-CIRCUIT DEVICES
FOR CIRCUIT SIMULATION
By
ROBERT JAMES MCDONALD
December 1987
Chairman: Dr. J.G. Fossum
Major Department: Electrical Engineering
This dissertation presents a modeling methodology for
the construction of physical network representations for
high-voltage/power integrated-circuit (HV/P IC) devices.
The effects of multidimensional carrier flow, base-region
conductivity modulation, significant emitter recombination,
nonreciprocal transcapacitance, and the onset of latch-up
(static and dynamic), heretofore unaccounted for in
empirical circuit models, are physically accounted for in
our charge-based formalism. The methodology is applied to
vi

a representative HV/P IC device, the LIGBT, and the derived
model is implemented in SPICE via user-defined controlled
sources (UDCSs).
The methodology is supported by rigorous theoretical
analyses of several HV/P IC devices, two-dimensional
numerical device simulations with PISCES, and experimental
results obtained from specially fabricated test structures.
The resulting physical network representations, in addition
to the CAD ability they afford, will facilitate optimal
device (process) design under an actual circuit (transient)
environment, a capability that most device simulators do
not have.
vi 1

CHAPTER 1
INTRODUCTION
The field of high-voltage and power integrated
circuits is a rapidly emerging and expanding technology.
Three basic processing efforts have made high-voltage/power
(HV/P) devices practical for circuit integration: one, the
advent of a lateral, double-diffused MOS (DMOS) process
[De86], which produced integrated high-speed, high-voltage
display drivers; two, improved isolation techniques, such
as dielectric isolation [Be85, Sh80] and field reduction
techniques such as RESURF [Ap79], which reduced parasitic
interactions and provided higher breakdown voltages; three,
the functional integration of bipolar and MOS devices
[Ru83], which dramatically lowered device on-resistance and
consequently increased the power handling capability of
HV/P integrated circuits (ICs), while maintaining the
advantages of the MOS gate. However, although great
strides in the process technology of HV/P ICs have taken
place, the area of circuit modeling for
computer-aided-design (CAD) of HV/P ICs, especially for
1

2
those ICs employing MOS-controlled bipolar devices, has
been at a near standstill. Common high-injection effects,
such as conductivity modulation and enhanced back
injection, are not properly accounted for in existing,
empirical circuit models for HV/P devices [Pa86].
Furthermore, these models vitually ignore multidimensional
carrier flow, which is typical in integrated HV/P devices.
Thus, there exists a need for developing new physically
based models for HV/P devices and implementing these models
in a circuit simulator, e.g., SPICE [Na75],
This dissertation is concerned with the development
and implementation of network representations for a general
class of merged MOS-controlled bipolar structures, e.g.,
the lateral insulated-gate bipolar transistor (LIGBT)
[Da84, Si85], The major contributions made in this work
are as follows:
(1) the general formulation and solution of the
steady-state transport problem for the
basic p+pnpn+ structure, in terms
of quasi-Fermi level potentials, explicitly
showing the effect of the p punch-through
shield on the transport problem;
(2) the physical (charge-control) characterization of
the IGBT turn-off transient, clearly identifying
the device parameters controlling the important
charging mechanisms;

3
(3) the development and experimental verification
of a physical (charge-based) methodology for
modeling HV/P IC structures including the
effects of multidimensional carrier flow,
base-region conductivity modulation, and
enhanced back injection;
(4) the implementation of the LIGBT model into SPICE
through user-defined controlled sources (UDCSs)
with implicit characterizations and numerical
representations for transconductances and
transcapacitanees.
In Chapter 2, we develop analytic models for the
steady-state forward current-voltage characteristic of a
(p+pnpn+) gated-diode switch (GDS) [We82]. The models,
which apply generally to gated bipolar switches, are based
on a system of equations derived from basic pin-diode
theory. They provide physical insight into GDS operation
and suggest optimal design criteria to minimize the dc and
incremental resistances at high currents. Measured data
taken from a variety of GDS test structures are discussed
in support of the models.
In Chapter 3, a quasi-static charge-control analysis
of the unique transient turn-off characteristic of the IGBT
[Be85] is developed. The analysis describes the transient
behavior in terms of steady-on-state current components
that flow in the constituent MOSFET and BJT in the basic

4
IGBT structure. The effects of the expanding depletion
region at the cathode and of minority-carrier injection
into the anode are properly accounted for. Consequently
the physics underlying the turn-off time is clarified, and
device design criteria for shortening it, without
considerably degrading the on-state current conduction
capability, are suggested.
In Chapter 4, a novel methodology for flexible SPICE
implementation of physical models for HV/P devices,
accounting for their unique characteristics, is presented
and demonstrated. The implementation is achieved, without
having to modify the simulator code, by utilizing UDCSs
that reference a subroutine which defines, not necessarily
in explicit form, the system of model equations. The
simultaneous solution of the equations, which describes the
integrated charges in the device and the quasi-static
terminal currents in terms of the terminal voltages, is
effected by the SPICE2 nodel analysis. The methodolgy is
exemplified by modeling a particular high-voltage device,
the IGBT, in which conductivity modulation and latch-up are
accounted for. SPICE simulations of dc and transient
characteritics of IGBT switching circuits are discussed and
shown to be representative of measurements. The
flexibility of the modeling methodolgy for HV/P IC CAD is
demonstrated by simulating effects of both static and
dymanic latch-up in the merged bipolar/MOS structure of the
IGBT.

5
In Chapter 5, to enable CAD of power integrated
circuits, new physical models for lateral HV/P devices, in
particular LIGBT [Da84, Si85, Mu87] structures, are
developed and implemented in SPICE. The models are
charge-based, and, via regional partitioning, account for
the unique features of HV/P devices unaccounted for in
conventional equivalent-circuit models. The implementation
of the models in the circuit simulator is flexible and
allows these features (e.g., multidimensional carrier flow,
conductivity modulation, latch-up, transcapacitance) to be
simulated without having to sacrifice much physics through
excessive empiricism. Device measurements of specially
designed test structures, supplemented with two-dimensional
numerical device simulations, support the modeling
methodology and the model parameter extraction.
We summarize, in Chapter 6, the main conclusions and
accomplishments of this dissertation. We also suggest
ideas and avenues for future research.
In Appendix A, we briefly describe high-current
carrier transport in wide-base transistor structures. The
resulting simplified model predicts a fundamental
difference for the high-current 8s of pnp and npn
transistors. The physical insight afforded by the
simplified analysis will be useful for device engineers
designing complementary iGBTs.

6
In Appendix B, we briefly overview a representative
UDCS SLICE/SPICE implementation of a charge-based network
representation for a wide-base, low-3 pnp bipolar
transistor, a key model in the methodology for modeling
HV/P devices as dicussed in Chapter 5.

CHAPTER 2
A PHYSICAL MODEL FOR THE CONDUCTANCE
OF LATERAL p pixpn STRUCTURES FOR HVICs
2.1 Introduction
This chapter concerns the forward, steady-state
current-voltage characteristics I(VA) f a P+P^Pn+
structure, the GDS [We82,Ha81], used in HVICs. We develop
an analytic model for I(VA) based on a one-dimensional
regional representation of the device. The model yields
physical descriptions of RQN(=AVA/AI) and the dc resistance
Rdc(=Va/I) at high operating currents where these
resistances must be minimized to ensure efficient GDS
operation [Sm82]. Such minimization is aided by the model,
which clearly identifies the underlying physical mechanisms
and the associated parameters.
The resulting model also has applications to other
HV/P IC devices employing punch-through shields (aka buffer
regions) for which the development of effective and
efficient network models for circuit simulation is of
primary interest. In addition, the proper modeling of the
7

8
anode and cathode recombination, when high-injection
obtains in the low doped-base region, provides the impetus
for developing a new BJT model as derived in Chapters 4 and
5 and highlighted in Appendix A.
The gated diode switch (GDS), illustrated in Figure
2-1, is a dielectrically isolated high-voltage integrated
circuit silicon device used in monolithic crosspoint arrays
applicable to telephone switching networks. The device is
basically a PlN-diode with an n+ gate in the i(n) region
and p shields surrounding the p+ anode and the n+ cathode.
The n gate facilitates the turn-off of the switch, but
does not affect the forward bias (ON) characteristics,
which closely resemble those of a PIN-diode at high-current
levels. The cathode shield prevents punch-through between
the gate and the cathode in the off-state, and has been
shown to limit the injection of electrons into the n region
and hence increases the incremental on-resistence of the
device [Sm82]. The "anode shield" facilitates a reliable
contact to the anode, but does not provide any electrical
benefit.
Our one-dimensional analytic model, which can be
applied generally to gated bipolar switches, and hence has
application to HV/P ICs, is based on a system of equations
derived from previously developed PIN-diode theory
[Ha52,He68,Fl57,Be79] for high-injection conditions. The
equations are solved numerically to yield the desired I(VA)

9
characteristic. The model is more useful as an
engineering-design aid than is a direct numerical solution
of the fundamental carrier transport equations [Sm82]
because it is simpler and because it affords physical
insight. The role of the cathode p-shield, as well as
those of the n+ cathode, the p+ anode, and the ji region, in
defining I(V^) is clearly described by the model, thereby
aiding optimal GDS design.
The physical insight provided is utilized to develop
an even simpler model, valid for high currents at which RQN
and RDc are of interest, that requires no recourse to
numerical techniques. This model, although not as accurate
as the other, is useful because it enables quick
assessments of possible device design modifications not
only for the GDS, but also, as shown in Appendix A, for the
BJT portion of the LIGBT. The models are supported by
measured data taken from a variety of GDS structures
fabricated at Bell Laboratories (Reading).
2.2 Model Development
The structure of the GDS, fabricated in a "tub" of
dielectrically isolated (DI) silicon, is illustrated in
Figure 2-1. Because the (anode-cathode) length is
typically much longer than the tub thickness, the
one-dimensional p+pnpn+ model, also shown in Figure 2-1,
for the GDS is representative of the basic operation of the

10
Anode Gate Cathode
Figure 2-1. Gated-diode switch (GDS) cross section and
corresponding one-dimensional model.

11
device. We
are interested in
the steady-
state
cur rent-voItage
characteristic of
the GDS with
the
gate
floating; the
gate can therefore
be ignored
in
the
one-dimensional
model.
In our development of the physical model, we use the
quasi-Fermi levels to link the anode-cathode terminal
conditions to the internal device physics. This approach
facilitates physical insight into the operation of the
device, especially with regard to how changes in excitation
(carrier injection) at the cathode affect the excitation
and recombination current at the anode. The energy-band
diagram for a forward-biased GDS is shown in Figure 2-2.
It implies how the applied anode-cathode voltage defines
the hole and electron quasi-Fermi levels, EFp and EFn, and
hence the carrier density and electric field in the device.
The applied voltage (V^>0) equals the sum of the
internal voltage drops:
V. = VP P + v?11 + V + v!JP + Vpn (2-1)
A J J It J J
+
where Vp p is the drop across the high-low junction in the
anode, which is virtually zero because the p shield is
doped high enough to prevent high-injection for all normal
operating conditions; Vpn; is the drop across the p-n

pasexq-pjBAVJOj
' sao
e jog uieaBeip pueq-A6jaua
'Z~Z
M 0
Zl

13
junction
nea
r the
anode;
V is
n
the
drop
region;
vnp
J
is
the dr<
op across
the
n-p j
cathode;
and
vpn
J
i s the
drop acri
oss the p
junction,
Ref ei
rring
to Figure
2-2
high-inj
?cti
on (p:
=n>>N
An
) where NAji is
the
density)
in
the it
region
, we have
then
from
across the n
unction near the
shield-cathode
and assuming
acceptor doping
(2-1)
qVA
+ AEFn + ^Vn
(2-2)
where AEpA and AEFC are the EFn-EFp separations at the p-n
and n-p junctions respectively, and AEfn is the change in
EFn across the p shield at the cathode. We assume that the
majority-hole quasi-Fermi level is virtually flat across
the p shield, in which the injection level is low; thus
qVpn =AEFn+AEFC. In deriving (2-2) we used the
quasi-equilibrium relations qVpn; = AEFA/2-( kT ) In( NAjl/n^ ) and
qvJP=AEFC/2+(kT)ln(NAn/n.).
Hence for a given GDS current density J, AEFA, ^efc'
AEFn, and must be determined before (2-2) can be used to
give the desired J(VA) characteristic. These
determinations are made by incorporating into basic
PIN-diode theory a model for carrier transport in the p
shield, which reduces the injection of electrons into the n
region.

14
To account for the effect of the shield, i.e., to
define AEfn, we neglect recombination in the shield, which
is typically much less than the carrier fluxes through the
shield. Then AE^ can be related to the electron current
Fn
c
density JN flowing in the shield, which constitues part of
the total current density J described by basic PIN-diode
theory.
For simplicity, we assume an (effective) uniformly
doped shield. Since the shield-cathode junction is in low
g
injection, the uniform-doping assumption implies that JN is
diffusion current, which is nearly constant:
N
_ An
q nws
qD n?
M n i
naws
AE
exp(-
FC w ,
£y~)[exp(
AE
Fn
kT
) 1]
(2-3)
where Dr is the (average) electron diffusion coefficient in
the shield, NA is the (~ peak) doping density, and Wg is
the (effective) width of the shield. From (2-3),
AE
FC
AE
Fn
4
kT In 1 +
JN FsexP(- -kf->
kTn?
i
(2-4)
where
A kAWS
S qDn
(2-5)

15
is a shield factor that can be used to relate AE_ to the
Fn
actual properties of the (diffused or implanted) p shield.
To relate Fg to an actual p shield in which NA varies,
note that generally
dx
(2-6)
S
N J D
n
(shield)
and that n(x)1/NA(x). Since the greatest contribution to
the integral in (2-6) comes from the region of the shield
where N (x) is a maximum (and D (x) a minimum), F in (2-5)
n q
can be evaluated for this region, the width W of which can
O
be estimated from the actual NA(x).
We now incorporate (2-4) into basic PIN-diode theory
to characterize the conduction properties of the GDS. This
involves generating a system of equations, the simultaneous
solution of which for a specified J yields AEFn, AE ,
AEfc, V VA* The resulting J(VA) characteristic, with the
cross-sectional area A (I=JA), then defines RDC and RQN-
We note, based on results of calculations discussed in
Section 2.4, that typically AEFn~kT, which means that the
shield reduces considerably the carrier injection level in
the ji region
R
'ON*
near the cathode and hence increases R
and

16
The carrier transport (drift, diffusion, and
recombination) in the 11 region is defined by the ambipolar
transport equation [Ha52,He68]
(2-7)
where
(2-8)
In writing (2-7), we have assumed, in addition to high
injection (p=n), that the electron and hole mobilities,
u and u are constant, and that the electron and hole
n n
(SHR) recombination times are equal (to Tq) and constant.
Effects of carrier-carrier scattering [Gh77] and band-band
Auger recombination [Gh77], which tend to invalidate these
assumptions, will be discussed later.
The high-injection assumption, which requires that Tq
be long enough to avoid space-charge-limited flow [Ba70],
is not restrictive with regard to modeling RDC and r0n
defined for the GDS at relatively
for typical values of Tq ensure
The boundary conditions for (2-7)
These resistances are
high values of J, which
high-injection levels.

17
are thus simplified to
P(0)
aefa
n(0) = niexp(-2k^) (2-9)
and
P(W)
aefc
n(W) niexp(y^) (2-10)
where x=0 and x=W denote the anode and cathode ends of the
ti region, the length of which is W (see Figure 2-1). The
solution to (2-7) is then
p(x)
n(0)sinh(WLx) + n(W)sinh(Lx)
= n(x) Aw A (2 11)
sinh(ip-)
la
This
solution is coupled to the carrier transport in
the anode and cathode by defining the minority-carrier
recombination currents in those regions. In the p+p anode,
this current, which can be expressed as [Fo81]
ii
< a
-a
AE (2-12)
JN0eXP( kT >
(2-12)

18
is supported by electron injection from the it region:
- vo)
5TT J +
2kT"n"p
"n+"p
dn
Hi
x=0
(2-13)
where bAThe expression for JN(0) in (2-13)
which is evaluated using (2-11), derives [F157]
J=JN+Jp with p=n. In the n+ cathode, the
recombination current can be expressed as [Fo81]
from
hole
JP JP0
exp(AEFC+AEFn)
if
(2-14)
and is supported by hole injection from the n region
[Fl57 ] :
Jp Vw) ETT
J -
2kTVp
"n^p
dn
Hi
x=W
(2-15)
In (2-12) and (2-14), Jnq and JpQ are constant
parameters (saturation current densities) that are defined
by the properties of the heavily doped anode and cathode
[Fo81].

19
Combining (2-4) with (2-12)-(2-15), we obtain the
following system of three equations in the three unknowns,
AE
FA'
AE
FC'
AE
Fn'
JN0exp(n^)=BTrJ+e[exP(2T^£)-exP(2i^)cosh(r-) ]'
A
(2-16)
^FC+^Fn 5 ^^FC ^^FA W
Jp0exp( ^ )=BbTj + p[eXp(21~)-exp(7j^)cosh(i-)],
A
(2-17)
where
-AE AE F
AEpn=kTln{l+[Jexp(- -^(-^oexpl-jS)] -Sj) (2-18)
k Tn
i
|3=2kTn./7 u /L. (¡j +/j )sinh(W/L.). To solve the system,
i n p a n p A
we must specify Jpg JNg, W' T0' ant^ FS" Then for a given
J, a suitable numerical method must be used to derive AEpA,
AE_, AE^ We have used an IMSL subroutine to solve the
system with a high degree of accuracy. From the solution
A C
n(x), JK and JN are determined.

20
To generate the
determine V which
across the it region.
[Ha52,He68], we have
J(VA) characteristic, we must now
is the integral of the electric field
Again using basic PIN-diode theory
V_ =
9 w
I
0
dx
n (x)
, b-1, kT
5+T ~q
, r n(0 ) 1
1 'lwT1
(2-19)
The integration in (2-19) can be done analytically. Thus
the combination of (2-19) with (2-9) and (2-10) defines,
for a given J, V Our characterization of J(V ) is then
It
given by (2-1), (2-16)-(2-18 ) and (19), the solution of
which must be obtained numerically. Representative results
will be presented in Section 2.4.
2.3 Physical Insight (Simplified Model)
A numerical solution to the system of equations
described in Section 2.2 is not necessary to gain useful
physical insight into the GDS operation. In this section
we describe this insight, and in doing so define a simpler
analytic model for J(VA) that is valid for high values of J
2
(100-1000 A/cm ) of practical concern.
The total current J is the sum of the recombination
currents in the p+p anode, it, and n+ cathode regions

21
[He68]:
(2-20)
From (2-9), (2-10), (2-12), and (2-14), we see that JNA and
C 2 2
Jp are proportional to [n(0)] and [n(W)] respectively.
In contrast, using (2-11) we see that
(2-21)
where
(2-22)
is an average carrier density in the ji region. Thus as J
increases, a larger portion of the current is supported by
recombination in the anode and cathode regions; becomes
negligible. Furthermore, since dn/dx H, as can be seen
by differentiating (2-11), the diffusion current in the n
region becomes negligible as J increases [He68]; the holes
and electrons predominantly drift across the n region.

22
Therefore for sufficiently high J, (2-13) and (2-15)
can be simplified [He68] to
(2-23)
and
(2-24)
These simplifications can be easily checked for
self-consistency with presumed high values of J using the
model in Section 2.2. In fact it can be shown that for a
given J, (2-23) and (2-24), with (2-12) and (2-14), yield
valid approximations for AE. and ( AE+AE_.T) even when the
diffusion current in the n region, reflected by the second
terms in (13) and (15), is comparable to the drift current.
The approximation (2-24) enables an additional
simplification regarding AEFn across the p shield.
Combining (14), (18), and (24) yields
(2-25)
i

23
Hence for sufficiently high J, AEpn is a constant,
independent of J as well as W and parameters associated
with the anode.
The approximations (2-23)-(2-25) are insightful. They
imply that for a given high J, the injection level in the n
region near the anode, i.e., n(0), is defined primarily by
Jnq, and that the injection level near the cathode, i.e.,
n(W), is defined primarily by Jp^ and Fg. This means that
V^n is independent of W and the anode parameters, even
A
though JN is a significant component of J.
Consistent with the simplifications in (2-23)-(2-25)
is the neglect of the second term in the expression (2-19)
for V^, which is typically ~kT/q. Thus for high J,
W
VE ~ q{fJn+fJ )
r dx
J n( x)
(2-26)
in which the integral is evaluated using (2-11). A further
crude approximation can be made by writing (2-26) as
Vn =
JW
q(VVn
(2-27

24
where is given by (2-22). Although not as accurate as
(2-26), (2-27) is insightful as we demonstrate later.
We have now defined a simpler analytic model for the
high-current J(VA) charactersitic of the GDS. For a given
J, V. is given by (2-2), in which V is approximated by
(2-26) or (2-27), AEpn is approximated by (2-25), AE^ is
FC
approximated by (2-14) and (2-24), and AE?A is approximated
by (2-12) and (2-23). We discuss the accuracy of this
model in Section 2.4.
Using the insight accompanying the development of this
model, we now offer a qualitative explanation of the
complete current-voltage characteristic of the GDS.
Typical measured characteristics are shown in Figure 2-3.
The data were taken from a GDS test structure having two
anodes placed at different lengths from the cathode.
+
Figure 2-3 includes plots of I(yPn ) as well as I(V ) for
J +
both anodes. Note that the I(V^n ) characeristics are
virtually coincident.
To explain the characeristics, we consider three
distinct regions of the curves as indicated in Figure 2-3.
Our models are applicable in region III where
high-injection obtains in the ti region. We note in this
4-
region that Iexp(qV^n /kT) except for very high I where
series resistance in the cathode (=352) causes the
+
characteristic to bend.
Further, the I(V^n )
characteristics appears to be independent of W. These

I (A)
25
Figure 2-3. Measured GDS current versus applied voltage
(VA) and shield-cathod voltage drop (V^" )
for two different n-region lengths
and W2). Three distinct regions
(I,II,III) of operation are indicated.

26
observations are consistent with (2-14) and (2-24), which
imply
+
qvPn (2-28)
J = (b+l)JpQexp(j^i)
for high J.
+
The difference between the I(vPn ) and I(VA) curves in
region III is
(2-29)
The approximation (2-29) follows from (2-2) since
AEpA=AEF£, i.e., n(0)~n(W), for high J as discussed
previously. The two I(VA) characteristics in Figure 2-3
are thus described in essence by (2-27), except for very
high J where is influenced by carrier-carrier scattering
[Gh77] and band-band Auger recombination [Gh77].
Carrier-carrier scattering reduces the hole and electron
mobilities, which tends to increase as indicated in
(2-27). Auger recombination reduces the carrier lifetime,
which tends to decrease in (2-22) and hence also increase

27
In the
lower-current
regions
I and II in Figure
2-3,
|
the I(vPn )
J
and l(VA)
curves
are coincident and
are
independent
of W. In
region
I, Iaexp(qVA/2kT)
is
predominantly recombination in the shield-cathode junction
space-charge region. Low injection prevails everywhere,
+
and hence VA=vPn For higher currents, but still low
injection, in region II, J becomes important. However
+
because V -0, still V and J.aexp(qV./2kT) The onset
of high injection in the it region occurs near the
transition point between regions II and III, where still
Vn< Above this point our model applies.
2.4 Experimental Corroboration and Discussion
In this section we present experimental data, taken
from a variety of GDS structures fabricated at Bell
Laboratories (Reading), that support the model described in
Section 2.2. We also use the simpler analytic model
developed in Section 2.3 to qualitatively explain the data.
Finally we discuss model calculations that reveal the
dependences of the current-voltage characteristic on
critical device and material parameters.
+
Measured I(V^n ) and I(VA) in the high-injection
regime are plotted in Figure 2-4. The data are taken from
a GDS test structure having four anodes placed at different
lengths from the cathode, two (W=228/vm, 615/ym) of which
correspond to the data plotted. Also plotted in Figure 2-4

I (A)
28
Figure 2-4. GDS current versus applied voltage +
(VA) and shield-cathode voltage drop (Vpn )
for two different n-region lengths (W2 J
and ). The solid curves represent
experimental measurements and the points
represent calculations using the
model derived in Section 2.2.

29
are the corresponding predictions yielded by the model in
Section 2.2 through computer-aided numerical solution of
the model equations.
The model parameter values used are listed in Table
2-1. They were initially estimated from knowledge of the
device structure and of typical ranges of their values,
using the insight afforded by the simpler model in Section
2.3, and then altered such that excellent correlation with
the measured data was obtained. Hence the
experimental-theoretical agreement not only supports the
model, but also provides estimations of the important
device and material parameters. We stress that these
estimations are not a unique set; relatively small
perturbations about these values do not significantly
change the experimental-theoretical correlation.
The inferred value Tq=10 psec is not significantly
influenced by band-band Auger recombination [Gh77] because
- 17 -3
n<10 cm as implied by the calculations. However, the
2 2
values p =920cm /V-sec and p =330cm /V-sec are m
n p
effect average values that reflect significant
carrier-carrier scattering [Gh77] at the higher currents,
an effect that we have not explicitly accounted for. This
effect could be incorporated into the model if more exact
parameter determinations were desired, but no additional
insight into the operation of the GDS would be gained
[Ch70] .

30
-5 2
The area A=5xl0 cm of the one-dimensional is merely
an effective representation of the actual three-dimensional
geometry. It is reasonable because it is comparable to the
actual cathode and anode areas. The anode area is actually
larger than the cathode area, which implies that Jnq and
JpQ are perhaps more comparable in value than shown in
Table 2-1.
We now discuss measured and predicted resistances of
the GDS. The dc resistance, RDC=VA/I at I=25mA, is plotted
2
versus W in Figure 2-5. The fact that both the
experimental and theoretical plots become linear for long W
supports in essence our model. This dependence is
explained as follows. From (2-2) and (2-27),
R
W
DC
qA(/n+//p)n
1 ,aefa
ql [ 2
AE
FC
AEW
(2-30)
where I=25mA. We note the actual RDC differs from (2-30)
C A
by a constant series resistance, (Rg+Rg), associated with
the anode and cathode.
W>3La,
Using (2-22), we see that for
DC
W2 1 ,6EFA aEFC
qA(//n+i< )LA[n(0)+n(w) ] ql' 2 2
+AEFn>
(2-31)

31
200
160
120
a
o
o
ce
80
40
//
/ /
/ /
/ /
/ ^Theoretical
Experimental^ / /
> /
¡f
/ /
/ /
/ /
* /
/?
//
L .//
}/
20
40
W2(10*Vm2)
Measured and calculated de resistance
versus the square of the it-region length.
The dashed lines emphasize the linear
dependences.
Figure 2-5.

32
and that for W<0.3La, the first term in (2-30) is linear in
W, independent of LA. We note, based on the discussion in
Section 2.3, that the second term in (2-31), as well as
n(0) and n(W), is virtually independent of W. Thus (2-31)
correlates well with the plots in Figure 2-5.
Discrepancies between the two slopes, i.e., in the slopes
and in the extrapolated intercepts, can thus be attributed
to the uncertainties in A, p and p
n p
C A
(carrier-carrier scattering), and to the neglect of (R^+R^)
respectively.
Measured and predicted values of the incremental
(quasi-static) resistance, RQN=AVA/AI centered at I=30mA,
2
are plotted versus W in Figure 2-6. Referring to (2), we
can write
R
ON
AV
AI
(2-32)
since the quasi-Fermi level terms vary little relative to
AV^ at high currents. Differentiating (27) then, in which
_2
we note based on Section 2.3 that J=I/An and that for
W>3La, =(La/W)[n(0)+n(W)], we obtain
R ~
ON qA(//n+// )LA[n(0)+n(W) ] '
(2-33)

33
100
80
60
z
o
ce
40
20
0*
Experimental^/
r
/
/
/
/ /
/
/
/
J jf ^Theoretical
/ /
/ v*
7 /
//
1/
-i /
-f-
Rg+R|=60
1 L
20 40
W2 (108|j.m2)
J L
Figure 2-6. Measured and calculated incremental
ON-resistance versus the square of the
n-region length. The dashed lines
emphasize the linear dependences. The
determination of the extrinsic series
resistance from the extrapolation of the
experimental data is illustrated.

34
which corresponds well to the plots in Figure 2-6.
W<0.3L>a, =[ n( 0 )+n(W) ]/2 and
R
ON
W
qA(//n+/Vp) [ n( 0 )+n(W) ]
(2-34)
As additional support
(2-31) and (2-33) imply a
the slopes of the RDC
characteristics, which is
We note further, since (2-3
that the extrapolation
characteristic yields direc
find (Rg+Rg)=6S2, which i
inferred from the measured
we expect RsRS' this re
for our model. The signif
experimental and theoreti
Figure 2-6 is due to, as we
explicit accounting of the
carrier-carrier scattering.
GDS design criteria
for our theory, we note that
factor of two difference between
2 2
vs. W and R., vs. W
ON
reflected by the measured data.
C A
3) does not account for (Rg+Rg),
of the
measured R_.T vs.
ON
W 2
tly this
series resistance.
We
s about
+
twice the value
of Rg
>
characteristic.
Since
suit provides additional support
icant discrepancy between the
cal values of RQN plotted in
show later, our omission of an
reduction in mobility caused by
to minimize RQC and RQN are
and (2-34).
suggested by (2-31), (2-33)
(2-12), and (2-23),
From (2-9)

35
n ( O ) = n t
r bI i1/2
i A(b+i)JNoJ
(2-35)
and from (2-10), (2-14), and (2-24)
I
1/2
(2-36)
n(W)
A( b+1) JpQexp (
where AEpn is constant as given by (2-25). Thus, reduction
in both Jnq and Jpg would reduce RDC and RqN> but because a
reduction in will also decrease AE this will produce
PO Fn c
larger reductions in the resistances than a reduction in
Jnq. We note from (2-25) also that designing the p shield
such that Fg->0 would reduce the resistances, but would also
tend to negate its shielding effect.
An increase in Tq will also decrease the resistances.
For W>3La, (2-31) and (2-33 )-(2-36 ) show that RQN and RDC
1/2
vary as 1/Tq However, for long Tq, or short W
(W<0.3La), Rqn and RDC are independent of ; further
decreases in W produce no additional reduction in the
resistances. Because of the effects of carrier-carrier
scattering, changes in parameters that increase n(0) and
n(W), which tend to decrease the resistances, will also
cause a reduction in carrier mobility, and hence the
decreases in RQN and RDC predicted by (2-31) and (2-33) can
be overestimated.

36
To demonstrate in more detail the influences of JTri,
NO
Jp0, and Tq on he GDS resistance, we give in Table 2-2
calculated (using the model in Section 2.2) values of R
DC
(I=25mA) and RQN (l=30mA) for various values of these
parameters. We chose an intermediate value for
W=357//m, and we used the remaining parameter values in
Table 2-1. The cathode and the anode series resistances
were not included. We see from Table 2-2 that the
resistances are most sensitive to Jpg, even though the
"intrinsic" current-voltage characteristic, J(VTF ), can
J
be independent of Jon [see (2-28)]. Both RDC and
pn
R,
can
p0 t__ v- DC ** *'0N
be reduced considerably by increasing Tq and/or deceasing
JN0 as well as Jp.
The resistance values in parentheses in Table 2.2 were
calculated by accounting for the carrier-carrier scattering
using an iterative technique [Ch70]. That is, the carrier
mobility values used in the final model calculation were
chosen to be compatible with the calculated average carrier
density in the it region as defined by empirical
characterizations of the mobility-density dependences for
holes and electrons. The calculations show that
carrier-carrier scattering tends to diminish the reductions
in resistance discussed above, especially with regard to
Rq^. Nonetheless we can conclude, based on these
calculations and others, that RQN (intrinsic) for a typical

37
Table 2-1. GDS parameter values inferred from
theoretical-experimental current-voltage
correlation.
JN0
=
4X10~12
A/cm2
JP0
-
lxlO-12
A/cm2
T0
=
1X10-5
sec
Fs
_
1.5x1011
2
V-sec/cm
"n

920
cm /V-sec
"p
=
330
2
cm /V-sec
A

5X10-5
2
cm

38
Table 2-2. Calculated dependences of R and R
on Jtgo' Jpo' and To for w=35' /um. The
remaining parameter values are given
in Table 2-1. The values of R and
Ron in parentheses were calculated
accounting explicitly for carrier-
carrier scattering [Ch70].
JN0 (A/cm2)
Jp0 (A/cm2)
tQ (/vs)
V (2)
eon (a)
4XlO~12
-12
1X10
10
81.7
(77.7)
21.5
(27.5)
4X10-12
5X10_13
10
69.4
(71.3)
16.1
(25.1)
5X10-13
-12
1X10
10
62.3
(67.2)
12.5
(22.5)
-12
4X10
-12
1X10 1Z
50
68.5
(69.2)
16.5
(23.0)
4X10~12
5X10-13
50
59.6
(64.0)
12.4
(21.0)
5X10-13
-12
1X10
50
54.2
(60.7)
9.6
(18.6)
5X10-13
5X10-13
50
50.2
(57.7)
7.7
(16.9)

39
-4 -2
GDS (W~2Q0/vm, A~10 cm ) can be reduced to <1052 by
12 2
decreasing Jnq and Jpg to <10 A/cm and increasing Tq to
~50 /usec.
2.5 Summary
A one-dimensional, regional model for the forward
current-voltage characteristic of the GDS, as described in
Section 2.1, has been presented and supported
experimentally. It requires generally numerical evaluation
of the analytic expressions, although for high currents it
can be simplified to avoid the numerical characterization.
The model yields expressions for the dc and incremental
resistance of the GDS at high currents, which show for the
GDS test structures used (W>3LA) that the RDC and RQN have
2 2
W dependence, that the slope of the R^ vs. W curve
2
should be one-half of the slope of the RDC vs. W curve,
2
and that the extrapolated intercept of the RQN vs. W
C A
curve should yield the series contact resistance (Rg+Rg).
In addition to the familiar parametric dependences, the
resistances were shown to decrease with increasing carrier
lifetime in the ji region and with decreasing saturation
current desities for both the cathode and the anode.

IGBT
CHAPTER 3
CHARGE-CONTROL ANALYSIS OF THE
TURN-OFF TRANSIENT
3.1 Introduction
This chapter concerns the modeling of another common
HV/P IC device, the IGBT [Ba85]. In Chapter 2, an
analytical model for the steady-state I-V characteristics
of a GDS was developed and experimentally verified. In
this chapter we utilize the physical insight gained in
modeling the GDS to develop a quasi-static charge control
model for the IGBT turn-off transient [Ba85]. The model,
with minor modifications, is also applicable to the hybrid
IGBT (HIGBT) [Fo87,Si85] turn-off transient, as
demonstrated in Chapter 5.
The analysis presented in this chapter describes the
transient behavior of the IGBT in terms of its steady-state
current components. The effects of minority-carrier
injection into the anode are properly accounted for, within
the limits of the quasi-static approximation, by using the
physically correct PXN-diode boundary condition at the
40

41
anode. The resulting analysis identifies important
charging mechanisms and suggests device design criteria for
decreasing the turn-off time. The analysis subsequently
aids in developing accurate and simple equivalent network
representations for LIGBT structures, as shown in Chapters
4 and 5.
Until recently, high-voltage power-switching devices
were either bipolar (e.g. gated PIN-diode [Sm82]) or MOS
(e.g., power MOSFET [Ba81]). A particular application
dictated the technology to be used based on a tradeoff
between its advantages and disadvantages. Bipolar power
devices generally yield low on-resistance RQN
(high-current-density operation) because of conductivity
modulation, but slow switching because of the
minority-carrier storage. MOS power devices are fast
switching because of short minority-carrier (channel)
transit time, but generally have high RQN because of the
lightly doped drift region.
Recently a new family of power semiconductor devices
based on integrating bipolar and field-effect technologies
was introduced. The IGBT [Ru83,Ba84b] is basically a
MOSFET (VDMOS) having a pn junction connected to the drain
that, in the on-state, injects minority carriers into, and
modulates the conductivity of, the drain (drift) region.
The basic IGBT structure is shown in Figure 3-1. With it,
virtually any desired tradeoff between switching speed and

Anode
Figure 3-1.
IGBT unit cell and current components.
The solid arrows depict hole flow and
the dashed arrows depict electron flow.

43
Rqn can be effected by controlling the carrier
(recombination) lifetime in the n- drift (epitaxial) region
[Ba84a]. The device retains the high-input-impedance gate
of the MOSFET, and has the added advantage of
reverse-blocking capability.
The IGBT structure does, however, contain a parasitic
pnpn thyristor that can latchup at high currents and
thereby negate the gate control. Below the latchup
current, the steady-state current-voltage characteristic
(in the on-state) is defined by the DMOS, in series with
the underlying (foward-biased) pn junction and in parallel
with the parasitic vertical pnp bipolar-junction transistor
(BJT). That is, the anode-cathode current comprises the
DMOS channel current, which supplies electrons that
recombine in accord with with the properties of the forward
biased pn junction, and the BJT collector current, which
results from holes injected from the underlying
(emitter-base) junction.
The electrical coupling between the constituent MOSFET
and BJT in the basic IGBT structure results in a unique
transient turn-off characteristic [Ru83,Ba84b,
Ba84a,Ba85,Ku85] comprising an initial rapid drop in
forward current, followed by a slower decay. Previous
analyses [Ru83,Ba84b,Ba84a,Ba85,Ku85] of this
characteristic are either qualitative or incomplete, and do
not adequately reflect the underlying physics to facilitate

44
optimal device design. In this chapter we develop a
quasi-static charge-control (analytic) description of the
transient turn-off characteristic, which is physically
insightful and which suggests device design criteria for
shortening the turn-off time, without increasing RQN
considerably.
The charge-control model we develop is similar to one
previously developed Kuo et al. [Ku85], but does not
involve the assumptions and approximations implicit in Kuo
et al. [Ku85] that limit the validity of the model and in
fact result in misconceptions concerning the physics
underlying the turn-off transient. In particular, the
effects of the expanding depletion region at the cathode
and of minority-carrier injection into the anode, which are
not currently accounted for in [Ku85], nor in earlier work
[Ba84a], are represented in our model.
3.2 Model
The basic (unit-cell) structure of the (n-channel)
IGBT, shown in Figure 3-1, comprises a DMOS FET merged with
a BJT. The components of current, which is
multidimensional, are indicated in the Figure 3-1 for the
steady on-state (gate voltage VG sufficiently positive to
induce an n-channel between the the n+ cathode an the n~
epi region, and the anode-cathode voltage V->0). The
MOSFET channel (electron) current IMOs suPPorts carrier
recombination in the BJT

45
IMOS IB(BJT)
(3-1)
where I
is the base current in the p+n p BJT, which
comprises recombination in both the base (n epi) and
+
emitter (p
anode) regions. The IGBT (anode-cathode)
current I is
(3-2)
I = I
+ I
B(BJT)
C(BJT)
the base transport (hole) current. Note that the actual
current gain of the BJT, |3 = Ic ( b JT)/JB ( B JT ) dePends
critically on the geometry of the IGBT structure.
Consequently, analysis of the device for the transient as
well as steady-state conditions must somehow account for
the multidimensional carrier flow.
The IGBT voltage VA can be written as the sum of four
voltage drops
+
(3-3)

46
+ -
where n is
the
drop
across the
underlying p+n-
junction; V
J epi
i s
the
vertical
drop across the
(conductivity-modulated) epi
region; IRg
is the drop across
the extrinsic series resistance Rg; and the last term is
the (lateral) drop across the channel of the MOSFET, where,
following [Su80], R and R^ represent effective
lumped-channel resistances of the "series-connected"
enhancement- and depletion-mode devices. The implicit
formulation in terms of the junction voltages for the
steady-state IGBT transport problem, and its corresponding
numerical solution, are given in chapters 4 and 5.
The conductivity modulation that produces the
excellent steady-state forward current-voltage
characteristic, viz., low of the IGBT can
ON
unfortunately cause the turn-off time to be much longer
than that of a conventional power MOSFET. A typical IGBT
turn-off transient [Ru83,Ba84b,Ba84a,Ba85,Ku85] is unique
as illustrated in Figure 3-2. It shows an initial rapid
drop in the forward current, followed by a slower decay,
which reflects the lifetime of the carriers stored in the
epi region. The turn-off time can be shortened by reducing
the carrier lifetime, for example, via electron irradiation
[Ba84a] or intentional metallic impurity doping [Go83].
Such techniques have resulted in turn-off times of less
than 200ns, but with accompanying increases in RQN because
of the reduced carrier injection levels in the epi region.

47
t
Figure 3-2. Typical IGBT turn-off transient showing
two distinct phases.

48
The IGBT is turned off by removing the gate voltage, and
hence the MOS channel through which electrons flow for
recombination in the p+ anode and n- epi regions. The
removal of the channel occurs quickly, on the order of the
electron transit time which is typically a few tenths of a
nanosecond [Ba81]. In order to characterize the IGBT
turn-off transient, the external circuit, represented in
Figure 3-3, must be considered. When the channel is
removed (virtually instantaneously), but 1 cannot
drop instantaneously because the reverse bias on the pn-
junction (J2 in Figure 3-3) does not increase abruptly; the
depletion capacitance of J2 is (partially) charged in short
but finite time, as controlled by the external circuit.
This initial phase is completed when I, defined by the
external circuit and developed reverse bias on J2 (V^)
equals the time-dependent BJT collector current, defined by
the (time-dependent) depletion-region width of J2. Little
carrier recombination occurs during this fast transient.
The second phase of the turn-off, however, is controlled by
carrier recombination in the epi region (and perhaps in the
anode region), and hence the completion of the development
of Vj2 is slower than the first phase. The carrier
lifetimes are typically longer than the time constant that
characterizes the initial transient.
Since the first phase is usually much faster than the
second, we will characterize the composite turn-off by

49
External biasing and turn-off_circuitry
for the IGBT transient analysis.
Figure 3-3.

50
first describing only the fast drop AI in the current that
occurs in the first phase, and then modeling the subsequent
decay of X(t) in the second phase, which defines the
turn-off time. If VG is removed at t=0, and I = Iq in the
steady-state for t<0 as described by (3-2), then for t>0
I(t) ~ 1C(BJT)(+
dQj2(t)
~St
(3-4)
where is the charge associated with the depletion
capacitance of J2. For t=0+, I is Iq, and and
dQj2/dt, which equals IM0S in (3-1), are defined by the
steady-state characterization of the IGBT, KV^). Hence
our transient analysis is dependent on the steady-state
model. We stress, however, the utility of the transient
model, independent of the steady-state analysis. As we
will show, the dc current components in (3-1) and (3-2)
become parameters of the transient model and can evaluated
by comparing theoretical and experimental characterizations
of the turn-off transient.
Using a charge-control representation, we express the
transient BJT collector current in (3-4) as
Qp(t)
IC(BJT) = Tt (t)
(3-5)

51
where Qp
(t) is
the
hole charge
n base
region
and
Ttp is
base
transit
time
in
(3-5)
is
depletion regi
on
(width
xd>
moving boundary, which is not
previous work [Ba85,Ku85], is
phase of the as we demonstr
high-injection conditions, we a
stored in the quasi-neutral
transit time for holes. The
ime-dependent because the
of J2 is expanding. This
accounted for properly in
most important in the first
ate below. For prevalent
ssume [Gh77]
TtP(t)
[WB-Xd(t))
(3-6)
where Wg is the metallurgical base width of the vertical
p+n-p BJT and KA is a constant less than unity discussed
below. Rigorously (3-6) (with KA=1) applies to a
one-dimensional device in which there is no recombination
in the base nor back injection into the emitter. However,
we assume that it (with KA<1) is representative of the
actual IGBT structure illustrated in Figure 3-1.
Independent of the finite base current, KA accounts for the
multidimensional carrier flow in the epi, in which case to
first order it could be given as the ratio of the BJT
collector and emitter areas. We note also that KA*1 can
effectively account for the influence of the base current
(recombination in both the n epi and the p+ anode) on the
transit time [Ku85].

52
Because the carrier lifetime (in the base) is long
relative to the duration of the initial fast transient, we
assume that Q is invariant in the first phase, even though
XT
the holes (and electrons) are redistributed in time in the
epi region. Thus as holes are swept out of the collector
to increase Qj2' electrons are forced toward the emitter,
thereby increasing the hole injection from the emitter to
maintain neutrality. This increase in Q which
approximately equals the increase in is much smaller
than Q and hence does not threaten the validity of (3-5).
Jr
From (3-1), (3-2), (3-5), and (3-6) then, we can write
I0 = IMOS +
-pO
WV4K. D
B/ A p
(3-7)
since x^O for t<0. Equation (3-7) defines Q^q, the
steady-state value of Q which remains virtually intact
ir
during the initial first transient.
The fast transient subsides when dQ^/dt^O, or from
( 3 4 ) ( 3 7 ) when I-I^ where
Q
*0 "
/4KADt
I0 IMOS
(1-wv2
(3-8)

53
in (3-8),
the "final
the hole
negligable
xdm the
" reverse
density
"final"
bias vj2m
in the
value of
, which for
depletion
, is [Gh77]
corresponding to
low enough that
region is indeed
xdm
2gSVJ2m
qN
^ epi
1/2
(3-9)
The external circuit (Figure 3-3) in which is chosen so
that I = Iq in the steady on state defines Vj2m (>0):
V
J2m
(3-10)
From (3-7) and (3-8) then,
AI *
T T
IMOS ^1
1
1]} (3-11)
I0 I1
'^dn/V'
where
V
IMOS' and ^ (I0
~IMOS//IMOS ^
are described
by
the
steady-state
analysis.
Note that
ai the
fast
drop
in the
current is,
in general
, less than
the
(steady-state) MOSFET current. Only for xcjm<
54
^MOS' wrongly implied in Baliga [Ba85] and Kuo et
al. [Ku85].
To demonstrate the virtual independence of the
transient result (3-11) from the steady-state analysis,
and
which defines I
obtain
0
IMOs' we combine (3-9)-(3-ll) to
r2eSVB,AI,1
xdm f qN i I
M epi 0
1/2
(3-12)
Thus measurement of the first phase of the turn-off
transient, i.e., of IQ and Al, enables evaluation of x^m,
which from (3-11) describes the constitution (an<^
I c ( b jt ) ^ f t^ie steacJy-on-state current Ig.
The slower decay of I [from Ig-AI) to zero] in the
second phase of the turn-off is similar to the transient
response of a BJT in the active mode following the abrupt
removal of the base current [Mu77]. Whereas the
first-phase transient is controlled predominantly by the
charging of the J2 depletion capacitance, we assume that
the second-phase transient is controlled by carrier
recombination. Thus the J2 displacement current [dQ^/dt
in (3-4)] is neglected, and we write, based on (3-5),
Qp(t)
'tp
Kt)
(3-13)

55
where rfcp is an average transit time, which can be crudely
approximated based on (3-6), as
(WB-Xdm
4K- D
A p
(3-14)
with x^m given by (3-12). The use of (3-14) greatly
simplifies the analysis of the second transient, and hence
facilitates physical insight and identification of critical
device parameters that define the turn-off. The
simplication is representative because typically the
increase in x^ beyond x^m is less than x^ ; the relative
change in during the transient during the transient is
smaller than that of Qp. The decay of I(t) in our model is
thus defined predominantly by the time-dependence of Qp(t)
[Ku77]; and errors resulting from the use of (3-14) are
minor and do not derogate the utility of the model.
In BJT terminology, I(t) is the emitter current, which
is equated in (3-13) to the collector current because the
base current is constrained to zero [Mu77]:
p(t) + dP(t) +
th dt
n(t)
n
+ dQn(t:
dt
0.
(3-15)

56
We are assuming that high injection (p=n) prevails in the
base region throughout the main turn-off transient, and
hence we use the high-injection carrier lifetime th as
defined by SRH theory [Gh77]. This is a reasonable
assumption for a device in which conductivity modulation is
essential in the on-state. In (3-15), Qn is the minority
electron charge in the quasi-neutral p+ anode (emitter)
reqion and Tn is an average (effective) electron lifetime
(charge-control time). The dynamics of Qn, which is not
accounted for properly in previous work [Ba85,Ku85], can
influence the second-phase transient as we show below.
For quasi equilibrium and negligible recombination in
the p+n~ junction space-charge region, Qn can be related to
Qp using the quasi-static approximation. In the
quasi-steady state, the solution [Gh77] to the ambipolar
transport equation in the quasi-neutral base region (with
p=n) yields, for less than the ambipolar diffusion
length, Qp^qAfWg-x^) p( 0 )/2 where p(0) is the hole density
at the edge of the space-charge region and A is the device
_ 2
area. Using Qn/Tn=AJNQ[p(0)/ni] [Gh77], where Jnq is the
saturation current density associated with the electron
injection (recombination) into the p+ anode, we have

57
Q2
Q IE
n Q0
(3-16)
where Qq is a constant charge given approximately by
Q0 =
a 2 2 TT ,2
Aq n.(WB-xdm)
4inJN0
(3-17)
With (3-16), (3-15) is
first-order, nonlinear
differential equation for the quasi-static Q (t), which can
P
be solved analytically. If we assume t < n ri
likely for the asymmetrically doped p+n~ junction, we get
Qp(t)
QpOeXp(
~pOTH [l-exp(- ^-)]
(3-18)
1 +
Q0Tn
H
where t=0 is now taken as the start of this second-phase
transient. Now I(t) is defined by (3-13), (3-14), and
(3-18), which with (3-8) yield
Kt)
It exp()
lh
(3-19)
I1JN0TH
2 2
AK.q nTD
1 p
[1-exp()]
H
1 +

58
Thus I(t) can decay faster than exponentially if currents
associated Qn(t), reflected by the second term in the
denominator of (3-19), are significant. If J
NO
is
negligibly small, then (3-19) reduces to a simple
exponential decay defined by the numerator. However for
typical values of the model parameters, the second term in
the denominator of (3-19) can be significant.
3.3 Discussion
Our analysis of the IGBT turn-off transient is first
order, and describes, in terms of the steady-on-state
current components, an initial fast drop AI of the current,
followed by a slower decay of I(t), which can be, depending
on somewhat sharper than an exponential fall-off
having a time constant equal to tH. In Figure 3-4 we plot
the composite turn-off characteristic for a typical IGBT
predicted by our analysis for three assumed values of th
and of JN0, the two most significant material parameters
that must be controlled for optimal device design. As
noted previously, a steady-state analysis is needed to
evaluate parameters in our transient model. In the
derivation of the I(t) characteristics plotted in Figure
3-4, we first used a numerical solution of the steady-state
ambipolar transport in a quasi-two-dimensional
representation of the wide-base p+n p BJT to estimate the
constitution of Iq in (3-1) and (3-2). Then, with IM0S and

59
Curve
^ H 0s)
t Ois)
Calculated IGBT turn-off transient for
three values of th and of J Device
parameter values used are an= 0.1 cm2,
6 0 /m,
0.5; I,
1014 cm3
and
&

60
|3 evaluated for a specified IQ, ( 39 ) ( 311) give AI and
(3-19) describes the transient decay I(t). The value of KA
(=0.5) used in the transient analysis is consistent with
the quasi-two-dimensional treatment of the steady-state
carrier transport: K . /A.
a collector
Comparisons of the predicted characteristics in Figure
3-4 with published data [Ru83,Ba84b,Ba84a,Ba85,Ku85,Go83]
indicate that our model is representative of typical IGBTs.
The dependence on xH of both AI and I(t) is consistent with
corresponding measurements. The dependence on JNg has not
been studied experimentally, but is, we believe, depicted
faithfully. The predicted AI increases with increasing
Jnq, for Iq held constant, because 8 decreases. For the
same reason, AI increases with increasing xH, but the
dependence is not unrelated to the value of JnQ, and the
change is not simply equal to IM0S (=Iq/3) as implied in
previous work [Ba85,Ku85].
The I(t) dependence also may be more complex than
previously indicated [Ba84a,Ba85,Ku85]. Whereas the time
-13 2
dependence predicted for Jnq=2X10 A/cm is nearly
exponential [ exp(-t/xH)], indicating that the second term
in the denominator of (3-19) is unimportant, the predicted
transients become supra-exponential as Jnq increases. This
dependence of course is related to xH, becoming significant
as xH decreases. For xR sufficiently short, and/or for Jnq
sufficiently small, I(t) is exponential and Tq is defined
directly by xH.
60

61
The dependence of Tq on carrier lifetime illustrated
by the carrier lifetimes plotted in Figure 3-4 is
consistent with other measurements [Ba84a,Ba85] that show
Tq decreasing strongly with increasing electron irradiation
~ -1
dose. Calculations and measurements imply Tqth which
implies that the time dependence in the denominator of
(3-19) is unimportant for these devices (that have low t ) .
We note further that measured dependences [Ba84a,Ba85] of
Tq on VB and on Iq are explained well by our first-order
model. For a given th, calculations show Tq increasing
weakly with increasing VB for constant Iq, and decreasing
with increasing IQ for constant Vfi. The Tq(Vb) dependence
is weak because x^m in (3-12) and implicitly in (3-13),
which defines Tq, does not change appreciably when Iq is
held constant, as can be seen from (3-10) and (3-11). The
Tq(Iq) dependence is more pronounced (Tq can be halved by
increasing Iq) because AI in (3-11) increases more rapidly
than Iq; viz., IMOS' which includes the p+ anode
recombination component, increases faster than Iq. We
infer from the model however that Tq will saturate for
sufficiently high Iq becauses ultimately iMqs' which
comprises predominantly the anode recombination current,
becomes proportional to IQ.
From our analysis, we can suggest a way to quicken the
turn-off, independent of shortening th which increases RQN

62
because V ^ in (3-3) increases.
For a given t, the
H
turn-off time can be reduced by increasing AI, which
decreases the second-phase decay in I(t) needed to turn off
the device, and by enhancing the significance of the
denominator in (3-19), which exploits the supra-exponential
decay. Physically, these changes lower 0 and make IM0Sr
which is controlled directly and without delay by the gate,
a larger component of the steady-on-state current, and they
make carrier removal through the p+ anode more significant
in the transient. They can be effected by increasing Jnq,
which could be done perhaps by reducing the doping density
and the electron lifetime and/or transit time in the
heavily doped p+anode region [Fo81], The benefit of such
an increase is illustrated in Figure 3-4. Reducing in
(3-19), for example by decreasing the BJT collector-emitter
area ratio, would produce similar benefit. We note however
from (3-3) that if the MOSFET resistances R and R are
ih JD
substantial, then increasing J
NO
and/or decreasing K,
(i.e., reducing 0) could significantly increase RQN.
An n+ punch-through shield (buffer region), as
described in Chapter 2, may also be used in IGBT
structures. The n+ buffer region reduces the emitter
efficiency of the constituent wide-base BJT and, for a
given current level, makes IMqS a larger component of the
steady-on-state current, thus subsequently decreasing the
turn-off time. The methodology for characterizing the

63
effects of a buffer region on device performance, as
presented in Chapter 2, may be applied to IGBT structures
to study the trade-off between decreased turn-off time and
increased on-resistance arising from the buffer-induced
reduction in base-region mobile carrier concentration.
The utility of the physical insight afforded by our
model for the transient turn-off should be stressed.
Whereas previous work has shown that TQ is reduced by
decreasing th and increasing AI, it has not demonstrated
how the reduction obtains and it has not clearly revealed
how AI can be increased most effectively. Furthermore the
previous work, which is based strictly on one-dimensional
analysis, did not reveal the subtle but critical influence
of the IGBT geometry on its transient turn-off
characteristic. The constant KA<1 in our model, although
somewhat empirical, reflects this influence. Our analysis
can further facilitate model parameter evaluation for IGBT
circuit simulation. For example, it is possible to
interpret a measured turn-off transient using our analysis
and extract, for a given on-state current Iq, values for
IMOS (an<^ hence 3)/ th/ and jno* This utility
interest in the general area of CAD of HVICs.
should be of

CHAPTER 4
HIGH-VOLTAGE/POWER INTEGRATED CIRCUIT DEVICE
MODELINGA FIRST APPROACH
4.1 Introduction
This chapter introduces a novel methodology for
flexible SPICE2 implementation of physical models for HV/P
IC devices developed in chapters 2 and 3. The model
implementation is applied to the IGBT of Chapter 3 and is
achieved without modification of the SPICE2 source code by
utilizing UDCSs that access FORTRAN subroutines which
define, implicitly, the current and charge as functions of
the controlling node voltages. The implicit problem is
numerically solved in a FORTRAN subroutine and its solution
(a current or charge) is referenced by the SPICE2 main
program. This highly flexible means (first approach) of
model implementation differs from that presented in Chapter
5, where the implicit model equations are solved by the
SPICE2 main program, thus trading model flexibility for
computational efficiency. SPICE2 simulations of dc and
transient characteristics of IGBT switching circuits are
64

65
shown to be
representative of
measurements taken
from
the
literature.
Both static and
dynamic
latch-up for
the
IGBT
are simulated, thus demonstrating the
flexibility
of
the
modeling methodolgy for HV/P IC CAD.
Recent advances in silicon IC processing technologies
have intensified development of "smart" high voltage/power
(HV/P) circuits, in which low-power logic and high-voltage
devices are integrated on the same chip. Computer-aided
design (CAD) of such circuits is critically dependent on
reliable device simulation, for example with SPICE2 [Na75].
HV/P devices have unique characteristics that are not
amenable to lumped-element, equivalent-circuit
representation, and hence the built-in device models in
SPICE2 are generally inadequate. Such characteristics
include effects of merging bipolar and MOS structures,
latch-up, conductivity modulation, and moving-boundary
(during transient) conditions. The inadequacy of the
SPICE2 MOSFET models for HV/P IC simulations is clearly
inferable from [Su80]. The SPICE2 BJT (Gummel-Poon (Ge7 8])
model is clearly deficient; for example, its basic
(integral-charge-control [Ge78]) assumption is invalid for
HV/P BJTs having significant back injection or relatively
low currents gains.
Therefore to enable reliable CAD of HV/P ICs, new
device models must be implemented in SPICE2, or in
comparable circuit simulators. Because of the unique

66
device characteristics and model complexities, such
implementation will require either modifying existing
simulator codes to accommodate new specific models, or
developing new methodologies for general model
incorporation. This paper describes a simple, flexible and
physical approach to the latter implementation. The
methodoly is exemplified through an application to a
representative device, the insulated gate transistor (IGBT)
[Ba84b], an HV/P switch comprising merged bipolar and MOS
structures. Although the (vertical) IGBT is not a common
integrated device, we use it to demonstrate the modeling
methodology, which is intended primarily for CAD of HV/P
ICs, because (i) it is well documented, and (ii) its basic
operation is not unlike that of other merged bipolar/MOS
devices which are integrated, e.g., the lateral IGBT
(LIGBT) [R086].
We stress that this chapter introduces and
demonstrates a novel device modeling concept for HV/P
circuit simulation, but does not include the simulation of
any actual device nor a complete corroboration of model
assumptions. The viability of the methodology is implied
by the physical nature of the models and is shown through
qualitative comparisons between model predictions and
published measured characteristics.
The new SPICE modeling approach, presented in Section
4.2 and demonstrated in Section 4.3, utilizes expressions,

67
not necessarily in explicit form, for the quasi-static
device terminal currents and charges (the models are
charge-based) in terms of the terminal voltages. This
system of equations, i.e. a physical device model, is part
of a subroutine that is referenced by user-defined
controlled sources (UDCSs) in SLICE [Ha84], one of the many
enhanced versions of SPICE2 that have been written. The
UDCSs generally available in enhanced versions of SPICE2,
are simple FORTRAN subroutines [Ve86] that constitute the
"equivalent-circuit" model, which simulates both
steady-state and (quasi-static) transient device
characteristics. With judicious programming and data
storage, UDCSs can be used effectively for simulation of
circuits in which the number of HV/P devices is not
excessive.
4.2 Modeling Methodology
The utility of the novel methodoly is demonstrated by
its application to the IGBT [Ba84b], as illustrated in
Figure 4-1. The IGBT is representative of emerging HV/P
devices that merge MOS and bipolar structures to exploit
the advantages of both. The (n-channel) IGBT shown is
effectively a vertical pnp BJT, the base of which is driven
by a DMOST, with a parasitic npn BJT at the cathode that
can cause latch-up and loss of gate control of the IGBT
switch. In contrast to the conventional DMOST, the

Figure 4-1. Basic IGBT structure.

69
conductivity of the n~ epitaxial region (base) of the IGBT
is modulated by carrier injection from the p+ anode
(emitter), thereby lowering the on-resistance but also
increasing the turn-off time because of the excess carrier
storage. The device has been previously modeled [Yi85] by
connecting numerical models for the DMOST and pnp BJT
through a modulated base resitance. Such modeling aids
optimal device design, but is impractical for circuit
simulation and provides little insight into how device
parameters affect the dynamic response of the IGBT in a
circuit, or an HVIC.
We emphasize in this paper the SPICE simulation of the
constituent wide-base (low-current-gain) pnp BJT and
parasitic npn BJT. We thereby stress the inclusion in the
model of unique characteristics like low BJT gain,
base-region conductivity modulation, and latch-up, which
are not properly accounted for in the built-in SPICE2
models. The DMOST is modeled using a standard level-2
SPICE2 MOSFET model [Ha84]. Because of the high level of
conductivity modulation in the n- base region, effects of
the parasitic JFET [Yi85] at the drain of the DMOST can, to
first order, be ignored when calculating the on-resistance.
The methodolgy presented, however, is flexible enough to
model the JFET effects if desired, but at the cost of
increased model complexity.

70
Gate
Figure 4-2. UDCS representation of the IGBT
implemented in SLICE/SPICE2. This is
not an equivalent circuit; the node B
is labeled merely to signify the internal
connection between the base region of the
pnp BJT and the drain of the DMOST. The
anode of the IGBT is referred to as the
emitter of the pnp BJT, and the cathode
as the collector.

71
The UDCS [Ve86] "circuit" model for the IGBT is shown
in Figure 4-2. In fact, the model is not an equivalent
circuit, but is a physical representation comprising six
UDCSs, each of which is defined implicitly by the system of
model equations in terms of the emitter-base and
base-collector voltages (VAB and VBR) of the pnp BJT. The
choice of node voltages used to define the UDCSs is not
unique. Alternative choices, as demonstrated in Chapter 5,
can be considered for a particular device to effect a
trade-off among model flexibilty, complexity, and
computational efficiency. The steady-state characteristics
of the IGBT are simulated by the UDCSs IM0S (the component
of the pnp BJT base current supplied by the DMOST), Icp
(the pnp BJT collector current), and Vepi (the voltage drop
across the n~ base region). The transient characteristics
are simulated by the charge-based UDCSs [Ve86] dQpB/dt (the
charging current defined by the carriers in the
quasi-neutral base region of the pnp BJT) and dQT/dt (the
charging current defined by the depletion charge at the
base-collector junction of the pnp BJT). Charging currents
associated with free carriers in other regions of the
device are typically negligible. For example, the charging
current defined by the minority electrons in the
quasi-neutral p+ emitter (anode) region is negligible, even
though the total pnp BJT base current (lM0S + ICN) must
include a component due to recombination in the emitter, as
shown in Chapter 3 [Fo86a]. The resistance RpN simulates

72
the lateral voltage drop in the base region of the npn BJT,
which is important only near latch-up as we discuss later.
The six UDCSs reference the same user-defined
subroutine that defines the system of model equations.
This set of equations is quasi-static; that is, and
r d
QJC, as well as IMQS, Icpr ICN/ and Vepi, are described in
the steady state in terms of V.n and VDI,, and then the
transient currents are characterized through the
quasi-static approximation [Va76] which equates the
time-dependences to the steady-state dependences in terms
of VAB(t) and VBK(t). Virtually all device models used
today for circuit simulation are quasi-static. Although we
use the quasi-static approximation here, with some support
for its validity, we recognize the need to consider the
possible occurence of non-quasi-static (NQS) effects in
each particular model development. Proper accounting for
the NQS effects in SPICE models is a formidable task, but
can be facilitated [Fo86b] by the new methodology presented
in this chapter.
We now describe the physical model equations in
detail. The sytem of equations is based on the solution to
the one-dimensional ambipolar transport equation [Gh77]
describing the carrier densities in the quasi-neutral n~
base region. Two-dimensional effects are considered later.
Since the IGBT operates under high-injection (conductivity
modulated) conditions in the n~ base region (p = n >>

73
Nepi>'
the base transport equation simplifies to
d2p(x)~ p(x) n
,2 2 U
d x L.
A
1 /2
where LA t=(DATH) 1 is the ambipolar diffusion length
[Gh77]. The solution to (4-1), precluding a forward bias
on the base-collector junction, is
p(x)
p(0)sinh(^)
la
sinh(^)
(4-2)
where p(0) is the hole (or electron) density at the edge
(x=0) of the emitter-base junction space-charge region and
W is the effective base width. From Figure 4.1,
W = Wb xd (4-3)
where WB is the metallurgical n- base width and x^, which
is a function of VBR, is the width of the depletion region
at the one-sided base-collector junction of the pnp BJT.
We define X[(VBK) based on the depletion approximation, and

74
neglect any mobile carrier charge that might exist in the
space-charge region for very high current densities [Gh77].
To relate p(0) in (4-2) to VAB, it is necessary to
characterize V since
epi
V = v + V
AB epi JEB
(4-4)
where
VJEB vijln t
P( 0)N
££i]
n.
(4-5)
is the emitter-base junction voltage (not equal to the
quasi-Fermi potential separation) [Wa83]. In (4-5), Nep
is the doping density in the n~ epitaxial base of the pnp
BJT and VT=kT/q is the thermal voltage. Accounting for the
conductivity modulation, we give V ^ by the integral of
the electric field across the quasi-neutral base, where the
field is related to p(x) through a combination of the hole
and electron current expressions [Gh77]:
dx
epi q ( v+fJ ) J p(x)
11 V n
WM
M
rJ
(b-l) kT
(b+1) q
In (
P(0)
N
epi
(4-6)

75
where WM( equals N ^; JA is the anode (emitter) current density and
b=/un//Up is the electron/hole mobility ratio.
For negligible recombination in the emitter junction
space-charge region, is related to p(0) as follows
[Be79]:
(4-7)
x=0
where is the ambipolar diffusivity [Gh77] and Jnq is the
saturation current density defined by the back injection of
electrons into the quasi-neutral emitter region [Fo81].
Equations ( 4 4 ) ( 4 7 ) relate p(0) to VAB and V^, the
independent node-voltage differences in the model. Now
(4-2) and (4-3) can be used with these relations, and the
quasi-static approximation, to characterize the UDCSs in
terms of these voltages. We note that although these
characterizations are implicit, the model is implemented in
SPICE2 directly via access of the UDCSs by the nodal
analysis [Ve86].
The UDCS is given by (4-6). The quasi-static
depletion charge density at the base-collector junction is
CJC ^ep^d
(4-8)

76
where Ac is the (effective)
The quasi-static carrier
region is the integral of (
base-collector
charge in the qua
4-1) from x=0 to
junction
si-neutral
x=W:
area.
base
W
Qb = qA J p(x)dx
0
(4-9)
where A^ is the emitter, or
charging-current UDCSs in the model
and (4-9):
anode, area. The
are derived from (4-8)
dQ. 8Q. dV.
i = x i 1
dt L 9V. dt
j 3
where i=JC, PB
and j =AB,
BK.
Therefore
the
" transcapacitance"
3Qi/8Vj must
also be
described
in the
UDCS, either analyti
cally or numerically.
We note
from
(4-9) and (4-10) that the transcapacitances associated with
QpB cannot be described in closed form, and hence
finite-difference approximations are used in the UDCS
dQpB/dt to characterize them numerically.

77
The composite base current IB of the pnp BJT, in the
steady-state, is the sum of recombination current from the
n base region and that from the p+ emitter region. It is
expressed as
XB "
-PB
TH
aejno[
p(0) i2
n. J
(4-11)
where xH is the high-injection carrier lifetime [Gh77] in
the base. The second term in (4-11) obtains for
quasi-equilibrium because low injection prevails in the
emitter. The electrons that support the recombination
current IB are supplied by the DMOST (iMqs^ under normal
operation, but in part also by the npn BJT (1CN) near
latch-up:
IM0S 1B ICN '
(4-12)
Analytical decomposition of ID, as well as characterization
O
of the n base transport current ICp/ must be done
implicitly and hence demonstrates poignantly the essence
(flexibility) of the modeling methodolgy, in contrast to
the less-flexible equivalent-circuit modeling built into
SPICE2.

78
The lateral flow of the collected holes Icp in the
base of the npn BJT forward-biases the emitter-base
junction and causes electrons to be injected into the base
of the pnp BJT (see Figure 4-1). This p-base transport
current can be approximated by [Ha85]
JCN = 1SN exp(-^-M) (4-13)
where IgN is the collector saturation current of the npn
BJT and Rbn is an average, or lumped, base resistance
[La85], both of which vary inversely with the p-base Gummel
number [Ge78]. However note that because of the
exponential dependence of ICN on Icp, only for conditions
near latch-up is the contribution of to the anode
current I.=A_J. significant. When I.T=0, IMrk£.=ID and the
A E A J CN MOS B
DMOST supplies all the electrons necessary for
recombination in the pnp BJT. However when the IGBT is
latched, the electrons necessary for recombination are
supplied by the npn BJT (ICN), and IMOS=0-
The implicit description of the current UDCSs is
completed by equating the pnp BJT collector current (Icp)
to the difference between the emitter current (1^) and the
base current (ID):
Jd

79
CP
A (IA IB)
hi
(4-14
In (4-14), and in (4-8), (4-9), and (4-11), we have crudely
accounted for the two-dimensionality of the pnp BJT by
including the (constant) collector-emitter area ratio,
which is less than unity. Although this accounting is
semi-empirical it does reflect the reduced base transport
factor in a typical IGBT due to hole injection into a
portion of the base that is laterally removed from the
collector, as shown in Chapter 3 [Fo86a]. Model
predictions made without the area ratio do not compare
favorably with experimental results, whereas those made
with it do. We note that for lateral devices,discussed in
Chapter 5, however, a more physical accounting for the
multidimensional effects is essential.
Because of the implicit nature of the model equations
(4-2)-(4-14), it is not possible to express p(0), and hence
the terminal currents, as explicit functions of V.D and
At)
BK'
Thus, for a given VAB and VRK. supplied by the SPICE2
BK
nodal analysis, (4-4) is solved iteratively (Newton's
method) for p(0) in a FORTRAN (UDCS) subroutine, and the
model equations are then used to determine IM, IOT,, I..,
^ MOS CP CN
Vepi' PB' an<^ JC The moc*e-*- clearly quasi-static; at
each point in time, the steady-state model equations are
solved in a UDCS subroutine and the solution (a terminal

80
current or charge density) is then referenced by the main
SPICE2 nodal analysis program [Ve86]. We note that in
addition to the transcapacitances in (4-10), the
transconductances 9I^/3Vj for each current UDCS must be
evaluated in the nodal analysis. These evaluations are
done numerically using first-order finite-difference
approximations.
The merged structure of the IGBT makes model parameter
evaluation difficult because of two-dimensional current
flow and inaccessibility of internal model nodes for
measurement. Model parameters for the DMOST and BJT
components of the IGBT can be estimated from a knowledge of
processing variables, doping density profiles, and
geometry. The threshold voltage for the DMOST can be
estimated from measurements of Ia^VGK^' although the
channel conductance cannot be inferred experimentally
without a special test structure. The two most important
As will be
shown in Section 4.3, these two parameters greatly
influence the steady-state on-resitance and turn-off time
of the IGBT. From a knowledge of the pnp BJT emitter
doping density, Jnq can be estimated analytically [Fo81];
and th can be obtained from a fitting of a measured
turn-off transient once Jnq is known, as described in
Chapter 3.
from a knowledge of the p-base doping density, or Gummel
parameters for the pnp BJT are xH and jnq
NO
For the npn BJT, I_.T and Rn,, can be estimated
c SN BN

81
number [Ge78]. Parameter exractions from latch-up
measurements could be done, but would not be straight
forward because of the difficulty in isolating important
current components, e.g., Icp.
4.3 SPICE Simulations and Discussion
In this section we demonstrate the utility of the
modeling methodology used to develop the SPICE IGBT model
in Section 4.2. Results of representative IGBT circuit
simulations on SPICE are presented and discussed. Figure
4-3 shows simulated dc IGBT current-voltage characteristics
for various values of gate-to-cathode voltage, V_v.
Typical parameter values were used for these simulations,
and the results shown are representative of typical
vertical IGBTs. For VGR sufficiently high, the DMOST
operates in the linear region, and the IA-VAK relationship,
where VAK is the anode-cathode voltage, is linear. This
linearity indicates that the on-resistance of the IGBT in
this case is not affected by the nonlinear V ., but is
epi
controlled by the DMOST channel conductance and by contact
resistance. For lower V-.,,, I. tends to saturate with
increasing VAK This saturation occurs because the DMOST
is driven to the saturation region, and therefore I^_
(=IB), and hence Icp are limited. For VA less than about
0.6 V, the IGBT does not conduct any appreciable current
because the unmodulated n epi resistance is so large; N
17 epi

82
vAk (V)
Simulated IGBT anode current versus
anode-cathode voltage for various
gate-cathode voltages. The DMOST
threshold voltage is 3 V.
Figure 4-3.

83
is low to provide high voltage blocking. A forward bias of
approximately 0.6 V is required to produce high injection
and conductivity modulation, which lowers the resistance of
the epi region. Our model equations are valid only in this
region of operation; for low-injection conditions, I is in
the milliamp-range and is well below any current of
practical concern. No attempt has been made to model the
reverse-blocking mode of operation, where VAK<0. The
methodology is flexible and this region of operation could
be modeled by including UDCSs, or modifying existing ones
to account for the leakage (generation) current associated
with the reverse-biased emitter junctions of the npn and
pnp BJTs. In this extension, the effects of an n+ buffer
layer at the anode, modeled for the GDS in Chapter 2, would
have to be included.
To exemplify transient IGBT simulations, we use the
representative gate-drive circuit [Ba84c] shown in Figure
4-4. The diode isolates the pulse generator during
turn-off transients. The impedance Z repesents a load on
the IGBT, which typically is resistive, inductive, or a
combination of both. The resistor R_ provides a path to
discharge the gate-to-cathode capacitance; it influences
the turn-off characteristic by limiting the rate of change
of VGK, and hence limits the rate of change of the anode
current,
A'
If R_ is sufficiently small (-109), then
depending on the steady-state value of 1^,
the IGBT may

Gate-drive circuitry for IGBT transient
simulations. The pulse voltage, V wai
defined to fall from 10.7 to zero
ns. The voltage Vcc was set at 350 V.
igure 4-4.
crH

85
t(|XS)
Figure 4-5. IGBT anode current, DMOST drain current,
and gate-cathode voltage versus time from
simulation of turn-off transient defined
in Figure 4-4 with resistive load ZL = 35
52 and R = 200 52 (xH = 0.8 /js, Jn0 =
10-12 A/cm2) .

86
latch during turn-off. Mechanisms that produce latch-up in
the IGBT will be simulated and discussed later.
In Figure 4-5 we show a simulated turn-off transient
for a typical IGBT in Figure 4-4 with a resistive load.
The turn-off delay reflected by IA(t) results because of
the finite time needed to discharge the gate-to-cathode
capacitance of the DMOST, and is a function of
GK'
This
discharging time is evident in the VGK(t) decay shown,
which is much slower than the fall of the VG(t) pulse.
Note that VGR(t) influences IA(t) by controlling the
conductance of the DMOST. As shown in Figure 4-5, the
DMOST transient drain current, ID(t), which, from Figure
4-2, equals I
+ dQ /dt dQT_/dt, does not begin to
fall until VGR(t) has decreased to a value that causes the
DMOST to saturate (see Figure 4-3). Further reduction of
V_(t) decreases the DMOST (saturation) current I^(t), and
UI\ D
hence IA(t) as well. Eventually (t) becomes less than
GK'
the DMOST threshold voltage, and ID(t) drops to zero.
IA(t), which includes ID(t), follows the decrease in ID(t)
until it becomes a negligible component, after which lA(t)
decays in accordance with the recombination in the pnp BJT
[Fo86a]. If VGK is reduced very rapidly, for example by
decreasing RGR, then ID falls to zero very quickly,
resulting in the more idealized two-phase turn-off
transient [Fo86a,Ba85,Ku85] shown by simulation in Figure
4-4. In contrast to previous analytical
results

87
Figure 4-6. IGBT anode current, DMOST drain current,
and gate-cathode voltage versus time from
simulation of turn-off transient defined
in Figure 4-4 with resistive load Z = 35
SJ and Rqk = 5 ffi (th = 0.8 //s, JN0 = I0"12
A/cm2) .

88
[Ba85,Ku85], our SLICE/SPICE2 simulations show that the
abrupt drop in IA(t) is not equal to the steady-state DMOST
current = (even when I.T is zero), and that the slow
decay of the second phase is not a simple exponential
function of the high-injection lifetime tH.
These
differences result, respectively, from the unique effects
of the expanding depletion region at the base-collector
junction and the back injection of electrons into the
emitter characterized by Jnq, poignantly demonstrated in
Chapter 3.
In Figure 4-7 we show simulated IGBT resistive
turn-off transients for various values of x and To
H NO
stress the influence of these parameters, we used a small
value for RGR that ensured the insignificance of transients
associated with the gate-to-cathode capacitance. The
magnitude of the fast initial drop in anode current and
subsequent slower decay are both dependent on th and JNg
These simulations and others have shown that changes in Jnq
should be considered as a means of optimizing the trade-off
between turn-off time and on-resistance. We stress that
these results could not be obtained using standard SPICE2
BJT models because of the limitations inherent in the
Gummel-Poon model [Ge78] and its implementation in SPICE2.
We stress that the results in Figure 4-7 are ideal in
that, in addition to negligible gate delay, there is also
no inductance in the load. For contrast, we show in

89
t (ns)
IGBT anode current versus time from
simulation of resistive turn-off transient
for various values of th and JN0 (RGK = 5
52) .
Figure 4-7.

90
t ((IS)
Figure 4-8. IGBT anode current, (normalized)
anode-cathode voltage, and gate-cathode
voltage versus time from simulation of
turn-off transient with inductive load.
In Figure 4-4, Z is a series combination
of 8 /t/H and 35 S31; RQK = 100 S3.
/ 30 (V)

91
Figure 4-8 a simulated turn-off transient for an IGBT in
Figure 4-4 with an inductive load, including a gate delay.
A distinctive characteristic of this turn-off transient is
the sharp rise of the anode-to-cathode voltage vAK(t),
which even shows overshoot and ringing as do corresponding
measurements [Ba84c]. This unique vAR(t) transient results
from a damped resonance defined by the load inductance in
combination with the junction capacitance repesented by the
charging current dQJ(_,/dt in our model.
To further demonstrate the utility of the modeling
methodology, we simulate the static latch-up of a
representative IGBT, but with a larger npn BJT base
resistance
latch, causing loss of gate control, if driven too hard.
For the static case, depicted in Figure 4-9 by the
simulated IA(VAK)/ latch-up is approached by increasing IA>
As characterized in Section 4.2, Icp also increases, and
subsequently, because of the increased forward bias I_RD.T
on the emitter-base junction of the npn BJT, so does lCN-
At the onset of latch-up, ICN increases abruptly, thereby
reducing IM0S accordance with the recombination in the
RBN. As mentioned previously, the IGBT may
pnp BJT. The reduction of IMQS decreases the voltage
dropped across the DMOST and results in the
negative-resistance region shown in Figure 4-9. The
process is regenerative, and as the applied current is
increased further, ultimately ICN supplies all the

92
vAk (V)
Figure 4-9.
V'-'i
Simulation of static latch-up in the IGBT:
driving anode current versus the resulting
anode-cathode voltage with gate-cathode
voltage equal to 10 V (ISN = 2 x 10-12 A
and Rbn = 0.175 ) .

93
electrons supporting the recombination current in the pnp
BJT, and I
MOS
is reduced to zero. In this condition, the
device is latched, and removal of the gate voltage will
have no effect on the IA The transition from a stable
operating point to the latched condition requires only a
small increase in applied current because of the
exponential dependence of ICN on Icp.
The IGBT can also latch during turn-off transients if
the lateral hole current in the base of the npn BJT, which,
at the start of the transient, consists of Icp plus the
displacement current dQJC/dt, is sufficiently high to
effectively forward-bias the npn BJT emitter-base junction.
The magnitude of dQJC/dt depends on the rate of change of
the gate-to-cathode voltage as defined by the IGBT model
and the external circuitry. In the ideal case, if is
VJI\
removed instantaneously, then the initial magnitude of
dQJC/dt is equal to the steady-state current supplied
by the DMOST, as discussed Chapter 3 [Fo86a]. If is
removed slowly, then the initial magnitude of dQJ(_,/dt will
be negligible, and the IGBT will not latch. In Figure 4-10
we show a simulation of dynamic latch-up in the IGBT, which
occurs because VGR(t) drops abruptly (due to a small RGK as
discussed previously). The turn-on of the BJT, which
triggers the latch-up, is indicated by the rapid increase
in its collector current ICN(t) shown in Figure 4-10.
Beyond this point in time, I^(t) remains finite even though
VGR(t) has dropped to zero.

CN Sa(A)
94
Figure 4-10. Simulation of dynamic latch-up in the
IGBT: anode current, npn BJT collector
current, and driving gate-cathode voltage
versus time with R = 15 S! (I = 2 x
10-12 A and R = 0.175 Q).
n N

95
4.4 Summary
A methodology for SPICE implementation of
high-voltage/power integrated circuit device models has
been presented and demonstrated. The methodology is
flexible and enables an accounting for the unique
characteristics associated with HV/P IC devices, such as
merging bipolar and MOS structures, latch-up, conductivity
modulation, and moving boundary conditions. A
representative HV/P device, the IGBT, was modeled using a
system of implicit equations relating the quasi-static
device terminal currents and charges to the terminal
voltages. The physical IGBT model was implemented in
SLICE/SPICE2 by using UDCSs, simple FORTRAN subroutines
referenced in the SPICE2 nodal analysis. Simulations of
IGBT circuits, reflecting dc and transient characteristics
of the HV switch were described. These simulations, which
included static and dynamic latch-up, are not possible with
built-in SPICE2 lumped-element models, and thus poignantly
demonstrate the need for and utility of the new flexible
and physical modeling methdology. CPU times required to do
the simulations with the UDCS model are substantially
longer than times for (invalid) simulations with built-in
models in SPICE2. However they are not prohibitive for
small-scale circuits; typically the new models necessitated
CPU times, for both dc and transient simulatons, about an

96
order-of-magnitude longer than those for the built-in
models. For larger-scale HVICs, new HV/P device models,
once they are developed and standardized based on the
methodolgy presented in this paper, could be written into
the SPICE2 code to reduce CPU times to acceptable values.

CHAPTER 5
HIGH-VOLTAGE/POWER INTGRATED CIRCUIT DEVICE MODELING
5.1 Introduction
This chapter combines and extends much of the work and
insight gained in previous chapters. In this chapter, new
physical models, and a general modeling methodology, for
lateral HV/P devices, in particular LIGBT structures, are
developed, and the models are implemented in SPICE via
UDCSs. The
models are charge-based, and via regional
partitioning,
account for the unique features of lateral
HV/P devices
(multidimensional carrier flow, conductivity
modulation, latch-up, transcapacitance) unaccounted for in
conventional
equivalent-circuit models. Device
measurements
of specially designed test structures,
supplemented
with two-dimensional numerical device
simulations, support the modeling methodolgy and the model
parameter extraction.
The implementation of the models in the circuit
simulator is flexible, and differs from the implementation
in Chapter 4 in that the model is implicitly formulated
97

98
such that the circuit simulator derives the solution to the
implicit nonlinear system of equations. In Chapter 4, the
implementation required the implicit system of model
equations to be solved by a FORTRAN algorithm accessed by
the SPICE nodal analysis, and consequently the implemented
SPICE model was computationly inefficient. The new
implementation presented in this chapter, although not as
flexible as that of Chapter 4, is nearly twenty times
faster.
We describe in this chapter the development of new
models for HV/P devices, in particular for lateral IGBT
[Da84,Pa86,Mc87,Si85] structures which are representative
of the HV/P devices in power ICs. The models are physical,
yet are implemented in SPICE, as we describe, through
flexible techniques which do not require sacrificing
physics through excessive empiricism. Thus the models can
be used to aid optimal device (process) design as well as
for CAD of HV/P ICs.
In the application of the modeling methodolgy to the
LIGBT, the device is regionally partitioned into three
one-dimensional bipolar transistors (BJTs) coupled to the
DMOS transistor, yielding a quasi-two-dimensional model for
the LIGBT. The consistuent device structures are
reresented by physical charge-based models in which
currents and charges are related to junction voltages
implicitly by sets of equations derived by solving the

99
pertinent ambipolar transport problems. Charging currents
in the transient model are represented by time-derivatives
of the quasi-static charges, which implicitly (without
capacitors) account for charge conservation and
nonreciprocal transcapacitance.
The models are implemented in SPICE via user-defined
controlled sources (UDCSs), which are FORTRAN subroutines
accessed by the SPICE nodal analysis. The UDCSs define the
systems of model equations, which are analytic but must be
solved simultaineously and hence numerically. The solution
of the equations is derived by the nodal analysis.
The LIGBT model and the methodology are supported by
measurements of specially designed test structures, which
also support the model parameter extraction. This
verification is facilitated by two-dimensional numerical
device simulations with PISCES [Pi84] that provide needed
physical insight regarding, for example, current-crowding
effects, and imply how the partitioning of the LIGBT should
be done to effectively account for coupling among the
constituent devices. The test devices are lateral
structures designed to allow experimental access to
different regions of the LIGBT, for different modes of
operation, i.e., as a DMOS transistor, as an IGBT, or as a
"hybrid LIGT/DMOST" (HIGBT) [Si85,Fo87] with the anode
terminal shorted to the DMOST drain. This latter mode of
operation depends on an internal voltage drop to

100
forward-bias the anode junction and activate the IGBT. The
test structures were fabricated using a
dielectric-isolation process [Go78] which eliminates
parasitic substrate effects. The utility of the flexible
and physical modeling is emphasized by SPICE simulations of
the LIGBT which reflects the three possible active modes of
operation. Furthermore, the onset of both static and
dynamic latch-up can be be simulated straightforwardly with
the physical SPICE model.
5.2 Modeling Methodolgy
We demonstrate the modeling methology through an
application to the LIGBT structure illustrated in Figure
5-1. The fabrication of this specially designed device is
described in Section 5.3. To develop a
quasi-two-dimensional model, we partition the structure
into one-dimensional constituent componenets as indicated
in Figure 5-1. The basis for this partitioning rests upon
physicl insight gained from device measurements in the
various modes of operation (PIN, DMOST, LIGBT, HIGBT) and
from device simulations using PISCES. Subdividing a
multidimensional structure into coupled one-dimensional
devices is not uncommon [Li67], but in this case of HV/P
devices the empiricism implied must be minimized through
proper accounting for the underlying physics. The unique
effects of significant back injection, base-region
conductivity modulation, and the associated low current

101
I
Figure 5-1. Special LIGBT test structure (symmetric
about the axis shown). The spacing between
the 10 fjm deep p+ anode and the cathode is
78 /jm. The thickness of the n~ ( 5 x 1014
cm-3) layer is 35 //m and the depth is 300
/jm.

102
gain in the BJT modules, which invalidates the commonly
used SPICE Gummel-Poon model [Ge78], necessitate new (more
physical) models.
We first focus our attention on the one-dimensional
low-gain pnp BJT constituent module (see Figure 5-1), and
overview the development given in Chapter 4. The low
doping density in the wide n~ base region implies that,
under normal forward-mode operation, high injection will
prevail throughout the base. Consequently, the base
transport problem is described by the ambipolar transport
equation with p=n, the solution of which gives
n ( x ) = p ( x ) =
P(0)sinh(^^)
LA
sinh(^)
la
(5-1)
where p(0) is the hole density at the edge of the
emitter-base (p+n~) junction space-charge region, L is the
~ n
ambipolar diffusion length, and W is the voltage-dependent
width of the quasi-neutral base region. We describe W
through the depletion approximation at the reverse-biased
collector-base (pn~) junction:
" WB Xd
W
(5-2)

103
where Wfi is the metallurgical base width and
x^= [ ((|)+VBC )/qNgpi ] 7 is the (one-sided) collector-base
(step) junction depletion-region width. In writing (5-1),
we have assumed that the simplified ambipolar transport
equation (p=n) is valid over the entire quasi-neutral base
region and thus, as done in [Fo77], we have implicitly
neglected the effects of the relatively narrow
low-injection region near the collector. In addition,
consistent with PISCES simulations for typical operating
conditions, the effects of mobile carriers in the
collector-base junction space-charge region, viz.,
quasi-saturation [Je87], have been neglected. Indeed in
the wide-base transistor, the base widening associated with
quasi-saturation is negligible.
In contrast to the Gummel-Poon model, our (low-p)
module properly accounts for, via (5-1), possibly
substantial recombination in the base region. Furthermore,
the module must account for possibly substantial
recombination in the p+ emitter region as well as a
current-induced electric field in the
conductivity-modulated base region which arises to support
the quasi-neurality. The integral of this electric field
across the base region defines a voltage drop, V i, which
causes the emitter-base junction voltage, VTr,D, to be less
than the applied terminal voltage, V,,D:
Ej JD

104
EB
= V
JEB
q("n+V
W
M
rJ i
dx
p( x)
(b-1)
T5TT)
kT
q
ln(
£(01
N
)
epi
(5-3)
where WM equals Nep' the base-region doping density JE is the
emitter (anode) current density, and b /^//Wp is the
electron/hole mobility ratio. (We generically refer to the
n base region as also the epi region, even though it may
not have been produced by epitaxial growth as in the case
for our devices modeled in Section 5.3.)
Using the quasi-equilibrium assumption, we express
p(0), and hence V in terms of VTC,D:
Sp 1 J IjD
p( o)
n. 2
i
N
exp(-
qV
JEB .
epi
kT
(5-4)
(If in a simulation p(0) is calculated to be less than or
equal to Nepi' the model is defaulted to the off-state
since the high-injection analysis is inapplicable.) For
negligible recombination in the emitter-base junction
space-charge region, JE can be related to p(0) following
conventional PlN-diode theory [Be79]:
Jn =
b+1
~b~
* JNO*
pm
n.
]
qA IS
x = 0
(5-5)

105
where DA is the ambipolar diffusivity, and Jnq is the
saturation current density that defines the back injection
of electrons into the quasi-neutral eitter region. The
base current density, JB, is the sum of the back injection
current plus the integrated recombination current in the
base region:
JB =
JN0[
ElSi^
n.
i
w
q J
0
p( x)
TH
dx
(5-6)
where xH is the high-injection carrier lifetime [Note that
1/2
La=(Dath) 7 ]. The collector current density, Jc, is
expressed as J-J. The cross-sectional area A relates the
terminal currents l_ and l_ (and In) to the respective
current densities.
The transient modeling of the transistor is done using
a charge-based method employing the quasi-static
approximation. This approximation, which is used
extensively for IC modeling [Ge78], is generally adequate
except for circuits much faster than typical power ICs
[Fo86b].
The predominant charges in the wide-base BJT module
(in the forward-active mode) are the quasi-neutral

106
base-region charge QB and the collector-base junction
depletion-region charge Qj^. For quasi-static conditions,
Qb is given by the integral of (5-1) from x=0 to x=W:
W
Qb = qA J p(x)dx ; (5-7)
0
and
Q= qAN .x ,
JC M epi d
(5-8)
The charging currents are derived from (5-7) and (5-8):
dQ. r 9Q. dV.
= 2 1
^Tt j 9Vj dt
(5-9)
9Qi
where i=B,JC and j=JEB,BC. The transcapacitances, in
j
(5-9) can be nonreciprocal, and hence the charge-based
model is more representative of the actual charge dynamics
than a conventional capacitance-based model.
Our low-3 BJT (with wide, lightly doped base) module
differs significantly from the conventional Gummel-Poon

107
model in several ways that make it physically
representative of high-voltage devices. The charge-based
formalism (5-9) properly accounts for transcapacitances,
which cannot be represented faithfully by reciprocal
capacitors [Fo86b], The base-region voltage drop vep in
(5-3) is modeled directly and generally (even for (3<1,
viz., very high Jg). The relationship (5-5) from PIN-diode
theory ensures the proper simulation of the emitter
efficiency for high-injection conditions in the base
region. For example in the limit of very high injection,
the model with (5-5) correctly predicts |3-l/b
(base-region mobilities). Thus, high-voltage p+n~p and
n+p n BJTs have different limiting current gains (Appendix
A) .
The network representation of the charge-based low-(3
pnp BJT module is shown in Figure 5-2. The module is
implemented in SPICE via user-defined controlled sources
(UDCSs) [Ve86] in a novel manner which allows the circuit
simulator to solve the nonlinear equations implied by
(51)(58). UDCSs are FORTRAN subroutines in SLICE
[Ha84], an enhanced version of SPICE2. Each element of the
module is a UDCS that describes the current (and associated
transconductance or transcapacitance calculated numerically
using finite-difference approximations) via the system of
equations described above (Appendix B). The SPICE nodal
analysis accesses the subroutines iteratively in the

108
B
Figure 5-2.
Charge-based network representation for a
wide-base, low-f3 pnp BJT.

109
simulation process. This implementation of an implicitly
formulated model allows for flexibilty in the modeling
methodolgy, and enables truly physical device models to be
incorporated into the device simulator.
We now exemplify the modeling methodogy by applying it
to the LIGBT test structure, and partitioning the structure
into one-dimensional modules for each mode of operation.
5.3 Application/Demonstration
Test structure of LIGBTs were fabricated using the
dielectric-isolation (DI) BCMOS technology [Go87] developed
at ATT Bell Laboratories. The LIGBT is dielectrical
isolated from the substrate and from other components to
minimize parasitic effects, thus allowing access to the
drain of the DMOST separately from the anode of the LIGBT
and making it easier to measure electrical parameters of
the structure. This facilities the demonstration of our
modeling methology, including the parameter extraction and
comparisons between model predictions and device
measurements.
The LIGBT structure shown in Figure 5-1 can operate in
several modes (PIN, DMOST, LIGBT, HIGBT) depending on the
terminal configuration. We must therefore develop a
systematic and consistent approach to modeling the various
modes of operation. The physical nature of our constituent
modules facilitates parameter extraction by minimizing the

110
empirical optimization needed. In addition, the modular
approach allows for a straightforward network
representation of the LIGBT structure as will be shown in
this section. We note that in all cases, the simulation of
the actual symmetrical device involves area doubling of the
model derived from the half-structure shown in Figure 5-1.
With the cathode floating, the drain tied to ground
and the anode biased to a positive voltage, the LIGBT
structure operates as a forward-biased PIN-diode. The
PIN-diode current-voltage characteristic can be used to
obtain information regarding recombination properties of
the n epi region (xH) and of the p+ anode region (JNg).
An optimization program was written to extract from
measured I-V characteristics the three adjustable
parameters (th, Jnq, and JpQ, the cathode counterpart of
Jnq) of a one-dimensional PIN-diode model [Mc85]. The
-13 2
optimization yielded th=2.6/us and JnQ = 6x10 A/cm at
room temperature. These parameter values were found to be
commensurate with measured turn-off transients of the
LIGBT, discussed below.
In the DMOST mode, the anode is left floating and the
drain is set at a positive voltage relative to the source
(cathode). The DMOST is empirically modeled as a simple
MOSFET (SPICE/level 2 [Ha84]) with a resistor, R ., tied
' epi
to the drain which accounts for the large n~ epi
resistance. Although this model is inadequate in general,

Ill
it suffices here for assessing the validity of the modeling
methodology applied predominantly to the bipolar aspects of
the LIGBT. Fitting this model to the measured
linear-region transconductance, we extract values for R
eP1
(325 9), the threshold voltage (2.6 V), and the
transconductance factor (1.9X10-^ A/V).
In the LIGBT mode, the drain is left floating and a
positive voltage is applied to the anode. With the gate
biased above the threshold voltage, the n-channel supplies
base current for the lateral p+n~p BJT. Our
quasi-two-dimensional modeling of this transistor is done
by partitioning it into two one-dimensional transistors,
and Q2, each represented by BJT modules described in
Section 5.2. The partitioning is defined based upon
results we obtained from PISCES simulations, which show
that the ratio of lateral-to-vertical injection from the p+
anode (emitter) is nearly excitation-independent. Figure
5-3 shows a typical PISCES result for the hole current
distribution in our test structure for the LIGBT mode of
operation. The one-dimensional current flow in the center
section of the structure is clearly seen and demonstrates
that the quasi-two-dimensional modeling via partitioning is
a viable approach. The active area and base width for
are defined by the anode diffusion depth and the geometry,
as illustrated in Figure 5-1. The base width and area for
Q2 are defined to make the simulated current agree with

112
Figure 5-3
PISCES simulation for the
shown in Figure 5-1. The
the negative hole current
current vectors around the
LIGBT structure
arrows indicate
vectors. The
junctions (high
grid density) have been removed for
illustrative clarity.

113
experimental results. To first order, they may be
estimated from PISCES results. This particular partition
is indeed representative of the device as implied by (a)
PISCES simulations, (b) experimental decomposition of
current voltage characteristics, and (c) relative
excitations of Q-^ and Q2 in the hybrid HIGBT mode of
operation discussed later.
The SPICE model for the LIGBT mode is shown in Figure
5-4. It consists of a simple MOSFET and 11 UDCSs. The
UDCSs labeled with the subscript one represent and those
with the subscript two represent Q2. The current source
ICNPN moc^e-*-s the third constituent BJT at the cathode as
it, when activated by the voltage drop in the p-base
reflected by RpB> effects the onset of latchup, which is
discussed later.
In the hybrid HIGBT mode of operation, the anode and
drain are tied together and raised to a positive voltage
relative to the source. The gate voltage, as in the the
LIGBT mode, is above the threshold voltage. For low drain
voltages, the device behaves as a DMOST, in series with a
large resistance, R .. The anode does not inject because
epi J
it is at the same potential as the drain. As the drain
current through R ^ is increased, an internal voltage drop
develops (vertically in this particular device) across a
portion of the epi region. When this voltage drop becomes
approximately 0.6V (viz., a diode drop) a portion of the

Figure 5-
114
r
Network representation for the LIGBT mode
of operation.

115
anode (Q^) becomes forward-biased and begins to inject
holes into the base region, subsequently modulating
and increasing the conductance of the device. Experimental
decomposition of the total current into its constituent
anode end drain components has revealed that this abrupt
increase in conductance, after the LIGBT is activated,
results primarily from the modulation of R and not from
epi
an increase in the anode (BJT) current. The modulation of
this resistance tends to increase the DMOST current, but
also tends to limit the excitation of which is driven
by the internal voltage drop. We note that physical
insight predicts and experimental results confirm that this
drop activates predominantly and not Q2, which is one
reason why our assumed partitioning is representative.
In Figure 5-5 we show the experimental decomposition
of anode and drain current for the HIGBT mode of operation.
Also shown, for comparison, is the LIGBT current-voltage
characteristic. Figure 5-5 clearly illustrates that the
anode current in the HIGBT mode is only a small fraction of
the total current, and furthermore, only a fraction of the
IGBT current. This decompostion and comparison of internal
currents verifies our partioning scheme and also explains
why the latch-up onset for the HIGBT mode is much greater
than that for the LIGBT mode. In both modes of operation
the emitter current of I is approximately the same
at the onset of latch-up. Obviously however, the primary
(

(mA)
116
Measured LIGBT current versus the anode
voltage and measured HIGBT current and
anode component of HIGBT current versus
the anode/drain (shorted) voltage.
Figure 5-5.

117
conduction mechanisms and the appropriate partitioning of a
particular HIGT depend critically on the device geometry,
as shown in [Mu87], and demonstrated in Section 5.4.
The SPICE model for the hybrid device is shown in
Figure 5-6. It contains modules for the MOSFET, two
resistors R and R the sum of which is R and a
nS nB epi
single lateral pnp transistor, The value for RnB
(458), which we assume to be constant, is estimated by
noting that it takes about 0.6V (a diode drop) of internal
voltage drop at the trigger current to turn on The
modulation of R .is semi-empirically accounted for in R .
epi c 2 nS
which is simulated by a UDCS, as discussed below.
The portion of the DMOST drain resistance associated
with RnS is a function of the total majority carrier
concentration, and thus is a function of the carrier
injection by The variation of RnS with injection level
is modeled by using an average excess hole (electron, p=n)
density, p:
W
5 W J p(x,dx *
VB1
qWA
(5-10
where p(x) is given by (5-1), and Qg is given by (5-7)
We
can use (5-10) to express Rng:

118

Figure 5-6. Network representation for the HIGBT mode
of operation.

119
R
nS
L
avct
L
MVNepi + P>
(5-11)
where L is the
cross-sectional
depends on p.
substitution for
resistor
area, and
A simple
p yields:
length, Av is the vertical
a is the conductivity, which
algebraic manipulation and
nS
1 +
B1
qAWN
epi
(5-12)
where Rq is the value of Rfig when p=0.
Both the LIGBT mode and the HIGBT mode can undergo
static or dynamic latch-up. Static latch-up occurs when
the collector current of Ic^, produces approximately a
diode voltage drop across the lateral resistance RpB in the
base of the parasitic n+pn- transistor. When this voltage
drop develops, electrons are injected by the n+pn_ BJT into
the base of Q1, increasing its conduction, and hence
triggering the regenerative process associated with the SCR
[Gh77] defined by and the n+pn~ BJT. Removal of the
gate voltage at this point will not turn off the LIGBT or
HIGBT since the DMOST supplies only a small fraction of the
base current for and the main path for current flow is
now through the SCR, which can only be turned off by
reducing the total current below the holding point.

120
Experimental results and computer simulations have
indicated that the latch-up point is only a weak function
of the gate voltage and that the base resistance, R^g, is
the most important parameter in determining the onset of
latch-up because of the exponential voltage dependence of
the injected electrons. We note that the gain of the n+pn~
BJT also has an influence on the latch-up point, albeit not
a strong one. In the dynamic case, both the charging
dQ
cu
JC
rrent, ^ £ and the transient collector current
contribute to the voltage drop across R^g and hence aid in
inducing latch-up.
The onset of latch-up in both the LIGBT and HIGBT
modes is simulated by the network models in Figure 5-4 and
Figure 5-6 via a voltage-controlled current source I
CNPN
(-Igsexp (VriR/VT) ) in which the controlling voltage, V^R, is
pB' T
pB'
developed across the assumed constant n+pn base
resistance, RpB* T^e Pre-exponential factor, Igs, is
related to the gain of the n+pn~ BJT through the Gummel
number. However, PISCES simulations have shown that R _
pb
undergoes significant conductivity modulation just prior to
latch-up, and hence R D and Icc should be considered as
p D O
semi-empirical modeling parameters. Because of the
SS
physical nature of our models, the values used for I
(2X10 ^A) and R (888) are close to those predicted from
pb
PISCES simulations. Note in Figure 5-4 and Figure 5-6 that

121
the onset of latch-up is properly accounted for in the
dQjCi
models as the charging current, gt-' contributes to the
voltage drop across and hence helps to induce latch-up.
5.4 Simulations/Verification
In Figure 5-7 we show model-simulated and measured
current-voltage curves for the LIGBT mode of operation for
three different values of the gate voltage. For
illustrative clarity, the measured curves were cut off just
prior to latch-up. The agreement between experiment and
theory is good (~10% error), thus lending support to our
particular partitioning and modeling methodology.
Discrepancies between the model predictions and
experimental results may be attributed to the first-order
DMOST model (SPICE/Level 2) that we used.
In Figure 5-8 we compare measured and model-simulated
transient turn-off characteristics of the LIGBT. At time
t=0 the gate voltage is removed and a typical two-phase
turn-off transient, as discussed in Chapter 3, is observed.
Our model simulations are in good agreement with
experiment. Discrepancies between the model and experiment
may be attributed to parasitics associated with the probe
station, since our transient measurements were performed on
a wafer and not on mounted devices. The turn-off time may
seem faster than expected for a lifetime of 2.6//S, but
this is due to the large proportion of base current, a

(mA)
122
Figure 5-7. Model-simulated (solid) and measured
(dashed) LIGBT anode current versus
anode voltage for three values of gate
voltage (VG = 12V, 10V and 8V from left to
right). The measured curves are terminated
just prior to the onset of latch-up; the
model-simulated curves are terminated just
prior to the predicted latch-up onset.

123
Figure 5-8. Model-simulated and measured LIGBT anode
current versus time for a resistive load
of 300 52 and off-state voltage of 4.5 V.
The gate voltage of 10 V falls to zero in
200 ns.

124
substantial fraction (-1/2) of which is p+-emitter
recombination (first term in (5-4)). The expeditious
effects of anode recombination on the LIGT turn-off
transient have been demonstrated in Chapter 3. We stress
that such transient simulations are not possible with
conventional SPICE transistor models. We also note that if
the gate voltage is removed fast enough, then the sum of
the transient collector current and collector-base junction
displacement current may be sufficient to forward bias the
n+pn transistor and subsequently cause dynamic latch-up.
For the circuit conditions shown in Figure 5-8, dynamic
latch-up will occur if the gate voltage is removed in less
than five nanoseconds.
In Figure 5-9 we show measured current-voltage curves,
terminating at latch-up, for the HIGBT mode of operation
for three different values of gate voltage. It can be seen
that the trigger current for the LIGBT (Q^) excitation is
approximately 13mA, independent of VG, implying that an
internal voltage drop is responsible for the triggering.
The onset voltage may be estimated by using our network
model for the HIGBT shown in Figure 5-6 and noting that the
applied voltage splits between RnB' RnS' an<^ tlie DM0ST
channel resistance. The total voltage across the HIGBT,
just prior to triggering, consists of three terms: a
channel drop, VCH> which depends on the DMOST gate voltage,
a drop across Rng, and a drop across RnB, which is

125
t (ns)
Figure 5-9. Measured HIGBT anode/drain current versus
anode/drain voltage for three values of
gate voltage (VQ = 6V, 8V and 10V from right
to left respectively). The measured curves
are terminated just prior to the onset of
latch-up.

126
approximately a diode drop, V^. The voltage drop across
R then is simply the current through R times R _
nb J nB ns
(VcjRnS/RnB) The total voltage across the HIGBT, just
prior to triggering, may then be expressed as,
V^H+V^(1+Rng/Rn0). Thus the relative magnitudes of RnS and
RnB greatly influence the onset voltage. To effect optimal
HIGBT design (low onset voltage), RnS should be made much
less than RnB* Later we will show that RnB plays an
important role in determining the transient turn-off
characteristics. The increase in total current immediatly
after the triggering is due predominantly to an increase in
the DMOST current as a result of modulating R and as
3 ns
discussed previously in Section 5.3.
In Figure 5-10 we show corresponding SPICE model
current-voltage curves for the HIGBT. Note that the
triggering points for the hybrid mode of operation are
reliably predicted, as well as the latch-up onsets. We
note, however, that although our model modestly simulates
the DMOST region, the predicted conductance in the hybrid
mode is less accurate. This inaccuracy is due in part to
the semi-empirical approximate representation (5-11) of the
modulated DMOST resistance. More physical IJDCS modeling of
this highly nonlinear modulation could be done to improve
the accuracy. However, to effect a generally valid model,
a more physical DMOST module should be developed to replace
the simple SPICE/Level 2 model.

(mA)
127
VA/D
Figure 5-10. Model-simulated HIGBT anode/drain current
versus anode/drain voltage for three values
of gate voltage (V =10V, 8V and 6V). The
model-simulated curves are terminated just
prior to the model-predicted latch-up onset.

128
In Figure 5-11 we show a model-simulated transient
turn-off characteristic for the HIGBT. Because the HIGBT
current for our test structure consists mainly of DMOST
drain current, the magnitude of the first phase is quite
large, but the conventional two-phase IGBT turn-off
transient is clearly manifested. However, the influence of
RnB' Provides a path for carrier removal during the
transient, needs to be physically characterized so that
design criteria for an optimal HIGBT structure may be
suggested [Fo87], A cursory analysis of how RnB affects
the HIGBT transient turn-off is presented below.
To develop physical insight into how Rnfi affects
transient response, we extend the analysis in Chapter 2 by
adding a term ^vjgB//RnB^ to equation (2-15), thus
accounting for carrier removal through the drain during
phase two. If we neglect all components of recombination
current, assuming the dominant component of current is
carrier removal through R
differential equation for the charge residing in the base
region during phase two results:
nB, then the following simple
dQ
B
V
dt
JEB
lnB
( 5-13
If one assumes that VJEB remains relatively constant ()

129
t (ns)
Figure 5-11. Model-simulated HIGBT anode/drain current
versus time for a resistive load of 100 G
and off-state voltage of 6 V. The gate
voltage of 10 V falls to zero in 25 ns.

130
during phase two, then the solution to (5-12) implies a
fast linearly decaying current, inversly proportional to
RnB" 0ur mdel simulations for the HIGBT turn-off
transient (Figure 5-11) clearly show the predicted linear
nature of the second phase. Experimental corroboration of
this analysis can be inferred from [Go86], where the decay
during phase two is found to be approximately linear in
time. Thus, to effect a fast turn-off, R should be made
ni5
as small as possible, but consistent with the constraint
for a low onset voltage (R _< nb m3
The circuit topology as depicted in Figure 5-4, and
used in our simulations, is not capable of maintaining a
latched state (steady-state solution) during transient
operations in SPICE. As a consequence, it is not possible
to observe dynamic latch-up directly, i.e., to see the
anode current remain constant with time when the gate
voltage is removed. However, the onset of dynamic latch-up
may be indirectly observed by monitoring the current *CNPNf
which represents the injection of electrons by the
parasitic n+pn~ BJT.
We demonstrate the ability of the modeling methodology
to predict the onset of dynamic latch-up in Figure 5-12,
where we have plotted the current, ICNPN/ as a function of
time for a resistively loaded LIGBT turn-off transient.
The sharp increase in IcNPN during the fast turn-off
transient (TFa^=2ns) indicates the onset of dynamic
latch-up and is consistent with

(Vui)
131
Figure 5-12. Model-simulated ICNPN current versus
time for a resistive load of 125 S and
off-state voltage of 5 V. The gate
voltage (10V) has a fall time (TFall)
of 2 ns for the upper curve and
a T of 200 ns for the lower one.
Fall

132
experimental results. Note that for a slower turn-off
transient (TFal^=200ns), ICNPN remains unchanged during the
time period shown in Figure 5-12. Eventually, for such a
slow transient, -^cnpn decrease to zero and the onset
of dynamic latch-up will not manifest itself. Our
simulations indicate that the primary current responsible
for initiating the onset of dynamic latch-up for the above
dQjCi
circuit conditions is the displacement current, Jt-'
However, for other circuit conditions the increase in the
transient collector current could be made significant. We
note that the utility of the model to predict the onset of
dynamic latch-up will make it useful for optimizing device
design under an actual circuit (transient) environment.
5.5 Summary
We have developed a device modeling methodology needed
for the CAD of HV/P ICs that is also useful for optimal
device (process) design. The methodology is based on a
regional partitioning of LIGBT structures through physical
insight gained from numerical simulations (PISCES) and
experimental results (special test devices). The regional
partitioning of a lateral structure defines an array of new
one-dimensional device modules, which properly (physically)
model the unique features of HV/P devices. We have
demonstrated this flexible quasi-2-D methodology on an
LIGBT test structure for all possible active modes of

133
operation. Both dc and transient measurements, including
static and dynamic latch-up, support the modeling
methodolgy. In addition, this study points out the need
for further work in extending previous DMOST models [Su80]
for cases when the enhancement-mode device has its bulk
region conductivity-modulated, as is the case for the
LIGBT. Also, the physics underlying the onset of latch-up
needs clarification, especially in regards to the
conductivity modulation of prior to latch-up.
The constituent charge-based modules, which are easily
implemented into SPICE via UDCSs, allow for a network
representation of the structure that can be used to
simulate the device under actual circuit (transient)
conditions, a feature most device simulators do not have.
Consequently, the methodology may be useful in optimizing
device design under an actual transient environment, in
addition to the CAD capability it affords.

CHAPTER 6
SUMMARY AND CONCLUSIONS WITH RECOMMENDATIONS
6.1 Summary and Conclusions
The culmination of this dissertation manifests itself
in Chapter 5 where we brought together the physical
insights and techniques presented in earlier chapters to
develop a methodology for constructing, and implementing in
SPICE, physical network representations for a general class
of HV/P IC devices exemplified by the LIGBT. We verified
our network models by comparison with PISCES simulations
and by comparison with experimental results obtained from
specially designed test structures. Included in the novel
network representations were several high-injection and
unique effects inherent in HV/P IC devices, heretofore not
represented in more empirical (less accurate) equivalent
circuit models. The effects characterized included
conductivity modulation, enhanced back injection,
multidimensional current flow, and the onset of static and
dynamic latch-up.
134

135
In Chapter 2 we presented a general methodology for
modeling lateral (p+pmpn+) structures used in HVICs. The
model, verified by direct comparison with experimental
results obtained from specially designed test structures,
was useful in extending the methodology presented in
Chapters 4 and 5 to include the effects of the
punch-through shield (buffer region) on the carrier
transport in LIGBT structures. The physical insight gained
in developing a GDS model was later used in Chapters 4 and
5 to develop models for IGBT structures, in particular with
regard to the proper accounting for the PIN-diode physics,
which underlies the IGBT operation.
In Chapter 3 a physical quasi-two-dimensional
analytical model for the IGBT turn-off transient was
developed. The utility of the physical insight gained from
the model was instrumental in suggesting optimal device and
structural parameter values for decreasing the turn-off
time without significant derogation of the on-state current
handling capability. In addition, the phenomenological
insight afforded
by
the model
allowed for
the
identification of
the
significant
charging mechani
sms
controlling the transient response,
and thus permitted
key
simplifications to
be
made in the
development of
the
network models presented
in Chapters
4 and 5.
In Chapter 4
we presented an
initial endeavor
at
devoloping a methodology for modeling an IGBT structure and
for implementing the model in SPICE via UDCSs. The

136
methodology presented was flexible and enabled for the
first time the simulation of the unique effects of
conductivity modulation, latch-up (static and dynamic), and
moving boundary conditions; however, it required recourse
to FORTRAN subroutines for the solution of the implicit
nonlinear equations rather than utilizing the nonlinear
equation solver inherent in the SPICE2 source code. Thus,
CPU times required for simulations using the methodology
were considerably longer than those using invalid built-in
SPICE2 models; however, they are not prohibitive for
small-scale circuits, where one or two HV/P IC devices are
used. The preliminary work in Chapter 4 provided the
impetus for developing a more effecient means of problem
formulation and subsequent SPICE2 implementation for HV/P
IC device models. Chapter 5, as discussed above, extended
and refined the work presented in Chapter 4.
6.2 Recommendations
There are several avenues for further research which
would enhance the acceptance of our modeling methodology.
For a complete HV/P IC CAD facility, a library of HP/V
device modules is essential. Ideally, such a library would
include a number of internal SPICE2 HV/P device modules,
consisting of, but not limited to models for the PlN-diode,
the DMOST, the LIGBT, and the wide-base BJT. Using our
methodology, a user could then construct his own model

137
(subcircuit) for a particular HV/P structure, without
recourse to UDCSs. We now outline several research areas
essential for the construction of a CAD library for HV/P IC
design.
First, we recommend the extension of our empirical
DMOST model. Since the DMOST is an integral part of many
HV/P devices, it is essential that a simple and accurate
model for this common HV/P device be developed. The device
physics underlying the DMOST when the drain region becomes
conductivity modulated needs clarification. The simple Sun
and Plummer [Su78] model is not applicable to DMOSTs in
which the drain undergoes significant
conductivity-modulation, as in the LIGBT.
Second, we recommend extending our wide-base BJT model
(Appendix A) for all regions of operation, thus making it a
viable circuit-simulation tool. In addition, since nearly
all LIGBTs employ punch-through shields, a more
representative wide-base BJT would be a p+n+n-p structure.
The insights gained from modeling the GDS in Chapter 2
would be helpful in characterizing such a transistor
structure.
Third, we recommend the creation of a standard
PIN-diode model for circuit simulation. Many HV/P
structures contain this basic device, and such a model
would be useful for parameter-extraction methods involving
optimization techniques, as was done in Chapter 5.

138
Fourth, we recommend extending our first-order
latch-up model used in the LIGBT network representation.
The physics underlying the latch-up process, including the
latch current and the holding current, needs clarification.
Fifth, we recommend the incorporation of all device
models into the SPICE code, as we feel that UDCSs are
primarily a means for model development. The inherent
problems of nonstandard coding, nonuniform convergence
criteria, numerical instabilites, and long CPU times
preclude the use of UDCSs for practical circuit simulation
in an industrial environment. For example, the eleven
UDCSs comprising the LIGBT model in Chapter 5 contain
nearly 1500 lines of FORTRAN code (see Appendix B). If the
model were directly implemented into the SPICE code, only a
few dozen lines would be needed. Thus, for universal
acceptance of our modeling methodology, the direct
incorporation of our models into the SPICE code is of
paramount importance.

APPENDIX A
HIGH-CURRENT TRANSPORT IN WIDE-BASE BJTs
In this appendix we briefly overview carrier transport
in wide-base (p+n~p and n+p~n) BJT structures. The
approach is based on an ambipolar transport analysis and
has its historical roots set in PIN-diode theory [He68].
Consider a p+n p transistor structure operating in the
forward-active mode for which high injection (p=n>>ND)
obtains in the n~ base region. A straightforward ambipolar
analysis [He68] can be used to equate the electron
recombination current density in the p+ emitter, JN, to the
electron current density in the n- base at the edge (x=0)
of the emitter-base junction space-charge region
(neglecting any space-charge region recombination), thereby
yielding the following relation between JN and the total
emitter current density, JE:
N
b
F+T
qDAnf
x=0
(A1 )
139

140
where
increasing
is
the ambipolar di
ffusivity,
dp/dx
i s the
of
the hole
(elect
ron) conce
nt
ration. For
current densi
ties,
the second
term
on the
s j
Lde of A-l
will
always bee
ome ne
gligible
i s
proportional
to p( 0
) (p(x): x
= 0
) wh
ereas JN
tional to p(0)
2 [ Gh7
7]. Thus,
at
high
current
the
base current
consis
ts primari
iy
of
emitter
ion
current, as
shown
in Chapter
2,
and
equation
used to to find
a limi
ting value
for
the BJT
current gain:
e
pnp
JE JN
JN
1
B
(A-2 )
A similar analysis for an n+p n structure yields a
different high current limit for the gain:
8 b .
Hnpn
(A-3 )
Physically, the difference between the high-current 8s
for pnp and npn transistors results from the unequal
electron and hole mobilities. Thus typical npn and pnp
BJTs used in HV/P ICs have very different limiting 8s. If

141
carrier-carrier scattering effects [Gh77] are taken into
account, the mobility ratio reduces to about two, therefore
the limiting 3s will differ roughly by a factor of four.
The physical insight afforded by this simple analysis can
be used to explain several of the fundamental differences
between n- and p-channel IGBTs, such as the lower latch-up
onset for p-channel IGBTs.
The details for a rudimentary, first-order,
high-current transport model for a wide-base BJT have been
described in chapters 4 and 5. and have been summarized,
pictorially, in Figure 5-2. Needed additions to that
high-current model would include modifications to the
system of implicit model equations to account for the
effects of quasi-saturation [Je87] and carrier mobility
reduction due to carrier-carrier scattering [Gh77] (refer
to Chapter 2).

APPENDIX B
UDCS/SLICE/SPICE MODEL IMPLEMENTATION
In this appendix we briefly overview a representative
UDCS SLICE/SPICE implementation of a charge-based network
representation for a wide-base, low-|3 pnp BJT, as depicted
in Figure 5-2.
The general theory and mechanical details behind the
implementation of steady-state UDCS network models into
SLICE/SPICE can be found in the SLICE Manual Rev. 4.08
[Ha84]. The general theory behind the implementation of
transient UDCS network models in SLICE is discussed in
Veeraraghavan et al. [Ve86].
The implicit nature of the network model and the novel
use of numerical derivatives (finite differences) for the
transconductances and transcapacitances are delineated via
comment statements in the following FORTRAN code listing,
which details each UDCS subroutine for the BJT model shown
in Figure 5-2.
142

c
C**A**AA******************************* *************************
C THE FOLLOWING LISTING IS A SUBROUTINE WHICH CALCULATES
C THE EMITTER CURRENT, IE, GIVEN THE NODE VOLTAGES VBE AND VBC
C THE SLICE USERS MANUAL SHOULD BE CONSULTED FOR THE SPECIAL
C FORMAT USED IN CIRCUIT FILES FOR UDCS DEFINED ELEMENTS
C*AA*AA A*AAA*AA ****************** A********A ************** AAA*A*A
c
SUBROUTINE UIELT1(Y,I FLAG,LP,NP,LC,NC,JERROR)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND.NI,JNO,IE1,LA
SPECIAL COFMON BLANK
C0t-M0N/BL4NK/X< 64)
GOTQC 50,100,200,300 ) I FLAG-5-2
50 CONTINUE
IF(NC.NE.2> JERROR -99010
GOTO 99910
100 CONTINUE
PHI *=,6
ES=1.035E-12
NI-1.3E10
UN-1350.0
UP-480.0
6-UN/UP
Q-1.6E-19
VT-.025B6
DA2*VT*UN*UP/< UN+UP)
WB-
X(LP+1)
T0-
XLP+2)
JNO-
XCLP+3)
ND-
X(LP+4)
AE1-
XCLP+5)
H-
XOLP+6)
CF-
X(LP+7)
XX2-
X(LP+8)
XX3-
XLFH-9)
VBE-
X(LC+1)
VBC-
X(LC+2)
TH2*T0
LA-SQRT(DA*TH)
C
C SET Y VALUE OF IE1
C
c
C CONVERGENCE ENHANCEMENT
C
IF(VBE.GT.0.80)THEN
VBECF*VT*LOG(VBE/VT)
END IF
IF(VBE.LT.0.55ITHEN
P0*4I**2*EXP(VBE/VT)/ND
Y O*AEl*DA/WB*P0
FLOY =0.0
GOTO 98?
END IF
IF((VBE.GT.0.55).AND.(VBE.LT.0.60))
P0-NI**2/ND*EXP(VBE/VT)
END IF
FLGY-2.0
C
c
W WB -(2*ES*(PHI+ABS(VBC))/(ND*Q))**.5
Y (B+l )/B*(A£l*JNO*PO**2/NI**2+Q*DA*AEl*PO/LA/TANH(W/LA) )
C
987 CONTINUE
GOTO 99910
200 CONTINUE

C SET Y VALUE OF DIE1/DVBE
C
IF(FLGY.LT.l.0)THEN
Y Q*A£1*DA/WB*P0/VT
GOTO 876
END IF
Z1 2*(B+1)/B*AE1*JN0*P0**2/NI**2/VT
Z2 (B+l)/B*Q*DA*AEl*PO/LA/VT/TANH(W/LA)
Y Z1 + Z2
876 CONTINUE
GOTO 39910
300 CONTINUE
C
C SET Y VALUE OF DIE1/DVBC BY FINITE DIFFERENCE
C
IFCFLGY.LT.1.0)THEN
Y0 .0
GOTO 765
END IF
W WB -<2*ES*(PHI+ABS(VBC))/(ND*Q))**.5
Y1 VBC VBC + H
W WB -C2*ES*(PHI+ABS(VBC))/CND*Q))**.3
Y2 IHCW/LA) )
Y -(Y2-YD/H
VBC-VBC-H
GOTO 99910
765 CONTINUE
99910 CONTINUE
RETURN
END
C
C THE FOLLOWING LISTING IS A SUBROUTINE WHICH CALCULATES
C THE COLLECTOR CURRENT, IC, GIVEN THE NODE VOLTAGES VBE
C AND VBC THE SLICE USERS MANUAL SHOULD BE CONSULTED FOR
C THE SPECIAL FORMAT USED IN UDCS IMPLEMENTATION
C
SUBROUTINE U1CLT1(Y,IFLAG,LP,NP,LC,NC,JERR0R)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND,NI, JNO,I Cl, LA
SPECIAL COmON BLANK
COPWCN/BLANK/XC 64)
60TOC50,100,200,300),IFLAG+2
50 CONTINUE
IFCNC.NE.2) JERROR -99010
GOTO 99910
100 CONTINUE
PHI.6
ES-1.035E-12
NI-1.3E10
UN-1350.0
UP-4B0.0
BUN/UP
0-1.6E-19
VT.02586
DA-2*VT*UN*UP/( UN+UP )
C
C SET Y VALUE OF I Cl
C
WB-
XCLP+l)
T0-
XCLP4-2)
JNO
XCLP+3)
ND-
XCLP+4)
AE1*
XCLP+5)
H
XCLP+6)

XXI
XCLP+7)
XX2
XCLP+8)
XX 3
XCLP+9)
VBE
XCLC+1)
VBC
XCLC+2)
TH2*T0
LA-SORTCDA*TH)
C
C CONVERGENCE ENHANCEMENT
C
IFCVBE.GT.0.80)TH£N
VBEVT*LOGC VBE/VT)
END IF
IFCVBE.LT.0.55)THEN
PO-NI**2*EXPCVBE/VT)/ND
FLGY-0.0
Y Q*AE1*DA*P0/WB
GOTO 987
END JF
IFCCVBE.GT.0.35).AND.(VBE.LT.0.80))
PO^C I **2/ND*EXP (VBE/VT)
END IF
FLGY-2.0
C
C
W WB -C2*ES*CPHI+ABSCVBC))/CND*Q>)**.5
Sl AE1*JN0/B*CP0/NI)**2
S2 Q*AE1*DA*PO*CCOSHCW/LA)+B)/LA/SINHCW/LA)/B
Y SI + S2 .
C
987 CONTINUE
GOTO 99910
200 CONTINUE
C
C SET Y VALUE OF DIC1/DVBE
C
IFCFLGY.LT. l.OUHEN
Y Q*AE1*DA*P0/WB/VT
GOTO 878
END IF
21 2*AE1/B/VT*JN0*CPO/NI)**2
Z2 AE1*Q*DA*PO*CCOSHCW/LA)+B)/LA/SINHCW/LA)/VT/B
Y Z1 + Z2
876 CONTINUE
GOTO 99910
300 CONTINUE
C
C
C SET Y VALUE OF DIC1/DVBC
C
IFCFLGY.LT.l.OITHEN
Y 0.0
GOTO 765
END IF
W WB -C2*ES*CPHI+ABSCVBC))/(ND*Q))**.5
Y1 Q*AE1*DA*PO*CCOSHCW/LA)+B)/LA/S1NHCW/LA)/B
VBC VBC + H
W WB -C2*ES*CPHI+ABSCVBC))/CND*Q))**.5
Y2 Q*AE1*DA*PO*(COSHCW/LA)+B)/LA/SINHCW/LA)/B
Y CY2-Y1)/H
VBC VBCH
765 CONTINUE
GOTO 99910
99910 CONTINUE
RETURN
END

C THIS SUBROUTINE CALCULATES THE VOLTAGE DROP DUE
C TO CONDUCTIVITY MODULATION IN THE BASE REGION
C AS A FUNCTION OF THE NODE VOLTAGES VBE AND VBC
C THE SLICE USERS MANUAL SHOULD BE CONSULTED FOR
C DETAILS IN USING THIS SUBROUTINE IN A UDCS CIRCUIT
C FILE
SUBROUTINE IVEPTKY IFLAG,LP,NP,LC,NC, JERROR)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND,NI,JNO,I El,LA
SPECIAL COMMON BLANK
COHMON/BLANK/X (S4 )
GOTOC 50,100*200,300),IFLAG+2
50 CONTINUE
IF(NC.NE.2) JERROR -99010
GOTO 99910
100 CONTINUE
PHI-.S
ES1.035E-12
NI-1.3E10
UN-1330.0
UP-A80.0
B-UN/UP
VT-.02586
Q-1.6E-19
DA 2*VT*UN*UP/(UN+UP)
C
WB-XCLP+1)
TO- XC LP+2)
JNO XCLP+3)
ND-XCLP+4)
AE1 X(LP+5)
H XCLP+G)
XX1-XCLP+7)
XX2-X(LP+B)
XX3-X(LP+9)
VBE- X(LC+1)
VBC- X(LC+2)
TH-2*T0
LA SQRT(DA*TH)
C
C CONVERGENCE ENHANCEMENT
lF(VBE.GT.O.eO)THEN
VBE-VT*LOG (VBE/VT )
END IF
IF(VBE.LT.0.53)THEN
FLGY -0.0
P0NI**2*EXP(VBE/VT)/ND
Y 0.0
GOTO 987
END IF
IF((VBE.8T.0.55).AND.(VBE.LT.0.80))
P0-NI**2/ND*EXP(VBE/VT)
END IF
FLGY 2.0
CALCULATE W THE ACTIVE BASE WIDTH AND
CALCULATE XS, THE POINT AT WHICH P(X)-ND
W- WB (2*ES*(PHI+ABS(VBC))/(ND*Q))** .5
ZZ- ND/PO*SINH(W/LA)
XS-W-LA*LOG(ZZ + SORT(ZZ**2+1))
SET Y VALUE OF VEPI
IE1-(B+1)/B*(AE1*JNO*PO**2/NI**2+0*DA*AE1*PO/LA/TANH(W/LA))
VDEM-VT*(B-1)/(B+1)*LOG(PO/ND)
VEPI -VDEM-SINH(W/LA)*I El*LA/AEl/Q/( UN+UP)/PO*
8L0G(TANH( (W-XS)/LA)/TANH(W/LA) )

Y VEPI
987 CONTINUE
GOTO 99910
200 CONTINUE
C
C SET Y VALUE OF DVEP/DVBE
c
IFCFLGY.LT. l.OUHEN
Y 0.0
GOTO 876
END IF
IFLG-1
567 CONTINUE
C
C CALCULATE W THE ACTIVE BASE WIDTH AND
C CALCULATE XS, THE POINT AT WHICH PCXJ-ND
C
W- WB C2*ES*CPHI+ABSCVBC))/CND*Q))**.5
ZZ- ND/P0*SINH(W/LA)
XS-W-LA*LOG(ZZ + SQRT(ZZ**2+1))
C
C SET Z VALUE OF VEPI .
C
IE1-(B+1)/B*(AE1*JNO*PO**2/NI**2+0*DA*AE1*PO/LA/TANH(W/LA) )
VDEMVT*CB1)/< B+l)*LOGC PO/ND)
VEPI -VDEM-SINH ( W/LA) I E1*LA/AE1/Q/ ( UN+UP ) /PO*
SLOGCTANHC (W-XS)/LA)/TANH(W/LA) )
Z2-VEPI
IFCIFLG.EO.DTHEN
Zl-VEPI
VBE-VBE+H
IFLG-2
GOTO 567
END IF
VBE-VBE-H
Y-CZ2-ZD/H
876 CONTINUE
GOTO 99910
300 CONTINUE
C
C SET Y VALUE OF DVEP/DVBC
C
IFCFLGY.LT.1.0)THEN
Y 0.0
GOTO 765
END IF
IFLG-1
789 CONTINUE
C
C CALCULATE W THE ACTIVE BASE WIDTH AND
C CALCULATE XS, THE POINT AT WHICH PCXI-ND
C
W- WB C2*ES*CPHI+ABSCVBC))/CND*Q))**.5
ZZ ND/PO*SINHCW/LA)
XSHJ-LA*LOGCZZ + SQRTCZZ**2+1) )
C
C SET Z VALUE OF VEPI

IEl-( B+l )/B*( AE1*JNO*PO**2/NI**2+Q*DA*AE1*PO/LA/TANH(W/LA) )
VDEM-VT*(B-l)/(B+l)*LOG(PO/ND)
VEPIVDEM-SINH(W/LA)*IE1*LA/AE1/Q/(UN+UP)/P0*
SLOG(TANH( (W-XS)/LA)/TANH(W/LA) )
Z2-VEPI
IF(IFLG.EQ.1)THEN
Zl-VEPI
VBC-VBC+H
IFLG-2
GOTO 789
END IF
VBC-VBC-H
Y-CZ2-ZD/H
765 CONTINUE
GOTO 99910
99910 CONTINUE
RETURN
END
C************ A******* A**** ********* A A A ****** ******
C THIS SUBROUTINE CALCULATES THE CHARGE IN THE BASE
C REGION AS A FUCTION OF THE NODE VOLTAGES VBE &D VBC
C FOR THE CHARACTERIZATION OF THE TRANSIENT CHARGING
C CURRENTS BY A UDCS [VE86]
C* ** ***************** ******** *"* ********** *** A A** *
c
SUBROUTINE UQB1( Y, I FLAG,LP,NP,LC,NC,JERROR)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND, JNO.NI.JNOl
SPECIAL COMMON BLANK
COMMON/BLANK/X ( 64 )
COMMON/STATUS/OMEGA ,T1ME, DELTA DELOLDC 7) ,AG(7) ,VT,XNI ,
6 EGFET .MODE .MODEDC I CALC, INITF .METHOD, IORD .MAXORD .NONCON,
6 1TERNO.ITEJMO.NOSOLV
COMMON/KNSTNT/TWOPI.XL0G2.XL0G10.R00T2,RAD,BOLTZ,CHARGE,
& CTOK,GMIN,RELTOL,ABSTOL.UNTOL.TRTOL,CHGTOL,EPSO,EPSSIL,EPSOX
IF(TIME.EQ.O.O) THEN
WBl-XILP+l)
TO- XCLP+2)
JN01-XCLP+3)
ND-XCLP+4)
AEl-X(LP+5)
H-XC LP+6)
WB-WB1
jno-jnoi
A AE1
ENDIF
VT-.02586
NI-1.3E10
UN-1350
UP-480
B-UN/UP
PHI-.6
ES-1035E-12
Q-1.6E-19
DA-2*VT*UN*UP/( UN+UP)
TH-2*T0
LA-SQRT(DA*TH)
GOTO(50,100,200,300),!FLAG+2
50 CONTINUE
RETURN
100 CONTINUE

149
C INITIALIZE THE VOLTAGES WD MAKE CURRENT 0.0 IN OC CASE
C
VBE XCLC+l)
VBC XCLC+2)
1F(TIME.EQ.0.0)THEN
1RVBE.LT.0.56)THEN
P0 NI**2/ND*EXP(VBE/VT)
Y 0.0
FLGY-0.0
GOTO 987
END IF
FLGY 2.0
IF< VBE.GT.0.78)P0-3E16
IF((VBE.GT.0.36).AND.(VBE.LT.O.7B))
P0NI**2/ND*EXP(VBE/VT)
END IF
WNB-(2*ES*(PHI+ABS(VBC))/(ND*Q))**.5
QBlQ*A*LA*P0*(COSH(W/LA)-1.0)/SINH(W/LA)
XCLP+8) QB1
Y-0.0
X(LP+9)-Y
X XCLP+ll)- QB1
X(LP+i2)-Y
RETURN
ELSE
C
C UPDATE CHARGE AND CURRENT IF LOCAL TRUNCATION ERROR CRITERIA ARE MET
C
!F( ( INITF.EQ.6) .AND. (DELTA.GE.XCLP+10) ) )THEN
X(LP+8)-XCLP+ll)
X(LP+9)*X(LP+12)
END IF
QB1Q*A*LA*P0*(COSH(W/LA)-1.0)/SINH(W/LA)
X(LP+11)QB1
X(LP+10)-DELTA
IF(DELTA.EQ.O.O)THEN
Y-0.0
ELSE
Y-((QB1-X(LP+8))*2.O/DELTA)-X(LP+9)
ENDIF
X(LP+12)-Y
ENDIF
C NO ERROR CHECKING
YNOER 0
987 CONTINUE
RETURN
200 CONTINUE
C
C SET Y VALUE OF DQB/DVBE
C
IFCFLGY.LT.1.0)THEN
Y 0.0
GOTO 876
END IF
IFCDELTA.EQ.O.O)THEN
Y-0.0
ELSE
y -Q*A*LA*PO*(COSH(W/LA)-1.0)/SINH(W/LA)/VT
Y- 2.0+Y/DELTA
ENDIF
876 CONTINUE
RETURN
300 CONTINUE
C

C SET Y VALUE OF DQB/DVBC
c
IF(FLGY.LT.1.0)THEN
Y 0.0
SOTO 765
END IF
IF(DELTA.EQ.0.0)THEN
Y-0.0
ELSE
Y-Q*A*P0*ES^)D/O^ (2*ES* ( PH I+ABS (VBC))/ND*Q) *. 5
Y- 2.0*Y/DELTA
ENDIF
763 CONTINUE
RETURN
END
CA****-** ********* A ******* A** ********** *********************
C THIS SUBROUTINE CALCULATES THE CHARGE ASSOCIATED
C WITH THE REVERSE-BIASED COLLECTOR-BASE JUNCTION AS A
C FUNCTION OF THE NODE VOLTAGES VBE AND V8C FOR
C CHARACTERIZATION OF THE TRANSIENT CHARGING CURRENTS
C BY A UDCS IVE86]
C
C*************A *********************************** *********
SUBROUTINE UQJC1(Y,I FLAG,LP,NP,LC,NC,JERROR)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND
SPECIAL COMMON BLANK
COMMON/BLANK/X( 64)
COMMON/STATUS/OMEGA,TIME,DELTA,DEL0LDC7) ,AG(7) ,VT,XNI ,
£ EGFET .MODE .MODEDC, I CALC, INITF .METHOD IORD ,MAXORD,NONCON,
£ ITERNO,ITEMNO,NOSOLV
COMMON/KNSTNT/TWOPI ,XL0G2.XLOGIO,R00T2,RAD,BOLTZ,CHARGE,
£ CTOK,GMIN,RELTOL,ABSTOL,VNTOL,TRTOL,CHGTOL,EPSO,EPSSIL,EPSOX
IF(TIME.EQ.O.O) THEN
AC X(LP+1)
ND- X(LP+2)
XI -X(LP+3)
X2- X(LP+4)
X3-XCLP+5)
ENDIF
GOTO!50,100,200).IFLAG+2
30 CONTINUE
RETURN
100 CONTINUE
C
C INITIALIZE THE VOLTAGES AND MAKE CURRENT 0.0 IN DC CASE
C
VBC- XCLC+l)
IF(TIME.EQ.O.O)THEN
QJCAC*(2.07E-12A1.6E-19*ND*ABS(.6+VBC))**.3
QJC-Y
X(LP+8)- QJC
Y-0.0
X(LP+9)Y
X X(LP+11)- QJC
X(LP+12)-Y
RETURN
ELSE
C
C UPDATE CHARGE AND CURRENT IF LOCAL TRUNCATION ERROR CRITERIA ARE MET
C
IF((INITF.EQ.6).AND.(DELTA.GE.X(LP+10)))THEN

o o o
X(LP+8)-X(LP+11)
X(LP+9)X(LP+12)
ENDIF
QJCAC*(2.07E-12*1. 6E-19*ND*ABS( .6-WBC) )**.3
QJC-Y
X(LP+11)QJC
X(LP+10)DELTA
IF(DELTA.EQ.0.O)THEN
Y-0.0
ELSE
Y-CCQJC-X(LP+8))*2.0/DELTA)-X END IF
X(LP+12)Y
ENDIF
C NO ERROR CHECKING
YNOER O
RETURN
200 CONTINUE
SET Y VALUE OF DQJC/DUBC
IF Y-0.0
ELSE
Y AC*.5*(2.07E-12*1.GE-19*ND)*(ABS<.64VBC)**-.3)
Y- 2*Y/DELTA
Y-0.0
ENDIF
RETURN
END

REFERENCES
[Ap79] J.A. Appels and H.M.J. Vaes, "High Voltage
Thin Layer Devices (RESURF devices)," IEDM
Tech. Dig., pp. 238-241, 1979.
[Ba81] B.J. Baliga, "Silicon Power Field Controlled
devices and Integrated Circuits," in Silicon
Integrated Circuits, D. Kahng, Ed., Applied
Solid State Science Series, Supplement 2B.
New York: Academic Press, 1981.
[Ba84a] B.J. Baliga, "Switching Speed Enhancement
in Insulated Gate Transistors by Electron
Irradiation," IEEE Electron Devices, vol.
ED-31, pp. 1790-1795, 1984.
[Ba85] B.J. Baliga, "Analysis of Insulated Gate
Transistor Turn-off Characteristics," IEEE
Electron Device Lett.,vol. EDL-6, pp. 74-77,
Feb. 1985.
[Ba84b] B.J. Baliga, M.S. Adler, R.P. Love, P.V. Gray,
and N.D. Zommer, "The Insulated Gate
Transistor: A New Three-Terminal MOS-Controlled
Bipolar Power Device," IEEE Trans. Electron
Devices, vol. ED-31, pp. 821-828, 1984.
[Ba84c] B.J. Baliga and D.Y. Chen (eds.), Power
Transistors: Device Design and Applications.
New York: IEEE Press, 1984.
[Ba70] R. Baron and J.W. Mayer, Double Injection in
Semiconductors," in Semiconductors and
Semimetals, vol. 6, pp. 202-313. New York:
Academic Press, 1970.
152

153
[ B e 8 5 ]
[Be79]
[Ch70]
[Da84]
t De86 ]
[ F15 7 ]
t Fo77 ]
[Fo86a]
[Fo87 ]
[Fo81 ]
H.W. Becke, "Approaches to Isolation in High
Voltage Integrated Circuits," IEDM Tech. Dig.,
pp. 724-727, 1985.
F. Berz, R.W. Copper, and S. Fagg,
"Recombination in the End Regions of PIN
Diodes," Solid-State Electron., vol. 22,
pp. 293-301, 1979.
S.C. Choo, Effect of Carrier Lifetime on the
Forward Characteristics of High-Power Devices,"
IEE trans. Electron Devices, vol. ED-17,
pp. 647-652, Sept. 1970.
M. Darwish and K. Board, "Lateral Resurfed
Comfet," Electron. Lett., vol. 20, pp. 519- 520,
June 1984.
M.J. Declereq and J.D. Plummer, "Avalanche
Breakdown in High Voltage D-MOS Devices,"
IEEE Trans. Electron Devices, vol. ED-23,
pp. 1-6, Jan. 1976.
N.H. Fletcher, "The High Current Limit for
Semiconductor Junction Devices," Proc. IRE,
vol. 22, pp. 862-872, June 1957.
J.G. Fossum and F.A. Lindholm, "The Dependence
of Open-Circuit Voltage on Illumination Level
in P-N Junction Solar Cells," IEEE Trans.
Electron Devices, vol. ED-24, pp. 325-329,
April, 1977.
J.G. Fossum and R.J. McDonald, "Charge-Control
Analysis of the COMFET Turn-off Transient,"
IEEE Trans. Electron Devices, vol. Ed-33,
pp. 1377-1382, Sept. 1986.
J.G. Fossum and R.J. McDonald, "Analysis of
the Unique Characteristics of the Hybrid
LIGT/DMOST (HIGT)," IEEE Device Research Conf.
Santa Barbara, CA, June 22-24, 1987.
J.G. Fossum and M.A. Shibib, "An Analytic Model
for Minority-Carrier Transport in Heavily
Doped Regions of Silicon Devices," IEEE Trans.
Electron Devices, vol. Ed-28, pp. 1018-1023,
Sept. 1981.

154
[Fo86b]
t Ge78]
[Gh77]
[Go8 3]
[Go87]
[G086]
[Ha85]
[Ha52 ]
t Ha84]
[Ha81]
J.G. Fossum and S. Veeraraghavan, "Partitioned
Charge Based Modeling of Bipolar Transistors
for Non-Quasi-Static Circuit Simulation,"
IEEE Electron Device Lett., vol. EDL-7,
pp. 652-654, Dec. 1986.
I.E. Getreu, Modeling the Bipolar Transistor.
New York: Elsevier, 1978.
S.K. Ghandi, Semiconductor Power Devices.
New York: Wiley, 1977.
A.M. Goodman, J.P. Russel, L.A. Goodman,
C.J. Neuse, and J.M. Neilson, "Improved
COMFET's with Fast Switching Speed and
High Current Capability," IEDM Tech. Dig.
pp. 79-82, 1983.
C.A. Goodwin, M.A. Shibib, R.A. Furnanage,
C.Y. Lu, P.C. Riffe, N.S. Tsai, and J.L.
Schmoyer, "A Dielectrically Isolated Bipolar-
CMOS-DMOS (BCDMOS) Technology for High Voltage
Applications," ECS Symposium, Philadelphia, PA,
May 10-15, 1987.
P.A. Gough, M.R. Simpson, and V. Rumennik,
"Fast Switching Lateral Insulated Gate
Transistors," IEDM Tech. Dig., pp. 218-221,
1986.
S. Hachad, C. Cros, D. Darees, J. M. Dorkel,
and P. Leturcq, "Latch-up Critria in Insulated
Gate p-n-p-n Structures," IEEE Trans. Electron
Devices, vol. ED-32, pp. 594-598, March 1985.
R.N. Hall, "Power Rectifiers and Transistors,"
Proc. IRE, vol. 40, pp. 1512-1518, Nov. 1952.
Harris Semiconductor Corp., SLICE Manual Rev.
4.08. Melbourne, FL: Harris Semiconductor
Corp., Jan. 1984.
A.R. Hartman, J.E. Berthold, T.J. Riley,
J.E. Kohl, Y.H. Wong, H.T. Weston, and
R.S. Scott, "530V Integrated Diode Switch
for Telecommunications," IEDM Tech. Dig.
pp. 250-257, 1981.
A. Herlet, "Forward Characteristics of
Silicon Power Rectifiers at High Current
Densities," Solid-State Electron., vol. 11,
pp. 717-742, 1968.
[He68]

155
[Je87]
[Ku85]
[La85]
[ L i 6 7 ]
[Mc87]
[Mc85]
[Mu87]
[Mu77]
[Na75]
[Pi8 4 ]
H. Jeong and J.G. Fossum, "Physical Modeling
of High-Current Transients for Bipolar
Transistor Circuit Simulation," IEEE Trans.
Electron Devices, vol. ED-34, pp. 848-905,
April 1987.
D.S. Kuo, J.Y. Choi, D. Giadomenico, C. Hu,
S.P. Sapp, K.A. Sassaman, and R. Bregar,
"Modeling the Turn-off Characteristics of the
Bipolar-MOS Transistor," IEEE Electron Device
Lett., vol. EDL-6, pp. 211-214, May 1985.
J.E. Lary and R.L. Anderson, "Effective Base
Resistances of Bipolar Transistors," IEEE
Trans. Electron Devices, vol. ED-32, pp.
2503-2505, Nov. 1985.
J. Lindmayer and W. Schneider, "Theory of
Lateral Transistors," Solid-State Electron.,
vol. 10, pp. 225-234, 1967.
R.J. McDonald, J.G. Fossum, "Physical Modeling
of LIGT Structures for SPICE Simulation of Power
Integrated Circuits," ECS Symposium, Philadelphia,
PA, May 10-15, 1987.
R.J. McDonald, J.G. Fossum, and M.A. Shibib,
"A Physical Model for the Conductance of
Gated PIN Switches," IEEE Trans. Electron
Devices, vol. ED-32, pp. 1314-1320, July 1985.
S. Mukherjee, M. Amato, and V. Rumennik,
"Influence of Device Structures on the
Transient and Steady State Characteristics
of LIGT," ECS Symposium, Philadelphia, PA,
May 10-15, 1987.
R.S. Muller and T.I. Kamins, Device
Electronics for Integrated Circuits.
New York: Wiley, 1977.
L.W. Nagel, "SPXCE2: A Computer Program to
Simulate Semiconductor Circuits," Electronics
Research Lab., University of California,
Berkeley, Memo. ERL-M250, May 1975.
M.R. Pinto, C.S. Rafferty, and R.W. Dutton,
PISCES-II User's Manual. Stanford,
CA: Stanford University, 1984.

156
[Pa86]
D.N. Pattanayak, A.L. Robinson, T.P. Chow,
M.S. Adler, B.J. Baliga, and E.J. Wildi,
"N-Channel Lateral Insulated Gate Transistors:
Part I Steady-State Characteristics," IEEE
Trans. Electron Devices, vol. ED-33, pp. 1956-
1963, Dec. 1986.
[R086]
A.L. Robinson, D.N. Pattanayak, M.S. Adler,
B.J. Baliga, and E.J. Wildi, "Lateral
Insulated Gate Transistors with Improved
Latching Characteristics," IEEE Electron
Device Lett., vol. EDL-7, pp. 61-63, Feb. 1986.
[Ru8 3]
J.P. Russel, A.M. Goodman, L.A. Goodman, and
J.M.Neilson, "The COMFET: A New High
Conductance MOS-Gated Device," IEEE Electron
Device Lett., vol. EDL-4, pp. 63-65, 1983.
[Sh80]
P.W. Shackle, A.R. Hartman, T.J. Riley,
J.C. North, and J.E. Berthold, "A 500 V
Monolithic Bidirectional 2x2 Crosspoint
Array," ISSCC Tech. Dig. pp. 170-171, 1980.
[Si 8 5]
M.R. Simpson, P.A. Gough, F. Hshich, and
V. Rumennik, "Analysis of the Lateral Insulated
Gate Transistor," IEDM Tech. Dig., pp. 740-743,
1985.
[Sm82]
R.K. Smith, H.W. Becke, J.C. Gammel, M.A.
Shibib, and Y.H. Wong, "An Analytic Model
for the Forward Characteristics of Gated
P-I-N Switches Applied to Lateral Structures,"
IEDM Tech. Dig., pp. 11-14, 1982.
[Su80]
S.C. Sun and J.D. Plummer, "Modeling of the
On-Resistance of LDMOS, VDMOS and VMOS Power
transistors," IEEE Trans. Electron Devices,
vol. ED-27, pp. 356-367, Feb. 1980.
[Va76]
A. Van der Ziel, Solid State Physical
Electronics. Englewood Cliffs, New Jersey:
Prentice-Hall, 1976.
[Ve86]
S. Veeraraghavan, J.G. Fossum, and W.R.
Eisenstadt, "SPICE Simulation of SOI MOSFET
Integrated Circuits," IEEE Trans. Computer-
Aided Design of ICAS, vol. CAD-5, pp. 653-658,
Oct. 1986.

157
[Wa83] R.M. Warner and B.L. Grung, Transistors:
Fundamentals for the Integrated-Circuit
Engineer. New York: Wiley, 1983.
[We82] H.T. Weston, H.W. Becke, J.E. Berthold, J.C.
Gammel, A.R. Hartman, J.E. Kohl, M. A. Shibib,
R.K. Smith, and Y.H. Wong, "Monolithic High
Voltage Gated Diode Crosspoint Array IC," IEDM
Tech. Dig., pp. 1-4, 1982.
[Yi85] H. Yilmaz, W. Ron Van Dell, K. Owyang, and
M.F. Chang, "Insulated Gate Transistor Physics:
Modeling and Optimization of the On-State
Characteristics," IEEE Trans. Electron Devices,
vol. Ed-33, pp. 1377-1382, Sept. 1986.

BIOGRAPHICAL SKETCH
Robert James McDonald was born in Queens, New York, in
1954. He received the BSEE degree (Magna Cum Laude,
3.75/4.0) from Virginia Tech in 1982 and the ME degree in
electrical engineering from the University of Florida in
1984. His doctoral research involves modeling of HV/P IC
devices.
He received a General Moters Scholarship in 1980, a
Graduate Council Fellowship from the University of Florida
in 1982, and an SRC Fellowship in 1986.
He is a member of Phi Kappa Phi, Eta Kappa Nu, and
IEEE.
158

I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
ssum, Cnairman
(e^try G. /Possum, Chairman
Professor of Electrical Engineering
I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
Fred A. Lindholm
Professor of Electrical Engineering
I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
Arnost Neugro
Professor of
Electrical Engineering
I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
Edward K. Walsh
Professor of Engineering Sciences

I certify that I have read this study and that in my
opinion it conforms to acceptable standards of scholarly
presentation and is fully adequate, in scope and quality,
as a dissertation for the degree of Doctor of Philosophy.
Dorothea E. Burk
Associate Professor of Electrical
Engineering
This dissertation was submitted to the Graduate Faculty
of the College of Engineering and to the Graduate
School and was accepted as partial fulfillment of the
requirements for the degree of Doctor of Philosophy.
December 1987
Dean, Graduate School

r? y



(mA)
127
VA/D
Figure 5-10. Model-simulated HIGBT anode/drain current
versus anode/drain voltage for three values
of gate voltage (V =10V, 8V and 6V). The
model-simulated curves are terminated just
prior to the model-predicted latch-up onset.


141
carrier-carrier scattering effects [Gh77] are taken into
account, the mobility ratio reduces to about two, therefore
the limiting 3s will differ roughly by a factor of four.
The physical insight afforded by this simple analysis can
be used to explain several of the fundamental differences
between n- and p-channel IGBTs, such as the lower latch-up
onset for p-channel IGBTs.
The details for a rudimentary, first-order,
high-current transport model for a wide-base BJT have been
described in chapters 4 and 5. and have been summarized,
pictorially, in Figure 5-2. Needed additions to that
high-current model would include modifications to the
system of implicit model equations to account for the
effects of quasi-saturation [Je87] and carrier mobility
reduction due to carrier-carrier scattering [Gh77] (refer
to Chapter 2).


86
latch during turn-off. Mechanisms that produce latch-up in
the IGBT will be simulated and discussed later.
In Figure 4-5 we show a simulated turn-off transient
for a typical IGBT in Figure 4-4 with a resistive load.
The turn-off delay reflected by IA(t) results because of
the finite time needed to discharge the gate-to-cathode
capacitance of the DMOST, and is a function of
GK'
This
discharging time is evident in the VGK(t) decay shown,
which is much slower than the fall of the VG(t) pulse.
Note that VGR(t) influences IA(t) by controlling the
conductance of the DMOST. As shown in Figure 4-5, the
DMOST transient drain current, ID(t), which, from Figure
4-2, equals I
+ dQ /dt dQT_/dt, does not begin to
fall until VGR(t) has decreased to a value that causes the
DMOST to saturate (see Figure 4-3). Further reduction of
V_(t) decreases the DMOST (saturation) current I^(t), and
UI\ D
hence IA(t) as well. Eventually (t) becomes less than
GK'
the DMOST threshold voltage, and ID(t) drops to zero.
IA(t), which includes ID(t), follows the decrease in ID(t)
until it becomes a negligible component, after which lA(t)
decays in accordance with the recombination in the pnp BJT
[Fo86a]. If VGK is reduced very rapidly, for example by
decreasing RGR, then ID falls to zero very quickly,
resulting in the more idealized two-phase turn-off
transient [Fo86a,Ba85,Ku85] shown by simulation in Figure
4-4. In contrast to previous analytical
results


57
Q2
Q IE
n Q0
(3-16)
where Qq is a constant charge given approximately by
Q0 =
a 2 2 TT ,2
Aq n.(WB-xdm)
4inJN0
(3-17)
With (3-16), (3-15) is
first-order, nonlinear
differential equation for the quasi-static Q (t), which can
P
be solved analytically. If we assume t < n ri
likely for the asymmetrically doped p+n~ junction, we get
Qp(t)
QpOeXp(
~pOTH [l-exp(- ^-)]
(3-18)
1 +
Q0Tn
H
where t=0 is now taken as the start of this second-phase
transient. Now I(t) is defined by (3-13), (3-14), and
(3-18), which with (3-8) yield
Kt)
It exp()
lh
(3-19)
I1JN0TH
2 2
AK.q nTD
1 p
[1-exp()]
H
1 +


(Vui)
131
Figure 5-12. Model-simulated ICNPN current versus
time for a resistive load of 125 S and
off-state voltage of 5 V. The gate
voltage (10V) has a fall time (TFall)
of 2 ns for the upper curve and
a T of 200 ns for the lower one.
Fall


62
because V ^ in (3-3) increases.
For a given t, the
H
turn-off time can be reduced by increasing AI, which
decreases the second-phase decay in I(t) needed to turn off
the device, and by enhancing the significance of the
denominator in (3-19), which exploits the supra-exponential
decay. Physically, these changes lower 0 and make IM0Sr
which is controlled directly and without delay by the gate,
a larger component of the steady-on-state current, and they
make carrier removal through the p+ anode more significant
in the transient. They can be effected by increasing Jnq,
which could be done perhaps by reducing the doping density
and the electron lifetime and/or transit time in the
heavily doped p+anode region [Fo81], The benefit of such
an increase is illustrated in Figure 3-4. Reducing in
(3-19), for example by decreasing the BJT collector-emitter
area ratio, would produce similar benefit. We note however
from (3-3) that if the MOSFET resistances R and R are
ih JD
substantial, then increasing J
NO
and/or decreasing K,
(i.e., reducing 0) could significantly increase RQN.
An n+ punch-through shield (buffer region), as
described in Chapter 2, may also be used in IGBT
structures. The n+ buffer region reduces the emitter
efficiency of the constituent wide-base BJT and, for a
given current level, makes IMqS a larger component of the
steady-on-state current, thus subsequently decreasing the
turn-off time. The methodology for characterizing the


24
where is given by (2-22). Although not as accurate as
(2-26), (2-27) is insightful as we demonstrate later.
We have now defined a simpler analytic model for the
high-current J(VA) charactersitic of the GDS. For a given
J, V. is given by (2-2), in which V is approximated by
(2-26) or (2-27), AEpn is approximated by (2-25), AE^ is
FC
approximated by (2-14) and (2-24), and AE?A is approximated
by (2-12) and (2-23). We discuss the accuracy of this
model in Section 2.4.
Using the insight accompanying the development of this
model, we now offer a qualitative explanation of the
complete current-voltage characteristic of the GDS.
Typical measured characteristics are shown in Figure 2-3.
The data were taken from a GDS test structure having two
anodes placed at different lengths from the cathode.
+
Figure 2-3 includes plots of I(yPn ) as well as I(V ) for
J +
both anodes. Note that the I(V^n ) characeristics are
virtually coincident.
To explain the characeristics, we consider three
distinct regions of the curves as indicated in Figure 2-3.
Our models are applicable in region III where
high-injection obtains in the ti region. We note in this
4-
region that Iexp(qV^n /kT) except for very high I where
series resistance in the cathode (=352) causes the
+
characteristic to bend.
Further, the I(V^n )
characteristics appears to be independent of W. These


117
conduction mechanisms and the appropriate partitioning of a
particular HIGT depend critically on the device geometry,
as shown in [Mu87], and demonstrated in Section 5.4.
The SPICE model for the hybrid device is shown in
Figure 5-6. It contains modules for the MOSFET, two
resistors R and R the sum of which is R and a
nS nB epi
single lateral pnp transistor, The value for RnB
(458), which we assume to be constant, is estimated by
noting that it takes about 0.6V (a diode drop) of internal
voltage drop at the trigger current to turn on The
modulation of R .is semi-empirically accounted for in R .
epi c 2 nS
which is simulated by a UDCS, as discussed below.
The portion of the DMOST drain resistance associated
with RnS is a function of the total majority carrier
concentration, and thus is a function of the carrier
injection by The variation of RnS with injection level
is modeled by using an average excess hole (electron, p=n)
density, p:
W
5 W J p(x,dx *
VB1
qWA
(5-10
where p(x) is given by (5-1), and Qg is given by (5-7)
We
can use (5-10) to express Rng:


82
vAk (V)
Simulated IGBT anode current versus
anode-cathode voltage for various
gate-cathode voltages. The DMOST
threshold voltage is 3 V.
Figure 4-3.


29
are the corresponding predictions yielded by the model in
Section 2.2 through computer-aided numerical solution of
the model equations.
The model parameter values used are listed in Table
2-1. They were initially estimated from knowledge of the
device structure and of typical ranges of their values,
using the insight afforded by the simpler model in Section
2.3, and then altered such that excellent correlation with
the measured data was obtained. Hence the
experimental-theoretical agreement not only supports the
model, but also provides estimations of the important
device and material parameters. We stress that these
estimations are not a unique set; relatively small
perturbations about these values do not significantly
change the experimental-theoretical correlation.
The inferred value Tq=10 psec is not significantly
influenced by band-band Auger recombination [Gh77] because
- 17 -3
n<10 cm as implied by the calculations. However, the
2 2
values p =920cm /V-sec and p =330cm /V-sec are m
n p
effect average values that reflect significant
carrier-carrier scattering [Gh77] at the higher currents,
an effect that we have not explicitly accounted for. This
effect could be incorporated into the model if more exact
parameter determinations were desired, but no additional
insight into the operation of the GDS would be gained
[Ch70] .


135
In Chapter 2 we presented a general methodology for
modeling lateral (p+pmpn+) structures used in HVICs. The
model, verified by direct comparison with experimental
results obtained from specially designed test structures,
was useful in extending the methodology presented in
Chapters 4 and 5 to include the effects of the
punch-through shield (buffer region) on the carrier
transport in LIGBT structures. The physical insight gained
in developing a GDS model was later used in Chapters 4 and
5 to develop models for IGBT structures, in particular with
regard to the proper accounting for the PIN-diode physics,
which underlies the IGBT operation.
In Chapter 3 a physical quasi-two-dimensional
analytical model for the IGBT turn-off transient was
developed. The utility of the physical insight gained from
the model was instrumental in suggesting optimal device and
structural parameter values for decreasing the turn-off
time without significant derogation of the on-state current
handling capability. In addition, the phenomenological
insight afforded
by
the model
allowed for
the
identification of
the
significant
charging mechani
sms
controlling the transient response,
and thus permitted
key
simplifications to
be
made in the
development of
the
network models presented
in Chapters
4 and 5.
In Chapter 4
we presented an
initial endeavor
at
devoloping a methodology for modeling an IGBT structure and
for implementing the model in SPICE via UDCSs. The


3
(3) the development and experimental verification
of a physical (charge-based) methodology for
modeling HV/P IC structures including the
effects of multidimensional carrier flow,
base-region conductivity modulation, and
enhanced back injection;
(4) the implementation of the LIGBT model into SPICE
through user-defined controlled sources (UDCSs)
with implicit characterizations and numerical
representations for transconductances and
transcapacitanees.
In Chapter 2, we develop analytic models for the
steady-state forward current-voltage characteristic of a
(p+pnpn+) gated-diode switch (GDS) [We82]. The models,
which apply generally to gated bipolar switches, are based
on a system of equations derived from basic pin-diode
theory. They provide physical insight into GDS operation
and suggest optimal design criteria to minimize the dc and
incremental resistances at high currents. Measured data
taken from a variety of GDS test structures are discussed
in support of the models.
In Chapter 3, a quasi-static charge-control analysis
of the unique transient turn-off characteristic of the IGBT
[Be85] is developed. The analysis describes the transient
behavior in terms of steady-on-state current components
that flow in the constituent MOSFET and BJT in the basic


I (A)
28
Figure 2-4. GDS current versus applied voltage +
(VA) and shield-cathode voltage drop (Vpn )
for two different n-region lengths (W2 J
and ). The solid curves represent
experimental measurements and the points
represent calculations using the
model derived in Section 2.2.


10
Anode Gate Cathode
Figure 2-1. Gated-diode switch (GDS) cross section and
corresponding one-dimensional model.


69
conductivity of the n~ epitaxial region (base) of the IGBT
is modulated by carrier injection from the p+ anode
(emitter), thereby lowering the on-resistance but also
increasing the turn-off time because of the excess carrier
storage. The device has been previously modeled [Yi85] by
connecting numerical models for the DMOST and pnp BJT
through a modulated base resitance. Such modeling aids
optimal device design, but is impractical for circuit
simulation and provides little insight into how device
parameters affect the dynamic response of the IGBT in a
circuit, or an HVIC.
We emphasize in this paper the SPICE simulation of the
constituent wide-base (low-current-gain) pnp BJT and
parasitic npn BJT. We thereby stress the inclusion in the
model of unique characteristics like low BJT gain,
base-region conductivity modulation, and latch-up, which
are not properly accounted for in the built-in SPICE2
models. The DMOST is modeled using a standard level-2
SPICE2 MOSFET model [Ha84]. Because of the high level of
conductivity modulation in the n- base region, effects of
the parasitic JFET [Yi85] at the drain of the DMOST can, to
first order, be ignored when calculating the on-resistance.
The methodolgy presented, however, is flexible enough to
model the JFET effects if desired, but at the cost of
increased model complexity.


22
Therefore for sufficiently high J, (2-13) and (2-15)
can be simplified [He68] to
(2-23)
and
(2-24)
These simplifications can be easily checked for
self-consistency with presumed high values of J using the
model in Section 2.2. In fact it can be shown that for a
given J, (2-23) and (2-24), with (2-12) and (2-14), yield
valid approximations for AE. and ( AE+AE_.T) even when the
diffusion current in the n region, reflected by the second
terms in (13) and (15), is comparable to the drift current.
The approximation (2-24) enables an additional
simplification regarding AEFn across the p shield.
Combining (14), (18), and (24) yields
(2-25)
i


I (A)
25
Figure 2-3. Measured GDS current versus applied voltage
(VA) and shield-cathod voltage drop (V^" )
for two different n-region lengths
and W2). Three distinct regions
(I,II,III) of operation are indicated.


(mA)
122
Figure 5-7. Model-simulated (solid) and measured
(dashed) LIGBT anode current versus
anode voltage for three values of gate
voltage (VG = 12V, 10V and 8V from left to
right). The measured curves are terminated
just prior to the onset of latch-up; the
model-simulated curves are terminated just
prior to the predicted latch-up onset.


r? y


9
characteristic. The model is more useful as an
engineering-design aid than is a direct numerical solution
of the fundamental carrier transport equations [Sm82]
because it is simpler and because it affords physical
insight. The role of the cathode p-shield, as well as
those of the n+ cathode, the p+ anode, and the ji region, in
defining I(V^) is clearly described by the model, thereby
aiding optimal GDS design.
The physical insight provided is utilized to develop
an even simpler model, valid for high currents at which RQN
and RDc are of interest, that requires no recourse to
numerical techniques. This model, although not as accurate
as the other, is useful because it enables quick
assessments of possible device design modifications not
only for the GDS, but also, as shown in Appendix A, for the
BJT portion of the LIGBT. The models are supported by
measured data taken from a variety of GDS structures
fabricated at Bell Laboratories (Reading).
2.2 Model Development
The structure of the GDS, fabricated in a "tub" of
dielectrically isolated (DI) silicon, is illustrated in
Figure 2-1. Because the (anode-cathode) length is
typically much longer than the tub thickness, the
one-dimensional p+pnpn+ model, also shown in Figure 2-1,
for the GDS is representative of the basic operation of the


30
-5 2
The area A=5xl0 cm of the one-dimensional is merely
an effective representation of the actual three-dimensional
geometry. It is reasonable because it is comparable to the
actual cathode and anode areas. The anode area is actually
larger than the cathode area, which implies that Jnq and
JpQ are perhaps more comparable in value than shown in
Table 2-1.
We now discuss measured and predicted resistances of
the GDS. The dc resistance, RDC=VA/I at I=25mA, is plotted
2
versus W in Figure 2-5. The fact that both the
experimental and theoretical plots become linear for long W
supports in essence our model. This dependence is
explained as follows. From (2-2) and (2-27),
R
W
DC
qA(/n+//p)n
1 ,aefa
ql [ 2
AE
FC
AEW
(2-30)
where I=25mA. We note the actual RDC differs from (2-30)
C A
by a constant series resistance, (Rg+Rg), associated with
the anode and cathode.
W>3La,
Using (2-22), we see that for
DC
W2 1 ,6EFA aEFC
qA(//n+i< )LA[n(0)+n(w) ] ql' 2 2
+AEFn>
(2-31)


81
number [Ge78]. Parameter exractions from latch-up
measurements could be done, but would not be straight
forward because of the difficulty in isolating important
current components, e.g., Icp.
4.3 SPICE Simulations and Discussion
In this section we demonstrate the utility of the
modeling methodology used to develop the SPICE IGBT model
in Section 4.2. Results of representative IGBT circuit
simulations on SPICE are presented and discussed. Figure
4-3 shows simulated dc IGBT current-voltage characteristics
for various values of gate-to-cathode voltage, V_v.
Typical parameter values were used for these simulations,
and the results shown are representative of typical
vertical IGBTs. For VGR sufficiently high, the DMOST
operates in the linear region, and the IA-VAK relationship,
where VAK is the anode-cathode voltage, is linear. This
linearity indicates that the on-resistance of the IGBT in
this case is not affected by the nonlinear V ., but is
epi
controlled by the DMOST channel conductance and by contact
resistance. For lower V-.,,, I. tends to saturate with
increasing VAK This saturation occurs because the DMOST
is driven to the saturation region, and therefore I^_
(=IB), and hence Icp are limited. For VA less than about
0.6 V, the IGBT does not conduct any appreciable current
because the unmodulated n epi resistance is so large; N
17 epi


XXI
XCLP+7)
XX2
XCLP+8)
XX 3
XCLP+9)
VBE
XCLC+1)
VBC
XCLC+2)
TH2*T0
LA-SORTCDA*TH)
C
C CONVERGENCE ENHANCEMENT
C
IFCVBE.GT.0.80)TH£N
VBEVT*LOGC VBE/VT)
END IF
IFCVBE.LT.0.55)THEN
PO-NI**2*EXPCVBE/VT)/ND
FLGY-0.0
Y Q*AE1*DA*P0/WB
GOTO 987
END JF
IFCCVBE.GT.0.35).AND.(VBE.LT.0.80))
PO^C I **2/ND*EXP (VBE/VT)
END IF
FLGY-2.0
C
C
W WB -C2*ES*CPHI+ABSCVBC))/CND*Q>)**.5
Sl AE1*JN0/B*CP0/NI)**2
S2 Q*AE1*DA*PO*CCOSHCW/LA)+B)/LA/SINHCW/LA)/B
Y SI + S2 .
C
987 CONTINUE
GOTO 99910
200 CONTINUE
C
C SET Y VALUE OF DIC1/DVBE
C
IFCFLGY.LT. l.OUHEN
Y Q*AE1*DA*P0/WB/VT
GOTO 878
END IF
21 2*AE1/B/VT*JN0*CPO/NI)**2
Z2 AE1*Q*DA*PO*CCOSHCW/LA)+B)/LA/SINHCW/LA)/VT/B
Y Z1 + Z2
876 CONTINUE
GOTO 99910
300 CONTINUE
C
C
C SET Y VALUE OF DIC1/DVBC
C
IFCFLGY.LT.l.OITHEN
Y 0.0
GOTO 765
END IF
W WB -C2*ES*CPHI+ABSCVBC))/(ND*Q))**.5
Y1 Q*AE1*DA*PO*CCOSHCW/LA)+B)/LA/S1NHCW/LA)/B
VBC VBC + H
W WB -C2*ES*CPHI+ABSCVBC))/CND*Q))**.5
Y2 Q*AE1*DA*PO*(COSHCW/LA)+B)/LA/SINHCW/LA)/B
Y CY2-Y1)/H
VBC VBCH
765 CONTINUE
GOTO 99910
99910 CONTINUE
RETURN
END


103
where Wfi is the metallurgical base width and
x^= [ ((|)+VBC )/qNgpi ] 7 is the (one-sided) collector-base
(step) junction depletion-region width. In writing (5-1),
we have assumed that the simplified ambipolar transport
equation (p=n) is valid over the entire quasi-neutral base
region and thus, as done in [Fo77], we have implicitly
neglected the effects of the relatively narrow
low-injection region near the collector. In addition,
consistent with PISCES simulations for typical operating
conditions, the effects of mobile carriers in the
collector-base junction space-charge region, viz.,
quasi-saturation [Je87], have been neglected. Indeed in
the wide-base transistor, the base widening associated with
quasi-saturation is negligible.
In contrast to the Gummel-Poon model, our (low-p)
module properly accounts for, via (5-1), possibly
substantial recombination in the base region. Furthermore,
the module must account for possibly substantial
recombination in the p+ emitter region as well as a
current-induced electric field in the
conductivity-modulated base region which arises to support
the quasi-neurality. The integral of this electric field
across the base region defines a voltage drop, V i, which
causes the emitter-base junction voltage, VTr,D, to be less
than the applied terminal voltage, V,,D:
Ej JD


100
forward-bias the anode junction and activate the IGBT. The
test structures were fabricated using a
dielectric-isolation process [Go78] which eliminates
parasitic substrate effects. The utility of the flexible
and physical modeling is emphasized by SPICE simulations of
the LIGBT which reflects the three possible active modes of
operation. Furthermore, the onset of both static and
dynamic latch-up can be be simulated straightforwardly with
the physical SPICE model.
5.2 Modeling Methodolgy
We demonstrate the modeling methology through an
application to the LIGBT structure illustrated in Figure
5-1. The fabrication of this specially designed device is
described in Section 5.3. To develop a
quasi-two-dimensional model, we partition the structure
into one-dimensional constituent componenets as indicated
in Figure 5-1. The basis for this partitioning rests upon
physicl insight gained from device measurements in the
various modes of operation (PIN, DMOST, LIGBT, HIGBT) and
from device simulations using PISCES. Subdividing a
multidimensional structure into coupled one-dimensional
devices is not uncommon [Li67], but in this case of HV/P
devices the empiricism implied must be minimized through
proper accounting for the underlying physics. The unique
effects of significant back injection, base-region
conductivity modulation, and the associated low current


46
+ -
where n is
the
drop
across the
underlying p+n-
junction; V
J epi
i s
the
vertical
drop across the
(conductivity-modulated) epi
region; IRg
is the drop across
the extrinsic series resistance Rg; and the last term is
the (lateral) drop across the channel of the MOSFET, where,
following [Su80], R and R^ represent effective
lumped-channel resistances of the "series-connected"
enhancement- and depletion-mode devices. The implicit
formulation in terms of the junction voltages for the
steady-state IGBT transport problem, and its corresponding
numerical solution, are given in chapters 4 and 5.
The conductivity modulation that produces the
excellent steady-state forward current-voltage
characteristic, viz., low of the IGBT can
ON
unfortunately cause the turn-off time to be much longer
than that of a conventional power MOSFET. A typical IGBT
turn-off transient [Ru83,Ba84b,Ba84a,Ba85,Ku85] is unique
as illustrated in Figure 3-2. It shows an initial rapid
drop in the forward current, followed by a slower decay,
which reflects the lifetime of the carriers stored in the
epi region. The turn-off time can be shortened by reducing
the carrier lifetime, for example, via electron irradiation
[Ba84a] or intentional metallic impurity doping [Go83].
Such techniques have resulted in turn-off times of less
than 200ns, but with accompanying increases in RQN because
of the reduced carrier injection levels in the epi region.


17
are thus simplified to
P(0)
aefa
n(0) = niexp(-2k^) (2-9)
and
P(W)
aefc
n(W) niexp(y^) (2-10)
where x=0 and x=W denote the anode and cathode ends of the
ti region, the length of which is W (see Figure 2-1). The
solution to (2-7) is then
p(x)
n(0)sinh(WLx) + n(W)sinh(Lx)
= n(x) Aw A (2 11)
sinh(ip-)
la
This
solution is coupled to the carrier transport in
the anode and cathode by defining the minority-carrier
recombination currents in those regions. In the p+p anode,
this current, which can be expressed as [Fo81]
ii
< a
-a
AE (2-12)
JN0eXP( kT >
(2-12)


85
t(|XS)
Figure 4-5. IGBT anode current, DMOST drain current,
and gate-cathode voltage versus time from
simulation of turn-off transient defined
in Figure 4-4 with resistive load ZL = 35
52 and R = 200 52 (xH = 0.8 /js, Jn0 =
10-12 A/cm2) .


136
methodology presented was flexible and enabled for the
first time the simulation of the unique effects of
conductivity modulation, latch-up (static and dynamic), and
moving boundary conditions; however, it required recourse
to FORTRAN subroutines for the solution of the implicit
nonlinear equations rather than utilizing the nonlinear
equation solver inherent in the SPICE2 source code. Thus,
CPU times required for simulations using the methodology
were considerably longer than those using invalid built-in
SPICE2 models; however, they are not prohibitive for
small-scale circuits, where one or two HV/P IC devices are
used. The preliminary work in Chapter 4 provided the
impetus for developing a more effecient means of problem
formulation and subsequent SPICE2 implementation for HV/P
IC device models. Chapter 5, as discussed above, extended
and refined the work presented in Chapter 4.
6.2 Recommendations
There are several avenues for further research which
would enhance the acceptance of our modeling methodology.
For a complete HV/P IC CAD facility, a library of HP/V
device modules is essential. Ideally, such a library would
include a number of internal SPICE2 HV/P device modules,
consisting of, but not limited to models for the PlN-diode,
the DMOST, the LIGBT, and the wide-base BJT. Using our
methodology, a user could then construct his own model


33
100
80
60
z
o
ce
40
20
0*
Experimental^/
r
/
/
/
/ /
/
/
/
J jf ^Theoretical
/ /
/ v*
7 /
//
1/
-i /
-f-
Rg+R|=60
1 L
20 40
W2 (108|j.m2)
J L
Figure 2-6. Measured and calculated incremental
ON-resistance versus the square of the
n-region length. The dashed lines
emphasize the linear dependences. The
determination of the extrinsic series
resistance from the extrapolation of the
experimental data is illustrated.


126
approximately a diode drop, V^. The voltage drop across
R then is simply the current through R times R _
nb J nB ns
(VcjRnS/RnB) The total voltage across the HIGBT, just
prior to triggering, may then be expressed as,
V^H+V^(1+Rng/Rn0). Thus the relative magnitudes of RnS and
RnB greatly influence the onset voltage. To effect optimal
HIGBT design (low onset voltage), RnS should be made much
less than RnB* Later we will show that RnB plays an
important role in determining the transient turn-off
characteristics. The increase in total current immediatly
after the triggering is due predominantly to an increase in
the DMOST current as a result of modulating R and as
3 ns
discussed previously in Section 5.3.
In Figure 5-10 we show corresponding SPICE model
current-voltage curves for the HIGBT. Note that the
triggering points for the hybrid mode of operation are
reliably predicted, as well as the latch-up onsets. We
note, however, that although our model modestly simulates
the DMOST region, the predicted conductance in the hybrid
mode is less accurate. This inaccuracy is due in part to
the semi-empirical approximate representation (5-11) of the
modulated DMOST resistance. More physical IJDCS modeling of
this highly nonlinear modulation could be done to improve
the accuracy. However, to effect a generally valid model,
a more physical DMOST module should be developed to replace
the simple SPICE/Level 2 model.


138
Fourth, we recommend extending our first-order
latch-up model used in the LIGBT network representation.
The physics underlying the latch-up process, including the
latch current and the holding current, needs clarification.
Fifth, we recommend the incorporation of all device
models into the SPICE code, as we feel that UDCSs are
primarily a means for model development. The inherent
problems of nonstandard coding, nonuniform convergence
criteria, numerical instabilites, and long CPU times
preclude the use of UDCSs for practical circuit simulation
in an industrial environment. For example, the eleven
UDCSs comprising the LIGBT model in Chapter 5 contain
nearly 1500 lines of FORTRAN code (see Appendix B). If the
model were directly implemented into the SPICE code, only a
few dozen lines would be needed. Thus, for universal
acceptance of our modeling methodology, the direct
incorporation of our models into the SPICE code is of
paramount importance.


c
C**A**AA******************************* *************************
C THE FOLLOWING LISTING IS A SUBROUTINE WHICH CALCULATES
C THE EMITTER CURRENT, IE, GIVEN THE NODE VOLTAGES VBE AND VBC
C THE SLICE USERS MANUAL SHOULD BE CONSULTED FOR THE SPECIAL
C FORMAT USED IN CIRCUIT FILES FOR UDCS DEFINED ELEMENTS
C*AA*AA A*AAA*AA ****************** A********A ************** AAA*A*A
c
SUBROUTINE UIELT1(Y,I FLAG,LP,NP,LC,NC,JERROR)
IMPLICIT DOUBLE PRECISION (A-H.O-Z)
DOUBLE PRECISION ND.NI,JNO,IE1,LA
SPECIAL COFMON BLANK
C0t-M0N/BL4NK/X< 64)
GOTQC 50,100,200,300 ) I FLAG-5-2
50 CONTINUE
IF(NC.NE.2> JERROR -99010
GOTO 99910
100 CONTINUE
PHI *=,6
ES=1.035E-12
NI-1.3E10
UN-1350.0
UP-480.0
6-UN/UP
Q-1.6E-19
VT-.025B6
DA2*VT*UN*UP/< UN+UP)
WB-
X(LP+1)
T0-
XLP+2)
JNO-
XCLP+3)
ND-
X(LP+4)
AE1-
XCLP+5)
H-
XOLP+6)
CF-
X(LP+7)
XX2-
X(LP+8)
XX3-
XLFH-9)
VBE-
X(LC+1)
VBC-
X(LC+2)
TH2*T0
LA-SQRT(DA*TH)
C
C SET Y VALUE OF IE1
C
c
C CONVERGENCE ENHANCEMENT
C
IF(VBE.GT.0.80)THEN
VBECF*VT*LOG(VBE/VT)
END IF
IF(VBE.LT.0.55ITHEN
P0*4I**2*EXP(VBE/VT)/ND
Y O*AEl*DA/WB*P0
FLOY =0.0
GOTO 98?
END IF
IF((VBE.GT.0.55).AND.(VBE.LT.0.60))
P0-NI**2/ND*EXP(VBE/VT)
END IF
FLGY-2.0
C
c
W WB -(2*ES*(PHI+ABS(VBC))/(ND*Q))**.5
Y (B+l )/B*(A£l*JNO*PO**2/NI**2+Q*DA*AEl*PO/LA/TANH(W/LA) )
C
987 CONTINUE
GOTO 99910
200 CONTINUE


pasexq-pjBAVJOj
' sao
e jog uieaBeip pueq-A6jaua
'Z~Z
M 0
Zl