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High-order linearizing pulsewidth modulator for three-phase power converters

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Title:
High-order linearizing pulsewidth modulator for three-phase power converters
Creator:
Chen, Jun, 1966-
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Language:
English
Physical Description:
vii, 162 leaves : ill. ; 29 cm.

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Subjects / Keywords:
Coordinate systems ( jstor )
Electric potential ( jstor )
Electronics ( jstor )
Equivalent circuits ( jstor )
Inductors ( jstor )
Inverters ( jstor )
Modulators ( jstor )
Signals ( jstor )
Simulations ( jstor )
Waveforms ( jstor )
Modulators (Electronics) ( fast )
Pulse techniques (Electronics) ( fast )
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bibliography ( marcgt )
theses ( marcgt )
non-fiction ( marcgt )

Notes

Thesis:
Thesis (Ph. D.)--University of Florida, 2000.
Bibliography:
Includes bibliographical references (leaves 155-161).
General Note:
Printout.
General Note:
Vita.
Statement of Responsibility:
by Jun Chen.

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Full Text









HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR
FOR THREE-PHASE POWER CONVERTERS













BY

JUN CHEN













A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL
OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT
OF THE REQUIREMENTS FOR THE DEGREE OF
DOCTOR OF PHILOSOPHY

UNIVERSITY OF FLORIDA

2000














ACKNOWLEDGMENTS



I would like to express my deepest gratitude to my research committee

chairman, Dr. Khai D. T. Ngo, for welcoming me to the power electronics group

at the University of Florida. He provided constant support and encourage-

ment for my study and research. I learned not only the knowledge of power

electronics, but also a work attitude that has greatly reshaped my career. I

also wish to thank Dr. Dennis P. Carroll, Dr. Alexander Domijan, Dr. Vladimir

A. Rakov, and Dr. Loc Vu-Quoc for their participation on my research commit-

tee.

I am very grateful to American Research Corporation for its financial

support and projects, and also Texas Instruments for a TI fellowship.

My special thanks go to my colleagues, Jun Xu and Paiboon Nakmah-

achal, for their helpful discussions and suggestions in my project and disserta-

tion.

There is no word for me to describe my gratitude to my wife, Yin Xie,

who spent her time taking care of our family when I was working at the lab

day and night. Without her help and patience, I would not know how to finish

my research and dissertation.






ii














TABLE OF CONTENTS


pages

ACKNOWLEDGMENTS ................................................................................. ii

ABSTRACT .................................................. ................................ v

CHAPTERS

1 INTRODUCTION ..................................... .................... 1

2 MODELING AND ANALYSIS OF THREE-PHASE CONVERTERS 10

2.1 Derivation of State-Space Equations of PWM Converters .......... 11
2.2 Equivalent Circuit in the ABC Coordinates .............................. 20
2.3 ABC-OFB Transformation ........................................ ........... .. 26
2.4 Equivalent Circuit in the OFB Coordinates ................................ 28
2.5 Graphical Steady-State Analysis ............................................. 36
2.6 Graphical Small-Signal Analysis ............................................. 38

3 REVIEW OF PULSEWIDTH MODULATION .................................. 44

3.1 Pulsewidth Modulation for DC Converters ............................... 44
3.2 Pulsewidth Modulation for Three-Phase Converters ................ 48
3.3 Synthesis of Continuous Sinusoidal Pulsewidth Modulation ..... 55
3.4 Synthesis of Space-Vector Modulation ....................................... 57

4 HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR ........ 62

4.1 First-Order Linearizing Pulsewidth Modulator ........................ 63
4.2 Nonlinear Problem in Three-Phase Converters .......................... 66
4.3 Large-Signal Linearization of PWM Converters ......................... 69
4.4 Linearization by First-Order LPWM ........................................... 72
4.5 Linearization by High-Order LPWM ........................................... 80

5 ANALYSIS OF HIGH-ORDER LINEARIZING
PULSEWIDTH MODULATOR ............................................ ......... 97

5.1 Analysis of High-Order Linearizing PWM .................................. 98
5.2 Sampling Effects in High-Order LPWM .................................... 107



iii








6 IMPLEMENTATION AND EXPERIMENTAL RESULTS OF
HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR ...... 116

6.1 Analog Implementation of High-Order LPWM .......................... 118
6.2 Experimental Results ...................................... 135
6.3 Practical Issues in Experiment .................................................. 145

7 SUMMARY AND CONCLUSION ..................................................... 151

R E FE R E N CE S ............................................................................................... 155

BIOGRAPHICAL SKETCH ........................................................................... 162







































iv














Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy

HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR
FOR THREE-PHASE POWER CONVERTERS

By

Jun Chen

August 2000

Chairman: Dr. Khai D. T. Ngo
Major Department: Electrical and Computer Engineering


The feasibility of using an analog pulsewidth modulator (PWM) to lin-

earize balanced three-phase converters is investigated in this dissertation.

Prototype circuits, models, and analysis techniques are developed.

Most balanced three-phase PWM converters that are controlled by the

conventional analog PWMs have nonlinear relationships between the control

and output voltages/currents. This study shows that these nonlinear relation-

ships can be linearized by an analog high-order linearizing pulsewidth modu-

lator (LPWM) that makes the output voltage track the control voltage linearly.

Instead of multipliers/dividers, the high-order LPWM uses only integrators

with the reset, and sample/holds to compute the switching instants for the

switches in the converter. The inputs to the integrators of the LPWM are just

linear functions of the control and state variables, but are nonlinear functions



v








when other analog PWMs, such as feed-forward PWMs and one-cycle control-

lers, are used.

The analog high-order LPWM is synthesized from switching-function

averaging (SFA) equations of the three-phase PWM converter. Thanks to the

SFA model of the PWM switch, the derivation of SFA state-space equations of

the converter is simply done by inspection and application of definition of cir-

cuit elements, Kirchhoffs law, and other electrical principles without probing

into topological details of the converter. The set of SFA equations can be trans-

formed into an equivalent circuit in the stationary coordinates to make simu-

lation more efficient.

In order to analyze three-phase converters that are controlled by the

LPWM or other pulsewidth modulation techniques, all three-phase component

models in the rotating coordinates, including PWM switches, sources, and pas-

sive components, are developed. After three-phase components are replaced

by their models in the rotating coordinates, the time-variant three-phase cir-

cuit is transformed into a time-invariant equivalent circuit that makes analy-

sis and design much easier. The model of the high-order PWM is also

developed. It is useful to analyze the LPWM-controlled converter and evaluate

time delay caused by sampling effects.

The synthesis and analysis theories of the high-order LPWM are veri-

fied by a 1 KW prototype of a three-phase boost inverter. Both simulation and

experimental results agree with the analysis. The experimental results show

that the control circuit is simple, and the output voltages of the inverter can



vi








track the control voltages linearly, and they have low-distortion sinusoidal

waveforms.

In summary, the synthesis and analysis techniques are developed for

linearization of a three-phase boost inverter in the dissertation. As general

methods, they can be applied to other three-phase topologies, multi-phase or

multi-level converters.








































vii













CHAPTER 1
INTRODUCTION



With the development of high-speed, high-power semiconductors, the

switching power converter has gradually replaced linear power amplifiers to

become the main power conversion product on the market. The switching

power converter not only provides more efficient power conversion than the

linear power converter, but also has more flexible control capability that

allows the converter to meet various power demands and requirements.

Therefore, research on switching power converters has received much atten-

tion. A major research issue is the linearization of switching power converters

that makes the controlled variable track the control signal and improve the

performance of the converter.

A basic switching power converter consists of two sections, as shown in

Figure 1-1. The first section is called the power stage that usually consists of

semiconductor switches and energy storage components. The power stage

receives the unregulated energy from the utility power line or power convert-

ers and provides the regulated energy to customer loads. The second section is

the modulator that provides control signals to the power stage.








1





2


UTILITY LINES POWER STAGE CUSTOMER
OR
CONVERTERS (switches, inductors, LOADS
and capacitors)


HIGH-FREQUENCY MODULATOR CONTROL
CARRIER o (analog, or DSP - SIGNALS
circuits)

Figure 1-1 A basic switching power converter.




The modulator can be implemented by analog and digital means,

depending on the requirements, complexity, and costs in converter design. The

digital modulator is used mostly in three-phase converters since it has more

computation capability. However, when the switching frequency is increased

by size and weight requirements, the digital modulator will be limited by its

clock speed. Meanwhile, when the reference voltage does not change smoothly,

the sample/hold circuit with the digital modulator would be restrained by res-

olution. In contrast, the analog modulator is much faster, and it can handle

any frequency, limited only by the capability of power stage [1].

A conventional pulsewidth modulator (PWM), as shown in Figure 1-2,

consists of a comparator, a ramp carrier signal vrmp, and a control signal vc.

The carrier signal provides high-switching frequency to the control signal and

to the switches in the converter. The control signal is followed by the con-

trolled variables, such as output voltages. In the conventional PWM, the car-

rier signal has a constant slope. The control signal is compared with the





3



Vrmp V V
Vrm rmp

p VP dT____
T
vc---.-^



Figure 1-2 A conventional PWM.



carrier signal through the comparator. The output pulse vp (also called switch-

ing function), generated by the comparator, is used to drive the switch in the

converter. It has the duty ratio of

d v- (1.1)
Vm

where Vm is the amplitude of the ramp vrmp.

The output signal vp determines the switching patterns of the con-

verter. The controlled variable of the converter, such as the output voltage, is

the function of the converter input and duty ratio of vp that is determined by

Equation (1.1). Therefore, the controlled variable of the converter can be regu-

lated by adjusting the control signal.

The power stage in Figure 1-1 could be the dc-dc converter in the dc

power conversion or the three-phase converter in three-phase ac power con-

version. The most popular dc converters are shown in Figure 1-3. The conver-

sion ratios between the output and input voltages are listed in Table 1.1. The

single-phase converters and dc converters with the transformer isolation are




4

not listed here, because they can be derived from these basic topologies and
have one independent control variable like basic dc converters.



Buck + l
V T T gT C RT -


+ SEPI +
V Boos V Vg BVo
----T- -T - -

+v+
vg T

Buck-Boost Dual SEPIC
Figure 1-3 Basic dc-dc converter topologies.


Table 1.1 Voltage conversion ratios.

Converter Topology Voltage Conversion Ratio, Vo/Vg
Buck D
Boost 1/(1-D)
Buck-Boost -D/(1-D)
Cuk -D/(1-D)
SEPIC D(1-D)
Dual SEPIC D/(1-D)





5

The dc converters are used mostly in delicate and low-power applica-

tions, such as computers and microprocessors. The three-phase PWM convert-

ers are usually used in rugged, high-power applications, such as active

filtering [2], UPS [3], VAR compensation [4], power generation [5], motor

drives [6, 7], and multi-level converters [8]. The most popular three-phase

PWM converters [9] are shown in Figure 1-4. The voltage conversion ratios









\LJ JI ( ( ( T T T
Buck inverter Boost inverter







Buck rectifier Boost rectifier



IT T




Flyback rectifier Flyback inverter

Figure 1-4 The three-phase inverters and rectifiers.





6


Vm/Vg are listed in Table 1.2, where Vm is the amplitude of the output volt-
ages; Vg is the amplitude of the input voltages. The conversion ratios in Table

1.2 are derived from the balanced three-phase converters, and the input volt-

age and current are assumed in phase in the rectifiers. In the table, Dm is the

amplitude of the sinusoidal control signal. D is the duty ratio of the dc switch

in the flyback topology. It should be noted that these conversion ratios are

derived by assuming that the impedance of input/output reactive components

are small at input/output frequency and can be neglected.


Table 1.2 Voltage conversion ratios VmVg.

Converter Topology Inverter Rectifier

Buck Dm/2 Dm
Boost 1/Dm 2/Dm
Flyback D/Dm D/Dm



Although PWM converters are the most popular in various power con-

versions, they have an inherent problem: nonlinearity. It keeps the output

voltage from tracking the control signal, gives rise to waveform distortion, and

degrades the performance of the converter. The reason that generates the non-

linearity can be found by investigating the voltage conversion ratios of PWM

converters in Table 1.1 for dc converters, in Table 1.2 for three-phase convert-

ers, and duty ratios shown in Equation (1.1). The conventional PWM with a

constant slope carrier produces a linear relationship between the duty ratio

and the control signal as shown in Equation (1.1). When the duty ratio is used





7


to control nonlinear converters that have a nonlinear relationship between the

duty ratio and the output voltage, as shown in Table 1.1 and Table 1.2, the

output voltage is proven to be a nonlinear function of the control voltage.

The nonlinear problem of PWM converters has been solved mainly by

the small-signal linearization technique of negative feedback control.

Recently, large-signal PWM linearization techniques were proposed in [10]

and [11]. As an alternative linearization technique, the large-signal PWM lin-

earization features an open-loop, steady-state linear control-to-output rela-

tionship, regardless of operating conditions, leading to simple and stable

control circuit design. Moreover, this technique has better line voltage regula-

tion not only for the linear converters, but also for the nonlinear converters

that are difficult for the feed-forward control [12].

The large-signal PWM linearization techniques in [10, 11] can success-

fully solve the nonlinear problem for dc-dc converters and single-phase invert-

ers, in which the PWM controller deals only with a single control variable.

However, three-phase converters or multi-phase converters have more than

one control variable. Therefore, the first-order PWM linearization is limited in

three-phase converters or multi-phase converters. Nevertheless, the idea of

the large-signal linearization is a useful concept that could be extended to the

three-phase converters, thus motivating the present research and leading to

the following objectives of the thesis:

* a general way to synthesize the high-order linearizing PWM for bal-

anced three-phase converters.





8


* a simple analog high-order linearizing PWM prototype circuit without

multipliers/dividers.

* a circuit-oriented analysis technique for balanced three-phase convert-

ers.

* model and analysis of high-order linearizing PWM modulator.

* simulation and experimental verification.

This dissertation is organized as follows. Chapter 2 characterizes the

low-frequency property of the PWM switch and reviews the switching-function

averaging (SFA) technique. The derivation of the SFA state-space equations of

a three-phase converter is presented. Components of balanced three-phase

converters are modeled in the ofb coordinates, by which the time-variant

three-phase converter can be graphically transformed into a time-invariant

equivalent circuit for steady-state and dynamic analyses.

Chapter 3 reviews PWM techniques for dc and three-phase converters,

in which large-signal linearization is emphasized. Two popular PWM tech-

niques, sinusoidal PWM (SPWM) and space-vector modulation (SVM), are dis-

cussed in details in this chapter.

Chapter 4 identifies the nonlinear problem in three-phase converters.

Two large-signal linearization techniques for three-phase PWM converters

are proposed in this chapter. One technique uses several first-order linearizing

PWM circuits to synthesize duty ratios for the switches in the converter indi-

vidually. It involves multipliers/dividers to compute the inputs to the integra-

tors. The other technique employs the proposed high-order LPWM circuit to





9


solve SFA equations. The inputs to the high-order LPWM circuit are linear

functions of the control and input voltages. Therefore, no multipliers/dividers

are required in the circuit, making analog implementation simple.

Chapter 5 focuses on the analysis of the LPWM-controlled converters.

The large-signal and small-signal models of the LPWM are derived in this

chapter. The time delay caused by sampling effects in the high-order LPWM is

also investigated.

Chapter 6 concentrates on implementation and experimentation of the

proposed analog high-order linearizing PWM. The experimental circuits and

results are presented in this chapter.

Chapter 7 consists of the summary and conclusion of this dissertation.













CHAPTER 2
MODELING AND ANALYSIS OF THREE-PHASE CONVERTERS



This chapter presents the modeling and analysis techniques for three-

phase PWM converters. These techniques are important for the synthesis and

analysis of the linearizing pulsewidth modulation and three-phase PWM con-

verters.

This chapter consists of six sections. The first section characterizes the

low-frequency property of the PWM switch with switching-function averaging

(SFA) technique. The derivation of the SFA state-space equations of a three-

phase converter is presented. The second section transforms the SFA state-

space equations into an equivalent circuit that is used for fast simulation. The

third section reviews the abc-ofb transformation that is applied to the time-

variant equivalent circuit to remove time dependency. The fourth section pre-

sents the graphical models for all components of the three-phase converter in

the ofb coordinates. This section also demonstrates how to construct the time-

invariant equivalent circuit of a three-phase converter in the ofb coordinates.

The fifth section solves the ofb equivalent circuit graphically for the steady-

state analysis. The sixth section derives the small-signal equivalent circuit by

perturbing the control and input variables in the steady-state ofb equivalent





10





11


circuit. With the help of small-signal equivalent circuit, the control-to-output

transfer function of the converter can be easily found graphically.

Although the boost inverter is used as an example to demonstrate the

whole procedure, the analysis and modeling techniques in this chapter can be

applied to any other three-phase PWM converter. To simplify explanation, it is

assumed throughout the thesis that the components are ideal and the

switches are lossless and four-quadrant.



2.1 Derivation of State-Space Equations of PWM Converters


2.1.1 Switching-Function Averaging Model of PWM Switch


To analyze the steady-state and dynamic performance of a PWM con-

verter, which contains reactive components, the state-space equations must be

presented. There are many approaches to derive the state-space equations for

PWM converters, among which the state-space averaging technique [13, 14] is

the most popular. This approach requires the identification of the switched

networks and the derivation of the state-space equations for all switched net-

works that is easy to do in dc converters because of the small number of

switched networks. However, a three-phase converter usually has a large

number of switched topologies, and with the increase of phase numbers, the

number of switched topologies will increase rapidly. For a given PWM method,

the switched networks in one switching cycle can be different from those in

another cycle. Moreover, different PWM schemes generate different switched





12


networks. Therefore, application of the state-space averaging technique to

analyze three-phase converters is tedious.

Without probing into topological details, the switching-function averag-

ing method [9, 15] treats the switch as a component in the same way as we

treat other linear components by defining the PWM switch model. This allows

derivation of state-space equations simply by inspection and application of

definitions of circuit elements, Kirchhoff's laws, and other electrical princi-

ples. The switch model is derived by characterizing its low frequency property,

as explained in this section.

The single-pole-multiple-throw (SPMT) switch shown in Figure 2-1 is

one of the fundamental building elements in the PWM converters. The pole is

usually connected to the inductor, and the throw is connected to either the

voltage sources or the capacitors. The SPMT switch is reduced to a single-pole-

double-throw (SPDT) switch in a dc converter; it may be SPDT or a single-

pole-triple-throw (SPTT) switch in most three-phase converters.




I p Pole 1

i li2 I ik i*M

d*ll d*12 d*1k d*1

v*1 v*2 v*k V*M

Figure 2-1 A single-pole-multiple-throw switch.





13


The operation of the throw k in Figure 2-1 is specified and modulated

by the switching function d*lk, as shown in Figure 2-2, where the asterisk *

denotes the instantaneous switching function. The function is one when the

throw is closed and zero when the throw is open. A switching function defined

this way can always be assigned to any throw in the converter without prior

knowledge of modulation strategy or sequence of switched topologies. There-

fore, this switch model allows derivation of state-space equations of a PWM

converter without specifying modulation strategy. After the state-space equa-

tions are derived, they can be used for any PWM strategy to do a specific anal-

ysis [9].

In Figure 2-1, v*l-v*M are throw voltages, i*i-i*M are throw currents,

i*p is the pole current, and v*p is the pole voltage. The asterisk * denotes the

exact value. In switching functions shown in Figure 2-2 dil-dlM stand for duty

ratios of switching functions. Ts is the switching period.



1
d*11 0
----- dllT-s- 1
d*12 0


d*lk 0 [ T
"dlkTs- 1


SdlMTs-O

Figure 2-2 Switching functions of SPMT switches.





14


To avoid short circuit, no two throws turn on at the same time, and all

switching functions must add up to one at any instant to avoid open circuit. In

other words, one and only one of the switching functions of the SPMT switch is

one at any instant. This can be expressed as follows:

M * (2.1)
Sdlk = 1
k=l

It is obvious that there are only M-1 independent switching functions of the

one-pole-M-throw switch.

At any moment, only one throw is connected to the pole. Therefore, the

throw current equals pole current during its connection with the pole:

i k = dlki P (2.2)

Over one switching cycle, the pole is connected to the throws one by one;

thus, the pole voltage v*p is just a linear combination of the products of throw

voltages and corresponding switching functions:

M
Vp = , dlkV k (2.3)
k= 1

The SPMT switches are switched at a high frequency. The voltages or

currents connected with the pole and throws, either dc or sinusoidal ac, are

varying slowly, relative to the switching frequency. Therefore, over one switch-

ing cycle, the terminal voltages and branch currents of the pole and throws

can be assumed as constant. The duty ratio dlk (without asterisk), which is

the average of the switching function d*lk over the switching period T., is





15


modulated at a frequency sufficiently slower than the switching frequency.

Therefore, the duty ratio is also assumed as constant over the switching cycle.

In the analysis and modeling of switched-mode converters, attention

usually is restricted to low-frequency components of voltages and currents.

The high-frequency components (also called ripples) are designed to be small

and can be neglected due to the combination of fast switching and proper

placement of filter corner frequencies. Therefore, the exact value with the

asterisk in the previous switching-function equations can be, approximately,

replaced by their low-frequency value for analysis and modeling of low-fre-

quency components. This modeling technique is called switching-function

averaging herein. The duty ratios in Equation (2.1) are then replaced by their

averaged values:

M
Sdlk = 1 (2.4)
k=l

The pole voltage and the throw currents in Equations (2.2) and (2.3) are

replaced by their averaged values:

M (2.5)
VP = dlkVk
k= 1

ik = dkip (2.6)

All values in Equations (2.4) - (2.6) vary slowly relative to the switching

frequency; thus, they characterize the low-frequency properties of the SPMT

switch shown in Figure 2-1. With these equations, the SPMT switches can be

treated as components in the way we treat other components. The derivation





16


of state-space equations of a PWM converter becomes routine and can be done

using state-space concept [16], definitions of circuit elements, Kirchhoffs

laws, and other electrical principles.



2.1.2 Derivation of State-Space Equations


Since the SPMT switch in the converter has been modeled as a compo-

nent by the switching-function averaging technique, there is no need to iden-

tify the switched topologies. State-space equations are derived simply by

following the procedures described in ref 16. The only attention is to identify

the SPMT switches in the converter. A three-phase boost inverter is used here

to demonstrate how to identify the SPMT switches and how to derive state-

space equations for PWM converters. Since the state-space equations of the

switched-mode converter are derived by averaging the switching functions of

the switch, they may be called switching-function-averaging state-space equa-

tions (SFA state-space equations) [9] in this thesis.

A three-phase boost inverter is illustrated in Figure 2-3. Since we know

that the pole of the SPMT switch usually is connected with inductors and

throw is connected with voltage sources or capacitors, it is easy to find that

there are two single-pole-triple-throw (SPTT) switches in the three-phase

boost inverter. The SPTT switch on the top consists of the switches Sil, S12,

and S13 and is characterized by dll, d12, and d13. The SPTT switch on the bot-

tom is grouped by S21, S22, and S23 and is characterized by d21, d22, and d23.

Duty ratios d11- d23 correspond to the switching functions of switches S11- S23,





17





Sll/ S1/0 W R R R



pole vp2
l a a la a a l l a
, v, and v. The first pole voltage is vp, and the second pole voltage is vb
i13 iF vc
























= dllVa+dl2vb-+-d-3V (2.7)
21 d122V, + 23
s �/ s �/ S� -- C -- C --C
S21 S22 S23 T T T

pole 2 Vp2

Figure 2-3 A three-phase boost inverter with two SPTT switches.



respectively, and they are modulated at a frequency sufficiently lower than the

switching frequency.

The states of the inverter are inductor current iL and capacitor voltages

Va, Vb, and vc. The first pole voltage is Vpl, and the second pole voltage is Vp2-

Based on the SFA model of the SPMT switch in Equations (2.4) - (2.6), Vpl and

Vp2 can be expressed as the linear combination of capacitor voltages and duty

ratios of the switches:

vpl = dllva+d12vb+dl3vc (2.7)

vp2 = d21 va + d22vb + d23vc (2.8)

The voltage across the inductor can be obtained by application of Kirchhoff's

voltage law:

diL
L-dt = V - (v - Vp2) (2.9)
dt g9(pI~V2





18

Combination of Equations (2.7) - (2.9) yields

diL
Ldt = V- a -bb - dcc (2.10)

where da, db, and d, are effective duty ratios:

da = d - d21 db = d12 - d22 dc = dl3-d23 (2.11)

Since the current through the switch is the product of the inductor cur-

rent and the duty ratio of the switch according to Equations (2.4) - (2.6), the

capacitor currents can be derived by applying Kirchhoff's current law as fol-

lows:

dva 2va - vb - vc 2va - vb - Vc
C d= (dll -d1)iL- 3R = daiL- 3R (2.12)


dvb 2vb-va- vc 2vb- va- vc
C-d = (d12 -d22)iL- 3 = dbiL-- 3 (2.13)


dvc 2v, - Vb - v- 2v, - Vb - va
C- = (d13-d23)iL- 3 a = dciL- 3 a (2.14)
dt 3R cL 3R

Equations (2.10) and (2.12) - (2.14) are called SFA state-space equations of the

three-phase boost inverter. Although they are derived for the boost inverter,

the switch model and the derivation procedure are general to other PWM con-

verters.

The SFA state-space equations of the PWM converter are derived with-

out knowledge of any PWM strategy and thus are general to any PWM modu-

lation scheme: continuous sinusoidal PWM, space-vector modulating, and so

forth. Once a specific PWM modulation technique is applied to the converter,

the switching patterns and duty ratios in the SFA equations are known. For





19


the same PWM converter, a different PWM strategy leads to different coeffi-

cients in the SFA equations and state solutions.

The SFA state-space equations shown in Equations (2.10) and (2.12) -

(2.14) are derived in the stationary reference frame or abc coordinates, in

which all the state variables and coefficients in the equations are time-vari-

ant. Obviously, solving the time-variant state-space equations is very tedious

and difficult. Therefore, they are transformed into the ofb coordinates to

remove the time dependencies from the state-space matrices [15] by the abc-

ofb transformation [17]. These coordinates consist of an 0-sequence phasor, a

forward(-rotating) phasor, and a backward(-rotating) phasor. After the trans-

formation, the SFA state-space equations become time-invariant, and the

three-phase boost inverter can be analyzed by solving the state-space equa-

tions in the ofb coordinates. For a balanced three-phase system, the equations

containing the 0-sequence, forward, and backward phasors are completely

decoupled. The steady-state backward phasors are directly related to the volt-

age and current phasors in the circuit. Unfortunately, the steady-state and

dynamic analysis of converters [15], based on ofb state-space equations, con-

tain intensive algebraic calculation and matrix manipulation. In addition, the

equation-oriented model of the converter is not intuitive to computer simula-

tion.

In contrast, circuit-oriented techniques [18, 19, 20, 21] are preferred for

hand-analysis/calculation and computer simulation. Such circuit-oriented or

"graphical" techniques not only produce the averaged equivalent circuit





20


of a PWM converter expeditiously, but also result in a model that is

insightful and amenable to implementation in standard circuit simula-

tors.

In the following section, the SFA state-space equations shown in Equa-

tion (2.10) and (2.12) - (2.14) are transformed into an equivalent circuit in the

abc coordinates using the PWM Switch Model described in refs 18 and 19.

This equivalent circuit is useful in fast simulation and prediction of various

waveforms in the converter even though it is a time-variant circuit. Following

this section, the thesis provides a technique that transforms a time-variant

three-phase converter into a time-invariant equivalent circuit in the ofb coor-

dinates. With the help of the ofb equivalent circuit, the steady-state and

dynamic analysis of the three-phase converter becomes much easier.



2.2 Equivalent Circuit in the ABC Coordinates


According to the PWM-Switch-Model technique [18], the PWM switch

can be modeled as a dc transformer that is a standard component in the simu-

lator (such as Saber). The turns ratio is the duty ratio of the switching signal

of the PWM switch. This technique is used in dc converters [18], but its idea

can be extended to three-phase PWM converters or other PWM converters.

Therefore, the SFA state-space equations of the PWM converter derived in the

previous section can be transformed into an equivalent circuit using several dc

transformers. This equivalent circuit is constructed by appropriate connec-

tions between the dc transformers and other components. The connections are





21


determined by the SFA state-space equations. The turns ratios of those dc

transformers in the equivalent circuit are effective duty ratios in the SFA

equations [22].

As an example, the three-phase boost inverter, as shown in Figure 2-3,

is used to demonstrate the derivation of the equivalent circuit from the SFA

state-space equations. The SFA equations of the three-phase boost inverter in

Section 2.1.3 are organized and re-written as follows:

diL
L = V - dV - dVb - dcV (2.15)


dv 2va -vb - Vc
C dt-= daiL- - 3R (2.16)
dt 3R

dvb 2Vb - V - V
C = db 3R (2.17)


dvc 2vc - vb - va
dC-- dciL- (2.18)
dt 3R

A dc transformer is shown in Figure 2-4. Its turns ratio is determined

by the duty ratio of the switching signal of the PWM switch. The duty ratios

da, db, and d, in the SFA equations shown in Equations (2.15) - (2.18) can be

modeled by the dc transformer shown in Figure 2-4. The connection relation-

ships between the transformers and other components in the boost inverter is

defined by Equations (2.15) - (2.18). The resulting equivalent circuit of the

three-phase inverter is shown in Figure 2-5. If the capacitor voltages va, vb,

and vc are reflected from the output side to the input side, one can easily find

that the inductor voltage of the equivalent circuit in Figure 2-5 is the same as





22




+ 1 d:1 d
i di
+ * * +

dva v
av


Figure 2-4 The dc transformer with the duty ratio of d.



L d1:1
iL + R

II c V
d2:1

V 1C vb

S+ R
I C Vc


Figure 2-5 The equivalent circuit of the three-phase boost
inverter in the abc coordinates.



that in Equation (2.15). The capacitor currents in the equivalent circuit also

are found to be the same as those in Equations (2.16) - (2.18). Therefore, the

equivalent circuit exactly represents the low-frequency properties of the

three-phase boost inverter. Because there are no real switches in the equiva-

lent circuit, the simulation of this circuit is expedited and memory space of the

computer is also greatly saved. The simulation results of the equivalent cir-

cuit are the low-frequency components of the voltages and currents in the





23

inverter that are sufficient for us to predict various waveforms and design the

inverter.

To appreciate how fast and accurate the equivalent circuit is, the circuit

in Figure 2-5 is simulated in Saber. The simulation results are compared with

the real-time simulation of the three-phase boost inverter. Supposing that the

PWM method applied to the three-phase boost inverter is continuous SPWM,

one choice for duty ratios is


D1 +_Dsin( 1 Dm sin(0
Kdl 3+ 11 3ddlO 3 3 d)
D
1 Dm . 2 Dm ( 2


-+ sin( d sin(0d +
3 3 a3 33





2D
[d] sin(ot)


2t(00 Hz), R = 10 Ohm, C = 100 eF. The real-time simulation result is shown inare
S2-6 a t tm 0 m . T

3 D-d 23



The simulated inverter has the following parameters: DM = 0.9, Vg = 200 V, Q =

2n7(100 Hz), R = 10 Ohm, C = 100 gYF The real-time simulation result is shown in

Figure 2-6, and the time for 40 ms simulation is 30 seconds. The results of the

simulation with the equivalent circuit is shown in Figure 2-7, and the time for

40 ms simulation is only 0.4 seconds.





24





300 Va Vb Vc


150


0-


-150


-300
0 10 20 30 40

Figure 2-6 The real-time simulation of the three-phase boost
inverter.






300 va vb Vc


150


0


-150


-300 , tms
0 10 20 30 40

Figure 2-7 The simulation of the three-phase boost inverter
with the equivalent circuit

Both simulations give the same output voltage:


Va = 262Z-320 (2.21)





25


The only difference between the two simulation results is that the real-time

simulation contains the high-frequency ripple, but the equivalent circuit sim-

ulation has no ripple. The equivalent circuit produces exactly the low-fre-

quency components of the output voltages. One interesting result obtained by

both simulations is that the output voltage has a 320 phase shift from the con-

trol voltage, and the amplitude is also different from the value (222 V), pre-

dicted by the conversion ratio in Table 1.2 of Chapter 1, as shown in Figure 2-

8. This interesting result can be easily predicted by the steady-state analysis

of the ofb equivalent circuit of the three-phase boost inverter, which will be

presented in the next section.




300 -262 V
(V)0 -- - - - -.. .. -- -
150- va vb vc30 dia-1/3)
150



-150

-300 -21
0 5 10 15 20

Figure 2-8 The real-time simulation results showing the phase
shift and amplitude of the output voltages of the
three-phase boost inverter.




The equivalent circuit in Figure 2-5 is derived in the abc coordinates

that is a time-variant circuit. Although it is effective for the fast simulation,





26


the steady-state analysis, especially the dynamic analysis with the time-vari-

ant equivalent circuit, is tedious and difficult. Therefore, it must be trans-

formed into the ofb coordinates or odq coordinates to remove the time

dependency. Since abc-odq transformation leads to two coupled subcircuits

[21], the resulting equivalent circuit is not convenient for analysis. The pro-

posed time-invariant equivalent circuit in this thesis, however, is derived in

the ofb coordinates, in which two subcircuits are completely decoupled, mak-

ing the analysis much easier [22] and allowing one to write down answers by

inspection.



2.3 ABC-OFB Transformation


The abc-ofb transformation matrix T transforms a time-varying vector

Xabc in the stationary (abc) coordinates into a time-invariant complex vector

ofb in the rotating (ofb) coordinates according to

Xabc = Txfb (2.22)


ofb = T-1xabc (2.23)

where, for a balanced three-phase system with positive phase sequence,


x xcos(ex)
xabc = xb = xcos(6x - 27/3) (2.24)
xc xcos(9x + 2c/3)


where





27


O(t) = to ()dT-Ox4 (2.25)

where o is the instantaneous frequency;


-jOT ejOT
1 e e '


1 -i(OT ) i(OT + )
T = - Te 3 T 3 (2.26)


1( 2% . 2x1


1 1 1

_ 1 eJT J(OT- ) eJT++-
=7 1 e e (2.27)
-JOT eJ(OT 3 ) e_ T 3
e e e

where


OT(t) = OO(T)d'r-4T (2.28)


Note that T1 = (T*)T (the conjugate transpose matrix of T),

-| 0
x
o J3 (x- r)
Xof= = 2 e (2.29)

-2

where xo is the zero-sequence component, xf is the forward (rotating) phasor,

and xbw is the backward (rotating) phasor. Both Ox and OT are the initial





28

phases. Note that Xf and xbw are complex conjugates and constant (dc) under

steady state.



2.4 Equivalent Circuit in the OFB Coordinates


2.4.1 Models of Three-Phase Components in the OFB Coordinates


A three-phase converter consists of resistors, inductors, capacitors,

sources, and switches. Their models in the ofb coordinates are obtained by

applying abc-ofb transformation and retaining Kirchhoff's voltage and current

laws to their connectivity, that is, after transformation, circuit topology is the

same as before. In the following analysis, R is the resistor matrix, L is the

inductor matrix, C is the capacitor matrix, and I is the 3x3 identity matrix:

R = IR L = IL C = IC (2.30)

Voltage sources. For the set of abc voltage sources in Figure 2-10(a),

application of Equations (2.22) - (2.28) yields the set of ofb voltage sources in

Figure 2-10(b). The ofb voltages/currents are found from the abc voltages/cur-

rents by Equation (2.29).

Resistors. For the set of abc resistors shown in Figure 2-10(c),

VRabc = RiRabc (2.31)

application of Equations (2.22) - (2.28) to (2.31) yields

Rofb = RiRofb (2.32)

The ofb resistor set is thus as shown in Figure 2-10(d).

Inductors. For the set of abc inductors in Figure 2-10(e),





29


r - -I r
Ssa iso o i iRa I +Ra-

VRb
Isa V _1 Ib +V-b

SR

i Vbw+ VV b Lbw
i I+v I� Vsbw -IIs Ib +VRcI
Vsbw R
'Sc +C - sbw +f . I'RC +VRc
II I I R I
L J L J L - - J
(a) abc voltage source set (b) ofb voltage source set (c) abc resistor set

r o - -+ Co
Ro +VRLa I+VLa - r -----

I L LO
V iff I I VL
IRf +VRf bI+Lb - I f vLf
0"I-- 0 +L/( -- L -Io
I R I L IL -jIoL
SI VRbw IiLc I+VLc I iLbw I VLbw
Itbw lV l +n -.lI, fy lI+YY_.AAA ~ I
I R I I L I I L jo)L I
L - - J L -- --J L --------J
d) ofb resistor set (e) abc inductor set (f) job inductor set
r "-

iCar--- a 0iCo +vC"



I I
'c iCf + VCf -]
icb I + cb -I I



It. I__ _ _ I_ , -



L - - - -
(h) ofb capacitor set


Figure 2-9 Graphical models of voltage sources, resistors, induc-
tors, and capacitors in the abc coordinates and the ofb
coordinates.





30


diLabc
Labc = L dt (2.33)

application of Equations (2.22) - (2.28) to (2.33) yields

d(TiLofb) diLofb
1 ___Lofb_ _ YLofb dT _
VLofb = L dt -T T + dt t Lofb
(2.34)
SdiLofb ( IdT 2
= L + T- Li
dt dt) Lofb

where


dT 0 0 0
dT-
S dt L = 0-jcoL 0 (2.35)
0 jCL

The ofb inductor set is thus as shown in Figure 2-10(f). The ofb "inductor" is a

real dynamic inductor L in series with an imaginary static resistor +joL.

Capacitors. The circuit models for the capacitors are the duals of those

for the inductors and are shown in Figure 2-10(g) - l(h).

Three-phase single-pole-double-throw (SPDT) switches. The SPDT

switches shown in Figure 2-10(a) are commonly found, for example, in the

buck inverter and boost rectifier [9]. Their low-frequency model in the abc

coordinates is shown in Figure 2-10(b), where one choice for the duty ratios is

D


d = m is 2e K d 1 - d (2.36)
b1 2-+ 2 cos d 3 b2 bI
Ld D dc2 -dc
L J 1 m 2x IK\
+ cos
22 2 3

where





31


Od(t) = co(T))Tdt - d (2.37)

The pole voltages and the throw currents can be expressed as


pa a l
pb = pabc = db1 ts = dabc, 1vts (2.38)
V dc1


pa
its =[d db1 dc1] ipb = Tabc, lipabc (2.39)


where dabcW is the transpose matrix of dabc. Note that the voltage reference

node of the proceeding equations is assumed to be vt..

Application of Equations (2.22) - (2.28) to (2.38) and (2.39) yields

* T
Vpofb = dofb, 1ts its =(dofb, ) pofb (2.40)

where (d*fb, 1)T is the conjugate transpose of dfb, 1;


[ 3D e+i(OdOT) d3D e- d T)DT (2.41)
dofb, 1 = Dem T d (2.41)

The ofb model for the three-phase SPDT switches is, as shown in Figure 2-

10(c). Note that the variables for the transformer in the ofb coordinates are

generally complex. For a complex transformer, such as the one whose turns

ratio is l:dbwl in Figure 2-10(c), the transformation relationships are

Vpbw = dbwlvts its-bw =bw d pbw (2.42)

where d*bwl is the conjugate of dbwl.





32


its
vt+ - 11t 1--
t+ -+ :dal l:dbl l:dc
K papa Vtsa
^ I dai /db1 / d<1 / + . b jQ^
Vts I . Vpb
I 21pb v
SIda2 .. - pc
\ db2 dc lpc Vt-
t_ .
V (a) (b)

its 1:dol 1:df l:dbwl
Vts po p I pf+ pbw
Vts V f Vpbw

Vt-
(c)
Figure 2-10 (a) Three-phase SPDT switches; (b) switch model in
abc coordinates; (c) switch model in ofb coordinates.



Three-phase single-pole-triple-throw (SPTT) switches. The SPTT

switches shown in Figure 2-11(a) are commonly found in, e.g., the boost

inverter and buck rectifier [9]. Their low-frequency model in the abc coordi-

nates is shown in Figure 2-11(b), where one choice for the duty ratios is


1 m 1 m

F 3 3 d 3 3
la2 2a D
lb -1 _ O3 sd 2b - (3 cos(Od- (2.43)

Sl 1 Dm 271 1 m ( 2
-+ Cos Od + ) 1 -Dcos( )
3 3 3ef3 3 3s

The effective duty ratios are





33


2D
d d -d 3 C
a la 2a

vb l~ db d] [- 3)b(4







1ta
c c c 2D
_cos0d� 6+












tb = tabc= ips = dabcips (2.46)
!3 Ldc

The voltage reference node of the proceeding equations is assumed to be the

common node of the three-phase voltages. Application of Equations (2.22) -

(2.28) to (2.45) and (2.46) yields

,T
v = (dfb) Vtofb itofb = dofbips (2.47)

where (d*ofb)T is the conjugate transpose matrix of dofb;


dofb = d0 M e Dm (2.48)


The ofb model for the three-phase SPTT switches is thus as shown in Figure

2-11(c). Before leaving this section, it is worth noting that, unlike the d-q





34


transformation, the ofb transformation results in decoupled zero-sequence,

forward, and backward components subcircuits.



SPTT switch ips da:1 ita
S% 4 +.---
+ ---- --- ' Vta
dia dib di,/ ita db itb
S-- Vta Vps
Vps itb Vtb Vt
itc dc:tc itc
d2a d2b d2 +
- tc

(a) (b)
ips d*:1 to

+Ito
d*f: 1 itf


(c) d*bw: itbw

I1 Vtbw


Figure 2-11 (a) Three-phase SPTT switches; (b) switch model in
the abc coordinates; (c) switch model in the ofb coordi-
nates.



2.4.2 Derivation of Equivalent Circuit in the OFB Coordinates


The equivalent circuit for a balanced three-phase PWM converter can

be constructed graphically in the ofb coordinates just by replacing each set of

three-phase switches by appropriately connected ofb transformers, and each

set of three-phase components by the corresponding ofb component models.

The resulting ofb equivalent circuit is time-invariant, in which the forward





35

component and backward component are totally decoupled. Therefore, the

analysis of three-phase converters with the ofb equivalent circuit is easy.

To construct the ofb equivalent circuit, we need to identify dc and ac

components in the abc coordinates. The ac components are replaced by their

graphical models in the ofb coordinates, and dc components remain in the ofb

equivalent circuit. As a result, the three-phase boost inverter is divided into

five parts, as shown in Figure 2-12. Part one and part two are in the dc side of

the inverter, including the dc voltage source and the inductor. In steady-state

conditions, the inductor current is dc. Therefore, it is not necessary to trans-

form the voltage source and inductor. Parts three, four and five are in the ac

side of the inverter and include time-variant switches, capacitors, and resis-

tors.



SPart 3 Part 4
2 1 I I I I



-I I I
I I R---------------

I I
I T Part 1
S- I I IC -C C
S211f 22 S23 I I
FiIre 1 I=rionn Part 5
L - --J L- - ---- ---J

Figure 2-12 Partitioning the three-phase boost inverter.





36


De:1 if Vf
+I
-I/jnC
Vf C R


Vg +T
De:1 ibw Vbw

JICI+ " 1/jC s
Vbw C R


Figure 2-13 The equivalent circuit of the three-phase boost
inverter in the ofb coordinates.



The ac components are transformed to their ofb models in the ofb equiv-

alent circuit of the inverter. The resulting time-invariant equivalent circuit in

ofb coordinates is shown in Figure 2-13. Since zero-sequence is zero in the bal-

anced three-phase converter, the zero sequence circuit is excluded from Figure

2-13. The transformer turns ratios df and dbw in the ofb circuit are time-

invariant, and they have the same value when Od = T = 0 in Equation (2.48)
D
so that D = Dbw = -, which is represented by De in Figure 2-13:

D
De = D = Db (2.49)



2.5 Graphical Steady-State Analysis


To analyze the three-phase boost inverter in the ofb coordinates under

steady-state condition, replace all the inductors by short circuits and all the





37

capacitors by open circuits in the ofb equivalent circuit shown in Figure 2-13,

the resulting steady-state equivalent circuit is shown in Figure 2-14.


L De:l If Vf
+I
Vf c -1/iJC R


De:1 Ibw Vbw

lVbw C l/jac R


Figure 2-14 The steady-state equivalent circuit of the three-
phase boost inverter in the ofb coordinate.



Reflecting the resistors (real and complex) in the secondary of the

transformer to the primary, the circuit in Figure 2-14 becomes a simple circuit

shown in Figure 2-15. Two conjugate resistors in Figure 2-15 form a voltage



IL +
+R
D Del-joRC
g + 2 R
.D R
-D eV bw el + joRC


Figure 2-15 A simple circuit to solve the steady-state output volt-
age and inductor current.



divider; thus the backward voltage and inductor current can be obtained eas-

ily. The backward phasor is given by





38


Vbw := V (I - j p(2.50)
2De pCO

that is the same as that derived from the equation-oriented method [9]. Sub-

stituting Equations (2.49) into (2.50) and applying Equation (2.29), the phasor

of the output voltage va can be found as

V
Va = -(1 - jsRC) (2.51)
Dm

The inductor current obtained from Figure 2-15 is a dc current, which is

3V
L- g (1 + (RC)) (2.52)
2D R
m

For Dm = 0.9, Vg = 200 V, Q = 2t(100 Hz), R = 10 Ohm, C = 100 gF,

V = 262Z-32 . This predicted output voltage agrees well with that obtained

from real-time simulation, as is evident in Figure 2-8. Note that the reactive

elements appears in the steady-state variables, introducing a right-half-plane

zero. This right-half-plane zero causes some phase shift to the output voltage.

In order to reduce the phase shift,

Q << p (2.53)



2.6 Graphical Small-Signal Analysis


As shown in Figure 2-13, the two transformers in the ofb equivalent cir-

cuit are the same. They can be combined into one transformer with the turns

ratio De, as shown in Figure 2-16. The transformer in the equivalent circuit





39

can be modeled as a voltage-control voltage source and a current-control cur-

rent source, as shown in Figure 2-17(a).


iL De: 1

C � R Vbw

V + l/j

-I/jC +
Vf



Figure 2-16 The equivalent circuit of the three-phase boost
inverter in the ofb coordinates.



Vpade
i ip, I De:l p
c del: P c - -- lp
+ I | + + I* *l +

T DT
Vca v icde Vpa ca e pa



(a) (b) a
Figure 2-17 (a) The large-signal model of the dc transformer; (b)
its small-signal model.



Application of small-signal perturbation to the capacitor voltage vpa,

the inductor current ic, and the control variable de in the circuit yields

de = D, + , ic = Ic + i , vpa = Vpa + pa (2.54)





40

where the caret implies small-signal perturbations. Neglect of the steady-

state and second-order terms then leads to a small-signal equivalent circuit of

the transformer, as shown in Figure 2-17(b). It consists of a dc transformer

and two dependent sources that are controlled by the duty ratio. De, Ic, and

Vpa in the capital letter are dc values derived from the steady-state analysis of

the inverter. Replacing the transformer in Figure 2-16 by its small-signal cir-

cuit in Figure 2-17 yields the small-signal equivalent circuit of the inverter, as

shown in Figure 2-18, where every variable is replaced by its small-signal

value with the head "A"


De:

+ C R
S V e Vbw -


e
+
VfC - R



Figure 2-18 The small-signal equivalent circuit of the three-
phase boost inverter.


Let ig = 0, the real part of control-to-output transfer function of the

inverter can be solved from the small-signal circuit in Figure 2-18, which

is given by

( s s
S V = (2.55)
de 2D2 D(s)
d, 2De





41

the imaginary part is given by


Di Vg O) (2.56)
^e 2D2COp D(s)

where

D e lf2I 2LCR L LC 2 LC2R 3
D(s) =1+ RC+ 2 + - +-s + 2 -s (2.57)
2 2De
2D 2D2 R D 2s D


2D2 R 1
1+ 2 z1 = 1 + m (2.58)
1+ C\pOP
P)


P = (2.59)
C RC

If the design allows

<< 1 (2.60)


where the LC corner is located at

D
0oo = J2- D (2.61)


it suffices to approximate the poles by
S 1+s 1 S_2)
D(s) l + - - f1 + - (2.62)
COPA Q coo 00

where

2D2R
Q = (2.63)
moL





42

From Equation (2.62), the poles of the three-phase boost inverter consist of a

real pole and complex poles. Like the dc boost converter, the bandwidth is

affected by the duty ratio De.

The control-to-output transfer function of the inverter can be found

from Equations (2.55) and (2.56), which is given by


Vm V9 (O ( z OZ
G(s) =2 -o -- 1 + (2.64)
^le 2D2 D D(s)

Letting de = 0, the input-to-backward phasor transfer function of the inverter

can be found in the circuit in Figure 2-18, which is given by


Vbw P+1 oP J__ Q
b - p (2.65)
D9 2De D(s)

The audiosusceptibility, that is, the input-to-output transfer function, is

solved from Equation (2.65)


H(s) - Vm - 2 + 2l
H(s) = om 1 +) (2.66)
9 2De p D(s)

The transfer functions graphically derived from the small-signal equivalent

circuit in Figure 2-18 completely agree with those derived by the equation-ori-

ented method [9]. However, the graphical derivation is much simpler than the

manipulation of state-space equations.

In conclusion, among existing modeling techniques, the switching-func-

tion averaging is the easiest technique to model three-phase converters. The

equivalent circuit of the converter in the abc coordinates constructed from the





43


SFA state-space equations expedites the simulation. The equivalent circuit of

the three-phase converters in the ofb coordinates is constructed graphically by

replacing sets of three-phase components with appropriately connected ofb

components. With the help of the ofb equivalent circuit, the steady-state and

small-signal analyses of the three-phase converters can be worked out graphi-

cally, which is proven to be easier than the equation-oriented method.













CHAPTER 3
REVIEW OF PULSEWIDTH MODULATION



This chapter reviews the existing pulsewidth modulation (PWM) tech-

niques for both dc converters and three-phase converters, in which large-sig-

nal linearization is emphasized. Two popular PWM methods for three-phase

converters, continuous sinusoidal PWM (SPWM) and space-vector modulation

(SVM), are discussed in detail.



3.1 Pulsewidth Modulation for DC Converters


The conventional PWM with a constant-slope carrier is the most popu-

lar in dc or single-phase converters, but it gives rise to undesirable nonlinear

relationship between the output and control voltage in some topologies. Some

linearizing PWM techniques (LPWM) have been proposed for linearization of

dc or single-phase converters [10, 23-34]. In these PWM techniques, the slope

of the carrier signal is not constant. Thus, the duty ratio generated from the

LPWM is a nonlinear function of the input and control voltages that may can-

cel out the nonlinear control-to-output relationship of the converter and make

the output voltage to track the control signal linearly.







44





45


3.1.1 One-Cycle Control


The one-cycle control [10, 23-28] has been widely used in various dc or

single-phase PWM converters. When the one-cycle control was proposed in ref

10, the aim was to make the output voltage of the dc buck converter and Cuk

converter follow the control voltage tightly without being disturbed by input

voltage. It was subsequently proven that this control method can be easily

used in other topologies, controls, and applications [23] - [28]. For instance, it

can make the input current track the sinusoidal input voltage, allowing unit

power factor to be obtained [25]. The basic concept of the one-cycle control is to

force the average of the switched-variable, such as the diode voltage in the

buck converter, to be proportional to the control variable in each switching

cycle. Therefore, a one-cycle controller can make the output voltage propor-

tional to the control voltage, that is, transform a switching power converter

into a linear power amplifier in a large-signal sense. The one-cycle controller

developed in ref 24 is a generalized circuit that can be used by any dc or sin-

gle-phase PWM converter. In addition to the large-signal linearization of

PWM converters, the one-cycle controller has some advantages over the con-

ventional PWM techniques, such as the switching loss compensation, good line

voltage regulation, and stable and simple control circuits.



3.1.2 Feed-Forward Pulsewidth Modulation


The feed-forward control is mostly used in the linear buck converter or

buck-derived converters to reduce source disturbance on the output voltage,





46


where the slope of the ramp signal in the modulator varies with the input volt-

age. Its application in the nonlinear PWM converters is published in ref 12, in

which good line voltage regulation is obtained for linear and nonlinear con-

verters. However, the control-to-output gain is zero for the boost converter and

nonlinear for "quadratic" converters [11].

The feed-forward control is adapted to a pulsewidth modulation [11]; it

is called feed-forward PWM (FF-PWM). With the FF-PWM, any linear or non-

linear PWM converter can be linearized. The steady-state control-to-output

relationship of the converter becomes linear regardless of operating condi-

tions. The FF-PWM not only implements large-signal linearization of PWM

converters, but also reduces the source disturbance on the output voltage of

the converter. The FF-PWM has no stability problems and no effects on con-

verter output impedance. If tight output voltage regulation is required, a

small-signal voltage feedback can be used with less difficulty and with

improved response compared with the conventional PWM modulation.

Although the technique in ref [11] does not provide a general modulator cir-

cuit as the one-cycle controller, it provides us with a general way to synthesize

the large-signal linearizing PWM circuit.



3.1.3 Peak-Current Mode Control


The peak-current mode control is widely used in dc or single-phase con-

verters [35-37], in which the peak inductor current always equals the refer-

ence current, regardless of all other operating conditions. This control method





47


may be considered as a large-signal linearizing PWM in terms of linearization

of the inductor current, such as the input current of the ac-dc converter. The

output voltage, however, is still controlled by a nonlinear control-to-output

relationship. Therefore, this control method needs an extra voltage feedback

loop to linearize the output voltage and keep it stable. The current mode con-

trol has inherent advantages, such as fast dynamic response, automatic cur-

rent protection, and so forth.

It is important to note that the carrier signals used in the above PWM

methods are not constant, but they vary with the control signal from one

switching cycle to another. They are herein called the PWM with a varying-

slope carrier. The duty ratio generated from them is a nonlinear function of

the control signal. This is different from the conventional PWM with a con-

stant slope carrier. It is also worth noting that the slope of the carrier signal of

PWM with varying-slope carrier is constant, that is, a straight line even

though the slope rate changes from one switching cycle to another. The carrier

used in refs 31 - 33, however, is nonlinear, which could be the exponential

function.

The LPWM modulators previously discussed are general PWM methods

suitable for all dc or single-phase PWM converter topologies, including linear

and nonlinear converters. The LPWM circuits can be implemented by simple

analog circuits, usually integrators and comparators. Although the PWM

methods [38-41] are also able to implement large-signal linearization of the





48


PWM converters, they involve more sophisticated analog circuits, such as mul-

tipliers/dividers.



3.2 Pulsewidth Modulation for Three-Phase Converters


Three-phase PWM converters are employed in many areas of today's

power industries, including active filtering [2], UPS [3], VAR compensation

[4], power generation [5], motor drives [6, 7]. Compared with dc PWM convert-

ers, three-phase converters face more requirements, such as harmonics, bal-

ance/unbalance systems, and so forth. Moreover, they need more sophisticated

control and drive circuits. Undoubtedly, linearization in PWM modulation will

bring benefits, such as easier control, lower harmonic distortion, and source-

disturbance rejection, to the three-phase PWM converters and help achieving

the stringent application requirements.

Many PWM schemes for three-phase PWM converters have been pub-

lished and applied in various power applications [42-58]. They can be classi-

fied into seven categories: sinusoidal, space-vector modulation, selective-

harmonic-elimination, optimal, current control, direct amplitude control,

and sigma-delta modulation.



3.2.1 Sinusoidal PWM


Sinusoidal PWM technique (SPWM) [42] is based on the principle of

comparing a triangular carrier signal with a sinusoidal reference. The imple-

mentation of the technique with analog circuits is simple and can produce





49


very good sinusoidal waveforms. In recent years, much effort has been made

toward digitization of the SPWM [43-46]. Online computation of instants of

intersection of the triangular carrier and sinusoidal reference waveforms is

not possible because no closed-form solution is available for intersection

instants. Therefore, the reference sinusoidal waveforms have been replaced by

trapezoidal [43], stepped [44], or triangular waveforms [45]. The carrier-based

SPWM technique has disadvantages, such as attenuation of the fundamental

component and large switching losses. Most of all, the slope of the high-fre-

quency carrier in the PWM is constant and the duty ratios are linear functions

of the reference signals. Therefore, the SPWM is unable to implement linear-

ization of nonlinear PWM converters.



3.2.2 Space-Vector Modulation


Space-vector modulation [49] (SVM) can utilize most of the power

source and reduce switching losses, which makes it the most popular PWM

technique in three-phase converters. The SVM technique generates PWM sig-

nals by averaging the three switching-state vectors to equal the reference vec-

tor over each switching cycle. Since the SVM involves a significant amount of

computation to determine the commutation instants of the switches, it is usu-

ally implemented by digital signal processor (DSP) or microprocessor [50]. The

clock speed of the DSP or microprocessors, however, could impede the progress

of PWM toward higher frequency. Analog implementation is an alternative to

DSP for high-speed SVM. As with sinusoidal pulsewidth modulation, the SVM





50


can be implemented by comparing a six-step control signal, generated from

the reference voltage, with a constant-slope carrier signal [1]. Such implemen-

tation, however, gives rise to nonlinear relationships between the control and

output voltages, preventing the output voltages from tracking the control sig-

nals.



3.2.3 Optimal PWM


The optimal PWM technique [51] produces the switching pattern based

on optimization of some performance criteria. The number and positions of the

pulses or notches within each switching cycle are selected according to these

criteria, which could be harmonic loss, torque pulsation, or load currents.

They are precalculated and stored in memory for use in real time. Thus, com-

putation power from a microprocessor is needed to synthesize the correct

switching patterns.



3.2.4 Current-Controlled PWM


The current-controlled PWM technique [52] is intended to make the

output current track the reference current. In this technique, the output cur-

rents with superimposing ripples are fed back and compared with hysteresis

levels placed around the reference signal to determine the switching fre-

quency. As the ripple is regulated within the hysteresis band, the average out-

put follows the average reference. Three independent controllers are needed to

control three phase legs separately in this scheme; each controller has its own





51


switching frequency related to its output. Although it has good dynamic per-

formance, this technique suffers from low-frequency harmonics and high

switching losses.



3.2.5 Selective-Harmonic-Elimination PWM


The selective-harmonic-elimination PWM technique [53] formulates a

waveform that is chopped M times and possesses odd quarter-wave symmetry,

and contains the information about where the pulse starts or ends. Therefore,

any M harmonics can be nullified by solution of the corresponding M simulta-

neous transcendental equations, which need extensive numerical calculation.

This technique is intended to attack the harmonics by suppressing an arbi-

trary number of them in the output spectrum.



3.2.6 Sigma-Delta Modulation


Sigma-delta modulation [54-57] consists of a hysteresis comparator and

an integrator. The integrator estimates the reference voltage from the modu-

lated PWM signal by low pass filter averaging. The estimated voltage is com-

pared with the actual reference voltage through a hysteresis comparator to

generate the error signal, which is quantized to form the PWM signal. There-

fore, the output voltage, which is equivalent to the average of the modulated

PWM signals, is able to follow the reference voltage within the hysteresis

band. Sigma-delta modulation suffers from the problem of variable frequency

and filter stability problems at high frequencies [56]. Although attempts have





52


been made to solve the variable frequency problem, they increase the complex-

ity of the control circuit.



3.2.7 Direct Amplitude Control


The direct amplitude control [58] can make fundamental amplitude of

the output voltage directly follow the reference voltage. Using Fourier analy-

sis, the algorithm is to equalize the subamplitude of the output voltage with

the subamplitude of the reference voltage for a complete fundamental cycle.

This technique involves a significant computation; thus, it usually is imple-

mented by DSP or microprocessor.

Among the above PWM techniques, the SPWM and SVM are the most

popular in various three-phase converters. However, due to the constant-slope

carrier, both PWM methods can produce a nonlinear relationship between the

control and output voltages. This results in the output voltage failing to track

the reference voltage linearly. Nevertheless, it can be shown that both SPWM

and SVM can be developed into the linearizing PWM (LPWM) through the

proposed large-signal linearization technique in this thesis. In the following

sections, the conventional SPWM and SVM are discussed and synthesized, so

that the proposed linearizing PWM can be better appreciated.

A three-phase boost inverter, shown in Figure 3-1, is used as an exam-

ple to demonstrate how to synthesize the conventional SPWM and SVM.

The state-space equations of the inverter were given by Equations (2.15) -

(2.18) in Chapter 2 and repeated here:





53



L r - - - - - - - SPTT switch

S12 S-3 R R R
Sll S12 S13
via -Va
+ -ib
Vg Vb
le - Vc
vc


S21 S22 / S23
--- -- --- TL
/- - - - SPTT switch

Figure 3-1 A three-phase boost inverter.




diL
dt (3.1)- -
L- = Vg - (d= - d2)va - (dl2 - d22)vb - (d13 - d23)vc (3.1)

dv, 2va - vb - vc
C-d = (d, - d21 )iL- 3R (3.2)


dvb 2vb - Va - vc
C = (d12 - d22)iL - (3.3)
dt 3R

dv, 2vc - va - vb
C--- = (d13 - d23)iL - 3 (3.4)
dt3R

In the above equations, Va, vb and vc are balanced three-phase voltages. Their

frequency and amplitude are known from the specifications:

va = Vmsin(o)t) Vb = Vmsin(O)t-1200) vc = Vmsin(oct+ 1200) (3.5)

Duty ratios in the state-space equations dll - d23 are unknown, which will be

synthesized from Equations (3.1) - (3.4).

For a balanced three-phase system, Equation (3.2) can be expressed as





54


dv Va
C- = (dll-d2l)iL - (3.6)

Multiplying va on both sides yields


dv v
VaC- = (dll -d2l)iLVa (3.7)

The same procedure is applied to Equations (3.3) and (3.4) yields

dvb Vb
VbC-- = (dl2-d Lvb-- (3.8)


dv v
VcC - = (dl3-d23)iLvc - (3.9)

Under steady state, the inductor current is assumed as dc; thus, diL/dt

in Equation (3.1) is zero. Substituting Equations (3.7) - (3.9) into (3.1) yields

V2
VgIL = 3 (3.10)


V2
IL = 3 (3.11)
2RVg

It is obvious that Equation (3.10) is the conservation of power. The input

inductor current is dc, the value is determined by Equation (3.11). Once IL is

obtained, duty ratios in Equations (3.7) - (3.9) can be solved from

dva va
C +-
dt R
(dl -d2) = j= da (3.12)
IL

dvb Vb
dt R
(d12 -d22) = = db (3.13)





55


dvc vc
C- +
dt R
(d13 - d23) - dc (3.14)

According to Equations (3.12) - (3.14), one can find that the effective duty

ratios da, db and dc are sinusoidal. Since the number of unknowns dll -d23 in

Equations (3.12) - (3.14) are more than the number of equations, we have

more freedom to decide duty ratios, leading to many PWM techniques. A dif-

ferent modulation technique gives a different solution.



3.3 Synthesis of Continuous Sinusoidal Pulsewidth Modulation


In the continuous sinusoidal PWM (SPWM), the duty ratios dll - d23

are continuous sinusoidal functions. In general, the duty ratio of each switch

consists of a dc offset and a sinusoidal modulation. For a balanced three-phase

converter, duty ratios d1l - d23 could be


1 m.
+ -sin(cot)
d 3 3

312 = 3+ sin ) (3.15)
d1 D+sin Cot+


21 D



S22_1 sin -3 (3.16)

L 23i 1 D-M si 27c
1 3 3 +
1 m.m 2x


d 3





56

where

Dm 1 (3.17)

The dc offset in Equations (3.15) and (3.16) is to keep the duty ratios positive.

Equation (3.15) represents the sinusoidal modulation function for the top (sin-

gle-pole-triple-throw) SPTT switches shown in Figure 3-1. Equation (3.16)

represents the sinusoidal modulation function for the bottom SPTT switches

shown in Figure 3-1. The amplitudes of the sinusoidal modulation function for

the same switch group must be the same to constitute balanced three-phase

sinusoids. The amplitudes and phases of sinusoidal modulation function for

different switch groups could be different, as long as two switch groups are

topologically independent. Note that the duty ratios in Equation (3.16) have

the same amplitude and oppose phase from the duty ratios in Equation (3.15)

that results in the optimal effective duty ratios:

2D
sm(Gt)
Sda d 1 -22 D s
12 22 3 s(t - (3.18)

c dl13 23 2D
-Lsinsm t +2


that is related only to the continuous sinusoidal modulation techniques.

The amplitude Dm and the phase of duty ratio da in Equation (3.18) can

be obtained from Equation (3.12), which is given by


I = 3 Vm 1 + (RC) (3.19)
m 2 RIL





57


Zd, = tan- (wRC) (3.20)

where IL is determined by Equation (3.11).

Combining Equations (3.11) and (3.19), one can find the amplitude of the out-

put voltage is


V - = + (cRC)2 (3.21)
D



3.4 Synthesis of Space-Vector Modulation


The balanced three-phase voltages va, vb, and vc are shown in Figure 3-

2. In space-vector modulation (SVM), the phase voltages are divided into six

segments, and each segment occupies 600. In each segment, one SPTT switch

in Figure 3-1 is permanently attached to one of the three capacitors as the

other sweeps through all three. The position of the stationary switch, as well

as the sweeping ones, are determined by six-step sequence.

In the first segment, 00-600, vb < va and vb < vc. Let d22 = 1, and d21 =

d23 = 0, i. e., S22 is on, S21 and S23 are off all the time during this segment.

The switches, Sil, S12, and S13, are switched at high switching frequency. The

corresponding duty ratios, dll, d13, and d12, are determined by Equations

(3.12) - (3.14), respectively. Taking advantage of d22 = 1 and d21 = d23 = 0, then

Equations (3.12) - (3.14) become

dva v
C +- da (3.22)
dt R
d,, = d, (3.22)





58





Va Vb Vc

I \ Iv / v\ vI



0 60 120� 1800 2400 3000 3600


Figure 3-2 The balanced three-phase voltages.




dvb Vb
dt R
(d12-1) = t =db (3.23)
IL

dv v
C +-
dt R
d13 R d (3.24)


From Equations (3.22) and (3.24), it can be found that d1l and d13 are sinuso-

ids, and d12 is the sinusoid with the dc offset. In summary, during 00 - 600, the

duty ratios for the switches are

dll = Dmsin(ot) (3.25)


d13 = Dmsin (t+ (3.26)


d12 = 1+ Dmsin(o t ) (3.27)


d21 = d23 = 0 d22 = 1 (3.28)





59

where the amplitude Dm and the phase of the duty ratio d1l can be obtained

from Equation (3.22) as the following:


VmJl + (oRC)2
Id111 = Dm = 1 + (3.29)


Zda = tg (owRC) (3.30)

The effective duty ratios are

- D sin(cot)
da d 11 d 22 D iot
9m
db = d12-d22 D= si t-j3 (3.31)

Sd 13 -23 D sin cot + 2)


Combination of Equations (3.11) and (3.29) yields

Vm = Z 1 + (o RC)2 (3.32)

In fact, the three-phase boost inverter works like a dc boost converter.

When S12 is on, the inductor gets energy from the source. When either S11 or

S13 is on, the inductor transfers the energy to the load. Since only one SPTT is

switched at high frequency and the other is switched at low frequency, the

SVM has less switching loss than continuous SPWM.

The duty ratios dll - d23 for the six segments are listed in Table 3.1, and

their waveforms over one period are shown in Figure 3-3. It is obvious that the

duty ratio functions in the SVM are piecewise sinusoidal and have six-step

symmetry.





60






I ,
d12


1] ^TA--------
d13
o I I



I d22
SI d23
0 1

00 600 1200 1800 2400 3000 3600

Figure 3-3 Duty ratios for space-vector modulation.















Table 3.1 Duty ratios for the three-phase boost Inverter with the SVM.



STEP dl1 dl2 d13 d21 d22 d23

1 Dsin(ot) l + Dsin(ot - 2) D sinOt + 2f 0 1 0
m m 3 m 3

2 1 0 0 l-Dsin(wt) -Dmfsin (ot_2) -Dmsin(ot +)


3 Dmsin((ot) Dmsin(ot-) 1 +Dmsin ft+ ) 0 0


0 1 0 -D sin(0t) 1 - D sin (Ot- -Dmsin ct+


5 1+ Dmsint(Of) Dmsinot - Dsin ot+ 0 0

6 1 0 0 -Dsin(ot) -Dmsin(ot)2 1 -Dsin (ot+)2













CHAPTER 4
HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR



This chapter investigates the feasibility of large-signal linearization of

three-phase PWM converters by analog linearizing pulsewidth modulator

(LPWM). The study shows that three-phase PWM converters have nonlinear

relationships between the control and output voltages when they are con-

trolled by the conventional analog SPWM or SVM modulators. Some sophisti-

cated analog circuits may employ analog multipliers/dividers to compute the

switching instants for three-phase converters to implement linearization.

However, the complexity of the resulting circuitry makes them impractical.

The first-order linearizing PWM circuit uses integrators to compute commuta-

tion instants to linearize control-to-output relationship in dc or single-phase

converters. They can also be used to control three-phase converters, but, as

indicated in this chapter, the inputs to the integrators are nonlinear function

of control voltages, resulting in use of analog multipliers/dividers.

A high-order linearizing PWM modulator is developed in this chapter.

It is able to make output voltages of three-phase PWM converters track con-

trol signals linearly even in the nonlinear topologies. Instead of multipliers/

dividers, the high-order linearizing PWM uses only integrators with the reset,

and sample/hold to compute the switching instants for the switches. The



62





63


inputs to the integrators are just linear functions of the control and state vari-

ables.

In the first section of this chapter, the first-order LPWM is reviewed,

which is helpful to understand the concept of large-signal linearization and

analog implementation of the LPWM. The nonlinear problem, caused by the

conventional PWM modulator in three-phase PWM converters, is identified in

the second section. A general way to linearize PWM converters is discussed in

the third section. Implementation of the LPWM modulator by first-order

LPWM circuits for a three-phase inverter is given in the fourth section. The

fifth section presents the high-order LPWM that linearizes three-phase con-

verters with simple analog circuits. The techniques to synthesize a high-order

LPWM and eliminate multipliers/dividers in the LPWM circuit of three-phase

converters is discussed. An analog implementation of the high-order LPWM

for a three-phase converter is derived and simulated.



4.1 First-Order Linearizing Pulsewidth Modulator


The carrier signal in the conventional PWM modulator has the fixed

frequency and constant slope. The duty ratio of switching signals generated by

the conventional PWM is directly proportional to the control signal. The car-

rier signal in the linearizing PWM (LPWM) has the fixed frequency, but vary-

ing slope. The duty ratio generated from the LPWM is a nonlinear function of

the control signal and input voltage.





64




switch Vm(t)

u(t) v(t)

+ K
- vM(t)
rese v(t) (t)T

clock IIL T
(a) (b)


Figure 4-1 (a) A first-order linearizing PWM; (b) its operation
waveform.




The first-order LPWM modulator usually consists of a resetable inte-

grator and a comparator, as shown in Figure 4-1(a). Its operation waveform is

illustrated in Figure 4-1(b). When the clock signal comes, the output signal vp

of the comparator becomes high, turning on the switch in the converter. At the

same time, the integrator starts to integrate the input signal u(t). When the

integrator output reaches comparator input v(t), the output pulse drops to low

and turns the switch off, as shown in Figure 4-1(b).

It is supposed that the clock is sufficiently fast so that the function u(t)

and v(t) can be assumed as constant over each switching cycle. Therefore, the

amplitude of the ramp generated by the integrator is

rT
v 1 = u(t)dt = u(t) (4.1)
so

The slope of the carrier ramp varies with u(t), which is





65


Slope (t) (4.2)
T
s

The average value of u(t) over one switching cycle is given by

d(t)T,
f u(t)dt = u(t)d(t) (4.3)
so
0

which equals the comparator input v(t):

u(t)d(t) = v(t) (4.4)

In most of de converters, the relationship between the output voltage

and the duty ratio can be expressed in the form of Equation (4.4). For example,

the average output voltage Vo of a dc-dc boost converter is the function of duty

ratio and the input voltage:

V
V= (4.5)
1-D

Transformed into the form of Equation (4.4), then (4.5) becomes

VoD = Vo - V, (4.6)

If the boost converter is controlled by the first-order LPWM shown in Figure

4-1(a), and let v(t) = Vc - Vg and u(t) = Vc, the duty ratio can be given as

V - V
D = c- g (4.7)
Vc

Substitution of Equation (4.7) to (4.5) yields

Vo = Vc (4.8)

Note that the average output voltage Vo of a nonlinear boost converter can

track the control voltage linearly, as indicated in Equation (4.8).





66


Some dc converters have quadratic duty ratios in the control-to-output

relationship [11] [24]. They can still be linearized by the LPWM, as shown in

Figure 4-1, but adding one more integrator and gain block to it. This is

because

SDT, T
uD2 = u on)2 2 J- 1 u(c)dt dt (4.9)
(so 0 Ts0 r



4.2 Nonlinear Problem in Three-Phase Converters


The nonlinear relationship between the output and control voltages

exists in most three-phase PWM converters that are controlled by conven-

tional PWM modulations, such as sinusoidal PWM (SPWM) and space-vector

modulation (SVM). The high-frequency carrier signal in the conventional

SPWM and SVM has a constant slope. The duty ratios of switching signals

generated by these PWMs are proportional to the control voltages, which are

not able to cancel the nonlinear duty-ratio-to-output relationship of the con-

verters. As a result, output voltages are not able to track the control signals

linearly. In the balanced three-phase converters, the output waveform is sinu-

soidal, not affected by this nonlinear control-to-output relationship. The

amplitude, however, is affected by the nonlinear control-to-output relation-

ship.

As an example, a balanced three-phase boost inverter, as shown in Fig-

ure 4-2, is used to demonstrate the nonlinear problem in three-phase convert-

ers. It is controlled by the conventional SPWM. The input voltage Vg is dc, the





67

three-phase output voltages va, vb, and vc are purely sinusoidal. The control

voltages Vcntla and Vcntl-b into the SPWM are sinusoidal waveforms with the

amplitude Dn:

1 D
Vcntla = - + sin(t) (4.10)


1 Dm
Vcntl-b = + 3 sin(ot- 1200) (4.11)

The de offset in the control voltages is needed to guarantee the duty ratio pos-

itive.

The control voltages are compared with the constant-slope carrier in

the SPWM. The duty ratios of the resulting PWM signals are proportional to




5 mH
S11/ S12/ 13, :10 10 110
va Ohm Ohm Ohm
Vg 200V -b -


S21 SI S22 $2 S23


St S1t4 S13T S21 S2 3 Dm

/ SPWM Modulator Vcntl-a
/ v --- Vcntl-b
Vtri ____

Figure 4-2 The three-phase boost inverter controlled by the
conventional SPWM modulator.





68


the control voltages in Equations (4.10) and (4.11). According to the theory of

the balanced three-phase inverter in Chapter 2 and the SPWM in Chapter 3,

the output voltages remain balanced sinusoidal waveforms, but their ampli-

tude becomes inversely proportional to the amplitude of the control voltage:

V
V =- 1 +(oRC)2 (4.12)
DM
m

Therefore, the output voltages are not able to track the control voltage linearly

in the boost converter. This nonlinear relationship is verified by the simula-

tion results. The amplitudes of the output voltages for different control volt-

ages for shown in Figure 4-3.



V
1200 [m


1000 Q = 27(60Hz)
R = 10 Ohm
C = 100 gF
800 - V= 200 V


600


400


200%2 04 Dm 0.6 0'8 1.0

Figure 4-3 The amplitude of the output voltages versus the
amplitude of control voltages for the ideal case.





69

4.3 Large-Signal Linearization of PWM Converters


A typical PWM converter controlled by the LPWM is shown in Figure

4-4. The PWM converter could have single or multiple input/output variables.

The variables at the input/output side could be dc or ac. For example, in

three-phase inverters, the input is dc voltage and the output are three-phase

voltages, in which the output voltages are controlled variables. In three-phase

rectifiers, the inputs are three-phase voltages and the output is dc voltage,

where both output dc voltage and the input currents are controlled variables.

In order to simplify the explanation of large-signal linearization technique

presented in this thesis, we consider only the output voltage vo as the con-

trolled variable. The objective is to make the output voltage vo track the con-

trol voltage vc linearly through the LPWM.




vg(ac, dc) - S E v(ac, dc)
- POWER STAGE
ig (ac, dc) _ : io (ac, dc)

....... d(ac, dc)

: HIGH-ORDER vc (ac, dc)
L ,LPWM
LPWCl ic (ac, dc)
Clock

Figure 4-4 The converter controlled by the high-order LPWM.





70


In PWM converters, the output voltage, vo, is controlled by duty ratio d:

vo = f(d, vg) (4.13)

which is the nonlinear function of the duty ratio in most of PWM converters.

When it is controlled by the conventional PWM, the duty ratio is proportional

to the control voltage.

d = vc (4.14)

The resulting output voltage will be the nonlinear function of the control volt-

age:

o = f(Vc, Vg) (4.15)

However, the large-signal LPWM in Figure 4-4 is synthesized by (4.13).

It is able to solve (4.13) and find duty ratio as the function of the output volt-

age and input voltage:

d = f(vo,, g) (4.16)

The output voltage thus equals the control voltage:

vo = vc (4.17)

According to (4.17), the output voltage of the nonlinear PWM converter con-

trolled by the LPWM is able to track the control voltage linearly. The nonlin-

ear control-to-output relationship is completely eliminated without using any

feedback loop.

In general, the task of the LPWM controller is to obtain the duty ratio

by solving modulation Equation (4.16), which could be done either by digital

signal processors (DSP) or by analog circuits. Even though only analog imple-





71


mentation of the LPWM is discussed in this thesis, it is intended to parallel

the recent advances in analog first-order LPWM techniques for dc or sin-

gle-phase converters [11, 24].

Analog implementation of the LPWM could be done by the conventional

PWM and nonlinear modulation function in Equation (4.16). To synthesize the

control voltage given by Equation (4.16), multipliers/dividers or other sophis-

ticated circuits must be used. As a result, the complexity of the resulting cir-

cuitry makes them impractical.

To avoid complicated circuits such as multipliers/dividers, the integra-

tor (with reset) are used by the first-order LPWM to solve modulation Equa-

tion (4.16) in dc or single-phase converters [11, 24], as shown in Section 4.1 of

this chapter. The first-order LPWMs can be used for some three-phase con-

verters, as long as the modulation equation does not have nonlinear terms of

control signals [59, 60].

For most three-phase converters, a modulation equation (4.16) usually

contains some nonlinear terms of control signals. The synthesis of the LPWM

with first-order modulators, therefore, will involve multipliers/dividers. The

high-order LPWM technique developed in this thesis is able to eliminate the

nonlinear terms of control voltages in the modulation equation (4.16). The

resulting circuitry, called high-order LPWM, contains integrators with reset

and hold, and also comparators. The inputs to integrators are just linear func-

tions of control voltages. Therefore, the high-high LPWM is simple and easy to

use.





72


In the following sections, a general procedure is presented to use

first-order LPWM circuits to synthesize the LPWM for three-phase converters.

Although it may end up with using multipliers/dividers in the LPWM circuit,

the synthesis procedure is still helpful to understand the linearization of

three-phase converters and use first-order LPWM modulators in three-phase

converters.



4.4 Linearization by First-Order LPWM


The first step to linearize three-phase converters by first-order LPWM

circuits is to find the SFA equations of the converter. The derivation of the

SFA equations of a PWM converter is discussed in Chapter 2. For a PWM con-

verter with M independent switches, the duty ratios of the switching signals

for these M switches are defined as:

dT = [dl, d2 ..., dM] (4.18)

After solving SFA equations of the converter, each variable in Equation (4.18)

can be expressed as a function of the output voltage vo and input voltage vg:

Pi(vg,vr)
d = -) (4.19)
Ql(vg, Vr)


dM = ( Vr) (4.20)
QMg(vg, r)

where the output voltage vo is replaced by the reference voltage vr For exam-

ple, the duty ratios of the three-phase boost inverter shown in Figure 3-1 of

Chapter 3, dll - d13, are functions of input voltage Vg and output voltages





73

determined by Equations (3.16), (3.19), and (3.20) in Chapter 3. When con-

trolled by the duty ratios shown in Equations (4.19) - (4.20), the output volt-

age should equal to the reference voltage. It is worth noting that the duty

ratios expressed by Equations (4.19) - (4.20) are only dependent on the refer-

ence voltage and input voltage, and they are not coupled with each other.

Therefore, they can be synthesized individually by M first-order LPMW cir-

cuits.

To synthesize the duty ratios using the first-order LPWM circuits,

transform (4.23) - (4.24) into the following forms:

Ql(vin, Vr)di = PI(vin, Vr) (4.21)

QM(vin, vr)dM = PM(vin, Vr) (4.22)

Assume that the duty ratios d1 - dM are uniquely determined by the

input voltage and the reference voltages of the converter in each of the above

equations. Additionally, it is assumed that the switching frequency is suffi-

ciently high, and the input voltage and the reference voltage vary slowly, so

that the input voltages and the reference voltages can be treated as constant

during each switching cycle. This is true because the sinusoidal signal, which

is needed to be synthesized in most power applications, is usually 60 Hz, but

the switching frequency could be as high as several KHz to several hundred

KHz. Various losses in the converter are neglected to simplify the analysis.

These losses can be compensated by the feedback circuit in practice. With the

above assumptions, (4.21) - (4.22) may be transformed into the integration

forms:





74


TdI
1- Qi(V, v,)dt = P,(vg, Vr) (4.23)
S 0
so

T,dM

Sf QM(V,, vr)dt = PM(Vg, Vr) (4.24)
so
0

Each of these integration equations can be implemented by a first-order

LPWM circuit with a resetable integrator and one comparator, as shown in

Figure 4-5. The operation waveform can be referred to Figure 4-1(b).






n ' I

R v


Rese P

ClockLLL.
Figure 4-5 The first-order LPWM circuit to synthesize one
of the duty ratios.





When the clock signal is coming, the Q function is integrated, and the

output of the integrator is compared with the P function. During this time, the

PWM signal vp is high, turning on the switch in the converter. When the out-

put of the integrator ramps up to the P function, the PWM signal vp becomes

low, turning off the switch. The resulting duty ratio of PWM signal Vp is





75


P(V g, Vr)
d= (Vg V (4.25)
S Q(v, Vr)

The P function and Q function in the LPWM circuit are functions of the

input and reference voltages, which can be synthesized from the input and ref-

erence voltages by operational circuits, such as adders/subtractors, and multi-

pliers/dividers, as shown in Figure 4-6.

As an example, consider the large-signal linearization of a three-phase

boost inverter, as shown in Figure 4-7. This converter consists of six switches




-I Multiplier
Vg Divider
Adder
Subtractor Q

Vr

Figure 4-6 P function and Q function generator.





(two single-pole-triple-throw switches), but only four of these switches are

independent. This is because

d1 +dl2+dl3 = 1 (4.26)

d21 + d22 + d23 = 1 (4.27)

The sinusoidal PWM (SPWM) technique discussed in Chapter 3 is

applied in the inverter. One of choices of duty ratios is





76


D
1 m
S- -+ -sin(cot)
d 3D 3
3IDm 2r (4.28)
12 3+ sin(cot (428)
11 D



Dm
d 33
21 Dm
d2 1= - sin wt -21 (4.29)
3 3 3 ot )
d23 D
- 1 m .sin ot+ 2





L - -- -- SPTT
iRL "R R JR
dll / d12 /( dl3
Va
Vb
__ LLJb "c

d21 d2 d2 d23 C C - C
ST

Figure 4-7 The three-phase boost inverter.




The SFA state-space equations derived from the three-phase inverter are

diL
L- = V, - (dl - d21)v - (dl2 - d22)Vb - (d13 - d23)vc (4.30)
dt Vg 1 0v 2(dib 1323V





77


dva 2v - vb - v
C-d = (d -d2l)iL- 3R c (4.31)


dvb 2Vb -Va-vc
C-d = (dl2 - d22z)L - 3 c (4.32)
C-dt = 3R (4.32)

Under steady-state condition, Substitution of Equations (4.28) and

(4.29) into (4.30) - (4.32) and application of a simple algebra manipulation,

they yields

1
dllVb - d12a (b -Va) (4.33)


di(Va- Vc)+ dl2(Vb - V) c (4.34)

From Equations (4.33) and (4.34), duty ratios d1l and dl2 can be found as the

nonlinear functions of the input and output voltages:

1 2 2 2 Vg
(Va + Vb + vb ) + -Va
d = (4.35)
d1 2 2 2
Va + Vb + Vc


1 2 2 2 Vg
a + b + c)+ -Vb(4.36)
d12 = 2 2 2
va + vb + vc

From Equations (4.28) and (4.29), we can find that

2 2
d21 = - d11 2 = 23d12 (4.37)

then, duty ratios d21 and d22 are

1 2 2 2 Vp
3(Va + Vb + V )- Va
d21 = 2 2 2 (4.38)
Va + Vb + Vc





78


1 2 2 2 V2
(a + vb + )--2b
d22 2 2 2 (4.39)
va + Vb + Vc

The analog circuit to solve Equations (4.35), (4.36), (4.38), and (4.39) is shown

in Figure 4-8, in which six multipliers and four first-order LPWM circuits are

used.

The three-phase boost inverter shown in Figure 4-2 is simulated with

the LPWM circuit shown in Figure 4-8 in Saber. The control voltage is

va = Vmsin(Qt) with Vm = 262 V and Q = 2n7(60Hz). The LPWM circuit is

implemented by four first-order LPWM circuits. The simulation results of out-

put and control voltages as shown in Figure 4-9 imply that the output voltages

are able to track the control voltages linearly. The difference in the amplitude

and in the phase of the output voltages originates from the reactive compo-

nents.

In summary, the three-phase converter can be linearized by first-order

LPWM circuits. The switching instants of the switches are determined by

integrators in the LPWM. The input signals of the PWM circuit, called the P

function and Q function, are normally the nonlinear functions of the input and

output voltage in three-phase converters. Analog implementation of these

nonlinear function involves multipliers/dividers, making it complicated and

not practical. However, if the P function and Q function are linear functions of

input and control voltages, the LPWM modulator for three-phase converter

can be implemented by first-order LPWM circuits without using multipliers or

dividers [59, 60].





79






Va-v Va2




V2 1/3 + d21
Vc - I clock
-1/2

-P - r d22
XOR
f 23 2



-1/2 1/3 d2clck+d22







1/3 d1 l
clock
1/2

XO




1/2 1/3 cl ck dll+dl2



Figure 4-8 The LPWM implemented by the first-order LPMW
circuits for a three-phase boost inverter.





80



300- von vnh Vr 280 V

200
Va Vb Vc
100.




-100

-200

t(ms)
17.5 20 22.5 25 27.5 30 32.5 35

Figure 4-9 The simulation results of output and control voltages
of the three-phase boost inverter controlled by
first-order LPWM circuits. va = Vmsin(Mt) with Vm=
262 V and 0 = 27t(60Hz).





4.5 Linearization by High-Order LPWM


The main problem for first-order LPWM circuits to linearize

three-phase converters is that multipliers/dividers may be employed to syn-

thesize the inputs to the integrators. The problem is solved by a technique

presented in this section. With the help of this technique, the SFA equations of

a three-phase converter are reduced into a set of SFA equations that have only

one unknown duty ratio in each of them, and they have coefficients of linear

functions of the control voltages. Different from the first-order LPWM imple-

mentation, this technique does not need to find the expressions of duty ratios,





81


and P and Q functions, and it synthesizes the LPWM directly from the

reduced SFA equations. The resulting LPWM circuit is called high-order

LPWM because it uses more than one integrators to get one duty ratio. The

analog high-order LPWM modulator is developed for a general PWM con-

verter in this section. It employs only integrators (with reset and hold) to com-

pute the commutation instants of the switches. The inputs to the integrators

and comparators are linear functions of the control and input voltages. The

synthesis procedure of the high-order LPWM is demonstrated through a

three-phase boost inverter. The modulator, together with the inverter, is simu-

lated in Saber. The result shows that the output voltages can track the control

voltages linearly, and the high-order LPWM modulator is simple and easy to

use.

The synthesis of the high-order LPWM is based on the steady-state SFA

equations of the PWM converter, which are just linear functions of state vari-

ables and duty ratios of the switches, as described in Chapter 2. In the

steady-state condition, the derivative terms in state-space equations are zero.

As an example, the steady-state SFA equations of a PWM converter with two

independent duty ratios are given by

alldll+al2dl2 = k1 (4.40)

a21d=l +a22d2 = k2 (4.41)

where coefficients all - a22, k1 and k2 are related to control and input voltages.

For the LPWM modulator, they are reference and input voltages.





82


As we know, the duty ratios d1l and d12 are slowly varying sinusoidal

signals. When the switching frequency is sufficiently high, the value of the

duty ratio in the current switching cycle can be assumed equal to the value in

the last cycle:

n- n
dII _-dln" (4.42)


d2n - d12n (4.43)

where the superscript n stands for the current cycle, n-1 for the last cycle.

Substitution of Equations (4.42) and (4.43) into (4.40) and (4.41) yields:

al2d2 = k-alldn- (4.44)
A =1 (4.44)

a21dll = k2- a22d2n-1 (4.45)
21 = (4245)
n-I n-I
where a22d12 and alld11 are sampled and held during the previous

switching cycle. They are available to solve d12 and dll, respectively, during

the current cycle. Since the switching frequency is assumed sufficiently high,

and the control and input voltages vary slowly, all the coefficients in Equa-
n-1 n-1
tions (4.44) and (4.45), including a22dn2 and alld- , can be treated as con-

stant.

Obviously, if dll and d12 are solved directly from (4.40) and (4.41), their

expressions are nonlinear functions of all - a22, kl, and k2, namely, control

voltages. Using integrators to solve these functions would involve nonlinear

inputs to the integrators and multipliers/dividers in the resulting LPWM cir-

cuit, as shown in Figure 4-8. In contrast, the coefficients in Equations (4.44)

and (4.45), all - a22, kl, and k2, are linear functions of control voltages. Using





83


integrators to solve these equations involves only linear inputs to the integra-

tors. Thus, the resulting circuitry would not require multipliers/dividers to

synthesize the nonlinear inputs to the modulator circuits, making analog

implementation much easier.

In order to use analog circuits to synthesize Equations (4.44) and (4.45),

these equations are transformed into the integration forms:

Td12
SJ al2dt = kl-alld1l (4.46)
0

Td,

so
a21dt = k2-a22dn12 (4.47)



The duty ratio d1l can be obtained by comparing the integration of a21 with

k2 - a2dn1 through an integrator and a comparator. The duty ratio dl2

can be solved in the same way. However, to do so, a22d12 and a 1dn- on

the left side of the equations should be available. Note that


Sf alldt=alldll (4.48)
so

Td12
S a22dt=a22d12 (4.49)
so

Then these sampled terms can be implemented by the integrator with reset

and hold, as shown in Figure 4-10. The integrator starts to integrate all after

reset by the RESET signal. At the moment dllTs, the integration is stopped by

the HOLD signal. The output of the integrator is held at the value of alldl,





84





v0 RESET

INTEGRATOR
HOLD

d, ls
Salldll
RESET HOLD al

al 0 t
0 Ts

Figure 4-10 The integrator with reset and hold.




which will be available for the next switching cycle. The signal a22d12 can be

generated in the same way.

From Equations (4.46) - (4.49) and the integrator shown in Figure 4-10,

the high-order LPWM circuit can be synthesized, as shown in Figure 4-11. Its

operation waveforms are shown in Figure 4-12. When the clock signal comes,

the bottom integrators, #1 and #2, start to integrate their input signals all

and a21. As soon as integrator output vo2, the integration of a21, reaches
n-1
k2- a22d2 , the comparator produces a pulse S1 with the duty ratio of

dl . This pulse resets the top integrators, #3 and #4, and provides the HOLD

signal for integrator #1. Thus, the integrator output vol is held at the value of

a11dl7 , which will be used to solve a2. After reset, two integrators #3 and

#4 on the top start to integrate a12 and a22. As soon as integrator output Vo4,

the integration of a2, reaches k1 - alldl , the comparator generates a pulse

S2 with the duty ratio of d12. This pulse provides the HOLD signal for #3





85



al vo4

#4S2 dl
2 n1d12
Vo3
a22 Rf S/H
a,3 cntl --
k - 21 +|One Sht
v Reset I

a21 R 2
P#2 n

Vol
Clock all- R H


k I
k1

Figure 4-11 The high-order Linearizing PWM.



integrator. The integrator output vo3 is thus held at the value of a22dn2, which

will be used to solve dll in the next cycle. The reset signal for the top integra-

tors is generated by a one-shot circuit. To prevent changes in the integrator

output vo3 from affecting the solution of duty ratio dll, an extra sample/hold

circuit is added to the PWM circuit. The AND gate in the circuit is used to dis-

able the top comparator when solving for the duty ratio d11.

As an example, a three-phase boost inverter, as shown in Figure 4-7, is

controlled and linearized by the high-order LPWM circuit in Figure 4-11. The

space-vector modulation (SVM) discussed in Chapter 3 is applied in this con-

verter. In the SVM, the three-phase voltages va, vb, and v, are divided into six





86




Clock


ol0 alldl


Vo2 k2 a22dn2-1


Reset


Vo3 a 22d 12


Vo4 kl-alld l


Si
--d T_---
S2

12 Td-s-
Ts

Figure 4-12 Waveforms of the high-order LPWM.





segments as shown in Figure 4-13. In each segment, one SPTT switch in Fig-

ure 4-7 is permanently attached to one of the three capacitors as the other

sweeps through all three. The position of the stationary switch as well as the

sweeping ones are determined by a six-stepped sequence.

In the first segment, 00-600, vb < va and vb < vc. Let d22 = 1, and d21 =

d23 = 0, that is, S22 is on while S21 and S23 are off all the time during this seg-

ment. The switches, S11, 812 and 813, are switched at high switching fre-

quency. In steady state, the averaged state-space equations are





87




:va v Vc

SSegment: \ Segment: \ Segment:
*II \ IV * \ VI
.Segment \ / Segment \ / Segment
I : I : : V


0� 600 1200 1800 2400 3000 3600

Figure 4-13 Balanced three-phase voltages.



0 = Vg - (dl - d2)a - (d2 - d22b - (d3 - d23)v (4.50)


0 = (d i -d2L 2a -Vb - (4.51)
3R


0 =(-2Vb Vac (4.52)
0 = (d12-d2iL- 3R(4.52)


During the first segment,

d21 = d23 = 0 (4.53)

d22 = 1 (4.54)

Substituting Equations (4.53) and (4.54) into (4.50) - (4.52) and applying sim-

ple algebra, the steady-state equations for the first segment can be trans-

formed as

Vg = dllVab+dl3Vcb (4.55)

(2d11 + dl3)Vcb = (2d13 + dll)Vab (4.56)

From Equations (4.55) and (4.56), duty ratios dll, d13, and d12 can be

solved by the high-order LPWM. Note that the output voltages will track the





88


reference voltages Va, vb, and vc linearly when the boost inverter is controlled

by the LPWM to solve Equations (4.55) and (4.56). In other words, the inverter

would have low-distortion sinusoidal waveforms at the output, and nonlinear-

ity of the boost type inverter is eliminated.

If the steady-state equations for the six segments are listed, one can see

that they have the same forms as Equations (4.55) and (4.56). Thus, they can

be expressed as a general form as follows:

Vg = dxvx + dyvy (4.57)

(2dx + dy)vy = (2dy + dx)v, (4.58)

dz = 1 - dx - dy (4.59)

where Vg is the dc input voltage of the inverter.

The coefficients vx and vy in Equations (4.57) and (4.58) are the refer-

ence voltage signals to the LPWM. They are six-stepped piecewise sinusoidal

line-to-line voltages, as shown in Figure 4-14. Within different six-stepped

segments, vx and Vy takes different line-to-line voltages, as shown in Table 4.1,

which are synthesized from continuous three-phase reference signals Va, vb,

and vc. The outputs of the modulator are PWM signals with duty ratios dx, dy

and dz. For each segment of the SVM, dx, dy, and dz, are assigned to three

switches of the inverter based on Table 4.1. During the first segment, for

instance, dx = dll, dy = d13, dz = d12. The positions of dx and dy over one complete

period are shown in Table 4.1.





89










vx



00 600 1200 1800 2400 3000 3600

Figure 4-14 Six-stepped reference voltage signals to the LPWM.





Table 4.1 Six-step reference voltages and duty ratios.

vx Vy dx dy dz "1" "0" "0"
Seg. I Vab Vcb d1l d13 d12 d22 d23 d21
Seg. II vac Vab d23 d22 d21 dll d12 d13
Seg. III Vbc Vac d12 dll d13 d23 d21 d22
Seg. IV Vba Vbc d21 d23 d22 d12 d13 d1l
Seg. V Vca Vba d13 d12 dll d21 d22 d23
Seg. VI Vcb Vca d22 d21 d23 d13 dll d12




In order to use the proposed high-order LPWM, it is necessary to trans-

form the preceding equations into the following forms:

dnv = V -dn- v (4.60)


dxy = (dn-l,+ (2v- Vy) (4.61)





90


Comparing Equations (4.60) and (4.61) with (4.44) and (4.45), it is not difficult

to find

a12 = Vy (4.62)

a22 = (4.63)

a21 = (4.64)

all = 2vx- V (4.65)

ki = Vg (4.66)


k2 = d 1 v (4.67)

Replacing the inputs of the high-order LPWM in Figure 4-11 with the

six-step reference voltages in Equations (4.62) - (4.66), the high-order LPWM

for the three-phase boost inverter is then synthesized, as shown in Figure

4-15. It is worth noting that the inputs to the integrators are linear functions

of the reference and input voltages, and analog implementation of which

involves only adders/subtractors, as shown in Figure 4-15.

The three-phase boost inverter, as shown in Figure 4-2, is simulated

with the proposed high-order LPWM circuit shown in Figure 4-15 in Saber.

The control voltage is va = Vmsin(Qt) with Vm = 262 V and Q = 27n(60Hz). The

inputs of the LPWM circuit in Figure 4-15 are the six-step reference signals vx

and vy, which are generated from va, vb, and ve. The circuits that generate

six-step reference signals are not shown here, but they can be easily built in

Saber by some analog switches and some comparators. The waveforms of vx





91



v vo4
-R H, |4
4 Y
--I 1v . s/I i['v._ i
Vx H SH 1Al/2
cntl
One Sh )t
+ v r V Reset h i Sz


R H
-l#2 S-x

2Vx-vy ol ^
----RJ H-
II 1, 1#1)--
Clock Vg +


Figure 4-15 The high-order LPWM for three-phase boost inverter.



and Vy are shown in Figure 4-14. The outputs of the LPWM circuits are the

PWM signal dx, dy, and dz. They will be assigned to the six switches S11 - S23,

according to Table 4.1, by the encoding circuits. This circuit can be imple-

mented, according to Table 4.1, by logic circuits. One of the simple encoding

circuits is given in Chapter 6. The simulation results shown in Figure 4-16 are

the output and control voltages. Output voltages in Figure 4-16 are supposed

to equal control voltages according to the theory of the LPWM synthesis. How-

ever, the simulation shows that the amplitude of output voltages is a little

higher than that of control voltages, and there is a phase shift between output

and control voltages. This phenomenon is because of the reactive components

in the power converter, which will be explained in detail in Chapter 5. The





92



300 - vo Vh vnr 280 V




100




-100

-200

-300 , t(ms
17.5 20 22.5 25 27.5 30 32.5 35

Figure 4-16 The simulation results of output and control voltages
of the three-phase boost inverter controlled by the
high-order LPWM circuit. va = Vmsin(f2t) with V =
262 V and Q = 2tn(60Hz).




simulation results for the integrator outputs and the outputs of the high-order

LPWM circuit are shown in Figure 4-17.

Over the one sinusoidal cycle, the switching signals for six switches in

the inverter are shown in Figure 4-18. It shows that each switch in the

inverter operates at high frequency and low frequency alternatively. The duty

ratios d1l - d23 for six switches can be obtained by taking the average of the

switching functions in the Saber. The results are shown in Figure 4-19. The

duty ratios of the SVM, solved by the high-order LPWM, are piecewise sinuso-

ids, similar with the piecewise sinusoidal modulation waveforms described for

the conventional SVM method in Chapter 3. However, their amplitudes are





93


different. The modulation amplitude of the conventional SVM is proportional

to the control voltage, where as the amplitude of the duty ratios generated by

LPWM is a nonlinear function of the control and input voltages.

In conclusion, most three-phase PWM converters have nonlinear con-

trol-to-output relationships that make the output voltages unable to track the

control voltages linearly when they are controlled by the conventional PWM

modulator. The first-order LPWM modulator can be used to linearize the

three-phase converter, but it may involve multipliers/dividers to synthesize

the inputs to the integrators, as long as there are nonlinear terms of control

voltages in the expressions of duty ratios.

The technique presented in this chapter is able to reduce the SFA equa-

tions of the converter into a set of SFA equations that have only one unknown

duty ratio in each of them. The coefficients of these SFA equations are just lin-

ear functions of the control voltages. The PWM circuit synthesized from these

SFA equations, called high-order LPWM, uses only integrators (with reset and

hold) to compute switching instants of the switches. The inputs to integrators

are just linear functions of control and input voltages. A high-order LPWM is

synthesized and simulated for a three-phase boost inverter. The results show

that the output voltages can track the control voltage linearly. The control cir-

cuit is simple and easy to use.

The synthesis technique of the high-order LPWM modulator is devel-

oped for a three-phase boost inverter here, but it may be extended to all the

three-phase converters or multi-phase PWM converters.




Full Text
98
5.1 Analysis of High-Order Linearizing PWM
5.1.1 Modeling the Higrh-Order LPWM
A balanced three-phase boost inverter with the high-order LPWM is
shown in Figure 5-1. According to discussions in Section 4.5 of Chapter 4, the
modulation equations to synthesize the high-order LPWM modulator are
given by
Vgr = dnVab + d\3Vcb
(2 dn+du)vcb = (2 dl3 + dn)vab
d\2 ~ ^~d\\ ~d\3
(5.1)
(5.2)
(5.3)
where d^, d]^, and d12 are duty ratios of the PWM signals for the switches
Sn, S13, and S12, respectively; vcb and v^ are line-to-line voltages obtained
from the control voltages va, v^, and vc; and Vgj. is sampled from input voltage
Figure 5-1 The LPWM controlled three-phase boost inverter.


REFERENCES
[1] S. Bhattacharya, D. G. Holmes, D. M. Divan, Optimizing Three
Phase Current Regulators for Low Inductance Loads, IEEE
Industry Applications Meeting, Orlando, 1995, pp. 2357-2364.
[2] Chin Lin Chen, Chin E. Lin, C. L. Huang, An Active Filter for
Unbalanced Three-Phase System Using Synchronous Detection
Method, IEEE Power Electronics Specialists Conference Record,
Taipei, 1994, pp. 1451-1455.
[3] Young-bok Byun, Ki-yeon Joe, Sung-jun Park, Cheul-u Kim, DSP
Control of Three-Phase Voltage Source UPS Inverter with Soft
ware Controlled Harmonic Conditioners, IEEE International Tele
communications Energy Conference, Melbourne, 1997, pp. 195-200.
[4] Guk C. Cho, Gu H. Jung, Nam S. Choi and Gyu H. Cho, Control of
Static VAR Compensator (SVC) with DC Voltage Regulation and
Fast Dynamics by Feedforward and Feedback Loop, IEEE Power
Electronics Specialists Conference Record, Atlanta, 1995, pp. 367-
374.
[5] N. H. M. Hofmeester, P. P. J. van den Bosch, High Frequency
Cycloconverter Control, IEEE Power Electronics Specialists Con
ference Record, Taipei, 1994, pp. 1071-1076.
[6] Ahmet M. Hava, Seung-Ki Sul, Russel J Kerkman, Thomas A
Lipo, Dynamic Overmodulation Characteristics of Triangle Inter
section PWM Methods, IEEE Transactions on Industry Applica
tions, vol. 35, no. 4, 1999, pp. 896-907.
[7] Jack D. Ma, Bin Wu, Navid Zargari, Space Vector Modulated CSI-
based AC Drive for Multi-Motor Applications, IEEE Applied
Power Electronics Conference and Exposition, vol. 2, Dallas, 1999,
pp. 800- 806.
[8] Madhav Manjrekar, Giri Venkataramanan, Advanced Topolo
gies and Modulation Strategies for Multilevel Inverters, IEEE
155


115
Comparing Equations (5.60) and (5.61), one can find that the modulator is
able to follow the step inputs very quickly, and it goes into steady-state condi
tion within one switching cycle after step response.
In summary, the high-order LPWM is modeled and analyzed for a
three-phase boost inverter. The sampling effects in the modulator contribute a
pole that is determined by the switching frequency. This LPWM provides a
wide bandwidth for the transfer function of the modulator. The modulator is
able to react very quickly to the step input, and it goes into steady-state condi
tion within one switching cycle according to step response measured in the
simulation. For this reason, the delay caused by the sampling effects can be
neglected when we analyze and design the high-order LPWM.


149
Since two inductors formed by signal path and its return path are on the same
core and have the same turns, common-mode currents are forced to be equal.
The same common-mode filters can be added to control voltage lines, and
input power lines of the inverter. The system with common-mode filters is
shown in Figure 6-40(c). Inductor values of common-mode filters used in the
experiment are also shown in Figure 6-40(c).
Components used in the experiment are listed in Table 6.4. Output volt
ages of the inverter are 60 Hz sinusoids, thus, AC capacitors are used in the
output of the inverter. The package of MOSFETs and diodes are TO-247 that
is easy to be mounted on heat sinks by metal screw because there is no metal
contact around the hole of the package. Analog switch HI-20 IS is very fast
switch with ton = 30 nS and t0ff = 40 nS. It is used to reset capacitor in integra
tors of the LPWM at high switching frequency. Analog switch CD4051 is
slower than HI-201S. It is used to generate six-step reference voltages. Opera
tional amplifier LM833 has low distortion (0.002%), low offset voltage (0.3
mV), thus, it is very suitable for reference voltage circuit. It also has a wide
bandwidth (15 MHz) without increasing external components or decreasing
stability, thus, it is suitable for integrators in the LPWM. LM311 is used as
zero-cross detector in the reference circuit shown in Figure 6-1 and voltage
comparator in the LPWM shown in Figure 6-15. This devices are much less
prone to spurious oscillations. Offset balancing and strobe capability makes
LM311 easy to use in the experiment. High speed and current output of
ICL7667 make it very suitable to drive MOSFET. In the experiment, two


12
networks. Therefore, application of the state-space averaging technique to
analyze three-phase converters is tedious.
Without probing into topological details, the switching-function averag
ing method [9, 15] treats the switch as a component in the same way as we
treat other linear components by defining the PWM switch model. This allows
derivation of state-space equations simply by inspection and application of
definitions of circuit elements, Kirchhoffs laws, and other electrical princi
ples. The switch model is derived by characterizing its low frequency property,
as explained in this section.
The single-pole-multiple-throw (SPMT) switch shown in Figure 2-1 is
one of the fundamental building elements in the PWM converters. The pole is
usually connected to the inductor, and the throw is connected to either the
voltage sources or the capacitors. The SPMT switch is reduced to a single-pole-
double-throw (SPDT) switch in a dc converter; it may be SPDT or a single-
pole-triple-throw (SPTT) switch in most three-phase converters.
v*
p
1
i*
1 p
r
Pole 1
i*l
ri*2
i*k
r K l
4 *
rx M
\
\

\...
\
d*n
d 12
d*ik
d*iM
V*!
V*r
v*k
V*M
Figure 2-1 A single-pole-multiple-throw switch.


138
Figure 6-26 The output voltage, control voltage, input voltage,
and inductor current. A = 100, K = 25.9 KHz, fs = 24.5
KHz, R = 22 Q, and C = 50 pF.
0 = tan (coRC) = 22.5 (6.13)
The amplitude of the output voltage is shown to 230 V/2 in the measurement.
It is quite close to the theoretical value given by Equation (6.11):
Vom = AVmyJl + ((RC)2 = 121 V (6.14)
where Vm is the amplitude of the control signal, 2.12 V/2 in the measurement.
The difference between the measurement and theoretical value are due to
power losses. The inductor current is dc with some ripples, and its average
value is 6.84 A. The measured value and theoretical value are listed in Table
6.3 for comparison.


CHAPTER 7
SUMMARY AND CONCLUSION
This study shows that the three-phase PWM converters have nonlinear
relationships between the control and output voltages when they are con
trolled by the conventional analog SPWM or SVM modulators. Some sophisti
cated analog circuits may employ analog multipliers/dividers to compute the
switching instants for three-phase converters to implement linearization.
However, the complexity of the resulting circuitry makes them impractical.
The first-order linearizing PWM circuit uses integrators to compute commuta
tion instants to linearize the control-to-output relationship for dc-dc convert
ers or single-phase inverters. The first-order LPWM can also be used to
control three-phase converters. However, as indicated in this thesis, the inputs
to the integrators of the first-order LPWMs could be nonlinear functions of
control voltages and must use analog multipliers/dividers.
A high-order linearizing PWM is developed in this thesis. It is able to
make the output voltages of the three-phase PWM converter track the control
signals linearly even in the nonlinear topologies. Instead of multipliers/divid
ers, the high-order LPWM uses only integrators with the reset, and sample/
hold to compute the switching instants for the switches. The inputs to the
integrators are linear functions of the control and state variables. The key to
151


137
Tek antilB 25.OkS/s 295 Acqs
[ -T ]
Figure 6-24 The three-phase output voltages of the inverter with
R = 35 Q
Tek ana 25.OkS/s
7 Acqs
T-
Figure 6-25 The three-phase output voltages of the inverter
with R = 22 Q


77
dva
- (dn ~ d2X)iL -
2va -Vb~Vc
(4.31)
dt
3 R
dvb
- (<7]2 d22)ii -
2vb~Va-Vc
(4.32)
dt
3 R
Under steady-state condition, Substitution of Equations (4.28) and
(4.29) into (4.30) (4.32) and application of a simple algebra manipulation,
they yields
dnvb~dnva = \(Vb~Va)
(4.33)
dn(va-vc) + du(vb-vc) = -T"
' 12v t> c' 2 c
(4.34)
From Equations (4.33) and (4.34), duty ratios d^ and d12 can be found as the
nonlinear functions of the input and output voltages:
d ii
d\2 ~
1.2 2 2.
-(v + Vl + V ) -I V
3 V a b c> 2 a
2 2 2
vfl + vb + vc
1,2 2 2.
^Va + Vb + Vc) + YVb
2 2 2
V + Vl + V
a b c
From Equations (4.28) and (4.29), we can find that
2
d2\ = 3~^11 ^22 = a ^12
2
3
then, duty ratios d2i and d22 are
~(U + vt + U) V
a 0 c' 2
1,2 2 2.
^21
2 2 2
V + Vl + V
a b c
(4.35)
(4.36)
(4.37)
(4.38)


141
the prototype circuit is shown in Figure 6-32. The pictures of the high-order
LPWM modulator is shown in Figure 6-34. The top views of the reference cir
cuit and gate-drive logic are shown in Figure 6-33. The top view of the three-
phase boost inverter is shown in Figure 6-35.
Figure 6-29 The efficiency of the prototype three-phase
boost inverter.
Tek afiHH 5. OOMS/s 268 Acqs
[ T. ]
vgs
(S21)
Vds
(S2i)
25 May 2000
13:29:58
Figure 6-30 The switching waveforms of a MOSFET in
the inverter.


91
Figure 4-15 The high-order LPWM for three-phase boost inverter.
and vy are shown in Figure 4-14. The outputs of the LPWM circuits are the
PWM signal dx, dy, and dz. They will be assigned to the six switches S23,
according to Table 4.1, by the encoding circuits. This circuit can be imple
mented, according to Table 4.1, by logic circuits. One of the simple encoding
circuits is given in Chapter 6. The simulation results shown in Figure 4-16 are
the output and control voltages. Output voltages in Figure 4-16 are supposed
to equal control voltages according to the theory of the LPWM synthesis. How
ever, the simulation shows that the amplitude of output voltages is a little
higher than that of control voltages, and there is a phase shift between output
and control voltages. This phenomenon is because of the reactive components
in the power converter, which will be explained in detail in Chapter 5. The


93
different. The modulation amplitude of the conventional SVM is proportional
to the control voltage, where as the amplitude of the duty ratios generated by
LPWM is a nonlinear function of the control and input voltages.
In conclusion, most three-phase PWM converters have nonlinear con
trol-to-output relationships that make the output voltages unable to track the
control voltages linearly when they are controlled by the conventional PWM
modulator. The first-order LPWM modulator can be used to linearize the
three-phase converter, but it may involve multipliers/dividers to synthesize
the inputs to the integrators, as long as there are nonlinear terms of control
voltages in the expressions of duty ratios.
The technique presented in this chapter is able to reduce the SFA equa
tions of the converter into a set of SFA equations that have only one unknown
duty ratio in each of them. The coefficients of these SFA equations are just lin
ear functions of the control voltages. The PWM circuit synthesized from these
SFA equations, called high-order LPWM, uses only integrators (with reset and
hold) to compute switching instants of the switches. The inputs to integrators
are just linear functions of control and input voltages. A high-order LPWM is
synthesized and simulated for a three-phase boost inverter. The results show
that the output voltages can track the control voltage linearly. The control cir
cuit is simple and easy to use.
The synthesis technique of the high-order LPWM modulator is devel
oped for a three-phase boost inverter here, but it may be extended to all the
three-phase converters or multi-phase PWM converters.


123
obtained from Sa Sc by logic circuits, as shown in Figure 6-6. The experimen
tal waveforms of six-step signals are shown in Figure 6-8.
The high-order LPWM employs the discontinuous reference voltage, vj_
and v2, and input voltage Vg to determine the PWM signals S1; S2, and S3, as
shown in Figure 6-l(a). vb and v2 are piecewise line-to-line reference voltages,
the values of which are listed in Table 6.1 for the six steps of the SVM.
Table 6.1 The reference voltages vb and v2 for six steps.
Steps
V1
v2
I
vab
vcb
II
vac
vab
III
vbc
vac
IV
vba
vbc
V
vca
vba
VI
vcb
vca
Table 6.2 The logic table of analog multiplexer CD4051.
C(Sc)
B(Sb)
A (Sa)
Output (vb)
Output (v2)
0
0
1
vac
vab
0
1
0
Vba
Vbc
0
1
1
vbc
vac
1
0
0
Vcb
vca
1
0
1
vab
vcb
1
1
0
vca
Vba


76
dl2
dl3
1 D
1 m .
- + sin(coi)
D
- +
m
. . 2n
sin cot
D
- +
m
, 271
sin cor +
d2\
d22
d23_
1 D
1 m . .
3 ~sin(^
1 Dm ( 2k
- r-sin cor
3 3 v 3
1 f 2k
- sin cor + -
(4.28)
(4.29)
The SFA state-space equations derived from the three-phase inverter are
diL
L = Vg-(du-d2l)va-(dn-d22)Vb-(dl3-d23)vc
(4.30)


51
switching frequency related to its output. Although it has good dynamic per
formance, this technique suffers from low-frequency harmonics and high
switching losses.
3.2.5 Selective-Harmonic-Elimination PWM
The selective-harmonic-elimination PWM technique [53] formulates a
waveform that is chopped M times and possesses odd quarter-wave symmetry,
and contains the information about where the pulse starts or ends. Therefore,
any M harmonics can be nullified by solution of the corresponding M simulta
neous transcendental equations, which need extensive numerical calculation.
This technique is intended to attack the harmonics by suppressing an arbi
trary number of them in the output spectrum.
3.2.6 Sigma-Delta Modulation
Sigma-delta modulation [54-57] consists of a hysteresis comparator and
an integrator. The integrator estimates the reference voltage from the modu
lated PWM signal by low pass filter averaging. The estimated voltage is com
pared with the actual reference voltage through a hysteresis comparator to
generate the error signal, which is quantized to form the PWM signal. There
fore, the output voltage, which is equivalent to the average of the modulated
PWM signals, is able to follow the reference voltage within the hysteresis
band. Sigma-delta modulation suffers from the problem of variable frequency
and filter stability problems at high frequencies [56]. Although attempts have


119
as the reference signal and generates balanced three-phase voltages vj, and vc
from it. In balanced three-phase, lags va by 120; vc leads va by 120. Thus,
vc can be generated by a leading phase-shift circuit, and v^ is obtained just by
adding va and vc, as shown in Figure 6-2.
The phase-shift circuit in Figure 6-2 consists of one capacitor and three
resistors. The resistors Rj and R2 decide the voltage gain that is one when
they are equal. The resistor Rp and capacitor C determines the amount of
phase-shift that is given by the following equation:
head = <61)
Given = 4.7 pF, co = 27c(60Hz), Rp = 325.8 Q, vc leads va by
§lead = 120 (6>2)
For a balanced three-phase system, v^ can be obtained by
Vb = ~(Va + Vc) (6-3)
that is done by an inverted adder in Figure 6-2. The experimental waveforms
are shown in Figure 6-3.
The three-phase line-to-line voltages are used to synthesize the six-step
reference voltages vj_ and v2 in the SVM. They are simply generated by sub
tracting two line-to-neutral voltages, as shown in Figure 6-4. Their experi
mental waveforms are shown in Figure 6-5.
The six-step signals Sgl Sg6 are used to assign the PWM signals pro
duced by the LPWM to the six switches in the boost inverter, as shown in Fig-


46
where the slope of the ramp signal in the modulator varies with the input volt
age. Its application in the nonlinear PWM converters is published in ref 12, in
which good line voltage regulation is obtained for linear and nonlinear con
verters. However, the control-to-output gain is zero for the boost converter and
nonlinear for quadratic converters [11].
The feed-forward control is adapted to a pulsewidth modulation [11]; it
is called feed-forward PWM (FF-PWM). With the FF-PWM, any linear or non
linear PWM converter can be linearized. The steady-state control-to-output
relationship of the converter becomes linear regardless of operating condi
tions. The FF-PWM not only implements large-signal linearization of PWM
converters, but also reduces the source disturbance on the output voltage of
the converter. The FF-PWM has no stability problems and no effects on con
verter output impedance. If tight output voltage regulation is required, a
small-signal voltage feedback can be used with less difficulty and with
improved response compared with the conventional PWM modulation.
Although the technique in ref [11] does not provide a general modulator cir
cuit as the one-cycle controller, it provides us with a general way to synthesize
the large-signal linearizing PWM circuit.
3.1.3 Peak-Current Mode Control
The peak-current mode control is widely used in dc or single-phase con
verters [35-37], in which the peak inductor current always equals the refer
ence current, regardless of all other operating conditions. This control method


121
Figure 6-5 The experimental waveforms of three-phase line
line reference voltages.


128
hold circuit in Figure 6-11 is implemented by one capacitor and one Op-Amp
as shown in Figure 6-14 (b). When the sampling signal Scnti is available,
switch HI-201S is turned on. Capacitor C is charged to input voltage vs. After
the switch is turned off, this value will be held until next sampling signal is
available. The prototype of the high-order LPWM is shown in Figure 6-15. The
reset signal for the integrator #1 and #2 comes from the clock signal. Instead
of the one-shot circuit to generate the reset signal for the integrators #3 and
#4, the prototype circuit uses Clock Sx to generate the reset signal for them.
When there is a clock signal, the integrators #1 and #2 are reset; the
value of integrator #3 is sampled by this signal and held in the S/H circuit for
the calculation of PWM signal After the clock signal, two integrators on
the bottom start to integrate their input signals until the output of integrator
#2 reaches the input at the + pin of the comparator. At this moment, the
PWM signal S]^ goes to zero, and the output of integrator #1 is held for the cal
culation of the PWM signal S2. During the period is on, the two integrators
on the top are kept reset, and S2 is zero. As soon as Sj becomes zero, these
integrators start to integrate their inputs, and S2 becomes one. When the out
put of integrator #4 equals the input of the comparator, the PWM signal S2
goes to zero, and the output of integrator #3 is held for next calculation. The
PWM signal S3 is generated by Sj S2
The operation of the high-order LPWM is verified by the experimental
results of the prototype circuit. Figure 6-16 shows the outputs of integrators in
the high-order LPWM modulator; input and output waveforms of comparators


112
The bandwidth of the high-order LPWM modulator is obtained from
Equation (5.54):
f-3clB
9_ 1
87t(sin(0 + 120) sin(0 120))TS
(5.57)
The bandwidth is a function of sampling period Ts and angle 0. At 0 = 0, the
bandwidth is the smallest, and the bandwidth is given by
f- * = hi (158)
For fs = 24 KHz, f 3dB = 2.9 KHz. Given Vg = 5 V, Vm = 10 V, fs = 24 KHz, A = 1,
the frequency response of Km of the high-order LPWM is shown in Figure 5-5.
The -3dB bandwidth is shown around 2.9 KHz.
-30-
-40-
-50-
-60-
201og | Km
dB(V)
no sampling
with sampling
Figure 5-5 The frequency response of the high-order LPWM.


94
(V) 5
O-
26.6 26.62 26.64 26.66 26.68 26.7
Figure 4-17 The simulation results for integrator outputs and
the LPWM outputs.


26
the steady-state analysis, especially the dynamic analysis with the time-vari
ant equivalent circuit, is tedious and difficult. Therefore, it must be trans
formed into the ofb coordinates or odq coordinates to remove the time
dependency. Since abc-odq transformation leads to two coupled subcircuits
[21], the resulting equivalent circuit is not convenient for analysis. The pro
posed time-invariant equivalent circuit in this thesis, however, is derived in
the ofb coordinates, in which two subcircuits are completely decoupled, mak
ing the analysis much easier [22] and allowing one to write down answers by
inspection.
2.3 ABC-OFB Transformation
The abc-ofb transformation matrix T transforms a time-varying vector
Xgbg in the stationary (abc) coordinates into a time-invariant complex vector
in the rotating (ofb) coordinates according to
xabc ofb
(2.22)
X abc
(2.23)
where, for a balanced three-phase system with positive phase sequence,
X
a
*cos(0p
x abc
xb
=
xcos(0^-27t:/3)
X
c
xcos(0^. + 2tu/3)
(2.24)
where


73
determined by Equations (3.16), (3.19), and (3.20) in Chapter 3. When con
trolled by the duty ratios shown in Equations (4.19) (4.20), the output volt
age should equal to the reference voltage. It is worth noting that the duty
ratios expressed by Equations (4.19) (4.20) are only dependent on the refer
ence voltage and input voltage, and they are not coupled with each other.
Therefore, they can be synthesized individually by M first-order LPMW cir
cuits.
To synthesize the duty ratios using the first-order LPWM circuits,
transform (4.23) (4.24) into the following forms:
Q\(vin vr)d\ = Pl(vin>vr) (4'21)
Qm^u^Mm = PMVinVr) (4'22>
Assume that the duty ratios d^ djyj; are uniquely determined by the
input voltage and the reference voltages of the converter in each of the above
equations. Additionally, it is assumed that the switching frequency is suffi
ciently high, and the input voltage and the reference voltage vary slowly, so
that the input voltages and the reference voltages can be treated as constant
during each switching cycle. This is true because the sinusoidal signal, which
is needed to be synthesized in most power applications, is usually 60 Hz, but
the switching frequency could be as high as several KHz to several hundred
KHz. Various losses in the converter are neglected to simplify the analysis.
These losses can be compensated by the feedback circuit in practice. With the
above assumptions, (4.21) (4.22) may be transformed into the integration
forms:


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CHAPTER 6
IMPLEMENTATION AND EXPERIMENTAL RESULTS OF
HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR
A high-order linearizing pulsewidth modulator (LPWM) is constructed
to control a prototype three-phase boost inverter in this chapter. The whole
test system is shown in Figure 6-l(a). The ideal switch in Figure 6-l(a) is
implemented by a MOSFET and a diode, as shown in Figure 6-1(b). A passive
snubber consisting of a capacitor and a resistor is put in parallel with the
MOSFET to reduce di/dt noise and protect MOSFET from overheat. The PWM
algorithm used for the inverter is space-vector modulation (SVM), also called
six-step modulation, that is discussed in Section 3.4 of Chapter 3 and Section
4.5 of Chapter 4.
The reference circuit in Figure 6-1(a) generates balanced three-phase
voltages from a single-phase signal va. It also provides two six-step reference
voltages Vi and v2 for the high-order LPWM, and six-step signals Sgl Sg6 for
gate-drive logic. The high-order LPWM in Figure 6-l(a) synthesizes PWM sig
nals, Si S3, from the six-step reference v and v2, and input voltage Vg. It
provides the PWM signals Si S3 to gate-drive logic. The gate-drive logic in
Figure 6-1(a) assigns three PWM signals Sj S3 to the six switches in the
inverter based on the six-step signals Sgl Sg6. Isolation circuits, MOSFET
drivers, and floating power supplies are not included for simplicity.
116


47
may be considered as a large-signal linearizing PWM in terms of linearization
of the inductor current, such as the input current of the ac-dc converter. The
output voltage, however, is still controlled by a nonlinear control-to-output
relationship. Therefore, this control method needs an extra voltage feedback
loop to linearize the output voltage and keep it stable. The current mode con
trol has inherent advantages, such as fast dynamic response, automatic cur
rent protection, and so forth.
It is important to note that the carrier signals used in the above PWM
methods are not constant, but they vary with the control signal from one
switching cycle to another. They are herein called the PWM with a varying-
slope carrier. The duty ratio generated from them is a nonlinear function of
the control signal. This is different from the conventional PWM with a con
stant slope carrier. It is also worth noting that the slope of the carrier signal of
PWM with varying-slope carrier is constant, that is, a straight line even
though the slope rate changes from one switching cycle to another. The carrier
used in refs 31 33, however, is nonlinear, which could be the exponential
function.
The LPWM modulators previously discussed are general PWM methods
suitable for all dc or single-phase PWM converter topologies, including linear
and nonlinear converters. The LPWM circuits can be implemented by simple
analog circuits, usually integrators and comparators. Although the PWM
methods [38-41] are also able to implement large-signal linearization of the


21
determined by the SFA state-space equations. The turns ratios of those dc
transformers in the equivalent circuit are effective duty ratios in the SFA
equations [22],
As an example, the three-phase boost inverter, as shown in Figure 2-3,
is used to demonstrate the derivation of the equivalent circuit from the SFA
state-space equations. The SFA equations of the three-phase boost inverter in
Section 2.1.3 are organized and re-written as follows:
II
*JI
3 l^3
V8-daV
a~dbVb-dcVc
(2.15)
dv
c
= daiL~
2va~Vb~Vc
(2.16)
dt
3 R
dvb
= db^L ~~
2vb ~Va~Vc
(2.17)
dt
3 R
o I
>
1
t.
1
u
II
2vc~vb-va
(2.18)
~ dt
3 R
A dc transformer is shown in Figure 2-4. Its turns ratio is determined
by the duty ratio of the switching signal of the PWM switch. The duty ratios
da, d^, and dc in the SFA equations shown in Equations (2.15) (2.18) can be
modeled by the dc transformer shown in Figure 2-4. The connection relation
ships between the transformers and other components in the boost inverter is
defined by Equations (2.15) (2.18). The resulting equivalent circuit of the
three-phase inverter is shown in Figure 2-5. If the capacitor voltages va, v^,
and vc are reflected from the output side to the input side, one can easily find
that the inductor voltage of the equivalent circuit in Figure 2-5 is the same as


25
The only difference between the two simulation results is that the real-time
simulation contains the high-frequency ripple, but the equivalent circuit sim
ulation has no ripple. The equivalent circuit produces exactly the low-fre
quency components of the output voltages. One interesting result obtained by
both simulations is that the output voltage has a 32 phase shift from the con
trol voltage, and the amplitude is also different from the value (222 V), pre
dicted by the conversion ratio in Table 1.2 of Chapter 1, as shown in Figure 2-
8. This interesting result can be easily predicted by the steady-state analysis
of the ofb equivalent circuit of the three-phase boost inverter, which will be
presented in the next section.
Figure 2-8 The real-time simulation results showing the phase
shift and amplitude of the output voltages of the
three-phase boost inverter.
The equivalent circuit in Figure 2-5 is derived in the abc coordinates
that is a time-variant circuit. Although it is effective for the fast simulation,


79
Figure 4-8 The LPWM implemented by the first-order LPMW
circuits for a three-phase boost inverter.


144
(a)
Figure 6-34 (a) Top view of the reference circuit; (b) top view
of the gate-drive logic.


140
The high-order LPWM modulator has good line voltage regulation. This
is because any change of input voltage Vg will make duty ratio change in the
same direction through the LPWM modulator. Therefore, the output voltage,
inversely proportional to the duty ratio, can be kept constant. To test the line
voltage regulation of the modulator, control voltage is kept constant; the out
put voltage is measured for different input voltages. The curve of output volt
age versus input voltage is shown in Figure 6-28. It is tested under the
condition of Vmpk =2.28 V and A = 53. When input voltage is varied from 45 V
to 85 V, the steady-state line voltage regulation is in the range of 7%.
The efficiency of the inverter is measured, as shown in Figure 6-29. The
switching waveform Vgs and Vs of one MOSFET are shown in Figure 6-30.
The voltage across the inductor is shown in Figure 6-31. Finally, the picture of
150
140
130
120
110
100
Figure 6-28 The input voltage regulation of the high order
LPWM.
Vopk(V)
-
XX
X
X
X
X
-
ideal value
x x measurement
-
-
-
Vg(V).
40 50 60 70 80 90


78
^22
1,2 2 2,
(V + Vl + V ) -Vl
2' a b c> 2
2 2 2
a b c
(4.39)
The analog circuit to solve Equations (4.35), (4.36), (4.38), and (4.39) is shown
in Figure 4-8, in which six multipliers and four first-order LPWM circuits are
used.
The three-phase boost inverter shown in Figure 4-2 is simulated with
the LPWM circuit shown in Figure 4-8 in Saber. The control voltage is
va = Vwsin(Qr) with Vm = 262 V and Q = 2k(60Hz). The LPWM circuit is
implemented by four first-order LPWM circuits. The simulation results of out
put and control voltages as shown in Figure 4-9 imply that the output voltages
are able to track the control voltages linearly. The difference in the amplitude
and in the phase of the output voltages originates from the reactive compo
nents.
In summary, the three-phase converter can be linearized by first-order
LPWM circuits. The switching instants of the switches are determined by
integrators in the LPWM. The input signals of the PWM circuit, called the P
function and Q function, are normally the nonlinear functions of the input and
output voltage in three-phase converters. Analog implementation of these
nonlinear function involves multipliers/dividers, making it complicated and
not practical. However, if the P function and Q function are linear functions of
input and control voltages, the LPWM modulator for three-phase converter
can be implemented by first-order LPWM circuits without using multipliers or
dividers [59, 60].


82
As we know, the duty ratios d1;L and d12 are slowly varying sinusoidal
signals. When the switching frequency is sufficiently high, the value of the
duty ratio in the current switching cycle can be assumed equal to the value in
the last cycle:
j n~ 1 j
d ii =n
(4.42)
> n- 1 n
12 =12
(4.43)
where the superscript n stands for the current cycle, n-1 for the last cycle.
Substitution of Equations (4.42) and (4.43) into (4.40) and (4.41) yields:
,n i jn ~1
a1212 ~ ^1 ~ allll
(4.44)
7 ,n 1
a2laU K2 ~ a22a\2
(4.45)
where a22d2 and z, 1 are sampled and held during the previous
switching cycle. They are available to solve d12 and d11; respectively, during
the current cycle. Since the switching frequency is assumed sufficiently high,
and the control and input voltages vary slowly, all the coefficients in Equa
tions (4.44) and (4.45), including
#22^ 12 1 and aud"n 1, can be treated as con
stant.
Obviously, if dn and d12 are solved directly from (4.40) and (4.41), their
expressions are nonlinear functions of a^ a22, k^, and k2, namely, control
voltages. Using integrators to solve these functions would involve nonlinear
inputs to the integrators and multipliers/dividers in the resulting LPWM cir
cuit, as shown in Figure 4-8. In contrast, the coefficients in Equations (4.44)
and (4.45), an a22, kj, and k2, are linear functions of control voltages. Using


Ill
. = 3 = 3 Vg
m p, 9 2 2
V- 2AB-V;nTsP(s)
(5.51)
dm 3 A
^ 2B2V,nTsP(S)
(5.52)
where
5 = sin(0 + 120) sin(0 120)
P(s) = s + -A 1
4527\
(5.53)
(5.54)
From the small-signal analysis, we can find that the sampling effects
contribute a pole in the transfer functions of the high-order LPWM. The pole
is related to the sampling frequency. Increase of the switching frequency will
move away the pole and make the bandwidth wider. At s = 0, Km and Kg are
found as the follows:
K
2 V,
\s = 0
(5.55)
K
2 A
= 0
v 3V
g m
(5.56)
Comparing the above equations with Equations (5.16) and (5.17), one can find
that the gain Km and Kg, derived without considering the sampling effects, are
the dc gains of the transfer function of the high-order LPWM with sampling
effects. When the sampling effects are involved, these gains reduce with the
frequency.


38
2D.
(2.50)
that is the same as that derived from the equation-oriented method [9]. Sub
stituting Equations (2.49) into (2.50) and applying Equation (2.29), the phasor
of the output voltage va can be found as
Va = (! jCIRC)
(2.51)
The inductor current obtained from Figure 2-15 is a dc current, which is
3 V 2
iL = f-(i + (a*c) )
2D R
m
(2.52)
For Dm = 0.9, Vg = 200 V, Q = 2n(100 Hz), R = 10 Ohm, C = 100 |iF,
V = 262Z-32. This predicted output voltage agrees well with that obtained
from real-time simulation, as is evident in Figure 2-8. Note that the reactive
elements appears in the steady-state variables, introducing a right-half-plane
zero. This right-half-plane zero causes some phase shift to the output voltage.
In order to reduce the phase shift,
Q (p (2.53)
2.6 Graphical Small-Signal Analysis
As shown in Figure 2-13, the two transformers in the ofb equivalent cir
cuit are the same. They can be combined into one transformer with the turns
ratio De, as shown in Figure 2-16. The transformer in the equivalent circuit


120
Tek lifiliH 25.0k5/S 549 Acqs
E T ]
C2 Freq
59.665 HZ
C2 Ampl
2.08 V
20 May 2000
22:32:03
Figure 6-3 The experimental waveforms of three-phase refer
ence voltages.
Figure 6-4 The circuit to generate three-phase line-to-line ref
erence voltages.


160
tors, 1986 Annual Meeting Record of IEEE Industry Applications
Society, New Orleans, 1986, pp. 244-251.
[50] Bong-Hwan Kwon, Byung-duk Min, A Fully Software-Controlled
PWM Rectifier with Current Link, IEEE Transactions on Indus
trial Electronics, vol. 40, no. 3, July 1993, pp. 255-363.
[51] G. S. Buja, G. B. Indri, Optimal Pulsewidth Modulation for Feed
ing AC Motors, IEEE Transactions on Industry Applications, vol.
IA-11, January/February 1977, pp. 38-44.
[52] A. B. Plunkett, A Current Controlled PWM Transistor Inverter
Drive, IEEE Industry Applications Society Record, 1979, pp. 785-
792.
[53] J. B. Casteel, R. G. Hoft, Optimum PWM Waveforms of Micropro
cessor Controlled Inverter, IEEE Power Electronics Specialists
Conference Record, Syracuse, 1978, pp. 243-250.
[54] P. D. Ziogas, The Delta Modulation Techniques in Static PWM
Inverters, IEEE Transactions on Industry Applications, vol. IA-
11, March/April 1981, pp. 199-204.
[55] G. Joos, P. D. Ziogas, D. Vincenti, A Model Reference Adaptive
PWM Technique, IEEE Power Electronics Specialists Conference
Record, Milwaukee, 1989, pp. 695-703.
[56] A. H. Chowdhury, A. Mansoor, M. A. Choudhury, M. A. Rahman,
On-line Improved Inverter Waveform by Variable Step Delta Mod
ulation, IEEE Power Electronics Specialists Conference Record,
Taipei, 1994, pp. 143-148.
[57] Jose R. Espinoza, Geza Joos, Phoivos D. Ziogas, A General
Purpose Voltage Regulated Current-source Inverter Power
Supply, Proceedings of IEEE Applied Power Electronics Confer
ence, San Diego, 1993, pp. 778-784.
[58] T. J. Liang, Direct Amplitude Control Algorithm for Microcom
puter-based Pulsewidth Modulation Inverter, IEEE Power Elec
tronics Specialists Conference Record, Atlanta, 1995, pp. 319-325.
[59] Chongming Qiao, Keyue M. Smedley, A General Three-Phase PFC
Controller Part I. for Rectifiers with a Parallel-Connected Dual
Boost Topology, Proceedings of the 1999 IEEE Industry Applica
tions Conference, vol. 4, Phoenix, 1999, pp. 2504-2511.


106
Hl(s) = H(s) + KgG(s)
(5.30)
To simplify the derivation, Kg in (5.17) is expressed by De and Vg
(5.31)
Substituting (5.29) and (5.31) into (5.30), then Hl can be found as
(5.32)
The results in Equation (5.32) show that the input-to-output transfer function
Hl is ideally zero at dc when the three-phase boost inverter is controlled by
the high-order LPWM. Compared with the three-phase boost inverter without
the LPWM control, as shown in Equation (5.28), the audiosusceptibility of the
LPWM-controlled three-phase boost inverter, as shown in (5.32), is signifi
cantly reduced.
To appreciate this improvement, we use LPWM and conventional PMW
to control three-phase boost inverter separately, and compare the amplitudes
of output voltages in both cases. The simulation results are shown in Figure 5-
4. According to simulation results, the steady-state amplitude of output volt
ages, controlled by conventional PWM, would vary with the input voltage;
however, the steady-state amplitude of output voltages, controlled by the
LPWM, would not be affected by the input voltage.


124
The relationship between steps and reference voltages in Table 6.1 can be
implemented by analog multiplexers. The logic table of multiplexers is shown
in Table 6.2, in which A, B, and C are input states of the multiplexer. The cir
cuit implementation is show in Figure 6-9. The experimental waveforms of
six-step voltages Vj and v2 are shown in Figure 6-10.
vac vba vbc ^cb ^ab vca^aSj) Sc SnSv, ^ab ^bc vac ^ca ^cb
23456 ABC
CD4051
OUTPUT
vl
ABC 1 2 3 4 56
16
CD4051
OUTPUT 8
,+5 V
d= 0.1 gF
v2
Figure 6-9 Analog multiplexers to generate reference voltages
Vl and v2.
The high-order LPWM simulated in Section 4.5 of Chapter 4 is re
drawn in Figure 6-11. The integrator shown in Figure 6-11 is implemented by
an Op-Amp and two analog switches in the prototype circuit, as shown in Fig
ure 6-12. The analog switch HI-20 Is is on when the control signal is low; it is
off when the control signal is high. Thus, one inverter is needed to invert the
control signal so that the switch is on when the external control signal is high;
it is off when the external control signal is low. The operation waveforms of
this integrator are shown in Figure 6-13. At the beginning of switching cycle,
capacitor C is discharged by reset signal. The output voltage v0 of the integra-


45
3.1.1 One-Cycle Control
The one-cycle control [10, 23-28] has been widely used in various dc or
single-phase PWM converters. When the one-cycle control was proposed in ref
10, the aim was to make the output voltage of the dc buck converter and Cuk
converter follow the control voltage tightly without being disturbed by input
voltage. It was subsequently proven that this control method can be easily
used in other topologies, controls, and applications [23] [28]. For instance, it
can make the input current track the sinusoidal input voltage, allowing unit
power factor to be obtained [25]. The basic concept of the one-cycle control is to
force the average of the switched-variable, such as the diode voltage in the
buck converter, to be proportional to the control variable in each switching
cycle. Therefore, a one-cycle controller can make the output voltage propor
tional to the control voltage, that is, transform a switching power converter
into a linear power amplifier in a large-signal sense. The one-cycle controller
developed in ref 24 is a generalized circuit that can be used by any dc or sin
gle-phase PWM converter. In addition to the large-signal linearization of
PWM converters, the one-cycle controller has some advantages over the con
ventional PWM techniques, such as the switching loss compensation, good line
voltage regulation, and stable and simple control circuits.
3.1.2 Feed-Forward Pulsewidth Modulation
The feed-forward control is mostly used in the linear buck converter or
buck-derived converters to reduce source disturbance on the output voltage,


18
Combination of Equations (2.7) (2.9) yields
L77 = VS-daVa-dbVb-dcVc (2.10)
where da, d^, and dc are effective duty ratios:
da = ~d2\ db = dn~d22 dc = d\2-d22 (2.11)
Since the current through the switch is the product of the inductor cur
rent and the duty ratio of the switch according to Equations (2.4) (2.6), the
capacitor currents can be derived by applying Kirchhoffs current law as fol
lows:
dv
C -
(d\i ~ d2i)iL -
2va~Vb~Vc
= dalL-
2va~Vb~Vc
(2.12)
dt
3 R
3 R
rdvb
{d i2 d22)ib
2vb~Va~Vc
~ db^L~
2vb ~Va~Vc
(2.13)
dt
3 R
3 R
dvc
C -
(d13 -d22)iL-
2vc ~Vb~Va
= dciL-
2vc~Vb-Va
(2.14)
dt
3 R
3 R
Equations (2.10) and (2.12) (2.14) are called SFA state-space equations of the
three-phase boost inverter. Although they are derived for the boost inverter,
the switch model and the derivation procedure are general to other PWM con
verters.
The SFA state-space equations of the PWM converter are derived with
out knowledge of any PWM strategy and thus are general to any PWM modu
lation scheme: continuous sinusoidal PWM, space-vector modulating, and so
forth. Once a specific PWM modulation technique is applied to the converter,
the switching patterns and duty ratios in the SFA equations are known. For


31
6d(i) = j'm(T)xx-*d
(2.37)
The pole voltages and the throw currents can be expressed as
V
d i
pa
a 1
Vpb
V pabc
db\
V
d i
L pc\
cl
v. = d , v,
ts abe, 1 ts
(2.38)
lts
d i d i i d i
a 1 >1 cl
pa
[pb
pc
T
~ dabc, \ ipabc
(2.39)
rn
where dabc is the transpose matrix of dat,c. Note that the voltage reference
node of the proceeding equations is assumed to be vt_.
Application of Equations (2.22) (2.28) to (2.38) and (2.39) yields
T
V p ofb dofb, 1 Vts
*ts ^dofb,0 *pofb
!(: m
where (d j) is the conjugate transpose of d0ft, ^
(2.40)
_ Sn Sn -Md-tpIr
4 mc
, _rj3 J3n -
d ri i D c
ofb, 1 |_ 2 4 ^
(2.41)
The ofb model for the three-phase SPDT switches is, as shown in Figure 2-
10(c). Note that the variables for the transformer in the ofb coordinates are
generally complex. For a complex transformer, such as the one whose turns
ratio is l:dbwl in Figure 2-10(c), the transformation relationships are
pbw dbw\vts lts-bw abwllpb
= d,
w
(2.42)
where d*kwl is the conjugate of dbwl.


55
(3.14)
According to Equations (3.12) (3.14), one can find that the effective duty
ratios da, d^ and dc are sinusoidal. Since the number of unknowns d1;L -d23 in
Equations (3.12) (3.14) are more than the number of equations, we have
more freedom to decide duty ratios, leading to many PWM techniques. A dif
ferent modulation technique gives a different solution.
3.3 Synthesis of Continuous Sinusoidal Pulsewidth Modulation
In the continuous sinusoidal PWM (SPWM), the duty ratios d;Q d23
are continuous sinusoidal functions. In general, the duty ratio of each switch
consists of a dc offset and a sinusoidal modulation. For a balanced three-phase
converter, duty ratios d^ d23 could be
(3.15)
(3.16)


85
Figure 4-11 The high-order Linearizing PWM.
integrator. The integrator output vo3 is thus held at the value of a22d"2, which
will be used to solve d1;L in the next cycle. The reset signal for the top integra
tors is generated by a one-shot circuit. To prevent changes in the integrator
output vo3 from affecting the solution of duty ratio d11; an extra sample/hold
circuit is added to the PWM circuit. The AND gate in the circuit is used to dis
able the top comparator when solving for the duty ratio d;Q.
As an example, a three-phase boost inverter, as shown in Figure 4-7, is
controlled and linearized by the high-order LPWM circuit in Figure 4-11. The
space-vector modulation (SVM) discussed in Chapter 3 is applied in this con
verter. In the SVM, the three-phase voltages va, v*,, and vc are divided into six


127
At the moment t = dTs, the input signal Vj is disconnected from the integrator
by the Hold signal, and the output voltage v0 will be held at
v
O
dh
RCVi
-dTsKvt
(6.5)
o
where v¡ is assumed constant during each switching cycle, and K is the gain of
the integrator. If time constant RC is designed equal to the switch period Ts,
then,
= -dv;
(6.6)
The inputs to the integrators of the LPWM are six-step voltages Vj and
v2, linear functions of control voltages generated by analog multiplexers in
Figure 6-9. The input 2vil-v2 is the linear combination of vx and v2 that can be
implemented by a simple subtractor, as shown in Figure 6-14 (a). The sample/
Figure 6-14 (a) The subtractor circuit; (b) sample and hold.


CHAPTER 2
MODELING AND ANALYSIS OF THREE-PHASE CONVERTERS
This chapter presents the modeling and analysis techniques for three-
phase PWM converters. These techniques are important for the synthesis and
analysis of the linearizing pulsewidth modulation and three-phase PWM con
verters.
This chapter consists of six sections. The first section characterizes the
low-frequency property of the PWM switch with switching-function averaging
(SFA) technique. The derivation of the SFA state-space equations of a three-
phase converter is presented. The second section transforms the SFA state-
space equations into an equivalent circuit that is used for fast simulation. The
third section reviews the abc-ofb transformation that is applied to the time-
variant equivalent circuit to remove time dependency. The fourth section pre
sents the graphical models for all components of the three-phase converter in
the ofb coordinates. This section also demonstrates how to construct the time-
invariant equivalent circuit of a three-phase converter in the ofb coordinates.
The fifth section solves the ofb equivalent circuit graphically for the steady-
state analysis. The sixth section derives the small-signal equivalent circuit by
perturbing the control and input variables in the steady-state ofb equivalent
10


154
The high-order LPWM and the analysis techniques in this thesis are
developed for the balanced three-phase converter. How to deal with the unbal
anced three-phase or multi-phase systems is still confusing. The large-signal
and small-signal models of the converter and modulator are derived in this
thesis, but how to use these models to implement close-loop control still needs
more time and effort. The prototype modulator is implemented by discrete
analog components that consume a relatively large board area and need time
to make it work. It is hoped that the modulator can be integrated in the
future. This thesis is just a small step in a long journey. More challenging
work lies ahead requiring more time, effort, and innovative mind.


107
200
(V)
150
Vg = 200 V, 1 = 27t(100 Hz),
R = 10 Ohm, C = 100 pF
(a)
input voltage Vg with step disturbance
100
Figure 5-4 (a) input voltage; (b) amplitudes of output voltages
controlled by LPWM, and by conventional PWM.
5.2 Sampling Effects in High-Order LPWM
5.2.4 Modeling the High-Order LPWM with Sampling Effects
This section discusses modeling of the high-order LPWM that includes
sampling effects. Considering the sampling effects, the modulation equations
to synthesize the high-order LPWM modulator are given by
dl3 Vcb = Vgr~d 11 Vab
,n 1 ,n 1 N i ,n .
dUVcb = 2(/ll Vab) +odl32v ab~vcb)
1 ,n
2C
dn= ^ dii ~ di3
(5.33)
(5.34)
(5.35)
With the above modulation equations, the synthesis of the high-order LPWM
by analog circuits will not involve multipliers/dividers that have been dis
cussed in Section 4.5 of Chapter 4. In modulation equations (5.33) (5.35), Vgp
va)3, and vcb are known. The task of modeling the high-order LPWM is to solve


92
Figure 4-16 The simulation results of output and control voltages
of the three-phase boost inverter controlled by the
high-order LPWM circuit. va = Vmsin(Clt) with Vm =
262 V and Q = 27t(60Hz).
simulation results for the integrator outputs and the outputs of the high-order
LPWM circuit are shown in Figure 4-17.
Over the one sinusoidal cycle, the switching signals for six switches in
the inverter are shown in Figure 4-18. It shows that each switch in the
inverter operates at high frequency and low frequency alternatively. The duty
ratios d1;L d23 for six switches can be obtained by taking the average of the
switching functions in the Saber. The results are shown in Figure 4-19. The
duty ratios of the SVM, solved by the high-order LPWM, are piecewise sinuso
ids, similar with the piecewise sinusoidal modulation waveforms described for
the conventional SVM method in Chapter 3. However, their amplitudes are


113
To appreciate how quick the high-order LPWM is, this LPWM is tested
in Saber for the step response. The test circuit is shown in Figure 5-6. As
shown in Figure 5-6, at 0 =0, the amplitude of the reference signals jump
from 10 V to 20 V, where the output of the modulator S2, and S3 are mea
sured and shown in Figure 5-7. During the switching cycle before 0 =0, the
amplitude of control voltages is 10 V, resulting in the amplitude of duty ratios
Figure 5-6 The circuit to test the step response of the high-
order modulator. Vm = 10 V, Vg = 5 V, fs = 24 KHz.
Dm = 0.333 according to Equation (5.48). The measured effective duty ratios of
Sj, S2, and S3 are 0.0065, 0.29, and 0.295, respectively. According to
4+4+4 = \i>l <5-59>
The amplitude of effective duty ratios can be extracted as:


103
Vg/A|
£
Li-o
fiAVm ~ iW
Vn
+
D
2 R
D ev f S"cl -yo)/?C
D
2 i?
D eV bw I
(b)
e 1 + jcdRC
V
m
Figure 5-2 (a) The steady-state ofb equivalent circuit of the
LPWM-controlled three-phase boost inverter; (b)
its simplified circuit.
The output voltage phasor V0 is given by
Vo = VJl-jQRC) (5.23)
From Equation (5.23), one can easily find that the amplitude of the output
voltages is given by
Vom = AVmJl + (uRC)2 (5.24)
which is the same as Equation (5.20). The output voltages have a phase shift
from the control voltages that is determined by
Zv0fl = tan\(£>RC) (5.25)
As a conclusion, the high-order LPWM can make the output voltages of
the three-phase boost inverter track the control voltages linearly, independent
of the operating condition of the inverter, as shown in Equation (5.24). The


CHAPTER 3
REVIEW OF PULSEWIDTH MODULATION
This chapter reviews the existing pulsewidth modulation (PWM) tech
niques for both dc converters and three-phase converters, in which large-sig
nal linearization is emphasized. Two popular PWM methods for three-phase
converters, continuous sinusoidal PWM (SPWM) and space-vector modulation
(SVM), are discussed in detail.
3.1 Pulsewidth Modulation for DC Converters
The conventional PWM with a constant-slope carrier is the most popu
lar in dc or single-phase converters, but it gives rise to undesirable nonlinear
relationship between the output and control voltage in some topologies. Some
linearizing PWM techniques (LPWM) have been proposed for linearization of
dc or single-phase converters [10, 23-34]. In these PWM techniques, the slope
of the carrier signal is not constant. Thus, the duty ratio generated from the
LPWM is a nonlinear function of the input and control voltages that may can
cel out the nonlinear control-to-output relationship of the converter and make
the output voltage to track the control signal linearly.
44


48
PWM converters, they involve more sophisticated analog circuits, such as mul
tipliers/dividers.
3.2 Pulsewidth Modulation for Three-Phase Converters
Three-phase PWM converters are employed in many areas of todays
power industries, including active filtering [2], UPS [3], VAR compensation
[4], power generation [5], motor drives [6, 7], Compared with dc PWM convert
ers, three-phase converters face more requirements, such as harmonics, bal
ance/unbalance systems, and so forth. Moreover, they need more sophisticated
control and drive circuits. Undoubtedly, linearization in PWM modulation will
bring benefits, such as easier control, lower harmonic distortion, and source-
disturbance rejection, to the three-phase PWM converters and help achieving
the stringent application requirements.
Many PWM schemes for three-phase PWM converters have been pub
lished and applied in various power applications [42-58]. They can be classi
fied into seven categories: sinusoidal, space-vector modulation, selective-
harmonic-elimination, optimal, current control, direct amplitude control,
and sigma-delta modulation.
3.2.1 Sinusoidal PWM
Sinusoidal PWM technique (SPWM) [42] is based on the principle of
comparing a triangular carrier signal with a sinusoidal reference. The imple
mentation of the technique with analog circuits is simple and can produce


150
devices inside one package of ICL7667 are paralleled to increase its driving
capability.
Table 6.4 Components used in the experiment.
Component
Type
Inductor
3 mH Magnet Tek C-59U
Capacitor
Mallory (50 |lF/370 Vac/60 Hz)
MOSFET
IRF360 (400 V, 20 A, 0.2 £2)
Diode
MUR3060 (600 V, 30 A, 1.7 V)
Inverter power source
Sorenson DCR150-15A
OP AMP
LM833
Comparator
LM311
Analog switch
HI-20 IS
Analog multiplexer
CD4051
MOSFET driver
ICL7667
Opto-coupler
6N137
Digital multiplexer
74LS151
Inverter
74LS04
AND gate
74LS08
OR gate
74LS32
Voltage regulator
UA7805
Voltage regulator
UA7905


142
Tek arrnu s.ooms/s 2ss Acqs
Figure 6-31 The waveform of the voltage across the inductor and
gate signal of one MOSFET.
high-order
LPWM
inductor
heat sink
and fan
power
stage
Figure 6-32 The picture of the prototype circuit.


146
Figure 6-36 (a) Layout with a big loop; (b) improved layout with
small loop.
good layout
Figure 6-37 (a) Layout with a common ground line; (b) improved
layout without ground sharing.
part would be shared by other parts. The better layout is shown in Figure 6-
37(b), in which power paths are connected with ground by separate lines. To
prevent power noise caused by high di/dt and parasitic L or dv/dt and parasitic
C from contaminating control signal, we need to separate power and signal
paths/grounds. Signal ground is connected to power ground is shown in Figure
6-38(a), in which parasitic L would introduce voltage spike into control signal.


2
UTILITY LINES
OR
CONVERTERS
HIGH-FREQUENCY
CARRIER
POWER STAGE
(switches, inductors,
and capacitors)
CUSTOMER
LOADS
MODULATOR
(analog, or DSP
circuits)
CONTROL
SIGNALS
Figure 1-1 A basic switching power converter.
The modulator can be implemented by analog and digital means,
depending on the requirements, complexity, and costs in converter design. The
digital modulator is used mostly in three-phase converters since it has more
computation capability. However, when the switching frequency is increased
by size and weight requirements, the digital modulator will be limited by its
clock speed. Meanwhile, when the reference voltage does not change smoothly,
the sample/hold circuit with the digital modulator would be restrained by res
olution. In contrast, the analog modulator is much faster, and it can handle
any frequency, limited only by the capability of power stage [1].
A conventional pulsewidth modulator (PWM), as shown in Figure 1-2,
consists of a comparator, a ramp carrier signal vrmp, and a control signal vc.
The carrier signal provides high-switching frequency to the control signal and
to the switches in the converter. The control signal is followed by the con
trolled variables, such as output voltages. In the conventional PWM, the car
rier signal has a constant slope. The control signal is compared with the


143
Figure 6-33 (a) Top view of the high-order LPWM modulator;
(b) bottom view of the modulator.


109
,n- 1 .
Substitution of du in Equation (5.33) into (5.42) yields
,n + 1 2 sr ,n 2 .
13 Vc> = -T-(2vcb-Vab) + dn(VabVcb-Vab)
(5.43)
,n 2
By adding -duvcb to both sides of Equation (5.43) and employing the assump
tion in Equation (5.39), the continuous differential equation for duty ratio d13
can be found as follows:
d x (VabVcb Vab Vcb) T/ (2vcb Vab)
~Ad\3) = 13 + V~
dt
2 T
Vcb^s
gr 2
2vibT,
(5.44)
dn ~ ^ ~dn ~~ d\3
(5.45)
dn, di3? and di2 can be solved from Equations (5.40), (5.44), and (5.45). Note
that these differential equations have included sampling effects.
5.2,5 Steady-State Analysis
Under steady-state condition, letting the derivative in Equation (5.40)
be zero yields:
d Xsr
11
2vab ~ Vcb
3V
gr
2 V,
2 ,2
vab + vcb~vabvcb
2 ,2
vab+vcb~vabvcb
3AV,
sin0
(5.46)
di3 is obtained from Equation (5.44) by letting the derivative be zero:
d -
a 13
2vab~Vcb
3E
gr
2 ,2
Vab + Vcb-VabVcb
2 ,2
Vab + Vcb~VabVcb
-- (5-47)
where v2ab + v2cb vabvcb = ^ V2m in the balanced three-phase voltages. The effec
tive duty ratios can then be expressed as


87
0 Vg-(du-d2\)va-(dn d22)vb (d13 d23)vc
(4.50)
2v vfc v
0 (dn d2X)iL
(4.51)
2v> y. v_
0 (d12 d22) ^
(4.52)
During the first segment,
d2\ ~ d23 = ^
(4.53)
d22 = ^
(4.54)
Substituting Equations (4.53) and (4.54) into (4.50) (4.52) and applying sim
ple algebra, the steady-state equations for the first segment can be trans
formed as
Vg = d\\vab + d\3vcb
(4.55)
(2 dn+dl3)vcb = (2 dl3 + dn)vab
(4.56)
From Equations (4.55) and (4.56), duty ratios d11; d13, and d12 can be
solved by the high-order LPWM. Note that the output voltages will track the


75
d
p
Pi?g, vr)
Q(vg, vr)
(4.25)
The P function and Q function in the LPWM circuit are functions of the
input and reference voltages, which can be synthesized from the input and ref
erence voltages by operational circuits, such as adders/subtractors, and multi
pliers/dividers, as shown in Figure 4-6.
As an example, consider the large-signal linearization of a three-phase
boost inverter, as shown in Figure 4-7. This converter consists of six switches
v
g
Multiplier
Divider
Adder
Subtractor
P
Q
Figure 4-6 P function and Q function generator.
(two single-pole-triple-throw switches), but only four of these switches are
independent. This is because
dii +d\2 + dn 1
(4.26)
d2i 4* d22 "4* ^23 1
(4.27)
The sinusoidal PWM (SPWM) technique discussed in Chapter 3 is
applied in the inverter. One of choices of duty ratios is


17
Figure 2-3 A three-phase boost inverter with two SPTT switches.
respectively, and they are modulated at a frequency sufficiently lower than the
switching frequency.
The states of the inverter are inductor current l and capacitor voltages
va, vb, and vc. The first pole voltage is vpl, and the second pole voltage is vp2.
Based on the SFA model of the SPMT switch in Equations (2.4) (2.6), vpl and
vp2 can be expressed as the linear combination of capacitor voltages and duty
ratios of the switches:
V = dnva + dnvb + dnvc
(2.7)
Vp2 = d2\va + d22vb + d23vc
(2.8)
The voltage across the inductor can be obtained by application of Kirchhoffs
voltage law:
= V (2.9)


58
Figure 3-2 The balanced three-phase voltages.
(d\2 1) -
dv, v.
C--^ + -|
dt R
= du
(3.23)
dv vr
Cc + -c
, dt R ,
d\3 = 7 = c
* J
(3.24)
From Equations (3.22) and (3.24), it can be found that d1;L and d13 are sinuso
ids, and d12 is the sinusoid with the dc offset. In summary, during 0 60, the
duty ratios for the switches are
d ii = Dm sin(coi)
(3.25)
d 13 = Dmsin
(,+f
(3.26)
d\2 = 1 + DrnS'm
d2\ ~ d23 ~
f CO t-
2k
d 22 i
(3.27)
(3.28)


Table 3.1 Duty ratios for the three-phase boost Inverter with the SVM.
STEP
dn
Cl
N>
d13
d2i
d22
d23
1
D sin(oor)
m v '
1 + D sin f cor
m v 3 J
D sin wi +
m \ 3 J
0
1
0
2
i
0
0
1 -D sinicot)
m
. f 2n\
m { 3 J
-D sinfcof + ^1
m V 3 J
3
D sin(coi)
m v '
D sin cor
m { 3 )
1 + D sinfcor +
m { 3 J
0
0
1
4
0
1
0
-D sin(cot)
m v J
1 D sinicoi-^l
m { 3 )
-D sinfco + 1
my 3 J
5
1 + D sin(coi)
m v '
n ( In']
D sin coi-
m { 3 )
D sinico? + ^]
m V 3 )
i
0
0
6
i
0
0
-D sin(coi)
m v '
-Dmsin(?-y)
1 r, ( t 2n\
1 D sin cot +
m{ 3 J


50
can be implemented by comparing a six-step control signal, generated from
the reference voltage, with a constant-slope carrier signal [1], Such implemen
tation, however, gives rise to nonlinear relationships between the control and
output voltages, preventing the output voltages from tracking the control sig
nals.
3.2.3 Optimal PWM
The optimal PWM technique [51] produces the switching pattern based
on optimization of some performance criteria. The number and positions of the
pulses or notches within each switching cycle are selected according to these
criteria, which could be harmonic loss, torque pulsation, or load currents.
They are precalculated and stored in memory for use in real time. Thus, com
putation power from a microprocessor is needed to synthesize the correct
switching patterns.
3.2.4 Current-Controlled PWM
The current-controlled PWM technique [52] is intended to make the
output current track the reference current. In this technique, the output cur
rents with superimposing ripples are fed back and compared with hysteresis
levels placed around the reference signal to determine the switching fre
quency. As the ripple is regulated within the hysteresis band, the average out
put follows the average reference. Three independent controllers are needed to
control three phase legs separately in this scheme; each controller has its own


Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy
HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR
FOR THREE-PHASE POWER CONVERTERS
By
Jun Chen
August 2000
Chairman: Dr. Khai D. T. Ngo
Major Department: Electrical and Computer Engineering
The feasibility of using an analog pulsewidth modulator (PWM) to lin
earize balanced three-phase converters is investigated in this dissertation.
Prototype circuits, models, and analysis techniques are developed.
Most balanced three-phase PWM converters that are controlled by the
conventional analog PWMs have nonlinear relationships between the control
and output voltages/currents. This study shows that these nonlinear relation
ships can be linearized by an analog high-order linearizing pulsewidth modu
lator (LPWM) that makes the output voltage track the control voltage linearly.
Instead of multipliers/dividers, the high-order LPWM uses only integrators
with the reset, and sample/holds to compute the switching instants for the
switches in the converter. The inputs to the integrators of the LPWM are just
linear functions of the control and state variables, but are nonlinear functions
v


29
Vca
1 + Sa -
Asa
0-+-
t--
hb
o
|+Ab
i--
he
O-*-
1 +vsc _
L J
(a) abc voltage source set
L J
(b) ofb voltage source set
i_ j
(c) abc resistor set
L J
d) ofb resistor set
La +VLa

I L
*Lb I +VLb "
miVYi
I L
i]Lc 1 -Wv\ -
o I
, L
L J
(e) abc inductor set
JLo i vLo
1
lLf ¡ vLf
WV^
L -jcoL
^Lbw I vLbw
yyy.
I L jcoL
i
(f) ofb inductor set
i !"+VCa
JCa 1 +
o-H-
\\c*
Cb I + yo -|
0-K
I
JCc | +
o- I
vCc
- IIC'
L J
(g) abc capacitor set
Co 1 + |
'Co
Cl 1
¡a ¡ +
1
1
1
Cbw 1
C11
-1/jcoC
Mat-
+ vCbw
1
1
1/jcoC
VvV
(h) ofb capacitor set
Figure 2-9 Graphical models of voltage sources, resistors, induc
tors, and capacitors in the abc coordinates and the ofb
coordinates.


145
Figure 6-35 Top view of the three-phase boost inverter.
6.3 Practical Issues in Experiment
To make the test system work, several practical issues need to be con
sidered, including component layout and common-mode noise. In component
layout, a big current loop should be avoided because the big loop is associated
with increased inductance. When there is di/dt noise around this loop, it will
introduce a voltage determined by Ldi/dt. This voltage generates a spike in
the signal, and it could make false operation in circuits. This situation is illus
trated in Figure 6-36(a). A better layout is shown in Figure 6-36(b). To prevent
signals from interfering each other, we should connect power paths of different
components to ground separately. A layout for several signals sharing a power
path is illustrated in Figure 6-37(a). In this layout, a noise associated with one


when other analog PWMs, such as feed-forward PWMs and one-cycle control
lers, are used.
The analog high-order LPWM is synthesized from switching-function
averaging (SFA) equations of the three-phase PWM converter. Thanks to the
SFA model of the PWM switch, the derivation of SFA state-space equations of
the converter is simply done by inspection and application of definition of cir
cuit elements, Kirchhoffs law, and other electrical principles without probing
into topological details of the converter. The set of SFA equations can be trans
formed into an equivalent circuit in the stationary coordinates to make simu
lation more efficient.
In order to analyze three-phase converters that are controlled by the
LPWM or other pulsewidth modulation techniques, all three-phase component
models in the rotating coordinates, including PWM switches, sources, and pas
sive components, are developed. After three-phase components are replaced
by their models in the rotating coordinates, the time-variant three-phase cir
cuit is transformed into a time-invariant equivalent circuit that makes analy
sis and design much easier. The model of the high-order PWM is also
developed. It is useful to analyze the LPWM-controlled converter and evaluate
time delay caused by sampling effects.
The synthesis and analysis theories of the high-order LPWM are veri
fied by a 1 KW prototype of a three-phase boost inverter. Both simulation and
experimental results agree with the analysis. The experimental results show
that the control circuit is simple, and the output voltages of the inverter can
vi


95
Hi]
X-
Lo-
ni
x'
Lo-
T3-
t(ms)
0 2 4 6 8 1 1.2 1.4 1.6
Figure 4-18 The switching signals of six switches in the inverter
over the complete sinusoidal period.


72
In the following sections, a general procedure is presented to use
first-order LPWM circuits to synthesize the LPWM for three-phase converters.
Although it may end up with using multipliers/dividers in the LPWM circuit,
the synthesis procedure is still helpful to understand the linearization of
three-phase converters and use first-order LPWM modulators in three-phase
converters.
4.4 Linearization bv First-Order LPWM
The first step to linearize three-phase converters by first-order LPWM
circuits is to find the SFA equations of the converter. The derivation of the
SFA equations of a PWM converter is discussed in Chapter 2. For a PWM con
verter with M independent switches, the duty ratios of the switching signals
for these M switches are defined as:
T
d = [/j, c?2> > d
(4.18)
After solving SFA equations of the converter, each variable in Equation (4.18)
can be expressed as a function of the output voltage vQ and input voltage vg:
(4.19)
pM^vr
Qm(VS Vr)
(4.20)
where the output voltage vG is replaced by the reference voltage vr For exam
ple, the duty ratios of the three-phase boost inverter shown in Figure 3-1 of
Chapter 3, d^ d13, are functions of input voltage Vg and output voltages


40
where the caret implies small-signal perturbations. Neglect of the steady-
state and second-order terms then leads to a small-signal equivalent circuit of
the transformer, as shown in Figure 2-17(b). It consists of a dc transformer
and two dependent sources that are controlled by the duty ratio. De, Ic, and
Vpa in the capital letter are dc values derived from the steady-state analysis of
the inverter. Replacing the transformer in Figure 2-16 by its small-signal cir
cuit in Figure 2-17 yields the small-signal equivalent circuit of the inverter, as
shown in Figure 2-18, where every variable is replaced by its small-signal
value with the head A.
Figure 2-18 The small-signal equivalent circuit of the three-
phase boost inverter.
Let v = 0, the real part of control-to-output transfer function of the
6
inverter can be solved from the small-signal circuit in Figure 2-18, which
is given by
de 2 D] D
(2.55)


132
Tek HftliV 1 O.OMS/s 682 Acqs
[ T ]
51
52
53
20 May 2000
23:31:54
Figure 6-19 The experimental waveforms of the outputs of high-
order LPWM.


84
Figure 4-10 The integrator with reset and hold.
which will be available for the next switching cycle. The signal a22d12 can be
generated in the same way.
From Equations (4.46) (4.49) and the integrator shown in Figure 4-10,
the high-order LPWM circuit can be synthesized, as shown in Figure 4-11. Its
operation waveforms are shown in Figure 4-12. When the clock signal comes,
the bottom integrators, #1 and #2, start to integrate their input signals
and a2l. As soon as integrator output vo2, the integration of a21 > reaches
k2 -a22^12 > comparator produces a pulse S]^ with the duty ratio of
d'\{. This pulse resets the top integrators, #3 and #4, and provides the HOLD
signal for integrator #1. Thus, the integrator output vol is held at the value of
a\\d'\\ > which will be used to solve al2. After reset, two integrators #3 and
#4 on the top start to integrate a12 and a22. As soon as integrator output vo4,
the integration of a12, reaches k¡ -axxd'\x, the comparator generates a pulse
S2 with the duty ratio of d'\2. This pulse provides the HOLD signal for #3


129
Figure 6-15 The prototype of the analog high-order LPWM for
the three-phase boost inverter.




3
Figure 1-2 A conventional PWM.
carrier signal through the comparator. The output pulse vp (also called switch
ing function), generated by the comparator, is used to drive the switch in the
converter. It has the duty ratio of
(1.1)
where Vm is the amplitude of the ramp vrmp.
The output signal vp determines the switching patterns of the con
verter. The controlled variable of the converter, such as the output voltage, is
the function of the converter input and duty ratio of vp that is determined by
Equation (1.1). Therefore, the controlled variable of the converter can be regu
lated by adjusting the control signal.
The power stage in Figure 1-1 could be the dc-dc converter in the dc
power conversion or the three-phase converter in three-phase ac power con
version. The most popular dc converters are shown in Figure 1-3. The conver
sion ratios between the output and input voltages are listed in Table 1.1. The
single-phase converters and dc converters with the transformer isolation are


CHAPTER 1
INTRODUCTION
With the development of high-speed, high-power semiconductors, the
switching power converter has gradually replaced linear power amplifiers to
become the main power conversion product on the market. The switching
power converter not only provides more efficient power conversion than the
linear power converter, but also has more flexible control capability that
allows the converter to meet various power demands and requirements.
Therefore, research on switching power converters has received much atten
tion. A major research issue is the linearization of switching power converters
that makes the controlled variable track the control signal and improve the
performance of the converter.
A basic switching power converter consists of two sections, as shown in
Figure 1-1. The first section is called the power stage that usually consists of
semiconductor switches and energy storage components. The power stage
receives the unregulated energy from the utility power line or power convert
ers and provides the regulated energy to customer loads. The second section is
the modulator that provides control signals to the power stage.
1


96
Figure 4-19 The simulation results of the duty ratios for the six
switches in the inverter.


110
d
a
1 ~
1
i i
db
=
dl2 d22
d
c
13-/23
3AV,
3 a y,
3 a y.
sin
sin
sin(0)
e-^l
(5.48)
By comparing Equation (5.12) and Equation (5.48), a conclusion can be
made. Under steady-state condition, the effective duty ratios that involve
sampling effects are shown to be the same as those without sampling effects.
5.2.6 Small-Signal Analysis
This section discusses the dynamics of the high-order LPWM intro
duced by sampling. The dynamic study is restricted only to the small-signal
sense. The angle 0 of three-phase voltages in Equations (5.40) (5.45) is
assumed constant, thus, the coefficients in these equations become constant.
The small-signal analysis will predict the response of the modulator to small
perturbations around a quiescent operating point. Let the input and output of
the modulator consist of a steady-state and a perturbed component:
Vm = Vm + Vm dm = Dm + ^ ^ gr = Vgr + Vgr (549)
where caret implies small-signal perturbations. Substitution of Equation
(5.49) into Equation (5.40) and neglect of the steady-state and second-order
terms then yield the following response for the duty ratio dn in the Laplace
domain:
dM = Kmvm + Kgvg
(5.50)


16
of state-space equations of a PWM converter becomes routine and can be done
using state-space concept [16], definitions of circuit elements, Kirchhoffs
laws, and other electrical principles.
2.1.2 Derivation of State-Space Equations
Since the SPMT switch in the converter has been modeled as a compo
nent by the switching-function averaging technique, there is no need to iden
tify the switched topologies. State-space equations are derived simply by
following the procedures described in ref 16. The only attention is to identify
the SPMT switches in the converter. A three-phase boost inverter is used here
to demonstrate how to identify the SPMT switches and how to derive state-
space equations for PWM converters. Since the state-space equations of the
switched-mode converter are derived by averaging the switching functions of
the switch, they may be called switching-function-averaging state-space equa
tions (SFA state-space equations) [9] in this thesis.
A three-phase boost inverter is illustrated in Figure 2-3. Since we know
that the pole of the SPMT switch usually is connected with inductors and
throw is connected with voltage sources or capacitors, it is easy to find that
there are two single-pole-triple-throw (SPTT) switches in the three-phase
boost inverter. The SPTT switch on the top consists of the switches S11? S12,
and S13 and is characterized by d11? d12, and d13 The SPTT switch on the bot
tom is grouped by S21, S22, and S23 and is characterized by d21, d22, and d23.
Duty ratios d^- d23 correspond to the switching functions of switches S1;L- S23,


70
In PWM converters, the output voltage, vG is controlled by duty ratio d:
v0 = f(d,vg) (4.13)
which is the nonlinear function of the duty ratio in most of PWM converters.
When it is controlled by the conventional PWM, the duty ratio is proportional
to the control voltage.
d = vc (4.14)
The resulting output voltage will be the nonlinear function of the control volt
age:
vo = f(vcvg) (4-15)
However, the large-signal LPWM in Figure 4-4 is synthesized by (4.13).
It is able to solve (4.13) and find duty ratio as the function of the output volt
age and input voltage:
d = vg) (4.16)
The output voltage thus equals the control voltage:
v0 = vc (4.17)
According to (4.17), the output voltage of the nonlinear PWM converter con
trolled by the LPWM is able to track the control voltage linearly. The nonlin
ear control-to-output relationship is completely eliminated without using any
feedback loop.
In general, the task of the LPWM controller is to obtain the duty ratio
by solving modulation Equation (4.16), which could be done either by digital
signal processors (DSP) or by analog circuits. Even though only analog imple-


152
implement the high-order LPWM modulator is the assumption that the duty
ratio in the current switching cycle approximately equals that in the previous
cycle. This assumption is true because the control signal is much slower than
the switching frequency in practice. The analog high-order LPWM is simple
and easy to use.
The general procedure of the synthesis of the high-order LPWM modu
lator for balanced three-phase converters is developed. The modulator is syn
thesized from the switching-function averaging (SFA) equations of the three-
phase PWM converter. In this thesis, the derivation of SFA state-space equa
tions is simply done by inspection and application of definition of circuit ele
ments, Kirchhoffs law and other electrical principles without probing into
topological details of the converter. The set of SFA equations can be trans
formed into an equivalent circuit in the abc coordinates to make simulation
more efficient.
The circuit-oriented analysis technique is developed for balanced three-
phase PWM converters. All the three-phase components, including PWM
switches, sources, and passive components, are modeled in the ofb coordinates.
After three-phase components are replaced by the ofb models, the time-vari
ant three-phase circuit is transformed into a time-invariant equivalent circuit
that makes analysis and design much easier. The model of the high-order
PWM is also developed. It is useful to analyze the LPWM-controlled converter
and evaluate time delay caused by sampling effects.


5
The dc converters are used mostly in delicate and low-power applica
tions, such as computers and microprocessors. The three-phase PWM convert
ers are usually used in rugged, high-power applications, such as active
filtering [2], UPS [3], VAR compensation [4], power generation [5], motor
drives [6, 7], and multi-level converters [8]. The most popular three-phase
PWM converters [9] are shown in Figure 1-4. The voltage conversion ratios
Buck inverter
Boost inverter
Q-TYYY-
1
1
p
V
L
' x
Boost rectifier
Figure 1-4 The three-phase inverters and rectifiers.


11
circuit. With the help of small-signal equivalent circuit, the control-to-output
transfer function of the converter can be easily found graphically.
Although the boost inverter is used as an example to demonstrate the
whole procedure, the analysis and modeling techniques in this chapter can be
applied to any other three-phase PWM converter. To simplify explanation, it is
assumed throughout the thesis that the components are ideal and the
switches are lossless and four-quadrant.
2.1 Derivation of State-Space Equations of PWM Converters
2.1.1 Switching-Function Averaging Model of PWM Switch
To analyze the steady-state and dynamic performance of a PWM con
verter, which contains reactive components, the state-space equations must be
presented. There are many approaches to derive the state-space equations for
PWM converters, among which the state-space averaging technique [13, 14] is
the most popular. This approach requires the identification of the switched
networks and the derivation of the state-space equations for all switched net
works that is easy to do in dc converters because of the small number of
switched networks. However, a three-phase converter usually has a large
number of switched topologies, and with the increase of phase numbers, the
number of switched topologies will increase rapidly. For a given PWM method,
the switched networks in one switching cycle can be different from those in
another cycle. Moreover, different PWM schemes generate different switched


6 IMPLEMENTATION AND EXPERIMENTAL RESULTS OF
HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR 116
6.1 Analog Implementation of High-Order LPWM 118
6.2 Experimental Results 135
6.3 Practical Issues in Experiment 145
7 SUMMARY AND CONCLUSION 151
REFERENCES 155
BIOGRAPHICAL SKETCH 162
IV


74
TA
Y J Qx{vg,vr)dt = Px{vg,vr) (4.23)
5 o
TsdM
Y J fM(V Vr^dt = PMVg vr) (4-24)
* 0
Each of these integration equations can be implemented by a first-order
LPWM circuit with a resetable integrator and one comparator, as shown in
Figure 4-5. The operation waveform can be referred to Figure 4-l(b).
Figure 4-5 The first-order LPWM circuit to synthesize one
of the duty ratios.
When the clock signal is coming, the Q function is integrated, and the
output of the integrator is compared with the P function. During this time, the
PWM signal vp is high, turning on the switch in the converter. When the out
put of the integrator ramps up to the P function, the PWM signal vp becomes
low, turning off the switch. The resulting duty ratio of PWM signal vp is


56
where
Dm< 1 (3.17)
The dc offset in Equations (3.15) and (3.16) is to keep the duty ratios positive.
Equation (3.15) represents the sinusoidal modulation function for the top (sin
gle-pole-triple-throw) SPTT switches shown in Figure 3-1. Equation (3.16)
represents the sinusoidal modulation function for the bottom SPTT switches
shown in Figure 3-1. The amplitudes of the sinusoidal modulation function for
the same switch group must be the same to constitute balanced three-phase
sinusoids. The amplitudes and phases of sinusoidal modulation function for
different switch groups could be different, as long as two switch groups are
topologically independent. Note that the duty ratios in Equation (3.16) have
the same amplitude and oppose phase from the duty ratios in Equation (3.15)
that results in the optimal effective duty ratios:
d
a
dn~d22
db
=
d\2~d22
d
c
d\?>~ d23
2D
m
sin(coO
2D
m
3
2D
m
sinoco?
sinoco/ +
2k
2k
(3.18)
that is related only to the continuous sinusoidal modulation techniques.
The amplitude Dm and the phase of duty ratio da in Equation (3.18) can
be obtained from Equation (3.12), which is given by
W = Dm = 5-
3VmJ\+(aRCy
RI,
(3.19)


59
where the amplitude Dm and the phase of the duty ratio d1;L can be obtained
from Equation (3.22) as the following:
Kill = Dn
vmJi + ((oRcy
RI,
-1.
Zda = tg (CORC)
The effective duty ratios are
d
a
dn ~d22
db
=
d\2~ d22
d
c
d\3~ d23
D
D
£>msin(cor)
m
sin
im-f
m
sin
sin^coc +
271
Combination of Equations (3.11) and (3.29) yields
v = ^Vl+(*C)2
DLJm
(3.29)
(3.30)
(3.31)
(3.32)
In fact, the three-phase boost inverter works like a dc boost converter.
When S12 is on, the inductor gets energy from the source. Wlien either Sn or
S13 is on, the inductor transfers the energy to the load. Since only one SPTT is
switched at high frequency and the other is switched at low frequency, the
SVM has less switching loss than continuous SPWM.
The duty ratios du d23 for the six segments are listed in Table 3.1, and
their waveforms over one period are shown in Figure 3-3. It is obvious that the
duty ratio functions in the SVM are piecewise sinusoidal and have six-step
symmetry.


14
To avoid short circuit, no two throws turn on at the same time, and all
switching functions must add up to one at any instant to avoid open circuit. In
other words, one and only one of the switching functions of the SPMT switch is
one at any instant. This can be expressed as follows:
M
X1 *
X ^1 k 1
(2.1)
k = 1
It is obvious that there are only M-l independent switching functions of the
one-pole-M-throw switch.
At any moment, only one throw is connected to the pole. Therefore, the
throw current equals pole current during its connection with the pole:
i k dlki p (2.2)
Over one switching cycle, the pole is connected to the throws one by one;
thus, the pole voltage v*p is just a linear combination of the products of throw
voltages and corresponding switching functions:
M
vP = X d*\kv*k (2.3)
k= 1
The SPMT switches are switched at a high frequency. The voltages or
currents connected with the pole and throws, either dc or sinusoidal ac, are
varying slowly, relative to the switching frequency. Therefore, over one switch
ing cycle, the terminal voltages and branch currents of the pole and throws
can be assumed as constant. The duty ratio d^ (without asterisk), which is
the average of the switching function d*]^ over the switching period Ts, is


90
Comparing Equations (4.60) and (4.61) with (4.44) and (4.45), it is not difficult
to find
12 = vy
(4.62)
22 =
(4.63)
>
II
(N
(4.64)
1
*
>
II
(4.65)
i = ^
(4.66)
* 3
1
<
* 3
1
(4.67)
Replacing the inputs of the high-order LPWM in Figure 4-11 with the
six-step reference voltages in Equations (4.62) (4.66), the high-order LPWM
for the three-phase boost inverter is then synthesized, as shown in Figure
4-15. It is worth noting that the inputs to the integrators are linear functions
of the reference and input voltages, and analog implementation of which
involves only adders/subtractors, as shown in Figure 4-15.
The three-phase boost inverter, as shown in Figure 4-2, is simulated
with the proposed high-order LPWM circuit shown in Figure 4-15 in Saber.
The control voltage is va = Fmsin(ilf) with Vm = 262 V and Q = 2tc(60Hz). The
inputs of the LPWM circuit in Figure 4-15 are the six-step reference signals vx
and Vy, which are generated from va, v^ and vc. The circuits that generate
six-step reference signals are not shown here, but they can be easily built in
Saber by some analog switches and some comparators. The waveforms of vx


54
dva , v
~ (11 21 ^1L~~r
Multiplying va on both sides yields
(3.6)
dva VaC~J¡ = (dU~d2l)lLVa-J
(3.7)
The same procedure is applied to Equations (3.3) and (3.4) yields
dvb vb
= (d\2~d22 )iLvb~~^
(3.8)
dv. v
vcC^T = (d\3-d23)iLvc~
(3.9)
Under steady state, the inductor current is assumed as dc; thus, dij/dt
in Equation (3.1) is zero. Substituting Equations (3.7) (3.9) into (3.1) yields
V2
VI ^
* L 2 R
(3.10)
V2
I = 1
L 2flV
(3.11)
It is obvious that Equation (3.10) is the conservation of power. The input
inductor current is dc, the value is determined by Equation (3.11). Once II is
obtained, duty ratios in Equations (3.7) (3.9) can be solved from
(II -21> = ~ =
(3.12)
(d\2~d22^ ~
dv v.
Cb- + -£
dt R
= du
(3.13)


88
reference voltages va, v^, and vc linearly when the boost inverter is controlled
by the LPWM to solve Equations (4.55) and (4.56). In other words, the inverter
would have low-distortion sinusoidal waveforms at the output, and nonlinear
ity of the boost type inverter is eliminated.
If the steady-state equations for the six segments are listed, one can see
that they have the same forms as Equations (4.55) and (4.56). Thus, they can
be expressed as a general form as follows:
= dxvx + dyvy
(4.57)
(2 dx + dy)vy = (2 dy + dx)vx
(4.58)
dz 1 d x dy
(4.59)
where Vg is the dc input voltage of the inverter.
The coefficients vx and vy in Equations (4.57) and (4.58) are the refer
ence voltage signals to the LPWM. They are six-stepped piecewise sinusoidal
line-to-line voltages, as shown in Figure 4-14. Within different six-stepped
segments, vx and vy takes different line-to-line voltages, as shown in Table 4.1,
which are synthesized from continuous three-phase reference signals va, vj,,
and vc. The outputs of the modulator are PWM signals with duty ratios dx, dy
and dz. For each segment of the SVM, dx, dy, and dz, are assigned to three
switches of the inverter based on Table 4.1. During the first segment, for
instance, dx = djj, dy = d13, dz = d12. The positions of dx and dy over one complete
period are shown in Table 4.1.


131
Tek 10.0MS/S 574 Acqs
Figure 6-18 The experimental waveforms of the comparator for
the PWM signal S2.
are shown in Figure 6-17 and Figure 6-18, respectively. The output waveforms
of the high-order LPWM are shown in Figure 6-19. All the waveforms agree
with the analysis.
The output signals of the high-order LPWM, S^, S2, and S3, are
assigned to the six switches of the inverter by the gate-drive logic shown in
Figure 6-20. The experimental waveforms of the switching signals for the six
switches Sj! S23 are shown in Figure 6-21. After being averaged by low-pass
filters, the duty ratios of PWM signals are obtained and shown in Figure 6-22.
Obviously, in space-vector modulation, the duty ratios of switching signals are
piecewise sinusoidal waveforms that agree with the discussion in Chapter 3.


104
line voltage regulation is improved because the output voltages are mainly
determined by control voltage and a constant gain set by the voltage divider. A
phase shift between the control and output voltages is caused by the load
resistance and filter capacitor.
5.1.3 Small-Signal Analysis
This section discusses the small-signal property of the LPWM-con-
trolled three-phase boost inverter. Its small-signal equivalent circuit is shown
in Figure 5-3 that is the combination of the small-signal model of the modula
tor, as shown in Equation (5.15), and the ofb small-signal equivalent circuit of
three-phase boost inverter, as shown in Figure 2-18 of Chapter 2.
Let vg = 0, the control-to-output transfer function of the power stage is
shown in Equation (2.64) of Chapter 2 and given by
Figure 5-3 The small-signal model of the LPWM controlled three-
phase boost inverter in the ofb coordinates.


60
Figure 3-3 Duty ratios for space-vector modulation.


153
The synthesis procedures and analysis theories for the high-order
LPWM and balanced three-phase PWM converters are demonstrated and sim
ulated through a three-phase boost inverter in this thesis and checked with an
experiment. A prototype 1 kW, 24 kHz three-phase boost inverter is used to
test the high-order LPWM implemented by analog circuits. The experimental
results agree with the simulation and the analysis. It is shown that the output
voltages of the three-phase boost inverter can track the control voltages lin
early with good sinusoidal waveforms. The disturbance of dc input voltage can
be reduced in the output voltages, and line voltage regulation is improved.
The analog circuits of the high-order LPWM modulator is simple and can be
implemented easily.
In conclusion, the three-phase PWM converter can be linearized by the
high-order LPWM modulator that uses integrators with the reset, and sam
ple/hold to compute commutation instants. The inputs to the integrators are
linear functions of control voltages. With the high-order LPWM control, the
output voltages can track the control signals linearly with good waveforms,
and the disturbance from the input voltage can be reduced. The control is sta
ble, and analog implementation is simple. Time delay caused by sampling
effects of the high-order LPWM is small because of high switching frequency,
and it can be neglected in the design. The method of synthesis and analysis in
this dissertation are general methods that can be applied to other three-phase
topologies.


161
[60] Chongming Qiao, Keyue M. Smedley, A General Three-Phase PFC
Controller Part II. for Rectifiers with a Series-Connected Dual
Boost Topology, Proceedings of the 1999 IEEE Industry Applica
tions Conference, vol. 4, Phoenix, 1999, pp. 2512-2519.


99
Vg by a voltage divider. The ratio of the voltage divider is A, then Vgr is given
by:
(5.4)
The ratio A is big enough so that could not saturate the operational circuit
in the analog high-order LPWM. Similarly, the amplitude of the control volt
ages, Vm, must be small enough, so that the control voltages would not satu
rate the operational circuit in the LPWM.
The modulation equations (5.1) and (5.2) are derived from the first seg
ment of space-vector modulation (SVM). In the first segment of the SVM, duty
ratios d21 = d23 = 0, d22 = 1. Thus, the duty ratios d11; d13 and d12 can be
replaced by the effective duty ratios da, dc and d^. Then, the modulation equa
tions (5.1) and (5.2) become
Vgr = daVab + dcVcb
(5.5)
(2 da + dc)vcb = (2dc + da)Vab
(5.6)
db ~ da~ dc
(5.7)
In fact, as shown in the above equations, only effective duty ratios play a role
of modulation.
For the high-order LPWM, Vgr, vab, and vcb in Equations (5.5) and (5.6)
are known. The task of the high-order LPWM is to solve da, dc and d^ from
Equations (5.5) (5.7). By applying a simple algebra to Equations (5.5) (5.7),
da, db, and dc can be expressed as the functions of v3) v^, and vc:


43
SFA state-space equations expedites the simulation. The equivalent circuit of
the three-phase converters in the ofb coordinates is constructed graphically by
replacing sets of three-phase components with appropriately connected ofb
components. With the help of the ofb equivalent circuit, the steady-state and
small-signal analyses of the three-phase converters can be worked out graphi
cally, which is proven to be easier than the equation-oriented method.


135
gate and source, thus, three separate power supplies, Vcci, Vcc2, and Vcc3; are
required to drive them, as shown in Figure 6-23. MOSFETs M2i, M22, and
M23 have the same ground, only one power supply Vcc4 shown in Figure 6-23 is
required to drive them. The allowed forward current of opto-coupler 6N137 is
from 6.3 mA to 15 mA, so the resistor in series with diode is designed to be
500 Q (5 V/10 mA). The collector resistor Rc is designed to be 2 Kil that gives
on-state current 6 mA (the maximum value is 13 mA).
6.2 Experimental Results
The high-order LPWM developed in this chapter is used to control a
three-phase boost inverter, as shown in Figure 6-1 (a). The reference voltage is
given by
(6.7)
vfl = sin cor
The high-order modulator uses a portion of input voltage as its dc reference
voltage and the value is given by
(6.8)
According to Chapter 5, the output voltage is given by
voa = AVmJl + (coRC)2sin(cor- 0)
(6.9)
where the phase is decided by
0 = tan 1 (co RC)
(6.10)


86
Figure 4-12 Waveforms of the high-order LPWM.
segments as shown in Figure 4-13. In each segment, one SPTT switch in Fig
ure 4-7 is permanently attached to one of the three capacitors as the other
sweeps through all three. The position of the stationary switch as well as the
sweeping ones are determined by a six-stepped sequence.
In the first segment, 0-60, < va and < vc. Let d22 = 1, and d21 =
d23 = 0, that is, S22 is on while S21 and S23 are off all the time during this seg
ment. The switches, S11; S12 and S13, are switched at high switching fre
quency. In steady state, the averaged state-space equations are


35
component and backward component are totally decoupled. Therefore, the
analysis of three-phase converters with the ofb equivalent circuit is easy.
To construct the ofb equivalent circuit, we need to identify dc and ac
components in the abc coordinates. The ac components are replaced by their
graphical models in the ofb coordinates, and dc components remain in the ofb
equivalent circuit. As a result, the three-phase boost inverter is divided into
five parts, as shown in Figure 2-12. Part one and part two are in the dc side of
the inverter, including the dc voltage source and the inductor. In steady-state
conditions, the inductor current is dc. Therefore, it is not necessary to trans
form the voltage source and inductor. Parts three, four and five are in the ac
side of the inverter and include time-variant switches, capacitors, and resis
tors.
Figure 2-12 Partitioning the three-phase boost inverter.


65
Slope =
u(t)
^7
(4.2)
The average value of u(t) over one switching cycle is given by
d(tyr,
4 [ u(t)dt = u(t)d(t) (4.3)
T 0
which equals the comparator input v(t):
u(t)d(t) = v(t) (4.4)
In most of dc converters, the relationship between the output voltage
and the duty ratio can be expressed in the form of Equation (4.4). For example,
the average output voltage V0 of a dc-dc boost converter is the function of duty
ratio and the input voltage:
V
O
1 -D
(4.5)
Transformed into the form of Equation (4.4), then (4.5) becomes
VD=V0-Vg (4.6)
If the boost converter is controlled by the first-order LPWM shown in Figure
4-l(a), and let v(t) = Vc Vg and u(t) = Vc, the duty ratio can be given as
V -V
D = -4^ (4.7)
V C
Substitution of Equation (4.7) to (4.5) yields
= Vc (4.8)
Note that the average output voltage V0 of a nonlinear boost converter can
track the control voltage linearly, as indicated in Equation (4.8).


4
not listed here, because they can be derived from these basic topologies and
have one independent control variable like basic dc converters.
AYY\
V.jrH
Boostl_ ^
-r
i
T
k I
n
Buck-Boos
j
+
a
Buck
+
lt
V
T
A -
V V
M
H.
rrm.
Cuk_
/YYTL
Vgf H
SEPIC J +
:v,
11 (YYY\
:r 1 \
' r
r
.,
+
Dual SEPIC
Figure 1-3 Basic dc-dc converter topologies.
Table 1.1 Voltage conversion ratios.
Converter Topology
Voltage Conversion Ratio, V/Vg
Buck
D
Boost
1/d-D)
Buck-Boost
-D/CL-D)
Cuk
-D/(l-D)
SEPIC
D(l-D)
Dual SEPIC
D/(l-D)


117
II
(a)
(b)
MOSFET IRF360
(400 V, 20 A, 0.2 Q)
H
snubber
8.6 Q
:680 pF
T Diode MUR3060
(600 V, 30 A, 1.7 V)
Figure 6-1 (a) The test system of a three-phase boost inverter
controlled by the high-order LPWM; (b) ideal switch
and its implementation in the inverter.


134
To drive MOSFETs in the inverter shown in Figure 6-1, signals S;q -
S23 generated by gate-drive logic shown in Figure 6-20 need to be transferred
from 5 V to 12 V by MOSFET drivers. To drive MOSFETs in the inverter that
have floating gate and source, isolation circuits, such as opto-couplers, are
required. The circuit that transfers signals S1;L S23 to MOSFETs and pro
vides isolations is shown in Figure 6-23. MOSFETs M^ M13 have floating
Figure 6-23 Opto-couplers and MOSFET drivers.


122
ure 6-1(a). Sgl Sg6 are generated by the circuit shown in Figure 6-6. By
comparing three-phase voltages va, v^, and vc with zero volt, the circuits gen
erate three digital signals Sa, S^, and Sc that are in phase with va, v^, and vc,
respectively, as shown in Figure 6-7. The six-step signals Sgl Sg6 are
Figure 6-7 Signals S1; S2, and S3 generated from three-phase
voltages va, v^, and vc.
Tek asa 25.0kS/s 751 Acqs
Sg2
Sg3
sg4
Sg5
Sg6
20 May 2000
23:06:46
Figure 6-8 The experimental waveforms of six-step signals of
Sgl' Sg6-
3- : J 1 ;
Ch2 3.00 V M 4.00 ms Ch1 f 200 mV
Ch3 5.00 V HiE 5.00 V
Ref4 5.00 V 4.00ms


66
Some dc converters have quadratic duty ratios in the control-to-output
relationship [11] [24]. They can still be linearized by the LPWM, as shown in
Figure 4-1, but adding one more integrator and gain block to it. This is
because
uD
2
(4.9)
4.2 Nonlinear Problem in Three-Phase Converters
The nonlinear relationship between the output and control voltages
exists in most three-phase PWM converters that are controlled by conven
tional PWM modulations, such as sinusoidal PWM (SPWM) and space-vector
modulation (SVM). The high-frequency carrier signal in the conventional
SPWM and SVM has a constant slope. The duty ratios of switching signals
generated by these PWMs are proportional to the control voltages, which are
not able to cancel the nonlinear duty-ratio-to-output relationship of the con
verters. As a result, output voltages are not able to track the control signals
linearly. In the balanced three-phase converters, the output waveform is sinu
soidal, not affected by this nonlinear control-to-output relationship. The
amplitude, however, is affected by the nonlinear control-to-output relation
ship.
As an example, a balanced three-phase boost inverter, as shown in Fig
ure 4-2, is used to demonstrate the nonlinear problem in three-phase convert
ers. It is controlled by the conventional SPWM. The input voltage Vg is dc, the


32
Figure 2-10 (a) Three-phase SPDT switches; (b) switch model in
abc coordinates; (c) switch model in ofb coordinates.
Three-phase single-pole-triple-throw (SPTT) switches. The SPTT
switches shown in Figure 2-ll(a) are commonly found in, e.g., the boost
inverter and buck rectifier [9], Their low-frequency model in the abc coordi
nates is shown in Figure 2-11(b), where one choice for the duty ratios is
i D
3 + t cos(V
d,
la
d2 a
dlb
=
1 ( 2icA
3 3 \d 3 )
d2b
d,
1 c
d2c
1 m (a
- + -cos 0 +
3 3 y d 3 )
1 D
1 m
3 3
D
cos(e^)
m fn 2n
rcos(e
D
1 m
- COS 0 J +
2k
d + T
(2.43)
The effective duty ratios are


64
Figure 4-1 (a) A first-order linearizing PWM; (b) its operation
waveform.
The first-order LPWM modulator usually consists of a resetable inte
grator and a comparator, as shown in Figure 4-l(a). Its operation waveform is
illustrated in Figure 4-l(b). When the clock signal comes, the output signal vp
of the comparator becomes high, turning on the switch in the converter. At the
same time, the integrator starts to integrate the input signal u(t). When the
integrator output reaches comparator input v(t), the output pulse drops to low
and turns the switch off, as shown in Figure 4-l(b).
It is supposed that the clock is sufficiently fast so that the function u(t)
and v(t) can be assumed as constant over each switching cycle. Therefore, the
amplitude of the ramp generated by the integrator is
t,
V = 4 f ()* (') (4.1)
To
The slope of the carrier ramp varies with u(t), which is


30
_ d\Labe
vLabe ~ dt
(2.33)
application of Equations (2.22) (2.28) to (2.33) yields
d(Ti-r )
Lofb
dt
di,
_ T-iL Lofb Lfb dT;
dt + dt lLofb
di,
dt \ dt ) Lofb
(2.34)
where
0 0
0 -j(L
0
0
(2.35)
0 0 jcoL
The ofb inductor set is thus as shown in Figure 2-10(f). The ofb inductor is a
real dynamic inductor L in series with an imaginary static resistor jcoL.
Capacitors. The circuit models for the capacitors are the duals of those
for the inductors and are shown in Figure 2-10(g) 1(h).
Three-phase single-pole-double-throw (SPDT) switches. The SPDT
switches shown in Figure 2-10(a) are commonly found, for example, in the
buck inverter and boost rectifier [9], Their low-frequency model in the abc
coordinates is shown in Figure 2-10(b), where one choice for the duty ratios is
d
d
d
a 1
b\
cl
i D
1 m /n \
- + COS(0)
1 { 2n
- + --cos 0
2 2 yd 3
D
1 m
~ + -TT-COS
2 2
(Vt
d a
a 2
l~dal
db2
=
l~dbl
dc2
}-dcl
(2.36)
where


19
the same PWM converter, a different PWM strategy leads to different coeffi
cients in the SFA equations and state solutions.
The SFA state-space equations shown in Equations (2.10) and (2.12) -
(2.14) are derived in the stationary reference frame or abc coordinates, in
which all the state variables and coefficients in the equations are time-vari
ant. Obviously, solving the time-variant state-space equations is very tedious
and difficult. Therefore, they are transformed into the ofb coordinates to
remove the time dependencies from the state-space matrices [15] by the abc-
ofb transformation [17]. These coordinates consist of an 0-sequence phasor, a
/orward(-rotating) phasor, and a ackward(-rotating) phasor. After the trans
formation, the SFA state-space equations become time-invariant, and the
three-phase boost inverter can be analyzed by solving the state-space equa
tions in the ofb coordinates. For a balanced three-phase system, the equations
containing the 0-sequence, forward, and backward phasors are completely
decoupled. The steady-state backward phasors are directly related to the volt
age and current phasors in the circuit. Unfortunately, the steady-state and
dynamic analysis of converters [15], based on ofb state-space equations, con
tain intensive algebraic calculation and matrix manipulation. In addition, the
equation-oriented model of the converter is not intuitive to computer simula
tion.
In contrast, circuit-oriented techniques [18, 19, 20, 21] are preferred for
hand-analysis/calculation and computer simulation. Such circuit-oriented or
graphical techniques not only produce the averaged equivalent circuit


83
integrators to solve these equations involves only linear inputs to the integra
tors. Thus, the resulting circuitry would not require multipliers/dividers to
synthesize the nonlinear inputs to the modulator circuits, making analog
implementation much easier.
In order to use analog circuits to synthesize Equations (4.44) and (4.45),
these equations are transformed into the integration forms:
TA 2
[ 12dt = kx-and'\x 1 (4.46)
T* 0
Tsd"u
~~~ f #2] dt k>2 a22^\2 (4.47)
r' 0
The duty ratio djj can be obtained by comparing the integration of a2i with
k2 a22dn through an integrator and a comparator. The duty ratio d12
can be solved in the same way. However, to do so, 22^2"' and fln^ii on
the left side of the equations should be available. Note that
TAi
J audt~audu (4.48)
5 0
TA2
TrT f 22^ ~ a 22^12 (4.49)
T 0
Then these sampled terms can be implemented by the integrator with reset
and hold, as shown in Figure 4-10. The integrator starts to integrate a^ after
reset by the RESET signal. At the moment djjTg, the integration is stopped by
the HOLD signal. The output of the integrator is held at the value of a^du


68
the control voltages in Equations (4.10) and (4.11). According to the theory of
the balanced three-phase inverter in Chapter 2 and the SPWM in Chapter 3,
the output voltages remain balanced sinusoidal waveforms, but their ampli
tude becomes inversely proportional to the amplitude of the control voltage:
Vm = ^Vl + (coi?C)2 (4.12)
Therefore, the output voltages are not able to track the control voltage linearly
in the boost converter. This nonlinear relationship is verified by the simula
tion results. The amplitudes of the output voltages for different control volt
ages for shown in Figure 4-3.
Figure 4-3 The amplitude of the output voltages versus the
amplitude of control voltages for the ideal case.


15
modulated at a frequency sufficiently slower than the switching frequency.
Therefore, the duty ratio is also assumed as constant over the switching cycle.
In the analysis and modeling of switched-mode converters, attention
usually is restricted to low-frequency components of voltages and currents.
The high-frequency components (also called ripples) are designed to be small
and can be neglected due to the combination of fast switching and proper
placement of filter corner frequencies. Therefore, the exact value with the
asterisk in the previous switching-function equations can be, approximately,
replaced by their low-frequency value for analysis and modeling of low-fre
quency components. This modeling technique is called switching-function
averaging herein. The duty ratios in Equation (2.1) are then replaced by their
averaged values:
M
Iu= 1
k = 1
(2.4)
The pole voltage and the throw currents in Equations (2.2) and (2.3) are
replaced by their averaged values:
m (2.5)
- 1
\kvk
k = 1
h = dklp (2-6)
All values in Equations (2.4) (2.6) vary slowly relative to the switching
frequency; thus, they characterize the low-frequency properties of the SPMT
switch shown in Figure 2-1. With these equations, the SPMT switches can be
treated as components in the way we treat other components. The derivation


159
[39] Shih-Liang, Ying-Yu Tzou, Sliding Mode Control of a Closed-Loop
Regulated PWM Inverter under Large Load Variations, IEEE
Power Electronics Specialists Conference Record, Seattle, 1993, pp.
616-622.
[40] Nadira Sabanovic-Behlilovic, Asif Sabanovic, Tamotsu
Ninomiya, PWM in Three-Phase Switching Converter Slid
ing Mode Solution, IEEE Power Electronics Specialists Confer
ence Record, Taipei, 1994, pp. 560-565.
[41] Vietson M. Nguyen, C. Q. Lee, Indirect Implementations of Slid
ing-Mode Control Law in Buck-Type Converters, Proceedings of
IEEE Applied Power Electronics Conference, San Jose, 1996, pp.
111-115.
[42] A. Shonung, H. Stemmier, Static Frequency Changers with Sub
harmonic Control in Conjunction with Reversible Variable-Speed
A.C. Drives, Brown Boveri Review, vol. 51, no. 8/9, 1964, pp. 555-
557.
[43] K. Taniguchi, H. Irie, Trapezoidal Modulation Signal for Three-
Phase PWM Inverters, IEEE Transactions on Industry Electron
ics, vol. 33, 1986, pp. 193-200.
[44] K.B. Bose, A High-Performance Pulsewidth Modulator for an
Inverter-Fed Drive System Using a Microcomputer, IEEE Trans
actions on Industry Applications, vol. 19, 1983, pp. 235-243.
[45] K. Taniguchi, H. Irie, S. Kaku, Real Time Operation of Three-
Phase P.W.M. Inverter, IEEE Industry Application Society Annual
Meet Record, Toronto, 1985, pp. 442-447.
[46] Andrzej M. Trzynadlowski, Non-Sinusoidal Modulating Functions
for Three-Phase Inverters, IEEE Power Electronics Specialists
Conference Record, Kyoto, 1988, pp. 477-484.
[47] K. Ngo, et al., A New Flyback DC-to-AC Three-phase Converter
with Sinusiodal Outputs, IEEE Power Electronics Specialists Con
ference Record, Albuquerque, 1983, pp. 377-388.
[48] J. Zubek, Pulsewidth Modulated Inverter Motor Drive with
Improved Modulation, IEEE Transactions on Industry Applica
tions, vol. LA-11, November/December 1975, pp. 695-703.
[49] H. W. van, der Broeck, H. Skudelny, G. Stanke, Analysis and Real
ization of a Pulse Width Modulator Based on Voltage Space Vec-


41
the imaginary part is given by
vg n l1 mz
2D2e(£>p D(s)
where
D{s)
(
+
RC +
V
q.2lc2r
2Dl +
L ) LC 2 LC2R 3
5 + ~5 + Ys
2 D2eR) D] 2 D]
co
z
2 zr
i+i
CO,
R
2 L
CO
p
RC
If the design allows
1
where the LC corner is located at
co
O
J2
e_
Jlc
(2.56)
(2.57)
(2.58)
(2.59)
(2.60)
(2.61)
it suffices to approximate the poles by
D(s)
1 s
Qu0 +
(2.62)
where
cooL
(2.63)


39
can be modeled as a voltage-control voltage source and a current-control cur
rent source, as shown in Figure 2-17(a).
+
Rv
bw
+
R
Vf
Figure 2-16 The equivalent circuit of the three-phase boost
inverter in the ofb coordinates.
Figure 2-17 (a) The large-signal model of the dc transformer; (b)
its small-signal model.
Application of small-signal perturbation to the capacitor voltage vpa,
the inductor current ic, and the control variable de in the circuit yields
de De + de
- 7c + *c
v
9 v pa
= V +v
pa pa
(2.54)


track the control voltages linearly, and they have low-distortion sinusoidal
waveforms.
In summary, the synthesis and analysis techniques are developed for
linearization of a three-phase boost inverter in the dissertation. As general
methods, they can be applied to other three-phase topologies, multi-phase or
multi-level converters.
Vll


108
tin, ^13 and 12 from Equations (5.33) (5.35). From Equation (5.33), dnu can
be expressed as
,n ygr~d ll" Vab
13 ~
vcb
(5.36)
Substitution of Equation (5.36) into Equation (5.34) and applying simple alge
bra yields:
2dnuv2cb = 2dnu \vabvcb-v2ab) + Vgr(2vab-vcb)
(5.37)
,n- 1 2
Adding -2du vcb to both sides of Equation (5.37), yields
,n ,n 1 ,n-l(VabVcb V ab Vcb) (2Vab Vcb)
11-^11 = 2 + Vgr 71
V
cb
2v
cb
(5.38)
Multiplying with Equation (5.38) and assuming
1 S
d\\ dn d, j s
T. =dt[d")
(5.39)
where dn is a continuous function of time, Equation (5.38) then becomes a
continuous differential equation:
dtJ N (vabvcb-v2ab-v2cb) T, (2vab-vcb)
iSd> o = = + v-
2 T
Vcb^s
gr 2
2 vc*r,
(5.40)
From Equation (5.33), + 1 can be expressed as
.+1 T/
13
(5.41)
Substitution of dnn in Equation (5.34) into (5.41) yields
,n +12 1 yi-l 2 1 2 .
13 vcb = vab~2d\3(2vab-vabvcb)
(5.42)


49
very good sinusoidal waveforms. In recent years, much effort has been made
toward digitization of the SPWM [43-46]. Online computation of instants of
intersection of the triangular carrier and sinusoidal reference waveforms is
not possible because no closed-form solution is available for intersection
instants. Therefore, the reference sinusoidal waveforms have been replaced by
trapezoidal [43], stepped [44], or triangular waveforms [45]. The carrier-based
SPWM technique has disadvantages, such as attenuation of the fundamental
component and large switching losses. Most of all, the slope of the high-fre
quency carrier in the PWM is constant and the duty ratios are linear functions
of the reference signals. Therefore, the SPWM is unable to implement linear
ization of nonlinear PWM converters.
3.2.2 Space-Vector Modulation
Space-vector modulation [49] (SVM) can utilize most of the power
source and reduce switching losses, which makes it the most popular PWM
technique in three-phase converters. The SVM technique generates PWM sig
nals by averaging the three switching-state vectors to equal the reference vec
tor over each switching cycle. Since the SVM involves a significant amount of
computation to determine the commutation instants of the switches, it is usu
ally implemented by digital signal processor (DSP) or microprocessor [50]. The
clock speed of the DSP or microprocessors, however, could impede the progress
of PWM toward higher frequency. Analog implementation is an alternative to
DSP for high-speed SVM. As with sinusoidal pulsewidth modulation, the SVM


114
20
>
10
o
S4
o
>4
o
predicted
Dm = 0.333
0^0
Vm with a step distur Dance
predicted
Dm = 0.167

da = 0.29

da = 0.145
db = 0.0065
Si
db = 0.147
dc = 0.295
dc= 0.0005
Sc
T
T
t(ms)
16.62 16.64 16.66 16.68
16.7
i
16.72
Figure 5-7 The simulation results of the step response of the
high-order LPWM modulator.
Dm\QO_ = 0.338 (5.60)
During the switching cycle after 0 =0, the amplitude of control voltages jumps
to 20 V, resulting in the amplitude of duty ratios Dm = 0.167 according to
Equation (5.48). The measured effective duty ratios of S1; S2, and S3 are 0.145,
0.147, and 0.0005. Similarly, the amplitude of effective duty ratios is
0.169
(5.61)


100
d=^
3 V g
a 2 A 2 2 2
V + Vl + V VViVV V v,
a /? c a 7 a c c b
(5.8)
-Yjl
b 2 A 2 2 2
V + Vl + V VVVV v Vl
a c a 7 a c c b
(5.9)
3^
2 A 2 2 2
V + V + V V Vl V V V Vl
a b c a b a c c b
(5.10)
For a balanced three-phase system,
2 2 2 9 2
V + Vl + V V Vl V V V Vl = ~V
va b e a b avc c b ^ m
(5.11)
where Vm is the amplitude of the balanced three-phase voltages. Substitution
of Equation (5.11) into (5.8) (5.10) yields the effective duty ratios:
d
a
d\\~d2\
db
n
d\2~d22
d
c
dl3~d23
3AV
IXjl
3AVt
2V
sin
3AV,
sin
sin(cor)
(5.12)
The effective duty ratios of the PWM signals in Equation (5.12) are balanced
three-phase sinusoids. The amplitude of the sinusoids is inversely propor
tional to the amplitude of control voltages.
The model of the high-order LPWM, as shown in (5.12), is derived in the
abc coordinates. Its model in the ofb coordinates can be obtained by applying
abc-ofb transformation, as described in Chapter 2, to Equation (5.12). In the
derivation, assume that all the initial phases relative to the transformation


37
capacitors by open circuits in the ofb equivalent circuit shown in Figure 2-13,
the resulting steady-state equivalent circuit is shown in Figure 2-14.
Figure 2-14 The steady-state equivalent circuit of the three-
phase boost inverter in the ofb coordinate.
Reflecting the resistors (real and complex) in the secondary of the
transformer to the primary, the circuit in Figure 2-14 becomes a simple circuit
shown in Figure 2-15. Two conjugate resistors in Figure 2-15 form a voltage
+
+
D 0V f V,
ev f
g +
D eV bw"
:D
2 R
e 1 j(£>RC
2 R
e 1 + jcRC
Figure 2-15 A simple circuit to solve the steady-state output volt
age and inductor current.
divider; thus the backward voltage and inductor current can be obtained eas
ily. The backward phasor is given by


20
of a PWM converter expeditiously, but also result in a model that is
insightful and amenable to implementation in standard circuit simula
tors.
In the following section, the SFA state-space equations shown in Equa
tion (2.10) and (2.12) (2.14) are transformed into an equivalent circuit in the
abc coordinates using the PWM Switch Model described in refs 18 and 19.
This equivalent circuit is useful in fast simulation and prediction of various
waveforms in the converter even though it is a time-variant circuit. Following
this section, the thesis provides a technique that transforms a time-variant
three-phase converter into a time-invariant equivalent circuit in the ofb coor
dinates. With the help of the ofb equivalent circuit, the steady-state and
dynamic analysis of the three-phase converter becomes much easier.
2.2 Equivalent Circuit in the ABC Coordinates
According to the PWM-Switch-Model technique [18], the PWM switch
can be modeled as a dc transformer that is a standard component in the simu
lator (such as Saber). The turns ratio is the duty ratio of the switching signal
of the PWM switch. This technique is used in dc converters [18], but its idea
can be extended to three-phase PWM converters or other PWM converters.
Therefore, the SFA state-space equations of the PWM converter derived in the
previous section can be transformed into an equivalent circuit using several dc
transformers. This equivalent circuit is constructed by appropriate connec
tions between the dc transformers and other components. The connections are


28
phases. Note that Xf and xare complex conjugates and constant (dc) under
steady state.
2.4 Equivalent Circuit in the QFB Coordinates
2.4.1 Models of Three-Phase Components in the OFB Coordinates
A three-phase converter consists of resistors, inductors, capacitors,
sources, and switches. Their models in the ofb coordinates are obtained by
applying abc-ofb transformation and retaining Kirchhoffs voltage and current
laws to their connectivity, that is, after transformation, circuit topology is the
same as before. In the following analysis, R is the resistor matrix, L is the
inductor matrix, C is the capacitor matrix, and I is the 3x3 identity matrix:
R = IR L IL C = IC (2.30)
Voltage sources. For the set of abc voltage sources in Figure 2-10(a),
application of Equations (2.22) (2.28) yields the set of ofb voltage sources in
Figure 2-10(b). The ofb voltages/currents are found from the abc voltages/cur
rents by Equation (2.29).
Resistors. For the set of abc resistors shown in Figure 2-10(c),
VRabc R*Rabc
application of Equations (2.22) (2.28) to (2.31) yields
vRofb = RlRofb
The ofb resistor set is thus as shown in Figure 2-10(d).
Inductors. For the set of abc inductors in Figure 2-10(e),
(2.31)
(2.32)


CHAPTER 5
ANALYSIS OF HIGH-ORDER LINEARIZING
PULSEWIDTH MODULATOR
This chapter analyzes the high-order linearizing pulsewidth modulator
(LPWM) for a balanced three-phase boost inverter. In the first section, the
sampling effects of the high-order LPWM are neglected for simplicity. The
duty ratios of the output PWM signals of the modulator are shown as balanced
three-phase sinusoids, and their amplitudes are inversely proportional to the
amplitude of the control voltages. The output voltages of the inverter equal
the control voltages multiplied by a constant gain. The nonlinearity of the
three-phase boost inverter is eliminated by the high-order LPWM. Mean
while, line voltage regulation is improved because the output voltages of the
inverter are mainly controlled by the control voltages.
The sampling effects of the high-order LPWM are discussed in Section
2. A pole is contributed by the sampling effects. The location of this pole is
determined by the sampling frequency. When the sampling frequency is high,
the bandwith of the modulator is wide. Simulation results show that the mod
ulator is able to follow change in the control voltage within one switching
cycle. Therefore, sampling effects of the modulator can be neglected in the
design.
97


71
mentation of the LPWM is discussed in this thesis, it is intended to parallel
the recent advances in analog first-order LPWM techniques for dc or sin
gle-phase converters [11, 24].
Analog implementation of the LPWM could be done by the conventional
PWM and nonlinear modulation function in Equation (4.16). To synthesize the
control voltage given by Equation (4.16), multipliers/dividers or other sophis
ticated circuits must be used. As a result, the complexity of the resulting cir
cuitry makes them impractical.
To avoid complicated circuits such as multipliers/dividers, the integra
tor (with reset) are used by the first-order LPWM to solve modulation Equa
tion (4.16) in dc or single-phase converters [11, 24], as shown in Section 4.1 of
this chapter. The first-order LPWMs can be used for some three-phase con
verters, as long as the modulation equation does not have nonlinear terms of
control signals [59, 60].
For most three-phase converters, a modulation equation (4.16) usually
contains some nonlinear terms of control signals. The synthesis of the LPWM
with first-order modulators, therefore, will involve multipliers/dividers. The
high-order LPWM technique developed in this thesis is able to eliminate the
nonlinear terms of control voltages in the modulation equation (4.16). The
resulting circuitry, called high-order LPWM, contains integrators with reset
and hold, and also comparators. The inputs to integrators are just linear func
tions of control voltages. Therefore, the high-high LPWM is simple and easy to
use.


139
Table 6.3 Measured and theoretical output voltage and input current.
Variables
Measured Value
Theoretical Value
Voltage amplitude
115 V
121 V
Voltage phase
22.5
25
Input current
6.84 A
9.98 A
With the high-order LPWM control, the nonlinear three-phase boost
inverter becomes a linear converter. The linearity of the converter is tested
and verified by the prototype circuit. To test the linearity of the inverter, input
voltage Vg is kept constant; the output voltage is measured for different con
trol voltages. The curve of output voltage versus control voltage is shown in
Figure 6-27. It is tested under the condition of Vg =50 and A =40.
Figure 6-27 The linearity of the three-phase boost inverter con
trolled by the high-order LPWM.


102
5.1.2 Steady-State Analysis
In this section, the output voltages of the three-phase boost inverter
that is controlled by the high-order LPWM will be derived. From Equation
(3.32) of Chapter 3, the amplitude of the output voltages of SVM three-phase
boost inverter is given by
Vom = ?h7i+(t0iiC)2 (5.18)
J Um
Dm in Equation (5.18) is provided by the high-order LPWM that is given by:
2V.
= 8
3AV.
(5.19)
Then, the amplitude Vom of the output voltages becomes
Vom = AVmJl+WC)
(5.20)
Of course, this result can be obtained by combining the steady-state ofb
equivalent circuit of the three-phase boost inverter, as shown in Figure 2-14 of
Chapter 2, and the ofb model of the modulator, as shown in Equation (5.14).
The resulting ofb equivalent circuit is shown in Figure 5-2. The resistors in
Figure 5-2 are reflected to the primary side of the transformers. The voltage
V|3W is then solved by the voltage divider as following:
v = Wfg{l~iaRC) <5'21)
Substitution of De in Equation (5.14) into Equation (5.21) yields
vbw = ^AVJl-jQRC)
(5.22)


156
Power Electronics Specialists Conference Record, Maggiore, 1996,
pp. 1013-1018.
[9] K. D. T. Ngo, Topology and Analysis in PWM Inversions, Rectifica
tion, and Cycloconversion, Ph.D. Thesis, California Institute of
Technology, Pasadena, May 1984.
[10] K. M. Smedley and S. Cuk, One-Cycle Control of Switching Con
verters, Proceedings of IEEE Applied Power Electronics Confer
ence, Dallas, 1991, pp. 888-896.
[11] Barry Arbetter and Dragan Maksimovic, Feed-Forward Pulse-
Width Modulators for Switching Power Converters, IEEE Power
Electronics Specialists Conference Record, Atlanta, 1995, pp. 601-
607.
[12] L. Calderone, L. Pinola, V. Varoli, Optimal Feed-forward Compen
sation for PWM DC/DC Converters with Linear and Quadratic
Conversion Ratio, IEEE Transactions on Power Electronics, vol. 7,
no. 2, April 1992, pp. 349-355.
[13] R. D. Middlebrook and S. M. Ck., A General Unified Approach to
Modeling Switching Converter Power Stages, IEEE Power Elec
tronics Specialist Conference Proceedings, Cleveland, 1976, pp. 18-
34.
[14] Seth R. Sanders, George C.Verghese, Generalized Averaging
Method for Power Conversion Circuits, IEEE Transactions on
Power Electronics, vol. 6, no. 2, April 1991, pp. 251-259.
[15] K. D. T. Ngo, Low Frequency Characterization of PWM Con
verter, IEEE Transactions on Power Electronics, vol. PE-1, no. 4,
October 1986, pp. 223-230.
[16] L. P. Huelsman, Basic Circuit Theory with Digital Computations,
Englewood Cliffs, NJ: Prentice-Hall, Inc., 1972.
[17] D. D. White and H. H. Woodson, Electromechanical Energy Conver
sion, New York, John Wiley and Sons, 1959.
[18] V. Vorprian, Simplified Analysis of PWM Converters Using
Model of PWM Switch Part I: Continuous Conduction Mode, IEEE
Transactions on Aerospace and Electronic Systems, vol. 26, no. 3,
May 1990, pp. 490-496.


8
a simple analog high-order linearizing PWM prototype circuit without
multipliers/dividers.
a circuit-oriented analysis technique for balanced three-phase convert
ers.
model and analysis of high-order linearizing PWM modulator.
simulation and experimental verification.
This dissertation is organized as follows. Chapter 2 characterizes the
low-frequency property of the PWM switch and reviews the switching-function
averaging (SFA) technique. The derivation of the SFA state-space equations of
a three-phase converter is presented. Components of balanced three-phase
converters are modeled in the ofb coordinates, by which the time-variant
three-phase converter can be graphically transformed into a time-invariant
equivalent circuit for steady-state and dynamic analyses.
Chapter 3 reviews PWM techniques for dc and three-phase converters,
in which large-signal linearization is emphasized. Two popular PWM tech
niques, sinusoidal PWM (SPWM) and space-vector modulation (SVM), are dis
cussed in details in this chapter.
Chapter 4 identifies the nonlinear problem in three-phase converters.
Two large-signal linearization techniques for three-phase PWM converters
are proposed in this chapter. One technique uses several first-order linearizing
PWM circuits to synthesize duty ratios for the switches in the converter indi
vidually. It involves multipliers/dividers to compute the inputs to the integra
tors. The other technique employs the proposed high-order LPWM circuit to


27
0^(0 = J^C0(t)7t
where co is the instantaneous frequency;
T = -4
1
73
1
A
-;(eT-f)
1 e e
-;(0r + y) '(er + y
1 e e
(2.25)
(2.26)
where
1 _
73
1
70
1
1
r 7r-f) -J*T ~^T 23
-A sr+f
rt
&T(t) = J^co(x)<7t-())^
Note that T-1 = (T*)t (the conjugate transpose matrix of T),
(2.27)
(2.28)
ofb
r -|
0
X
O
Itsi
!
X
1
--
Xf

xbw
73 -;'(VM
_ 2
(2.29)
where x0 is the zero-sequence component, Xf is the forward (rotating) phasor,
and x¡,w is the backward (rotating) phasor. Both <|)x and ())-p are the initial


125
Figure 6-10 The experimental waveforms of six-step reference
voltages of v^ and v2.
Figure 6-11 The high-order LPWM modulator used in the simu
lation.


52
been made to solve the variable frequency problem, they increase the complex
ity of the control circuit.
3.2.7 Direct Amplitude Control
The direct amplitude control [58] can make fundamental amplitude of
the output voltage directly follow the reference voltage. Using Fourier analy
sis, the algorithm is to equalize the subamplitude of the output voltage with
the subamplitude of the reference voltage for a complete fundamental cycle.
This technique involves a significant computation; thus, it usually is imple
mented by DSP or microprocessor.
Among the above PWM techniques, the SPWM and SVM are the most
popular in various three-phase converters. However, due to the constant-slope
carrier, both PWM methods can produce a nonlinear relationship between the
control and output voltages. This results in the output voltage failing to track
the reference voltage linearly. Nevertheless, it can be shown that both SPWM
and SVM can be developed into the linearizing PWM (LPWM) through the
proposed large-signal linearization technique in this thesis. In the following
sections, the conventional SPWM and SVM are discussed and synthesized, so
that the proposed linearizing PWM can be better appreciated.
A three-phase boost inverter, shown in Figure 3-1, is used as an exam
ple to demonstrate how to synthesize the conventional SPWM and SVM.
The state-space equations of the inverter were given by Equations (2.15) -
(2.18) in Chapter 2 and repeated here:


6
Vm/Vg are listed in Table 1.2, where Vm is the amplitude of the output volt
ages; Vg is the amplitude of the input voltages. The conversion ratios in Table
1.2 are derived from the balanced three-phase converters, and the input volt
age and current are assumed in phase in the rectifiers. In the table, Dm is the
amplitude of the sinusoidal control signal. D is the duty ratio of the dc switch
in the flyback topology. It should be noted that these conversion ratios are
derived by assuming that the impedance of input/output reactive components
are small at input/output frequency and can be neglected.
Table 1.2 Voltage conversion ratios Vm/Vg.
Converter Topology
Inverter
Rectifier
Buck
Dm/2
Dm
Boost
1/Dm
2m
Flyback
D/Dm
D/Dm
Although PWM converters are the most popular in various power con
versions, they have an inherent problem: nonlinearity. It keeps the output
voltage from tracking the control signal, gives rise to waveform distortion, and
degrades the performance of the converter. The reason that generates the non
linearity can be found by investigating the voltage conversion ratios of PWM
converters in Table 1.1 for dc converters, in Table 1.2 for three-phase convert
ers, and duty ratios shown in Equation (1.1). The conventional PWM with a
constant slope carrier produces a linear relationship between the duty ratio
and the control signal as shown in Equation (1.1). When the duty ratio is used


22
Figure 2-4 The de transformer with the duty ratio of d.
Figure 2-5 The equivalent circuit of the three-phase boost
inverter in the abc coordinates.
that in Equation (2.15). The capacitor currents in the equivalent circuit also
are found to be the same as those in Equations (2.16) (2.18). Therefore, the
equivalent circuit exactly represents the low-frequency properties of the
three-phase boost inverter. Because there are no real switches in the equiva
lent circuit, the simulation of this circuit is expedited and memory space of the
computer is also greatly saved. The simulation results of the equivalent cir
cuit are the low-frequency components of the voltages and currents in the


148
Common-mode current are shown in Figure 6-40(a) that flow in both
signal path and its return path in the same direction, they generate common
mode noise and contaminate reference signals in the experiment. PWM sig
nals generated from these contaminated reference signals are distorted, and
would not operate the inverter correctly. The technique used to reduce com-
_ < N differential-mode
signal paths / \currents
>i
its return.
-4*-
1CMi^
1 > i
common-mode
i currents
system ground
-t<-
(a)
(b)
reference Q @ 24 KHz
input voltage
of the inverter
rm?
2 mH
signals
TAA/-
i/YY\-
control
voltage Tv-A^r
irm.
1 mH
test system
(control and
inverter)
(c)
Figure 6-40 (a) common-mode currents; (b) common-mode filter; (c)
test system showing three common-mode filters.
mon-mode noise in this experiment is to add common-mode filters to the refer
ence signals. The common-mode filter is constructed just by wrapping signal
and its return wires on the same magnetic core, as shown in Figure 6-40(b).


130
vol
V02
vo3
V04
20 May 2000
23:29:08
Figure 6-16 The experimental waveforms of the integrators of
the prototype high-order LPWM.
TekgHjJii 10.0MS/S 79 Acqs
Figure 6-17 The experimental waveforms of the comparator for
the PWM signal Sj.


23
inverter that are sufficient for us to predict various waveforms and design the
inverter.
To appreciate how fast and accurate the equivalent circuit is, the circuit
in Figure 2-5 is simulated in Saber. The simulation results are compared with
the real-time simulation of the three-phase boost inverter. Supposing that the
PWM method applied to the three-phase boost inverter is continuous SPWM,
one choice for duty ratios is
i D
1 m .
- + sin(0)
dll
d2\
dl2
=
1 Dm (a 271^
3 3 yd 3 )
d22
d\3
d2S_
1 m 2jr^
- + -sin 0 +
3 3 yds)
i D
1 m /Q .
rT-sm(Od)
1 Dn 2n
3 3 V d 3
1 Dm (a 2k
3 3 {d 3
(2.19)
The effective duty ratios are
d
a
dn~d22
db
=
d\2~d22
d
c
d\S~d2S
2D
m
2D
m
3
2D
m
sin
sin(coi)
(-T
l
sin m +
2k
(2.20)
The simulated inverter has the following parameters: Dm = 0.9, Vg = 200 V, Q =
2k(100 Hz), R = 10 Ohm, C = 100 (iF. The real-time simulation result is shown in
Figure 2-6, and the time for 40 ms simulation is 30 seconds. The results of the
simulation with the equivalent circuit is shown in Figure 2-7, and the time for
40 ms simulation is only 0.4 seconds.


33
d
a
d -1 d r\
1 a 2a
db
=
d\b~d2b
d
d 1 d~
c
l c 2c
2D
m
3 -cos(e)
2Dm ( 2n
C0Vd~T
2D
m 2k
,cos(9+t
(2.44)
The pole voltages and the throw currents can be expressed as
v =
ps
d did
a b c
ta
'tb
tc
d abcV tabc
(2.45)
i
d
ta
a
ltb
*tabc
db
/
d
tc
c
i d i
ps abc ps
(2.46)
The voltage reference node of the proceeding equations is assumed to be the
common node of the three-phase voltages. Application of Equations (2.22) -
(2.28) to (2.45) and (2.46) yields
* T
Vps ~ 0fb^ Vtofb
ltofb d ofb^ps
(2.47)
^ rn
where (d q^) is the conjugate transpose matrix of dofb;
ofb
q D\nd ^T^ ~j($d ~ ^j)
J3 J3
(2.48)
The ofb model for the three-phase SPTT switches is thus as shown in Figure
2-ll(c). Before leaving this section, it is worth noting that, unlike the d-q


133
Tek IHiIiV 50.0kS/s l7Acqs
[ -T -]
Sn
Sis
Sl2
^21
$22
^23
21 May 2000
00:04:41
Figure 6-21 Experimental waveforms of PWM signals for the
six switches in the inverter.
R1>
R3> l
... /. uim
UUH
JPPPPPPL
aim
Ml.
1
HlUfc I
JWPfl A
WWi
mu
HUH
4,.m m
HIUH
JIIIIIIL
Ch2 5.00 VM2.00ms Ch1 J 2.48V
5.00 V Ch4 5.00 V
Ref4 5.00 V 2.00ms
Tek anmi so.oks/s
72 Acqs
T
-]
Ref4 5.00 V 2.00ms
dli
di3
di2
21
23
22
21 May 2000
11:38:49
Figure 6-22 Experimental waveforms of duty ratios of PWM sig
nals for the six switches in the inverter.


CHAPTER 4
HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR
This chapter investigates the feasibility of large-signal linearization of
three-phase PWM converters by analog linearizing pulsewidth modulator
(LPWM). The study shows that three-phase PWM converters have nonlinear
relationships between the control and output voltages when they are con
trolled by the conventional analog SPWM or SVM modulators. Some sophisti
cated analog circuits may employ analog multipliers/dividers to compute the
switching instants for three-phase converters to implement linearization.
However, the complexity of the resulting circuitry makes them impractical.
The first-order linearizing PWM circuit uses integrators to compute commuta
tion instants to linearize control-to-output relationship in dc or single-phase
converters. They can also be used to control three-phase converters, but, as
indicated in this chapter, the inputs to the integrators are nonlinear function
of control voltages, resulting in use of analog multipliers/dividers.
A high-order linearizing PWM modulator is developed in this chapter.
It is able to make output voltages of three-phase PWM converters track con
trol signals linearly even in the nonlinear topologies. Instead of multipliers/
dividers, the high-order linearizing PWM uses only integrators with the reset,
and sample/hold to compute the switching instants for the switches. The
62


57
Z.da = tan l((RC)
(3.20)
where II is determined by Equation (3.11).
Combining Equations (3.11) and (3.19), one can find the amplitude of the out
put voltage is
(3.21)
m
3.4 Synthesis of Space-Vector Modulation
The balanced three-phase voltages va, vb, and vc are shown in Figure 3-
2. In space-vector modulation (SVM), the phase voltages are divided into six
segments, and each segment occupies 60. In each segment, one SPTT switch
in Figure 3-1 is permanently attached to one of the three capacitors as the
other sweeps through all three. The position of the stationary switch, as well
as the sweeping ones, are determined by six-step sequence.
In the first segment, 0-60, vb < va and vb < vc. Let d22 = 1, and d2i =
d23 = 0, i. e., S22 is on, S21 and S23 are off all the time during this segment.
The switches, S11; S12, and S13, are switched at high switching frequency. The
corresponding duty ratios, d11; d13, and d12, are determined by Equations
(3.12) (3.14), respectively. Taking advantage of d22 = 1 and d21 = d23 = 0, then
Equations (3.12) (3.14) become
(3.22)


36
Figure 2-13 The equivalent circuit of the three-phase boost
inverter in the ofb coordinates.
The ac components are transformed to their ofb models in the ofb equiv
alent circuit of the inverter. The resulting time-invariant equivalent circuit in
ofb coordinates is shown in Figure 2-13. Since zero-sequence is zero in the bal
anced three-phase converter, the zero sequence circuit is excluded from Figure
2-13. The transformer turns ratios df and dt>w in the ofb circuit are time-
invariant, and they have the same value when (j)d = <])T = 0 in Equation (2.48)
D
so that Djr = D^w
which is represented by De in Figure 2-13:
D
D, =
orD
bw
m
J3
(2.49)
2.5 Graphical Steady-State Analysis
To analyze the three-phase boost inverter in the ofb coordinates under
steady-state condition, replace all the inductors by short circuits and all the


136
Since the gain of the integrator K is not equal to the switching frequency due
to the component errors, Equation (6.9) is modified by
voa = AVmjJl + ((RC)2sin((t-e) (6.11)
J S
where fs is the switching frequency. Therefore, the output voltages of the
three-phase boost track the control voltages linearly. The amplitude is deter
mined by the amplitude of the control voltage and other parameters such as
the ratio of the input-voltage divider, load resistance, filter capacitance, and
ratio between switching frequency and the gain of the integrator. However, all
these parameters are independent of the operating condition of the inverter.
There is a phase shift between the output and control voltages that is caused
by the output capacitor.
The output voltages of the three-phase inverter measured at 600 W are
shown in Figure 6-24; the output voltages measured at 1000 W are shown in
Figure 6-25. Both measurement results show that the high-order LPWM mod
ulator is able to generate low-distortion sinusoidal waveforms in the three-
phase boost inverter.
Figure 6-26 shows inductor current, input voltage, control voltage, and
output voltage. A phase shift between the control and output voltages exists
due to the load resistor and filter capacitor. The value can be found:
0 = vl'l68 360 = 25 (6.12)
16.67 ms
This value is quite close to its theoretical values decided by Equation (6.10):


7
to control nonlinear converters that have a nonlinear relationship between the
duty ratio and the output voltage, as shown in Table 1.1 and Table 1.2, the
output voltage is proven to be a nonlinear function of the control voltage.
The nonlinear problem of PWM converters has been solved mainly by
the small-signal linearization technique of negative feedback control.
Recently, large-signal PWM linearization techniques were proposed in [10]
and [11]. As an alternative linearization technique, the large-signal PWM lin
earization features an open-loop, steady-state linear control-to-output rela
tionship, regardless of operating conditions, leading to simple and stable
control circuit design. Moreover, this technique has better line voltage regula
tion not only for the linear converters, but also for the nonlinear converters
that are difficult for the feed-forward control [12],
The large-signal PWM linearization techniques in [10, 11] can success
fully solve the nonlinear problem for dc-dc converters and single-phase invert
ers, in which the PWM controller deals only with a single control variable.
However, three-phase converters or multi-phase converters have more than
one control variable. Therefore, the first-order PWM linearization is limited in
three-phase converters or multi-phase converters. Nevertheless, the idea of
the large-signal linearization is a useful concept that could be extended to the
three-phase converters, thus motivating the present research and leading to
the following objectives of the thesis:
a general way to synthesize the high-order linearizing PWM for bal
anced three-phase converters.


42
From Equation (2.62), the poles of the three-phase boost inverter consist of a
real pole and complex poles. Like the dc boost converter, the bandwidth is
affected by the duty ratio De.
The control-to-output transfer function of the inverter can be found
from Equations (2.55) and (2.56), which is given by
(2.64)
Letting de = 0, the input-to-backward phasor transfer function of the inverter
can be found in the circuit in Figure 2-18, which is given by
(2.65)
The audiosusceptibility, that is, the input-to-output transfer function, is
solved from Equation (2.65)
(2.66)
The transfer functions graphically derived from the small-signal equivalent
circuit in Figure 2-18 completely agree with those derived by the equation-ori
ented method [9]. However, the graphical derivation is much simpler than the
manipulation of state-space equations.
In conclusion, among existing modeling techniques, the switching-func
tion averaging is the easiest technique to model three-phase converters. The
equivalent circuit of the converter in the abc coordinates constructed from the


81
and P and Q functions, and it synthesizes the LPWM directly from the
reduced SFA equations. The resulting LPWM circuit is called high-order
LPWM because it uses more than one integrators to get one duty ratio. The
analog high-order LPWM modulator is developed for a general PWM con
verter in this section. It employs only integrators (with reset and hold) to com
pute the commutation instants of the switches. The inputs to the integrators
and comparators are linear functions of the control and input voltages. The
synthesis procedure of the high-order LPWM is demonstrated through a
three-phase boost inverter. The modulator, together with the inverter, is simu
lated in Saber. The result shows that the output voltages can track the control
voltages linearly, and the high-order LPWM modulator is simple and easy to
use.
The synthesis of the high-order LPWM is based on the steady-state SFA
equations of the PWM converter, which are just linear functions of state vari
ables and duty ratios of the switches, as described in Chapter 2. In the
steady-state condition, the derivative terms in state-space equations are zero.
As an example, the steady-state SFA equations of a PWM converter with two
independent duty ratios are given by
1 jd 1 j "4* £Z)2^12 ^"1 (4.40)
a2\d\\ + a22^\2 = ^2 (4.41)
where coefficients a22, ki and k2 are related to control and input voltages.
For the LPWM modulator, they are reference and input voltages.


67
three-phase output voltages va, v^, and vc are purely sinusoidal. The control
voltages vcnti_a and vcnti_b into the SPWM are sinusoidal waveforms with the
amplitude Dm:
vc*tl-a = 5 + Tpsin(G>t) (4.10)
Vcl-t = | + 3!sin0-120') (4.11)
The dc offset in the control voltages is needed to guarantee the duty ratio pos
itive.
The control voltages are compared with the constant-slope carrier in
the SPWM. The duty ratios of the resulting PWM signals are proportional to
Figure 4-2 The three-phase boost inverter controlled by the
conventional SPWM modulator.


158
[29] H. Jin, G. Joos, M. Pande, P. D. Ziogas, Feedforward Techniques
Using Voltage Integral Duty-Cycle Control, IEEE Power Electron
ics Specialists Conference Record, Toledo, 1992, pp. 370-377.
[30] Manish Pande, Hua Kin, Geza Joos, Modulated Integral Con
trol Technique for Compensating Switch Delays and Non-ideal
DC Bus in Three-Phase Voltage Source Inverters, IEEE
IECON93 Proceedings, Hawaii, 1993, pp. 1222-1227.
[31] Regan Zane and Dragan Maksimovic, Nonlinear-carrier Con
trol for High-Power-Factor Rectifiers Based on Flyback, Cuk or
SEPIC Converters, Proceedings of IEEE Applied Power Electron
ics Conference, San Jose, 1996, pp. 814-820.
[32] Dragan Maksimovic, Yungtaek Jang, and Robert W. Erickson,
Nonlinear-Carrier Control for High-Power-Factor Boost Rectifi
ers, IEEE Transactions on Power Electronics, vol. 11, no. 4, July
1996, pp. 501-510.
[33] Regan Zane and Dragan Maksimovic, Modeling of High-Power-
Factor Rectifiers Based on Switching Converters with Nonlinear-
Carrier Control, IEEE Transactions on Power Electronics, vol. 7,
no. 2, April 1992, pp. 349-355.
[34] Esam H. Ismail, Robert W. Erickson, Application of one-cycle con
trol to three phase high quality resonant rectifier, IEEE Power
Electronics Specialists Conference Record, Atlanta, 1995, pp. 1183-
1190.
[35] Joel P. Gegner, C. Q. Lee, Linear Peak Current Mode Control: A
Simple Active Power Factor Correction Control Technique, IEEE
Power Electronics Specialists Conference Record, Maggiore, 1996,
pp. 196-202.
[36] R. Redi and N. O. Sodal, Near-Optimum Dynamic Regulation of
DC-DC Converters Using Feed-forward of Output Current and
Input Voltage With Current-Mode Control, IEEE Transactions on
Power Electronics, vol. 1, no. 3, July 1986, pp. 181-192.
[37] Dennis Gyma, A Novel Control Method to Minimize Distortion
in AC Inverters, Proceedings of IEEE Applied Power Electronics
Conference, Orlando, 1994, pp. 941-946.
[38] Yan-Fei Liu, and Paresh C. Sen, A Novel Method to Achieve Zero-
Voltage Regulation in Buck Converter, IEEE Transactions on
Power Electronics, vol. 10, no. 3, May 1995, pp. 292-301.


157
[19] K. D. T. Ngo, Simplified Analysis of PWM Converters Using Alter
nate Forms of the PWM Switch Models, IEEE Transactions on
Aerospace and Electronic Systems, vol. 35, no. 4, October 1999, pp.
1283-1292.
[20] E. van Dijk, J. Ben Klaassens, PWM-Switch Modeling of DC-DC
Converters, IEEE Transactions on Power Electronics, vol. PE-10,
no. 6, November 1995, pp. 659-665.
[21] C. T. Rim, et al., Transformers as Equivalent Circuits for
Switches: General Proofs and D-Q Transformation-Based Analy
ses, IEEE Transactions on Industry Applications, vol. 26, no. 4,
July/August 1990, pp. 777-785.
[22] Huang Xu, Jun Chen, K.D.T. Ngo, Graphical DC Analysis of
Three-Phase PWM Converters Using a Complex Transformation,
IEEE ISCAS 2000 Proceedings, vol. Ill, Geneva, 2000, pp. 243-246.
[23] Keyue M. Smedley, Integrators in Pulsewidth Modulation, IEEE
Power Electronics Specialists Conference Record, Maggiore, 1996,
pp. 773-781.
[24] Zheren Lai, Keyue Ma Smedley, A General Constant-frequency
Pulsewidth Modulator and Its Applications, IEEE Transactions
on Circuits and Systems-I: Fundamental Theory and Applications,
vol. 45, no. 4, April 1998, pp. 386-396.
[25] Zheren Lai, Keyue Ma Smedley, A Family of Continuous-Conduc
tion-Mode Power-Factor-Correction Controllers Based on the Gen
eral Pulsewidth Modulator, IEEE Transactions on Power
Electronics, vol. 13, no. 3, May 1998, pp. 501-510.
[26] K. Mark Smith, Zheren Lai, Keyue M. Smedley, A New PWM Con
troller with One Cycle Response, IEEE Power Electronics Special
ists Conference Record, St. Louis, 1997, pp. 970-976.
[27] Zheren Lai, Keyue M. Smedley, and Yunhong Ma, Time Quantity
One-Cycle Control for Power Factor Correctors, Proceedings of
IEEE Applied Power Electronics Conference, San Jose, 1996, pp.
821-827.
[28] Zheren Lai, Keyue M. Smedley, A Low Distortion Switching Audio
Power Amplifier, IEEE Power Electronics Specialists Conference
Record, Atlanta, 1995, pp. 174-180.


126
+5 V
0.1.uF
Reset
Hold
-v
o
Figure 6-13 The operation waveforms of the integrator with sam
ple and hold.
tor becomes zero. After reset, the integrator starts to integrate the input volt
age Vj. The output voltage v0 is
v
O
0
(6.4)


HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR
FOR THREE-PHASE POWER CONVERTERS
BY
JUN CHEN
A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL
OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT
OF THE REQUIREMENTS FOR THE DEGREE OF
DOCTOR OF PHILOSOPHY
UNIVERSITY OF FLORIDA
2000


147
A better layout is shown in Figure 6-38(b), in which signal path is directly con
nected to the source of power MOSFET.
+12 V
mosfetJ
driver >o
bad layout
MOSFET
parasitic
MOSFET
driver
+12 V good layout
MOSFET
parasitic
Figure 6-38 (a) power and signal share ground; (b) power and signal
grounds are separated.
The test system consists of four circuit boards. There are signal connec
tions among these boards. Each signal path should leave one circuit board and
arrive another board together with its return path, as shown in Figure 6-39.
signal pat
component
component
ground connections
between two boards
Figure 6-39 Signal connections between two circuit boards.
In general, the bottom line for layout is to keep the layout small and neat.
Each current path and its return should be clearly identifiable and run paral
lel, in close proximity.


80
Figure 4-9 The simulation results of output and control voltages
of the three-phase boost inverter controlled by
first-order LPWM circuits. va = Fmsin(Q.t) with Vm =
262 V and Q = 27t(60Hz).
4.5 Linearization by High-Order LPWM
The main problem for first-order LPWM circuits to linearize
three-phase converters is that multipliers/dividers may be employed to syn
thesize the inputs to the integrators. The problem is solved by a technique
presented in this section. With the help of this technique, the SFA equations of
a three-phase converter are reduced into a set of SFA equations that have only
one unknown duty ratio in each of them, and they have coefficients of linear
functions of the control voltages. Different from the first-order LPWM imple
mentation, this technique does not need to find the expressions of duty ratios,


118
The analog high-order LPWM, the reference circuit, and the gate-drive
logic in Figure 6-l(a) are presented in the first section of this chapter. The cor
responding waveforms measured from the prototype circuits are also included.
The second section presents experimental results and discusses how the high-
order LPWM improves the performance of a nonlinear three-phase boost
inverter. Some practical issues in the experiment are discussed in the last sec
tion.
6.1 Analog Implementation of High-Order LPWM
The high-order LPWM synthesizes the PWM signals S1; S2, and S3
from the six-step reference voltages, Vj and v2, and input voltage Vg, as shown
in Figure 6-l(a). The circuit that generates and v2 consists of three parts.
The first part is to generate three-phase reference voltages from a single
phase voltage. The second part is to generate digital six-step signals Sgl Sg6.
The third part is to produce the six-step reference voltages Vi and v2 using
analog multiplexers. The circuit in Figure 6-2 takes a single-phase voltage va
Figure 6-2 The circuit to generate balanced three-phase volt
ages.


69
4.3 Large-Signal Linearization of PWM Converters
A typical PWM converter controlled by the LPWM is shown in Figure
4-4. The PWM converter could have single or multiple input/output variables.
The variables at the input/output side could be dc or ac. For example, in
three-phase inverters, the input is dc voltage and the output are three-phase
voltages, in which the output voltages are controlled variables. In three-phase
rectifiers, the inputs are three-phase voltages and the output is dc voltage,
where both output dc voltage and the input currents are controlled variables.
In order to simplify the explanation of large-signal linearization technique
presented in this thesis, we consider only the output voltage vQ as the con
trolled variable. The objective is to make the output voltage vQ track the con
trol voltage vc linearly through the LPWM.
vg(ac, dc)
ig (ac, dc)
Clock
POWER STAGE
d(ac, dc)
HIGH-ORDER
LPWM
vG(ac, dc)
iG (ac, dc)
vc (ac, dc)
ic (ac, dc)
Figure 4-4 The converter controlled by the high-order LPWM.


9
solve SFA equations. The inputs to the high-order LPWM circuit are linear
functions of the control and input voltages. Therefore, no multipliers/dividers
are required in the circuit, making analog implementation simple.
Chapter 5 focuses on the analysis of the LPWM-controlled converters.
The large-signal and small-signal models of the LPWM are derived in this
chapter. The time delay caused by sampling effects in the high-order LPWM is
also investigated.
Chapter 6 concentrates on implementation and experimentation of the
proposed analog high-order linearizing PWM. The experimental circuits and
results are presented in this chapter.
Chapter 7 consists of the summary and conclusion of this dissertation.


13
The operation of the throw k in Figure 2-1 is specified and modulated
by the switching function d*]^, as shown in Figure 2-2, where the asterisk *
denotes the instantaneous switching function. The function is one when the
throw is closed and zero when the throw is open. A switching function defined
this way can always be assigned to any throw in the converter without prior
knowledge of modulation strategy or sequence of switched topologies. There
fore, this switch model allows derivation of state-space equations of a PWM
converter without specifying modulation strategy. After the state-space equa
tions are derived, they can be used for any PWM strategy to do a specific anal
ysis [9],
In Figure 2-1, v^-v*]^ are throw voltages, i*i-i*M are throw currents,
i*p is the pole current, and v*p is the pole voltage. The asterisk denotes the
exact value. In switching functions shown in Figure 2-2 d11-d1jy[ stand for duty
ratios of switching functions. Ts is the switching period.
1
Figure 2-2 Switching functions of SPMT switches.


34
transformation, the ofb transformation results in decoupled zero-sequence,
forward, and backward components subcircuits.
SPTT switch
+
*ps -
dla/
31
'ps
die/
d2a V d2b V d2c
ta
-o vf
. hb ta
-+- vtb
+
V
ps
1,
tc
-o vtC

(a)
(c)
i\i
p +
. -ta
db:l
. bb
M
w +
. -tb
dc:l
^tc
5 ii
p +
vtc
(b)
Figure 2-11 (a) Three-phase SPTT switches; (b) switch model in
the abc coordinates; (c) switch model in the ofb coordi
nates.
2.4.2 Derivation of Equivalent Circuit in the OFB Coordinates
The equivalent circuit for a balanced three-phase PWM converter can
be constructed graphically in the ofb coordinates just by replacing each set of
three-phase switches by appropriately connected ofb transformers, and each
set of three-phase components by the corresponding ofb component models.
The resulting ofb equivalent circuit is time-invariant, in which the forward


ACKNOWLEDGMENTS
I would like to express my deepest gratitude to my research committee
chairman, Dr. Khai D. T. Ngo, for welcoming me to the power electronics group
at the University of Florida. He provided constant support and encourage
ment for my study and research. I learned not only the knowledge of power
electronics, but also a work attitude that has greatly reshaped my career. I
also wish to thank Dr. Dennis P. Carroll, Dr. Alexander Domijan, Dr. Vladimir
A. Rakov, and Dr. Loc Vu-Quoc for their participation on my research commit
tee.
I am very grateful to American Research Corporation for its financial
support and projects, and also Texas Instruments for a TI fellowship.
My special thanks go to my colleagues, Jun Xu and Paiboon Nakmah-
achal, for their helpful discussions and suggestions in my project and disserta
tion.
There is no word for me to describe my gratitude to my wife, Yin Xie,
who spent her time taking care of our family when I was working at the lab
day and night. Without her help and patience, I would not know how to finish
my research and dissertation.
n


BIOGRAPHICAL SKETCH
Jun Chen was born in Hubei Province, P. R. China, on April 8, 1966. He
received his B.S. degree and M.S. degree in electrical engineering from
Chendu University of Science and Technology, Chendu, P. R. China, in 1986
and in 1989, respectively. Between 1989 and 1994, he joined the Automation
and Electrification Institute in Southwest Jiaotong University, Chendu, P. R.
China, as a research engineer, where he was in charge of development of tele
control equipment for power systems. In May 1994, he was admitted to the
electrical engineering department of Hong Kong Polytechnic University as a
Ph.D. student, where he conducted research in power electronics. Since 1996,
he has been studying in the Power Management (PMag) Group of the electri
cal and computer engineering department at the University of Florida,
Gainesville, Florida. His research is focused on power conversion and manage
ment.
162



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53
diL
L = Vg-(dn-d2l)va-(dn-d22)vb-{du-d13)\
(3.1)
dvn 2v -vh-vr
(3.2)
dv, 2 vh~vn-vr
c- = (*-,/)<*4^'
(3.3)
dv
C = (du- d23)iL-
2vc~va-vb
3 R
(3.4)
In the above equations, va, v^, and vc are balanced three-phase voltages. Their
frequency and amplitude are known from the specifications:
va Vmsin(cor) vb = V^siihcof-120) vc = Vmsin(coi + 120) (3.5)
Duty ratios in the state-space equations d^ d23 are unknown, which will be
synthesized from Equations (3.1) (3.4).
For a balanced three-phase system, Equation (3.2) can be expressed as


101
matrix T and duty ratio vector d are zero. The resulting time-invariant ofb
model of the high-order LPWM is
Dofb=[DoDf DbJ =
V
8
V
~\T
g
J3AVm J3AV
m J
(5.13)
The zero-sequence component of the effective duty ratios is zero; the forward-
and backward-sequence components become the same:
De Df Dbw -
V
73 AV
(5.14)
The small-signal model of the high-order LPWM can be obtained by
perturbation of (5.14) around a dc operating point specified by the input volt
age Vg, the control voltage Vm, as well as the effective duty ratio De. The
small-signal component of the duty ratio de becomes a linear combination of
the small-signal perturbations in Vg and Vm:
de KJm + Kgvg (5.15)
The gain Km and Kf are found by differentiation of (5.15) with respect to Vg
and Vm:
= T = _J__ _Rl
V,n 73 AV2m Vm
K = h = 1 1
* *7 73 AVm
(5.16)
(5.17)


105
\ om
G(s) = =
id:
h
(
A
v s
(0.
1 +
CO
z 1
D(5)
(5.26)
Combined with transfer function Km of the modulator, the control-to-output
transfer function Gc of the LPWM-controlled three-phase boost inverter is
given by
v v d
G.f \ om om ue ^, v v
c(s) = = = G(s)Kn
Vm
de vm
(
h
A
co
z\
D(s)
(5.27)
Therefore, at the low frequency, the small-signal control-to-output gain is a
constant A, independent of operating conditions, which can simplify feedback-
loop design of the LPWM-controlled power converter. It is to note that the
LPWM does not have any effect on corner frequencies of the transfer function.
These corner frequencies remains the same as those in the conventional-
PWM-controlled inverter.
Let de = 0, the input-to-output transfer function of the power stage is
shown in Equation (2.66) of Chapter 2 and given by
v i
H(s) =
vg 2 De
1+1
A
UJ
1
l + J-
D(s)
(5.28)
From Equations (5.26) and (5.28), one can find that
gw=4:(i-;CK)
(5.29)
From Figure 5-3, the input-to-output transfer function of the LPWM-con
trolled three-phase boost inverter can be expressed by


89
Figure 4-14 Six-stepped reference voltage signals to the LPWM.
Table 4.1 Six-step reference voltages and duty ratios.
vx
vy
dx
dy
dz
a 5
0
0
Seg.I
vab
vcb
dn
dn
d12
d22
d23
d21
Seg. II
vac
vab
d23
d22
d21
dn
d12
d13
Seg. Ill
vbc
vac
d12
dn
d13
d23
d21
d22
Seg. IV
vba
vbc
d21
d23
d22
di2
dl3
dll
Seg. V
vca
vba
d13
d12
dll
d21
d22
d23
Seg. VI
vcb
vca
d22
d21
d23
d13
dn
d12
In order to use the proposed high-order LPWM, it is necessary to trans
form the preceding equations into the following forms:
dnv = V -d" 1 v
y y g x yx
(4.60)
, n 1 ,n 1 1 ,n.
dxvy = 2^dx Vx> + 2 V2vjc-V
(4.61)


TABLE OF CONTENTS
pages
ACKNOWLEDGMENTS ii
ABSTRACT v
CHAPTERS
1 INTRODUCTION 1
2 MODELING AND ANALYSIS OF THREE-PHASE CONVERTERS 10
2.1 Derivation of State-Space Equations of PWM Converters 11
2.2 Equivalent Circuit in the ABC Coordinates 20
2.3 ABC-OFB Transformation 26
2.4 Equivalent Circuit in the OFB Coordinates 28
2.5 Graphical Steady-State Analysis 36
2.6 Graphical Small-Signal Analysis 38
3 REVIEW OF PULSEWIDTH MODULATION 44
3.1 Pulsewidth Modulation for DC Converters 44
3.2 Pulsewidth Modulation for Three-Phase Converters 48
3.3 Synthesis of Continuous Sinusoidal Pulsewidth Modulation 55
3.4 Synthesis of Space-Vector Modulation 57
4 HIGH-ORDER LINEARIZING PULSEWIDTH MODULATOR 62
4.1 First-Order Linearizing Pulsewidth Modulator 63
4.2 Nonlinear Problem in Three-Phase Converters 66
4.3 Large-Signal Linearization of PWM Converters 69
4.4 Linearization by First-Order LPWM 72
4.5 Linearization by High-Order LPWM 80
5 ANALYSIS OF HIGH-ORDER LINEARIZING
PULSEWIDTH MODULATOR 97
5.1 Analysis of High-Order Linearizing PWM 98
5.2 Sampling Effects in High-Order LPWM 107
iii


63
inputs to the integrators are just linear functions of the control and state vari
ables.
In the first section of this chapter, the first-order LPWM is reviewed,
which is helpful to understand the concept of large-signal linearization and
analog implementation of the LPWM. The nonlinear problem, caused by the
conventional PWM modulator in three-phase PWM converters, is identified in
the second section. A general way to linearize PWM converters is discussed in
the third section. Implementation of the LPWM modulator by first-order
LPWM circuits for a three-phase inverter is given in the fourth section. The
fifth section presents the high-order LPWM that linearizes three-phase con
verters with simple analog circuits. The techniques to synthesize a high-order
LPWM and eliminate multipliers/dividers in the LPWM circuit of three-phase
converters is discussed. An analog implementation of the high-order LPWM
for a three-phase converter is derived and simulated.
4.1 First-Order Linearizing Pulsewidth Modulator
The carrier signal in the conventional PWM modulator has the fixed
frequency and constant slope. The duty ratio of switching signals generated by
the conventional PWM is directly proportional to the control signal. The car
rier signal in the linearizing PWM (LPWM) has the fixed frequency, but vary
ing slope. The duty ratio generated from the LPWM is a nonlinear function of
the control signal and input voltage.