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Modeling and Simulation of Graphene Devices

Permanent Link: http://ufdc.ufl.edu/UFE0043962/00001

Material Information

Title: Modeling and Simulation of Graphene Devices
Physical Description: 1 online resource (127 p.)
Language: english
Creator: Chauhan, Jyotsna
Publisher: University of Florida
Place of Publication: Gainesville, Fla.
Publication Date: 2012

Subjects

Subjects / Keywords: frequency -- graphene -- high
Electrical and Computer Engineering -- Dissertations, Academic -- UF
Genre: Electrical and Computer Engineering thesis, Ph.D.
bibliography   ( marcgt )
theses   ( marcgt )
government publication (state, provincial, terriorial, dependent)   ( marcgt )
born-digital   ( sobekcm )
Electronic Thesis or Dissertation

Notes

Abstract: Graphene has been explored as one of the promising materials to sustain Moore's law especially with silicon approaching its limits. The extraordinary electronic properties of graphene like high mobility, high saturation velocity etc. have created a gold rush for graphene based electronics. The numerical study in this dissertation provides valuable insights into device physics and characteristics of graphene Field Effect Transistors (FETs). First part of dissertation studies the effect of inelastic phonon scattering in graphene FETs using semi classical approach. A kink behavior due to ambipolar transport is observed. Even the low field mobility is affected by inelastic phonon scattering in recent graphene FET experiments reporting high mobilities. Physical mechanisms for good linearity are explained. The high frequency performance limits of graphene FETs are studied by running quantum simulations. Although Klein band-to-band tunneling is significant for sub-100nm graphene FETs, it is possible to achieve a good transconductance and ballistic on-off ratio larger than 3 even at a channel length of 20nm. At a channel length of 20nm, the intrinsic cut-off frequency remains at a couple of THz for various gate insulator thickness values, but a thin gate insulator is necessary for a good transconductance and smaller degradation of cut-off frequency in the presence of parasitic capacitance. With a thin high-? gate insulator, the intrinsic ballistic fT is above 5THz for gate length of 10nm. The source and drain resistance severely degrade RF parameters, fMAX and fT.It is found that the intrinsic fT is close to the LC characteristic frequency set by graphene kinetic inductance and quantum capacitance. Graphene on silicon contacts are modeled. Graphene on silicon forms Schottky contact with a flexibility to tune the Schottky barrier height(SBH) by silicon doping and gate voltage. Multiple layers of graphene at the interface as well as donor type interface states, however, reduce the gate modulation. Last subject investigates the thermoelectric transport properties of graphene FETs in presence of elastic and surface polar phonon scattering. It is found that scattering reduces the thermoelectric power. In addition, surface polar phonon scattering also degrades the symmetry of TEP with respect to the Dirac point.
General Note: In the series University of Florida Digital Collections.
General Note: Includes vita.
Bibliography: Includes bibliographical references.
Source of Description: Description based on online resource; title from PDF title page.
Source of Description: This bibliographic record is available under the Creative Commons CC0 public domain dedication. The University of Florida Libraries, as creator of this bibliographic record, has waived all rights to it worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law.
Statement of Responsibility: by Jyotsna Chauhan.
Thesis: Thesis (Ph.D.)--University of Florida, 2012.
Local: Adviser: Guo, Jing.
Electronic Access: RESTRICTED TO UF STUDENTS, STAFF, FACULTY, AND ON-CAMPUS USE UNTIL 2012-11-30

Record Information

Source Institution: UFRGP
Rights Management: Applicable rights reserved.
Classification: lcc - LD1780 2012
System ID: UFE0043962:00001

Permanent Link: http://ufdc.ufl.edu/UFE0043962/00001

Material Information

Title: Modeling and Simulation of Graphene Devices
Physical Description: 1 online resource (127 p.)
Language: english
Creator: Chauhan, Jyotsna
Publisher: University of Florida
Place of Publication: Gainesville, Fla.
Publication Date: 2012

Subjects

Subjects / Keywords: frequency -- graphene -- high
Electrical and Computer Engineering -- Dissertations, Academic -- UF
Genre: Electrical and Computer Engineering thesis, Ph.D.
bibliography   ( marcgt )
theses   ( marcgt )
government publication (state, provincial, terriorial, dependent)   ( marcgt )
born-digital   ( sobekcm )
Electronic Thesis or Dissertation

Notes

Abstract: Graphene has been explored as one of the promising materials to sustain Moore's law especially with silicon approaching its limits. The extraordinary electronic properties of graphene like high mobility, high saturation velocity etc. have created a gold rush for graphene based electronics. The numerical study in this dissertation provides valuable insights into device physics and characteristics of graphene Field Effect Transistors (FETs). First part of dissertation studies the effect of inelastic phonon scattering in graphene FETs using semi classical approach. A kink behavior due to ambipolar transport is observed. Even the low field mobility is affected by inelastic phonon scattering in recent graphene FET experiments reporting high mobilities. Physical mechanisms for good linearity are explained. The high frequency performance limits of graphene FETs are studied by running quantum simulations. Although Klein band-to-band tunneling is significant for sub-100nm graphene FETs, it is possible to achieve a good transconductance and ballistic on-off ratio larger than 3 even at a channel length of 20nm. At a channel length of 20nm, the intrinsic cut-off frequency remains at a couple of THz for various gate insulator thickness values, but a thin gate insulator is necessary for a good transconductance and smaller degradation of cut-off frequency in the presence of parasitic capacitance. With a thin high-? gate insulator, the intrinsic ballistic fT is above 5THz for gate length of 10nm. The source and drain resistance severely degrade RF parameters, fMAX and fT.It is found that the intrinsic fT is close to the LC characteristic frequency set by graphene kinetic inductance and quantum capacitance. Graphene on silicon contacts are modeled. Graphene on silicon forms Schottky contact with a flexibility to tune the Schottky barrier height(SBH) by silicon doping and gate voltage. Multiple layers of graphene at the interface as well as donor type interface states, however, reduce the gate modulation. Last subject investigates the thermoelectric transport properties of graphene FETs in presence of elastic and surface polar phonon scattering. It is found that scattering reduces the thermoelectric power. In addition, surface polar phonon scattering also degrades the symmetry of TEP with respect to the Dirac point.
General Note: In the series University of Florida Digital Collections.
General Note: Includes vita.
Bibliography: Includes bibliographical references.
Source of Description: Description based on online resource; title from PDF title page.
Source of Description: This bibliographic record is available under the Creative Commons CC0 public domain dedication. The University of Florida Libraries, as creator of this bibliographic record, has waived all rights to it worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law.
Statement of Responsibility: by Jyotsna Chauhan.
Thesis: Thesis (Ph.D.)--University of Florida, 2012.
Local: Adviser: Guo, Jing.
Electronic Access: RESTRICTED TO UF STUDENTS, STAFF, FACULTY, AND ON-CAMPUS USE UNTIL 2012-11-30

Record Information

Source Institution: UFRGP
Rights Management: Applicable rights reserved.
Classification: lcc - LD1780 2012
System ID: UFE0043962:00001


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1 MODELING AND SIMULATION OF GRAPHENE DEVICES By JYOTSNA CHAUHAN A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPH Y UNIVERSITY OF FLORIDA 2012

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2 2012 Jyotsna Chauhan

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3 To my parents and my husband

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4 ACKNOWLEDGMENTS I would like to express my immense gratitude and thanks to my adviso r Prof. Jing Guo for his continuing guidance and support. His grea t insight and encouragement allowed me to overcome all obstacles in making this work as complete as possible. Under Prof. Jing Guo, I have assimilated a great deal of knowledge not only on the subject but also on research methodologies and have learnt simp le, effective and holistic ways of approaching complex problems. It has been a wonderful learning experience which I will cherish throughout and I am deeply indebted to him for it. I would also like to sincerely thank Dr. Gijs Bosman, Dr. Ant Ural and Dr Jiangeng Xue for serving on my committee and their helpful suggestions. Thanks are also in order for my colleagues Dr. Youngki Yoon, Dr. Yijian Ouyang, Pei Zhao, Wenchao Chen Qun Gao Yang Lu Gyungseon Seol, Leitao Liu Dukjin Kim and Dr. Bala Kumar for their help and collaboration which made this journey rich and enjoyable. I am also grateful to my parents, my brother and my sister in law with all my heart for supporting and motivating me in my endeavors. I would also like to thank my husband Ameya Gupt e for his encouragement and support in my work. His confidence in me made me achieve my dream

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5 TABLE OF CONTENTS page ACKNOWLEDGMENTS ................................ ................................ ................................ .. 4 LIST OF FIGURES ................................ ................................ ................................ .......... 7 ABSTRACT ................................ ................................ ................................ ..................... 9 CHAPTER 1 PROLOGUE TO THESIS ................................ ................................ ........................ 11 1.1 Back ground: Overview of Graphene Based Electronics ................................ 11 1.2 Overview of the Methodologies ................................ ................................ ..... 13 1.2.1 Semi Classical Transport ................................ ................................ .... 14 1.2.2 Quantum Transport ................................ ................................ ............. 16 1.3 Outline of Thesis ................................ ................................ ........................... 18 2 INELASTIC PHONON SCATTERING IN GRAPHENE F ETS ................................ 22 2.1 Introductory Remarks ................................ ................................ .................... 22 2.2 Simulation Approach ................................ ................................ ..................... 23 2.3 R esults and Discussions ................................ ................................ ............... 29 2.3.1 Calibration of Numerical BTE ................................ .............................. 29 2.3.2 Ambipolar Conduction ................................ ................................ ......... 30 2.3.3 Effect of Elastic and Inelastic Phonon Scattering ................................ 31 2.3.4 Output Characteristics ................................ ................................ ......... 32 2.3.5 High F requency Behavior ................................ ................................ .... 35 2.4 Summary ................................ ................................ ................................ ....... 37 3 ASSESSMENT OF HIGH FREQUENCY PERFORMANCE LIMITS OF GRAPHENE FIELD EFFECT TRANSISTORS ................................ ....................... 44 3.1 Introductory Remarks ................................ ................................ .................... 44 3.2 Simulation Approach ................................ ................................ ..................... 45 3.3 Results and Discussions ................................ ................................ ............... 50 3.3.1 Output Characteristics ................................ ................................ ......... 50 3.3.2 Issues with Channel Length Scaling ................................ ................... 51 3.3.3 RF Performance of Graphene FETs with Thin Gate Insulator ............. 55 3.3.4 Kinetic Inductance in Graphene FETs ................................ ................. 58 3.4 Summary ................................ ................................ ................................ ....... 61 4 A COMPUTATIONAL STUDY OF GRAPHENE SILICON CONTACT .................... 71 4.1 Introductory Remarks ................................ ................................ .................... 71 4.2 Simulation Approach ................................ ................................ ..................... 73

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6 4.3 Results and Discussions ................................ ................................ ............... 77 4.3.1 Thermal Equilibrium Electrosta tics ................................ ...................... 78 4.3.2 Effect of Silicon Doping ................................ ................................ ....... 79 4.3.3 Gate Modulation ................................ ................................ .................. 80 4.3.4 Effect of Multilayer Graphene at Interface ................................ ........... 81 4.3.5 Effect of Interface States ................................ ................................ ..... 82 4.4 Summary ................................ ................................ ................................ ....... 83 5 A COMPUTATIONAL STUDY OF THERMOELECTRIC TRANSPORT PROPERTIES OF GRAPHENE ................................ ................................ .............. 91 5.1 Introductory Remarks ................................ ................................ .................... 91 5.2 Simulation Approach ................................ ................................ ..................... 92 5.3 Results and Discussions ................................ ................................ ............... 95 5.3.1 Ballistic Transport ................................ ................................ ................ 96 5.3.2 Effect of Elastic Scattering ................................ ................................ .. 97 5.3.3 Effect of Surface Polar Phonon Scattering ................................ .......... 99 5.3.4 Eff ect of Surface Polar Phonon Scattering and Elastic Scattering .... 100 5.4 Summary ................................ ................................ ................................ ..... 100 6 CONCLUSIONS AND FUTURE WORK ................................ ............................... 107 6.1 Conclusions ................................ ................................ ................................ 107 6.2 Future Work ................................ ................................ ................................ 109 APPENDIX: CODE FOR NUMERICAL SOLUTION OF BOLTZMANN TRANSPORT EQUATION FOR HOMOGENEOUS GRAPHENE ................................ ............... 111 LIST OF REFERENCES ................................ ................................ ............................. 116 BIOGRAPHICAL SKETCH ................................ ................................ .......................... 127

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7 LIST OF FIGURES Figure page 1 1 Lattice structure of graphene ................................ ................................ ............. 21 1 2 Overview of NEGF simulation. ................................ ................................ ............ 21 2 1 Simulated device structure. ................................ ................................ ................ 38 2 2 Schematic sketches of surface polar phonon scattering. ................................ .... 38 2 3 Average velocity of the carriers calculated as function of electric field for different optical phonon energies ................................ ................................ ........ 39 2 4 Average carrier velocity as function of electric field for different elastic scattering rates ................................ ................................ ................................ ... 39 2 5 Ambipolar Transport ................................ ................................ ........................... 40 2 6 Effect of elastic scattering on low field behavior .. ................................ ............... 40 2 7 Effect of surface polar phonon scattering on low field behavior. ......................... 41 2 8 Output characteristics of the device.. ................................ ................................ .. 42 2 9 The simulated intrinsic cutoff frequency f T vs. phonon energy ( ) curve ......... 43 3 1 Device structure for the modeled graphene FET. ................................ ............... 63 3 2 Simulated I V characteristics for the nominal device. ................................ ......... 63 3 3 Channel length scaling.. ................................ ................................ ..................... 64 3 4 Effect of channel length scaling on cut off frequency and gate capacitance. ...... 64 3 5 Band to band tunneling. ................................ ................................ ................... 65 3 6 Effect of gate oxide thickness. ................................ ................................ ............ 66 3 7 Small signal model and ener gy band diagram of graphene FET ....................... 66 3 8 I V characteristic of the GFET as shown in Fig.3 1. ................................ ........... 67 3 9 Extracted circuit parameters from quantum device simulations .......................... 68 3 10 RF figures of merit of GFET vs. the gate length Lg .. ................................ .......... 69 3 11 Kinetic inductance and th e LC characteristic frequency. ................................ .... 70

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8 4 1 Device structure of the modeled graphene silicon contact. ................................ 84 4 2 Energy Band d iagram.. ................................ ................................ ....................... 85 4 3 Schottky barrier height bn as a function of silicon doping density ................... 86 4 4 Gate Modulation. ................................ ................................ ................................ 87 4 5 Effect of multiple layers of graphene on Schottky bar rier height ........................ 88 4 6 Effect of multiple layers of graphene on contact resistance. ............................... 89 4 7 Effect of interface charge density. ................................ ................................ ...... 90 5 1 Cross section of the device structure simulated.. ................................ ............. 101 5 2 Output characteristics and thermo electric power under ballistic condit ions. .... 102 5 3 Carrier distribution function along the channel ................................ ................. 103 5 4 Thermo electric power, TEP vs. V G at 300K 250K and 200K ........................... 104 5 5 Thermo electric power, TEP vs. V G in presence of elastic scattering ................ 104 5 6 Thermo electric power, TEP vs. V G in presence surf ace polar phonon scattering ................................ ................................ ................................ .......... 105 5 7 Thermo electric power, TEP vs. V G in presence of both surface polar phonon scattering and elastic scattering ................................ ................................ ....... 106

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9 Abstract o f Dissertation Presented to the Graduate School of the University of Florida in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy MODELIN G AND S IMUL ATION OF GRAPHENE DEVICES By Jyotsna Chauhan May 2012 Chair: Jing Guo Major: Electrical and Computer Engineering Graphene has been explored as one of the promising materials law especially with silicon approaching its limits. The extraordinary electronic properties of graphene like high mobility, high saturation velocity etc have created a gold rush for graphene based electronics. The numerical study in this dissertation provides valuable insights into device physics and characteristics of graphene Field Effect Transistors (FETs) First part of dissertation studies the effect of inelastic phonon scattering in graphene FETs using semi classical approach A kink behavior due to ambipolar transport is observed. Even the low field mobility is affected by inelastic phonon scattering in recent graphene FET experiments reporting high mobilities. Physical mechanisms for good linearity are explained The h igh frequency performance limits of graphene FETs are studied by running quantum simulations Although Klein band to band tunneling is significant for su b 100nm graphene FET s it is possible to achieve a good transconductance and ballistic on off ratio larger than 3 even at a channel length of 20nm. At a channel length of 20nm, the intrinsic cut off frequency remains at a couple of THz for various gate

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10 ins ulator thickness values, but a thin gate insulator is necessary for a good transconductance and smaller degradation of cut off frequency in the presence of parasitic capacitance. With a th in high ic f T is above 5THz for gate length of 10nm The s o urce and drain resistance severely degrade RF parameters, f MAX and f T It is found that t he intrinsic f T is close to the LC characteristic frequency set by gr aphene kinetic ind uctance and quantum capacitance. Graphene o n silicon contacts are modeled Graphene on s ilicon form s Schottky contact with a flexibility to tune the S chottky barrier height (SBH ) by silicon doping and gate voltage M ultiple layers of grap hene at the interface as well as donor type interface states reduce the gate modulation. Last subject investigates the thermoelectric transport properties of graphene FETs in presence of elastic and surface polar phonon scattering. It is found th at scattering reduces the thermoelectric power. In addition, s urface polar phonon s cattering also degrades the symmetry of TEP with respect to the Dirac point.

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11 CHAPTER 1 PROLOGUE TO THESIS 1.1 Background : Overview o f Graphene Based Electronics Graphene [1] a honey comb packed lattice of sp 2 carbon atoms (Fig.1 1) and the basic building block for many carbon materials, has been major research material since its first successful fabrication in 2004 [2] though the attempts to study electronic structure of gra phene date back to year 1947 [3] However, at that time 2D graphene seemed to be just possible in theory but successful attempts with fabrication of graphene turned all these technologically revolutionary theoretical models into a reality. It has been toy model not only to study relativistic condensed physics phenomenon [4 ] [ 5 ] but also a widely acclaimed replacement for silicon. Many theoretical and experimental works have been involved in investigating mechanical, electrical, and chemical properties of graphene. Many spectacular phenomenon like half integer quantum hall effect [4 ] [ 5] the breakdown of the Born Oppenhe imer approximation [6 ] confirming exist ence of mass less Dirac Fermions [7] have been observed in graphene. I n fact, g r aphene has come across as potential candidate for sensors [8 ] ultra capacitors [9 ] flexible electronics [10] solar cells [11 ] [ 1 6 ] Organic Light Emitt ing Diodes (OLEDs) [1 7 ]. The first priority has been the successful fabrication of high quality single layer graphene. Both top down ap proach like mechanical cleavage [2 ] [ 1 8 ] liqu id phase exfoliation of graphene [1 9 ] as well bottom up approach like epitaxial growth of graphene on SiC [ 20 ] or metal substrates [2 1 ] [ 2 3 ] chemical vapor deposition [2 4 ] [ 2 5 ]

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12 substrate free gas synthesis [2 6 ] have been realized. All these successful experiments have undoubtedly paved way for extensive research on graphene. One of the most concerned applications of graphene has been graphene based electronics. Most of the m ajor semiconductor industrial players have vested huge interests in analyzing the properties of graphene for electronic circuits which is not surprising, knowing the fact that Si is approaching its fundamental limits. The main property that sparked off thi s claim is the high mobility [2 7 ] [ 2 9 ] of charge carriers in excess of cm 2 /Vs which meant nearly ballistic transport in sub micrometer regime. But all these values are true only for large scale graphene which is a gapless material. Thus, high mobil ity comes at the expense of high leakage current due to inability to turn off the device completely and might hamper the prospects of graphene FETs for logical applications. Researchers have tried to open up band gap in graphene using techniques like quant um confinement in one direction giving rise to graphene nano ribbons (GNRs) [ 30 ] [ 3 7 ], by applying strain [3 8 ] [ 4 3 ] and by using bi layer graphene [4 4 ] [ 50 ]. Both arm chair and zigzag GNRs have demonstrated band gaps in excess of 200meV for widths down to s ub 10nm [3 1 ] [ 3 4 ] [ 3 6 ] But all these experiments could not achieve the high mobility predicted for large area graphene. This can be explained as the band gap opens up becoming more parabolic, the effective mass increases and mobility decreases. Thus, ban d gap comes with compromised mobility. Not only this, GNRs suffers from edge roughness [37 ] wiping out band gap opening, thus raising further challenges in fabrication of GNRS. Since band gaps is inversely proportional to width of GNRs, band gaps of 0.5eV required for room

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13 temperature operation of transistors will require the width of the GNR to be less than 5 nm which is difficult to fabricate with much accuracy. Though low I on /I off ratio might rule out the possibility of getting better performance than Si licon in logic devices, but large area graphene devices are still promising candidates for radio frequency applications where turning off the device is not a major concern .Recently, graphene transistors have been fabricated with intrinsic cut off frequenc y offered better most of the conventional Silicon MOSFET and quite comparable to high elect ron mobility transistors (HEMTs ) [5 1 ] [ 5 5 ]. The issues of poor drain current saturation however remain intact for RF applications. Thus, the graphene Field Effect Tra nsistors (FETs) do suffer from some fundamental issues but still the research is in infant stage. The study done as part of this dissertation has tried to model the wide graphene FETs to analyze the potential of graphene transistors for analogue applicatio ns as well as high frequency applications. As graphene offers more flexibility of scalability and achieving higher speeds due to thinnest possible 2D material, the thesis also include the study of scaling behavior of graphene transistors for RF applicatio ns as well as the study of graphene silicon contacts for solar cells The main focus of thesis is to explore the potential of graphene devices for various electronic applications and gain an insight into designing guidelines necessary to improve the perfo rmance of graphene FETs. 1.2 Overview of the Methodologies This section explains the theories we used in building simulation frame work for graphene Field Effect Transis tor s in micrometer and sub micrometer regime.

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14 1.2.1 Semi Classical Transport The main aim of tran sport theory is to tell the state and motion of each carrier wi thin the semiconductor. One way is to model the carrier transport classically governed by Newtonian mechanics. Another approach is the semi classical approach where we solve for the probability of finding particle with momentum k at position r at time t given by distribution function The basic equation of semi classical tr ansport approach is Boltzmann transport equation [5 6 ] (BTE ) where carrier transport is treated classically whil e scattering processes are modeled quantum mechanically by using en rul e [5 7 ]. BTE is based on simple conservatio n of particles in phase space. Once the distribution function is calculated, all needed quantities like c harge density, current density etc. is obtained by taking different order moments of Equation is given as : (1 1) where is the distribution function for the carriers is the collision term is the external force on carrier due to electric field, is the group velocity of a particular sub band and The collision term can be written as: (1 2)

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15 where is the distribution function, is the scattering rate at w hich a carrier makes transition from initial state to fin al state Thus is the out scattering term and accounts for the in scattering term BTE being a seven dimensional integro differential equation ( three dimensions in real space (x, y ,z ) t hree dimensions in momentum space ( k x k y k z ) and one dimension in time) is computationally ve r y extensive and thus, BTE is often solved under certain assumptions that help to simply the problem at hand but might obscure the physics sometimes. Many metho ds have been developed to solve BTE which are either stochastic or deterministic and allow closed form solution of BTE. The most commonly used stochastic approach is the Monte Carlo method [5 8 ]. It is often found to yield results which are often in a good agreement with the experiments. They have been used in benc h marking many simpler model s and most of the TCAD tools. It can be performed for single particle while studying bulk properties or ensemble of particles It also offers flexibility of capturing fi eld effect transistor behavior by coupling ensemble Monte Carlo to Poisson equation. Another method used to solve BTE is detailed numerical simulation e.g. grid based numerical method and can be easily extended to capture fi el d effect transistor s ( FETs) be havior of any material. However, such solutions are computationally very expensive depending on the dimensionality of the problem. Since BTE solves for a strictly classical distribution function giving simultaneous description of position and momentum in contradiction to Heisenberg

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16 uncertainty principle, the equation might not be valid to treat quantum effects like tunneling, interference between two scatterings etc. However, the quan tum corrections term can be added to BTE, which have been shown to effectively capture some of the quantum effects seen in small scale state of art devices. 1.2.2 Quantum Transport As we are scaling down FETs, short channel enabled quantum effects become importa nt in determining transport properties of the system. So detailed quantum mechanical treatment of FETs has become very important with the scaling theory to guide the transistor road map. There are various approaches available for studying quantum transport lik e quantum Monte Carlo, th The latter is the most accurate of all and allows capturing simultaneous correlations in space and time. However, it comes with lots of computational burden for actual implementation. The most ri gorous approach used to model carrier transport in nano scale FETs is non equilibrium Greens Function approach (NE GF) which is based on solving Schrdinger Equation under non equilibrium conditions. NEGF formalism has been successfully applied to study qua ntum transport in conventional silicon MOSFE Ts, carbon nano tubes (CNTs) etc. [5 9 ] [ 6 2 ]. Detailed derivation of NEGF is well explained in many papers [ 6 3 ] this section gives brief introduction on basics of NEGF concepts applied to two dimensional graphene FETs simulations as shown in Fig. 1 2. The device is represented by Hamiltonian [H] which can be discretized using real space basis or mode space approach. The coupling to source and drain contacts is

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17 included by self energy matrices s and D respectivel then given as: (1 3) hole densities for graphene channel are calculated as, (1 4) where W is the channel width, is the Fermi Dirac function, E FS ( E FD ) is the source (drain) Fermi energy level, and D S ( D D ) is the local density of states due to the source (drain) contacts as computed by the NEGF formalism. The LDOS ( D S ( D D )) at the source and drain end is given as D S(D) = G S(D) G + where S(D ) = i( S (D) + S(D) ) is the energy level broadening due to the source (drain) contact The factor of 4 counts for a valley degeneracy of 2 and a spin degeneracy of 2. For a self consistent solution, the NEGF transport equatio n is coupled with the Poisson equation The current is then computed as : (1 5) w here T(E) is the source drain transmission function calculated by NEGF formalism. The scattering can be easily incorporated in the formalism by incl uding density of states dependent scattering matrix in

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18 1.3 Outline of T hesis This dissertation is focused on study of graphene FETs using semi classical transport theory at micrometer regime and NEGF formalism in sub micromete r regime. The study has tried to gain insight into the potential of graphene FETs for various applications by focusing on various figures of merit as applicable to different applications. Chapter 2 starts with the bench marking of numerical solution of Bol tzmann transport Equation for homogenous material against Monte Carlo Simulations. The same simulation scheme is then extended to study inelastic phonon scattering in graphene FETs by numerically solving the Boltzmann transport equation in three dimensiona l real and phase spaces ( x, k x k y ) self consistently with Poisson equation. A kink behavior due to ambipolar transport agreeing with experiments is observed. While low field behavior has previously been mostly attributed to elastic impurity scattering in earlier studies, it is found in the study that even low field mobility is affected by inelastic phonon scattering in recent graphene FET experiments reporting high mobilities As the FET is biased in the saturation regime, the average carrier injection ve locity at the source end of the device is found to remain almost constant with regard to the applied gate voltage over a wide voltage range, which results in significantly improved transistor linearity compared to what a simpler model would predict. Physic al mechanisms for good linearity are explained, showing the potential of graphene FETs for analogue electronics applications. In chapter 3 high frequency performance limits of graphene field effect transistors (FETs) down to a channel length of 5 nm are e xamined by using self consistent quantum simulations. The results indicate that although Klein band to band tunneling is significant for sub 100nm graphene FET, it is possible to achieve a good

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19 transconductance and ballistic on off ratio larger than 3 even at a channel length of 20nm. As the gate insulator scales down to about 1/10 of the 20nm channel length, the on off current ratio can increase to about 3, with a cut off frequency much less susceptible to parasitic capacitance. Then the chann el length sca ling behavior of graphene FET is studied to analyze RF performance metrics under ideal ballistic conditions with thin gate insulator thickness The simulated intrinsic unity current gain frequency f T increases to value of 5THz around L g =10nm with thin gate dielectric However, the intrinsic power gain frequency, f MAX is less than the unity current gain frequency. Including the source and drain parasitic resistance lowers both unity current gain frequency as well as power gain frequency by several factors. Since drain and gain contact resistance is always present in real circuits, proper choice of the contact material is necessary to utilize full RF potential of graphene FETs. To discuss the non quasi static effect, the kinetic inductance of the graphene is computed and the LC characteristic frequency is about As the intrinsic cut off frequency is close to this LC characteristic frequency, it is expected that the non quasi static effects can start to play a role as the transistor i s optimized to perform close to its intrinsic cut off frequency. In the next part of the dissertation graphene silicon contacts are studied. The analytical model to calculate the Schottky barrier height formed at the interface between graphene and silicon is developed. The modulation of SBH over a wide range is possible unlike metal semiconductor contacts by changing the doping on silicon or by changing gate voltage. These results provide an external knob to tune the SBHs in junctions due to graphene lower carrier density unlike metal semiconductor junctions. Effect of using multiplayer graphene at the interface is also

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20 demonstrated .The gate modulation of graphene silicon contact resistance is decreased ene layer is incr eased beyond 6 .It is also found that the increased density of interface states reduces both the SBH formed at interface as well as the gate modulation of contact resistance Last subject of dissertation captures thermoelectric transport properties of graph ene FETs. It is found that thermoelectric power varies proportionally with temperatures. It is found that b oth elastic and surface polar phonon scattering increase the peak value of Thermo electric power ( TEP). It is found that surface polar phonon s catter ing also destroys the symmetry seen in TEP with respect to Dirac point.

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21 A B Figure 1 1 Lattice structure of graphene A) Graphene 2 D sheet in k space B) E k diagram of graphene showing two in equivalent valleys along with reciprocal lattice in k spa ce Figure 1 2. Overview of NEGF simulation with source and drain contacts modeled as self energy matrices S ( D ) respectively.

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22 CHAPTER 2 I NELASTIC PHONON SCATTERING IN GRAPHENE FETS 2.1 Introduc tory Remarks Graphene [ 2 ], [ 31 ] [ 51 ] [ 64 ] [ 6 8 ] has been one of the most rigorously studied research materials since its inception in 2004. There has been a lot of study focused on low electric field transport properties of grapheme [2 8 ] [ 6 8 ] [ 7 1 ] Many issues related to high field transport properties in graphene field effect transistors ( FETs), however, still r emain unclear. Experimental [7 2 ] [ 7 5 ] and theoretical studies have shown that even though being a gapless semi metallic material, a graphene FET shows saturating I V behaviors attributed to inelastic surfac e polar phonon scattering induced by gate oxide. In this work, inelastic phonon scattering in graphene transistors is studied by numerically solving the Boltzmann transport equation (BTE) in the real and phase spaces. Modeling of inelastic surface polar p honon scattering reveals that low bias mobility is controlled by inelastic surface polar phonon scattering in addition to elastic scattering. Good linearity is observed in high quality FETs in agreement with recent experiments and it is explained by averag e carrier injection velocity at the source end remaining nearly constant with the increase in applied gate bias voltage, which makes them desirable for analogue applications. Comparisons to previously reported simpler models clarify validity of those model s. To describe semiclassical transport behaviors of graphene FETs at a channel length that quantum mechanical Klein tunneling is not important, a semiclassical Boltzmann transport equation is solved self consi stently with Poisson equation. Though Monte C arlo method and numerical solutions of solving BTE have been implemented in previous studies [7 6 ] [ 80 ] they are limited to two dimensional k space, which assumes

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23 a homogeneous material and therefore it has limitations to describe transport properties and interplay of self consistent electrostatics and transport in a graphene transistor accuratel y as discussed in detail later. 2.2 Simulation Approach Top gated graphene FETs as shown in Fig. 2 1 were simulated. The nominal device has a top gate insulator thickne ss of t ins =10 nm and dielectric constant of =3, which results in a gate insulator capacitance of C ins =270nF/cm 2 close to the value in a recent experiment [7 3 ]. The dielectric constant used here is close to that of hexagonal Boron Nitride (BN), which has be en explored as one of the promising gate insulators [8 1 ] for graphene FETs. To capture ambipolar transport properties in graphene, we considered the transport in conduction band as well as valence band. A simple linear E k relation is used, which is valid in the energy range of interest, (2 1) w here cm/s is the Fermi velocity in grapheme [6] The Boltzmann transport equation (BTE) is solved for a two dimensional graphene device at the steady state. The Boltzmann Transport equation is given as [8 2 ]: (2 2) where is the distribution function, is the collision term is the force on carrier due to elect ric field, is the group velocity of a particular sub band and is the

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24 dimensions in real space and three dimensions in k or momentum space. However, since graphene is two dimensional and wide enough giving translational symmetry in the y direction, the problem can be easily reduced to three dimensional space of x k x k y only. Hence only three coordinates and time are needed t o specify the system and BTE for graphene in three dimensional space takes the following form : ( 2 3) Time evolution of electronic states is described by terms. This operator is discretized on finite dif ference grid resulting in matrix operator. Backward or forward difference method is used depending on the direction of flux of carriers. For a charge carrier moving from left to right with positive velocity operator is approximate d by backward difference scheme and vice versa for charge carriers moving from right to left with negative velocity. Thus in finite difference scheme for the carrier at ( ) node is given as: ( 2 4) w here is the velocity of carriers in the transport x direction at ( ) node in the discretization grid and is the distribution function at ( ) node.

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25 The term includes discretizat ion in k x space because electric field has only the x component. So differentiation with respect to k y is eliminated. is the force on carrier in presence of electric field. For > 0, electrons experience force from right to left and forward difference scheme is used and vice versa for <0, electrons experience force from left to right and differential operator is approximated using forward difference scheme Thus for electrons, the equation is solved as: ( 2 5 ) w here is the distribution function at ( x i ) node and is the electric field at x i position along the channel direct ion. Alternate methods of discretization of differential operators can also be used to simplify differential operators involved. After the discretization at all nodes of phase space, the differential operators in Eq. (2 3) take the form: ( 2 6) where is matrix equivalent for differential operator in x and k x The term incorporates the boundary conditions due to and is physically equivalent to influx of carriers at r ight and left contacts. At the left contact i.e. sourc e contact, only positive moving carriers are responsible for influx into the device, therefore, the boundary

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26 condition at x=0 holds true for only. Thereby, lef t contact couples to all the k x k y nodes at x=0 and carriers are d istributed according to source F ermi potential. ( 2 7) Similarly, right contact couples to all k x k y nodes at x=L for and carriers in these states are distributed according to drain fermi level. ( 2 8) w here and are the source and drain F ermi levels, and are t he conduction band edges at x=0 and x=L respectively and E(k) is energy at every k x k y node corresponding to x being considered in both conduction and valence band. For operator, a periodic boundary condition is used. Physically periodic boundary change term representing collision integral is discretized and results in scattering vector ( 2 9) where is the distribution function, is the scattering rate from state to new state Thus term re presents the out scattering rate and term represents the in scattering rate. As already reported in

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27 earlier studies, low field mobility is controlled by elastic phonon scattering while saturation behavior is largely dominated by i nelastic surface polar phonon scattering. So as part of study, elastic phonon scattering is modeled with as the fitting parameter, where is the mean free path ( mfp ) of carrier in presence of elastic scat tering. The scattering rate for elastic scattering is calculated as: ( 2 10) w here is the energy of initial state as there is no exchange of energy due to elastic scattering so energy remains the same and is used as fitting parameter. [5 6 ] [ 7 6 ] [ 8 3 ] For inelastic surface polar phonon emission process, the electron in conduction band can jump to valence band or stay in condu ction band while the electron in valence band stays only in valence band within modeled energy range as shown in Fig. 2 2A In case the electron in valence band jumps outside the considered energy range by emitting a phonon the transition is prohibited. For surface polar phonon absorption process, the electron in conduction band stays within conduction band. In case, transition results in final energy outside the modeled range, it is prohibited. However, the electron in valence band on absorption can stay in valence band or jump to conduction band as shown in Fig. 2 2 B Isotropic scattering is assumed for both elastic as well as surface polar phonon scattering. Hence, E k space is a constant energy sphere and all states lying on constant energy sphere are equ ally probable. This leads to the assumption that initial state is coupled to all the states lying on constant energy sphere with an equal

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28 scattering rate. The total scattering rate from to is thus, distributed equally among all the states satisfying After including scattering and all discretization terms the final BTE can be written as: ( 2 11) w her e and are the distribution functions at n+1 and n time steps. To reduce computational cost, the device is assumed to be in steady state such that can be approximated as zero an d equation further simplifies as: ( 2 12) To start with the simulation, initial guess of distribution function is calculated assuming ballistic transport conditions which give s: ( 2 13) Thus, is the equilibrium ballistic distribution function The BTE is then solved self consistently with nonlinear Poisson equation using Newton Raphson method. However, on solving the BTE for (k x k y ) space for homogenous graphene, the equation that needs to be discretized is: (2 14) After using the discretization scheme and assuming steady state conditions as mentioned above, the equation for homogeneous graphene can be written as:

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29 (2 15) To start with the simulation homogenous graphene in (k x k y ) initial guess of is assumed to be Fermi Dirac distribution given as: (2 16) The Eq ( 2 15) can then be solved using Newto n Raphson method for (k x k y ) space. (Code attached in Appendix) 2.3 Results and Discussions First section calibrates numerical BTE model in 2 D (k x k y ) space for homogenous graphene with the Monte Carlo model developed. Then the analyses is done for the c haracteristics of the graphene FETs on a micrometer channel length regime by solving BTE for the whole device shown in Fig. 2 3 self consistently with Poisson equation The simulation captures the ambipolar I D V D behavior observed in graphene FETs which si ngle band Monte Carlo simulations fails to capture. The rest of section addresses the effect of elastic scattering and inelastic surface polar phonon scattering on the transport behavior of graphene FETs. The last section explains the nearly constant trans conductance observed experimentally in graphene FETs which makes it good potential for analogue applications. Comparison to previously developed simpler models clarifies the validity of these models. 2.3.1 Calibration of Numerical BTE First the Boltzmann tra n spo rt equation is solved in (k x k y ) space for homogenous the fitting parameter. The results of numerical Boltzmann Transport equation (Appendix )

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30 in (k x k y ) space for hom ogenous graphene are c ompared with Monte Carlo results (under same conditions ). Figure 2 3 plots the average velocity of the carriers calculated as function of electric field for three different phonon energies of = 55 meV for SiO 2 [83 ] ( line with asterisks), = 87 meV for Al 2 O 3 [83] (line with triangles), = 200 meV(line with squares) and 300nm at E=0.1 eV. The solid lines shows the results for Monte Carlo simulations while dotted lines show the results by running Boltzmann Transport Simulations for same operating conditions. As we can see that both the results agree within 1% error and th ereby, validates the Boltzmann Transport Equation numerical solution. Figure 2 4, plots the average carrier velocity as function of electric filed for = 300 nm (blue line with squares), 200 nm (black line with triangles) and 100nm (red line with asterisk s) at E= 0.1eV for Monte Carlo Simulations (in solid lines) and numerical BTE simulations ( dotted lines ). Both the models agree reasonably well within 1% error .Thus numerical solution of BTE for homogenous space involving only two dimensional collective sp ace of k x k y is validated by Monte Carlo simulation. 2.3.2 Ambipolar Conduction The I D V D characteristics of graphene FETs are simulated. Figure 2 1 shows the schematic of the device used in our simulations. Top gated graphene FET with two dimensional graphene as the channel is simulated. A linear E k for graphene is assumed in two band simulations. The graphene channel is wide enough so that there exists translational symmetry in the y direction, thus helping to reduce the phase space in BTE to ( k x, k y x ). The device is simulated for C ins = 270 nF/cm 2 with Boron Nitride (BN)as the dielectric which has been predicted to be one of the promising dielectrics for

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31 graphene FETs in recent experiments [7 3 ] [ 8 1 ] All the simulations have been done for channel length L ch= 1 m. The current I D vs drain voltage V D relation is studied for 1m device next. The I D V D curve in Fig. 2 5 shows the characteristic kink due to D irac point entering the drain thereby leading to ambipolar transport behavior in device. This behavior i s in agr eement with experimental resul ts [7 2 ] Figure 2 5 B and Figure 2 5 C explains the onset of ambipolar transport near kink drain voltage by plotting electron ( left side plot ) and hole (right side plot) distribution function near drain end of the chan nel at V D = 0.25 V (before the kink) and V D =0.7 V (after the kink) respectively. As shown in Fig. 2 5 B at V D =0.25 V before the onset of kink the electron distribution function is quite dominant while hole distribution function is almost close to zero. The current at this point is thus carried largely by electrons and contribution due to holes to the total current can be neglected .However as shown in Fig. 2 5 C at V D =0.7 V after the kink both electron and hole distribution f unctions become equally promine nt. This explains the ambipolar behavior in the region following the kink. 2.3.3 Effect of Elastic and Inelastic Phonon Scattering The effect of scattering on mobility is studied next. It has already been observed that elastic impurity scattering and inelastic s urface polar phonon scattering due to gate dielectric has been dominant scattering mechanisms in controlling the transport behavior in graphene. The low field behavior has been attributed to elastic scattering in many earlier studies [ 2 8 ] [ 70 ] [ 7 1 ] [ 7 9 ] Figure 2 6A shows the low field conductance in presence of elastic scattering. The conductance varies almost linearly with increase 2 6B shows the mobility for different values of as a function of V G The mobility increases with the

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32 increase in value of The mobility remains almost constant with increase in gate overdrive voltage because low bias conductance for elastic scattering varies linearly with gate overdrive voltage i.e. Then we plotted the conductance and mobility values in presence of inelastic surface polar phonon scattering for different Froehlich coupling constants (material parameter) at = 40 meV with elastic scattering co mpletely turned off It is observed that low bias conductance as shown in Fig. 2 7 A and mobility as shown in Fig. 2 7B, calculated in presence of inelastic surface polar phonon scattering are strongly influenced by the inelastic surface polar phonon scatt ering in graphene. Thus even at low bias transport, considering influence of surface polar phonon scattering is quite important as the values of conductance and mobility in presence of inelastic surface polar phonon scattering are closer to the values calc ulated for elastic scattering. Hence, in a device when both mechanisms are present we get the mobility behavior controlled by both scattering mechanisms as per Matthiessen's rule. 2.3.4 Output Characteristics Figure 2 8 A shows the simulated I D and V D results. In the simulation, the elastic scattering is turned off by choosing large value of elastic scattering mean free path. It indicates the device I V characteristics in the presence of only inelastic phonon scattering. We also performed simulations by turning on the elastic scattering. If the elastic scattering mfp is limited by acoustic phonon scattering, which is considerably longer than the scattering mfp by inelastic phonons modeled here, the I V characteristics shows negligi ble difference as shown in Fig. 2 8 A. The I D V D characteristics for elastic = 2 m and 200 m defined at the electron energy of E = 0.1 eV for elastic scattering remain almost same. The above condition requires a high quality

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33 graphene transistor where elastic defect scattering and screened charg e impurity scattering are weak. Figure 2 8B plots the average carrier injection velocity (dashed line) at the beginning of channel i.e. near the source end, as a function of the gate voltage V G which is found to remain approximately constant. It is also interesting to compare the detailed numerical simulations to previously developed simple models for saturation velocity. The simulated behavior is in contrast to saturation velocity (line with diamonds) behavior which states that ( 2 17 ) and thereby decreases with increase in V G The difference is due to two reasons. First, the application of the above equation requires E f t o be significantly larger than which is not satisfied here. Second, the average c arrier velocity does not fully reach the saturation velocity value before the turn on of ambipolar transport current, especially at low gate overdrive voltages. We also plotted the average carrier velocity (line with crosses) for homogenous graphene mate rial by solving BTE in just two dimensional space ( k x k y ) using same operating conditions as calculated at the source end of the device in previous simulations. It is found that results for the graphene FET simulations agree with homogenous material simul ations within 16 %. In running all the simulations, it is found that the device does not completely reach saturation regime before turn on of ambipolar transport. To illustrate this point, we also plotted the saturation velocity (line with squares) calcula ted by solving BTE in two dimensional space ( k x k y ) for the homogenous material to see how much offset is the device from saturation regime. The

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34 saturation velocity plotted above is the highest velocity achieved by homogenous material [7 8 ] It was observe d that average carrier injection velocity of carriers at source end (dashed line) is below the saturation velocity (line with squares) of the homogenous the turn on of ambipolar transport. In order to investigate the linearity of the transistor, we plotted the transconductance as a function of the gate voltage as shown in Fig. 2 8 C The line with asterisks, which shows the numerical BTE solution, indicates that the t ransconductance is nearly constant over a wide applied gate voltage range, indicating excellent linearity of graphene transistors in the saturation drain current regime. On the other hand, a simpler model without numerical solution of the BTE would have pr edicted much worse linearity, as shown by the line with squares curve in Fig. 2 8 C which plots as function of gate voltage. The simpler model (line with squares) indicates that the transconductance increases as the gate voltage decreases, mostly because the carrier saturation velocity is inversely proportional to Fermi energy level. However, almost constant injection velocity and g m is observed in the device. This is efore turn on of ambipolar transport. Figure 2 8 D shows the carrier velocity at various gate bias points for the homogenous graphene by solving BTE in two dimensional k space ( k x and k y ). On the same plot, the velocity at the source end of the device at V G = 1.0 V 1.5V 2.0 V and 2.5 V is highlighted with bold marker points. As can be seen the device is well below the saturation regime and the carrier injection velocity at the source end of the device

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35 over the gate bias from 1.0 V to 2.5 V remains almost constan t. Since g m =C g v injection it also remains constant with V G as seen in Fig. 2 8 C. A numerical solution of the BTE as described in this work, therefore, is necessary for obtaining much accurate prediction of transistor I V characteristics and clearly explain ing excellent linearity observed in recent high quality experiment al devices with BN insulator. 2.3.5 High Frequency B ehavior High Frequency behavior of graphene FETs is also studied u sing quasi static treatment [8 4 ] [ 8 5 ] The intrinsic gate capacitance, Cg and the transconductance, g m are computed by calculating derivatives of the charge in the channel and the drain current numerically at slightly different gate voltages (2 18) The intrinsic cut off frequ ency is computed as, (2 19) The intrinsic cut off frequency f T (line with asterisks) is computed by running self consistent simulations at V D = 0.5 V and V G = 1.1 V. The simulated f T increases with increase in phonon energies as manife sted in Fig. 2 9 This is due to increase in saturation current with the increase in surface polar phonon energy. However, the increase is not linear. Also, (2 20) w here is the average velocity of carri ers, L ch is the length of the channel

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36 If we input assuming the device is in saturation, we get : (2 21) where cm/s is the Fermi velocity in graphene, is the surface polar phonon energy and E f is the Fermi level in graphene depending on the carrier density. The intrinsic cut off frequency f T calculated using the above equation (with squares) is also plotted in Fig. 2 9 and shows a linear increase wit h surface polar phonon energy due to inverse dependence on E f The difference is due to the fact that as increases, Eq. ( 2 1 7 ) breaks down and the carrier velocity does not increase as fast as a proportional relation. For = 20 meV, the Eq ( 2 1 7 ) remains valid and the value calculated is almost equal to simulated value of f T To summarize, if an applied gate voltage results in a source Fermi Level E f with reference to the Dirac point at the source end of the chann el, then increasing phonon energy leads to increase of intrinsic cut off frequency f T if | E f | > which indicates the possibility of improving the high frequency performance by phonon engineering. However, if becomes comparable or larger than | E f |, the f T becomes insensitive to phonon energy. The intrinsic cut off frequency f T calculated using the above equation (with squares)is also plotted in Fig. 2 9and shows a linear increase with surfa ce polar phonon energy due to inverse dependence on E f The difference is due to the fact that as increases, Eq. ( 2 17) breaks down and the carrier velocity does not increase as fast as a proportional relation. For = 20 meV, the Eq ( 2 17 ) remains valid and the value calculated is almost equal to simulated value of f T To summarize, if an applied gate voltage results in a source Fermi Level E f with reference to the Dirac point at the source

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37 end of the channel, the n increasing phonon energy leads to increase of intrinsic cut off frequency f T if | E f | > which indicates the possibility of improving the high frequency performance by phonon engineering. However, if becomes comparable or larger than | E f | the f T become s insensitive to phonon energy. 2.4 Summary In Summary, we study the characteristics of graphene FETs in presence of elastic scattering and surface polar phonon by running two bands self cons istent simulations of Boltzmann transport equation. A characteristic kink behavior already seen in experiments is observed in simulations. It is found that low bias transport regime is affected by both elastic as well as inelastic phonon scatterings. The a verage velocity at saturation before turn on of ambipolar transport which explains for the nearly constant transconductance seen experimentally. A simple relation, tends to overestimate the saturation velocity as well as intrinsic cut off frequency of the graphene FETs under certain bias conditions. The intrinsic cut off frequency f T can be improved by phonon engineering if the condition | E f | > is satisfied. However, numerical Boltzmann transport equation being detailed approach captures the device physics of graphene FETs in micrometer regime and explains for the characteristics observed experimentally.

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38 A B Figure 2 1 Sim ulated d evice s tructure. A ) Cross section of the device structure simulated. B ) Schematic representation of the E k diagram of graphene in which two inequivalent valleys are shown A B Figure 2 2. Schematic sketches of surface polar phonon scattering A ) inelastic phonon emission and B) inelastic phonon absorption for electrons in conduction and valence bands of graphene

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39 Figure 2 3. A verage velocity of the carriers calculated as function of electric fi eld for three different optical phonon energies o f = 55 meV (red line with asterisk s ), = 87 meV ( black line with triangles) = 200 meV (blue line with squares) and elastic scattering with = 300 nm at E= 0.1 eV All these simulations are done at E F = 0.25 eV The solid lines shows the results for Monte Carlo simulations while dotted lines shows the results for numerical BTE in (k x k y ) space. Figure 2 4. Average carrier velocity as function of e lectric fi el d for = 300 nm (blue line with squares), 200 nm (black line with triangles) and 100 nm (red line with asterisks) at E= 0.1 eV All these simulation are done for E F = 0.25 eV and energy of the Optical Phonon = 200 meV. The solid lines are the results obtained from Monte Carlo and dotted lines shows the results for numerical BTE in (k x k y ) space

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40 C A B Figure 2 5. Ambipolar Transport. A ) The current I D vs V D curve for L ch = 1 m at V G = 0.6 V. A characteristic kink is observed due to the ambipolar transport behavior in graphene FET s, in agreement with experiments [7 2 ] Simulated electron (left) and hole (right) distribution functions in the channel near drain side B) at V D = 0.7 V (after kink) and C) at V D = 0.25 V (before kink). A B F igure 2 6 Effect of elastic scattering on low field behavior A ) The simulated low field c hannel conductance for elastic scattering as a function of gate voltage V G at V D = 0.1 V with nm (line with squares), nm (line with asterisks), nm (line with diamonds), which is defined at the electron energy of E =0.1 eV for elastic scattering. B) Mobility as function of gate voltage V G in presence of elastic scattering at V D =0.1 V Inelastic surface polar phonon scattering is turned off in all these simul ations.

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41 A B Figure 2 7 Effect of surface polar phonon scattering on low field behavior A ) The l ow field c hannel conductance for surface polar phonon scattering as a function of gate voltage V G at V D =0.1 V with Froehlich coupling constant of 1 0 eV (line wi th squares), 1 .5 eV (line with asterisks), 2 0 eV (line with diamonds) at = 40 meV B) Mobility as function of gate voltage V G in presence of surface polar phonon scattering at V D =0.1 V Elastic scattering is absent in all these simulation s.

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42 A B Figure 2 8. Output c haracteristics of the device A) The I D V D characteristics at V G = 0.8 V 1.5V, 1.8V 2.3 V ( bottom to top) with elastic = 2 m (line with squares) and elastic =20 0 m ( line with triangles) defined at the electron energy of E =0.1 eV for elastic scattering where the channel length is L ch =1 m SPP energy =40 meV and gate insulator capacitance C ins =27 0 nF/cm 2 B) The simulated average carrier injection velocity as a function of the gate voltage V G (dashed line) at V D =0.6 V. For comparison, the following three velocities computed from simpler models are also plotted. (i)The saturation velocity (line with squares) computed from a 2D BTE solver in the ( k x k y ) space, (ii) the average velocity computed from the 2D BTE solver in the ( k x k y ) space at the same electric field as that at the beginning of the transistor channel at V D =0.6 V (line with crosses), and (iii) The saturation velocity (line with diamonds) computed by a simple model in Eq. ( 2 17 ) C) The simulated transconductance (line with asterisks) g m at V D =0. 6 V vs. the gate voltage V G For comparison, the line with squares shows g m obtained as the gate capacitance times the saturation velocity computed by Eq. ( 2 17 ) at V D =0. 6 V D) Velocity v s. Electric Field at V G = 1.0 V ( line with a triangle) 1.5 V ( line with a circle), 2.0 V (line with a diamond) and 2.5 V ( line with a square) at V D = 0. 6 V (before onset of ambipolar regime)

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43 C D Figure 2 8. Continued Figure 2 9 The simulated intrinsic cutoff frequency f T (line with asterisk s ) vs p honon e nergy ( ) curve shows an increase in intrinsic cut off frequency with the increase in phonon energy The plot also shows the intrinsic cutoff frequency calculated using Eq. ( 2 21 ) under the same operating conditions which shows almost linear dependence on The intrinsic cut off frequencies are computed at V G = 1.1 V and V D = 0.5 V

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44 CHAPTER 3 ASSESSMENT OF HIGH F REQUENCY PERFORMANCE LIMITS OF GRAPHENE FIELD EFFECT TRANSIS TORS 3.1 Introductory Remarks Graphene has emerged as one of the most promising materials in fundamental research and engineering applications [ 2 ] [ 4 ] [ 31 ]. Two dimensional (2D) nature and linear bandstructure of graphene proved an ideal platform for exploring phenomenon of relativistic physics [ 2 ] [ 4 ] Extraordinary electronic transport properties like high mobility and high saturation velocity mak e it attractive for radio frequency (RF) electronics applications [ 5 1 ] [ 5 3 ] [ 8 6 ] Although the zero bandgap of 2D graphene leads to a low on off ratio not desired for digital electronics applications, RF electronics applications do not require a large on off ratio. Scaling down the channel length plays a critically important role in boosting the RF performance of a field effect transistor (FET), and aggressive channel length scaling of graphene FET has been experimentally pursued [ 5 1 ] [ 5 5 ] [ 8 6 ] [ 8 7 ]. Rec ent experiments have demonstrated graphene transistors with intrinsic cut off frequency projected to be at the hundreds of GHz range at sub 100 nm channel scale [ 5 4 ] [ 5 5 ] [ 8 7 ] Fabrication of graphene transistors with the projected cut off frequency of 30 0 GHz for 140 nm channel 100 GHz for 240 nm channel and 155 GHz for 40 nm [ 5 1 ] [ 5 3 ] [ 5 4 ] which significantly outperform the conventional silicon MOSFETs [ 8 8 ] has already been demonstrated The issues of ultimate channel scaling and performance limits of graphene RF transistors, however, remain unclear. In the first section the RF performance limits and channel length scaling of graphene FETs with a channel length down to 20 nm is examined using self consistent ballistic quantum transport simulations with the non s function (NEGF) formalism [ 8 9 ] Quantum NEGF simulation models the Klein band to band

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45 (BTB) tunneling in graphene FETs, and shows that tunneling current component consists a significant fraction of the total current in graphene FETs at a short channel length below 100nm With the channel length scaling down to 20 nm there is no significant increase in the tunneling component contribution as part of the minimal leakage current. For channel length scaling at a fixed gate insulator thickness, the decrease of the on off ratio and transconductance for the 20 nm graphene FET is attributed to electrostatic short channel effects. Thus even at a channel length of 20 nm scaling down the gate insulator thickness can improve the ballistic on o ff ratio above 3. The intrinsic cut off frequency of 20 nm graphene FETs remains at a couple of THz even with a worse gating, but the extrinsic cut off frequency degrades much less if a thin gate insulator is used. T he kinetic inductance of 2D graphene and possible impacts of non quasi static effects are also discussed Next section studies the important RF performance parameters unity power gain frequency f MAX and the cut off frequency f T at the ballistic limit for a gate length down to 5 nm at reduced oxid e thickness of 2 nm with controlled electrostatic short channel effects. Since most of the recent works have focused on the unity current gain frequency f T The unity power gain frequency f MAX another figure of merit important for RF applications is co m pu ted in the remainder of the chapter. The important role of parasitic contact resistance on the RF performance and the need for careful choice of DC bias point are also discussed 3.2 Simulation Approach Top gated graphen e FETs as shown in Fig. 3 1 were simulat ed. The metal source and drain contacts are connected to the intrinsic two dimensional channel. The nominal device has a top gate insulator thickness of t ins = 16.4 nm and dielectric constant of ins = 9

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46 which results in a gate insulator capacitance of C ins 48 6 nF/cm 2 close to the value in a recent experiment [ 5 2 ] The dielectric constant used here is close to that of GaN or Al 2 O 3 [ 90 ] which has been explored as the gate insulator for graphene FETs. The channel length is L ch = 100 nm, with a zero gate underlap wh ich could be achieved by a self align process [ 5 2 ] The difference between the metal Fermi energy level and the Dirac point of graphene is E F E D = 0.2 eV. This contact barrier height is typical for a high work function metal contact (such as Pd) which makes a better contact for hole conduction. The device parameters mentioned here are the nominal ones, and these parameters are varied for exploring various device issues Graphene FETs were simulated by solving the quantum transport equation using the non equil consistently with a two dimensional Poisson equation. To assess the performance limits, ballistic transport was assumed. The Dirac Hamiltonian was discretized using the finite differenc e method along the carrier transport di rection, defined as y directio n (3 1) w here is the reduced Planck constant, is the Fermi velocity, and k x is the wave vector in the transverse direction. The transverse modes are decoupled in the ballistic transport limit. For a specific transverse mode k x nction was computed a s (3 2) w here U is the self consistent potential, and S D )= and 2 D 0 i s the source (drain) contact self e nergy of the metal contacts [ 9 1 ] Here t is the coupling parameter between

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47 metal and graphene a nd D 0 is the metal density of states near its Fermi level. A value of 2.5 eV is used here. This phenomenological model has been extensively used before to model carrier injection from metal contacts to carbon nanotubes. lated, the electron and hole densities are computed as, (3 3) where W is the channel width, is the Fermi Dirac function, E FS ( E FD ) is the source (d rain) Fermi energy level, and D S ( D D ) is the l ocal density of states due to the source (drain) contacts as computed by the NEGF formalism. The factor of 4 counts for a valley degeneracy of 2 and a spin degeneracy of 2. To compute the self consistent potential, a 2D Poisson equation is solved in the cr oss section as shown in Fig. 3 1. The potentials at source/drain and gate electrodes are fixed as the boundary conditions, and the gate flat band voltage was assumed to be zero for simplicity. (In practice, it would depend on the gate work function.) The i teration between the Dirac quantum transport equation and the Poisson equation continues until self consistency is achieved, then the source drain ballistic current is computed by (3 4) w here is the source drain transmission calculated by the NEGF formalism A quasi static treatment, whose validity has been discussed before [ 8 4 ] [ 8 5 ] was used to assess high frequency performance of graphene FETs. The small signal

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48 equivalent circuit as shown Fig 3 7 B is used t o calculate f T and f MAX The small signal model is quite similar to traditional small signal equivalent circuits with no substrate elements and transcapacitance elements. The intrinsic gate capacitance, C g and the transconductance, g m are computed by runn ing the above self consistent DC simulations at two slightly different gate voltages and computing derivatives of the charge in the channel and the drain current numerically [ 9 2 ] (3 5) Similarly, the intrinsic gate to drain capacitance, C gd and the output conductance, g ds are computed by running the above self consistent DC simulations at two slightly different drain voltages keeping gate voltage constant and computing derivatives of the charge in the channel and the drain current numerically [ 9 2 ] (3 6) The intrinsic gate to source capacitance, C gs is then calculated by subtracting C gd from total gate capacitance C g [ 9 2 ] (3 7) The intrinsic unity current gain frequency f T is computed as [ 9 2 ] : (3 8) For the equation ( 3 8 ) is reduced to a more conventional equation given as : ( 3 9 )

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49 In the devices modeled here the value computed by eq. 3 9 is about 94% of the value calculated using eq. 3 8 To ensure better accuracy under the bias conditions in our simulations with f T is computed using e q. 3 8 The intrinsic unity power gain frequency f MAX with gate resistance R g is given as [9 2 ] : (3 10 ) w here g d s is the output conductance, f T is the intrin sic unity current gain frequency C gd is gate to drain capacitance. Since the parasitic resistance at source, drain contact limit the ideal performance in real applications, they are included in the small signal equivalent model shown in Fig. 3 8 B. In presence of R s and R d source and drain resistance respectively, the extrinsi c unity current gain frequency f T can be computed as [9 3 ] (3 1 1 ) The extrinsic unity power gain frequency f MAX in presence of R s and R d source and drain resistance respectively, is given as [ 9 2 ] : (3 1 2 ) w here C g is the small signal gate capacitance given by Eq. ( 3 5 ) C gd is the gate to drain capacitance, g ds is the output conductance, g m is the output transconductance R g are the is the gate contact resistance. The parasitic capacitance exists bet ween the gate

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50 and source (drain) electrode as C ps (C pd ) The parasitic capacitance is gate voltage independent and the total gate parasitic capacitance is C p =C ps +C pd The extrinsic cut off frequency is computed as: (3 1 3 ) 3.3 Results and Discussions I t is important to scale down the channel length for boosting the RF performance of graphene FETs. Recent experiments on sub 100nm graphene FETs mostly focus on graphene FETs with a channel length between 50nm and 100nm. Because graphene i s a zero band gap material where Klein band to band (BTB) tunnel ing plays an important role [ 9 4 ] it might be expected that the off current can significantly increase resulting in a lack of gate modulation as the channel length further scales down. Previou s modeling work of graphene FETs showed a large leaka ge current due to tunneling [ 9 5 ] Except examining channel length scaling and BTB tunneling, the reminder of the result section also addresses the issues of electrostatic design of scaled graphene FETs f or RF applications. The rest of section studies the RF performance of graphene FETs with improved gate insulator design 3.3.1 Output Characteristic s T he ballistic I V characteristics of a graphene FET with a channel length of 100nm are simulated as shown in Fi g. 3 2. Figure 3 2 A shows an asymmetric I D V G characteristic for electron and hole conductions, because the metal contacts make better contacts for holes compared to electrons. The maximum transconductance simulated at the ballistic limit is g m 1310 S/mat a drain voltage of V D = 0.5 V. A maximum transconductance of g m,exp 1100 s/m was reported in a recent experiment

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51 for a self aligned graphene FET with the same gate capa citance and channel length at V D = 0.5 V [ 5 2 ] The closeness of the experimental value of the transconductance to the simulated ballistic value indicates the high quality of graphene channel and low parasitic resistance for the experimental device. Figure 3 2 B shows the simulated I D vs. V D characteristics. For the simulated bias regimes, the s ource drain ballistic current increases approximately linearly with the applied drain bias voltage, which qualitatively agrees with the measured data on the 100nm graphen e F ET reported by Liao et al [ 5 2 ]. 3.3.2 Issues w ith Channel Length S caling To examine the i ssue of ultimate channel length scaling for boosting the performance of graphene FETs, the I V characteristics of graphene FETs of different channel lengths down to 20 nm are simulated as shown in Fig. 3 3. The nominal values of the gate insulator thickness and dielectric constant are used. As shown in Fig. 3 3 A, the minimal leakage current increases as the channel length scales down below 100nm. The increase is especially considerable as the channel length decreases from 30nm to 20 nm. On the other hand, the on current (which is defined as the current at V G = 2.25 V ) remains almost constant as the channel length scales down to 40 nm, and it decreases as the channel length further scales to 20 nm. The left axis of Fig. 3 3 B plots the on off ratio as a function of the channel length. The value is slightly larger than 2 for a channel length of 100nm, and decreases to a value of 1.25 for a channel length of 20 nm. Since it is somewhat arbitrary to choose the gate voltage at which the on current is defined, it is usefu l to compare the transconductance. The right axis of Fig. 3 3 B shows the transconductance as a function of the channel length. As the channel length scales from 100 nm to 40 nm, the ballistic transconductance only decreases very slightly from the value of ab out 1300 S/m. As the channel length scales down to 20 nm, the

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52 transconductance, however, drops significantly to about 346 S/m, which is only about 26% of the value at the channel length of 10 0nm. Since the cut off frequency is proportional to transconduct ance, significant lowering of transconductance is not preferred. The dependence of the cut off frequency on the channel length is examined next. As shown in Fig. 3 4 A the intrinsic cut off frequency keeps increasing as the channel length scales from 100 nm down to 20 nm, although the transconductance decreases considerably as the channel length scales down from 40 nm to 20 nm as described be fore. The simulated intrinsic f T is about 640 GHz at L ch = 100 nm and about 1.37 THz at L ch = 50 nm. To understand this result, t he intrinsic gate capacitance (per unit channel width) is plotted as a function of the channel length as shown in Fig 3 4 B. The gate capacitance decreases approximately linearly as the channel length decreases due to two reasons. First, a smaller channel length results in a smaller gated channel area per unit channel width. Second ly as the channel length decreases, electrostatic short channel effects become important, especially when the channel length becomes comparable to the gate insulator thickness. T he gate modulation of the channel potential and charge becomes less effective. The gate capacitance, therefore, decreases. The decrease of the gate capacitance outpaces the decrease of the transconductance. The intrinsic cut off frequency monotonically inc reases as the channel length decreases from 100 nm to 20 nm. It is also noticed that intrinsic cut off frequency decreases at large gate drive voltages due to considerable population of k states resulting in decrease of the average carrier velocity. This ph enomenon has already been report ed for carbon nanotube FETs [ 8 4 ]

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53 If a parasitic capacitance is considered, the extrinsic cut o ff frequency decreases below L ch ~ 40 nm due to significant decrease of g m Since the parasitic capacitance plays an increasingly im portant role as the channel length decreases due to a larger parasitic to intrinsic capacitance ratio, it is important to maintain a large enough transconductance to ensure good high frequency performance at a short channel length The degradation of the t ransconductance at short c hannel lengths as shown in Fig. 3 3 B could be due to either carrier transport effects or transistor electrostatic design. F or carrier transport, it might be concerned that a decrease of the channel length could result in signific ant Klein BTB tunneling and thereby less effective gate modulation. To examine this effect, the potential profile and the energy resolved current spectrum for the modeled 50nm graphene FET are plotted as shown in Fig. 3 5 A. The non tunneling and the Klein BTB tunneling current can be identified as follows. The current delivered in the energy range below the minimum value of the Dirac point in the channel, as shown by the dashed line in Fig. 3 5 A, is identified as non tunneling current because a carrier alwa ys remains in the valence band as it travels from the source to drain. In contrast, in the energy range between the minimum value and the maximum value of the Dirac point in the channel, the current is identified as the tunneling component because a carrie r goes between the conduction band and the valence band by Klein BTB tunneling as it travels from the source to drain. Figure 3 5 B, plots the percentage of the BTB tunneling current in the total drain current as a function of the channel length. Although t he BTB tunneling component is significant and can account for over one half of the total drain current t he percentage of the BTB tunneling current

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54 in the total drain current remains almost constant as the channel length decreases from 50nm to 20nm. It ind icates that the increase of the tunneling component in the total current is so slight that it cannot be responsible for the significant decrease of the transconductance as the channel length decreases from 50 nm to 20 nm To examine transistor electrostatic effect and optimize elect rostatic design, the I D vs. V G characteristics are simulated by decreasing the gate insulator thickness, while th e channel length is fixed at L ch = 20 nm, as shown in Fig. 3 6. Significantly improved gate modulation and a larger trans conductance are observed in Fig. 3 6 A, especially when the gate insulator thickness decreases below 5nm. It indicates that the thick gate insulator compared to the short channel length of 20 nm, is mostly responsible for the degradation of the transconducta nce at a channel length of 20 nm. Figure 3 6 B shows the intrinsic and extrinsic cut off frequencies as a function of the gate insulator thickness for the 20 nm graphene FET. The intrinsic cut off frequency reaches a peak value of about 3.7 THz at a gate insul ator thickness of 8 nm. The decrease of the intr insic cut off frequency as t ins decreases below 8 nm is due to the increase of the gate capacitance, which is the serial combination of the insulator capacitance and the graphene quantum capacitance. As the gat e insulator becomes thin, the gate modulation is more effective and carrier populates energy ranges with higher density of states which results in an increase of the quantum capacitance. If a parasitic capacitance with a value close to the in trinsic gate c apacitance at t ins = 2 nm is considered as shown by the dashed line in Fig. 3 6 B, the ext rinsic cut off frequency at t ins = 2 nm signif icantly outperforms that at t ins 16 nm.

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55 3.3.3 RF Performance o f G raphene FETs w ith Thin G ate I nsulator Since thin insulator thickness is necessary to improve the device performance, rest of section focuses on RF performance of graphene FETs with t ins = 2 nm.We first analyze the small signal parameters of graphene FETs with channel scaling down to 5nm.The ideal performance limits for graphen e FETs are studied by running ballistic simulations. The potential profile of the device at V G = 0.6 V and V D = 0.5 V is also shown in Fig 3 7 C. The small signal equivalent model for graphene FETs is shown in Fig. 3 7 B, where g m is the transconductance, g ds i s the output conductance, R g is the gate resistance, R S ( R d ) is the source (drain) contact resistance, C gs is the small signal gate to source capacitance, C gd is the small signal gate to drain capacitance and C par is the parasitic capacitance. The model is similar to that of conventional silicon MOSFETs, however, with the element parameters determined by device physics of graphene transistors. The small signal parameters are extracted by running quasi static simulations for channel lengths down to 5nm.The s mall quasi static approximations are valid for graphene FETs when the frequency of interest is lower than the intrinsic cut off frequency [ 8 4 ] [ 8 5 ] Figure 3 8 A shows the I D V D characteristics at V G = 0.6 V. A kink behavior with a quasi saturation region is observed in graphene FETs even at L g = 20 nm.This quasi saturation behavior is due to the drain Fermi level aligning with the Dirac point profile in the channel followed by onset of ambipolar regime. The low density of states around the Dirac point gives rise to decrease in current increment and explains the saturation observed for voltages where drain Fermi level is in vicinity of conduction band in channel. Since the density of states is low in a very small energy range around Dirac point, graphene FETs do not exhibit complete saturation seen in conventional silicon

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56 MOSFETs. The minimum output conductance needed for RF performance is exhibited in this quasi saturation regime. The minimum output conductance simulated for ballistic condition is g ds 5.96 10 3 S/ m Figure 3 8 B shows the I D V G characteristics at V D = 0.5 V. The maximum simulated transconductance is g m 7.228 10 3 S/m The small signal analyses require careful choice of DC bias conditions to get maximum value of f T and f MAX due to not so well defin ed saturation. Since graphene FETs exhibit quasi saturation behavior, g ds value is minimum only for very small drain bias voltage range. Therefore, t he optimum DC bias point for simulations to ensure maximum f T and f MAX is chosen by running quantum quasi s tatic simulations for g ds as functions of V D at different V G values. Optimum bias point is taken to be a g ds minima point in g ds variation with drain voltage V D at given gate voltage V G It can be extracted from Fig. 3 8C. The minima point for g ds is also dependent on V G value chosen. Figure 3 8C shows the g ds minima point shifts to right from V D 0.3V at V G = 0.4V to V D 0.45V for V G = 0.6V in ballistic simulations Therefore, bias points are carefully chosen to be V D = 0.5 V and V G = 0.6 V which are optimized b ias point values with minimum value of g ds for all channel lengths from 50nm to 5nm The gate to drain capacitance, C gd and gate to source capacitances C gs are calculated by running quasi static simulations at V D = 0.5 V and V G = 0.6 V. At a channel length ab ove about 10nm, both C gd as shown in Fig. 3 9 A and C gs as shown in Fig. 3 9 B approximately linearly increase as the channel length increases. The total gate capacitance is the serial combination of the gate insulator capacitance and the quantum capacitance and it is estimated that the gate insulator capacitance is a more dominant factor than the quantum capacitance for the modeled device at the bias point.

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57 The output conductance, g ds increases with decrease of the channel length as shown in Fig. 3 9 C. The increase of the output conductance is due to the electrostatic short channel effects becoming more prominent at shorter channel lengths as already discussed Figure 3 9 D shows the transconductance g m as a function of the channel length. As the channel len gth scales from 50 nm to 15 nm, the ballistic transconductance only decreases very slightly from the value of about 8118 S/m. As the channel length scales down to 5nm, the transconductance, however, drops significantly due to electrostatic gate effect alrea dy explained but with t ins = 2 nm, the degradation onsets at lower value of gate length as compared to t ins = 16 nm (Fig. 3 3 B) Since f T as well as f MAX are dependent on g m the degradation of g m due to scattering is not favorable. Figure 3 10 A shows that the i ntrinsic f T increases with decrease in channel length down to 5 nm due to smaller intrinsic gate capacitance. The decrease in transconductance below 15 nm is not reflected in f T because the decrease in C gd and C gs with channel length outpaces the decrease in transconductance as shown in previous section. The intrinsic unity power gain frequency, f MAX as function of channel length is examined in Fig. 3 10B. A metal gate is assumed for the calculation with the gate resistance given as, (3 1 4 ) w here is the sheet resistivity of metal silicon gate [ 9 3 ] = 1/3 is a constant for distributed gate resistance [ 9 6 ] and L g is the channel length. The intrinsic f MAX comparable to intrinsic f T values and it shows a maximu m value at L g = 10 nm. Below

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58 10nm, f MAX falls off with decrease in channel length. This can be explained due to strong dependence of f MAX on output conductance, g ds and gate resistance R g (Eq ( 3 1 2 ) ) which increase with the decrease in channel length. The R F performance is also limited by the parasitic contact resistance, which can limit the performance of FETs in real applications. Next, we study the extrinsic performance of graphene FETs including source and drain contact resistances in small signal equiva lent model as shown in Fig. 3 8 B. However, the parasitic capacitance, C par shown in small signal model is assumed to be zero in all simulations. The effect of parasitic capacitance has already been studied in previous section The contact resistances are t aken to be 5 00 m [ 9 7 ] The chosen value for contact resistance is typical for metal graphene contacts reported in experiments at room temperature [97]. Figure 3 10 C shows extrinsic unity current gain frequency f T in presence of source and drain contact resistances calc ulated using E q. (3 1 1 ) The extrinsic f T is less than intrinsic f T shown in Fig. 3 10 B by a factor of 1 5. Similarly extrinsic f MAX is degraded by a factor of 10 Thus, the source and drain parasitic resistance can lower the RF performance of graphene FET s significantly. Thus, channel scaling should be complemented with reduced parasitic source and drain resistances to obtain good R F performance of graphene FETs. 3.3.4 Kinetic Inductance i n G raphene FETs Next step is to compute the kinetic inductance of graphene by extending the derivation of kinetic inductance of carbon nanotubes [ 9 8 ] If the +k states are filled by and k states are filled by the current is per valley per spin. The ne t increase of the energy of the system is computed as the

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59 excess energy of moving carriers from the valence band to the conduction band Since the kinetic inductance is ( 3 1 5 ) The kinetic inductance is plotted as a function of the Fermi level in Fig. 3 9 A. It is inversely proportional to the Fermi energy because the number of transverse modes linearly increases as a function of the Fermi energy For a Fermi level E F =eV/2 the to tal equilibrium charge at zero temperature is per spin per valley. The quantum capacitance is expressed as, ( 3 1 6 ) The LC characteristic frequency is ( 3 1 7 ) where the gate le ngth L g =L ch for the simulated device. Equation ( 3 1 6 ) indicates that the LC characteristic frequency is proportional to an average velocity of which can be interpreted as the average velocity along the transport direction for a 2D graphene with +k states populated. Figure 3 11 B plots the LC characteristic frequency and compares it to the simulated cut off frequency as a function of the channel len gth for sub 100nm graphene FET. A rigorous treatment beyond quasi static approximati on requires inclusion of capacitive, resistive, and in ductive elements for calculation [ 9 8 ] [ 9 9 ] The quasi static approximation includes the

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60 equivalent capacitive and resistive elements, but omits the equivalent inductive elements. In order to assess how good the quasi static approximation is, one can compare the operation frequency to the LC characteristic frequency, which is about 1THz for a 100nm graphene FET. Figure 3 11 B shows the intrinsic cut off frequency is close to this value. The non quasi stat ic effect, therefore, could be important if the graphene FET operates at its intrinsic cut off frequency. On the other hand, the extrinsic cut off frequency of a short channel graphene FET could be much lower than its intrinsic value if the parasitic gate capacitance is not reduced to a value comparable to the intrinsic gate capacitance. In this case, non quasi static effect is not important. Furthermore, ballistic transport is assumed in this study to assess the RF performance limits of short channel graph ene FETs. The cut off freque ncy can be lowered by scattering [ 100 ] which is beyond the scope of this work. The intrinsic cut off frequency of ballistic carbon nanotube FETs has been reported to be in the range of 80 110 GHz/L ch (m) [ 100 ] [ 10 1 ] Figure 3 1 1 B shows the intrinsic cut off frequency of ballistic carbon nanotube FETs as function of channel length calculated using the relation It is observed that the cut off frequency of ballistic carbon nanotube FETs is slightly better than ballistic graphene FETs. This difference can be attributed to the following two reasons. First, since a carbon nanotube is a one dimensional material as compared to graphene which is two dimensional, averaging carrier velocity along the transport dir ection requires projection of the velocity along the transport direction in a 2D channel. Second, graphene has a linear E k with a zero bandgap, as compared to carbon nanotube with a parabolic E k with a finite

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61 bandgap. The difference in bandstructure resu lts in different population of k states and different ba ndstructure limited velocities. 3.4 Summary In Summary f or a gate insulator thickness of 16nm, scaling down the channel length to 20nm does result in significant decrease of on off current ratio. Becaus e of the low transconductance, the high cut off frequency is highly susceptible to parasitic gate capacitance. As the gate insulator scales down to about 1/10 of the 20nm channel length, the on off current ratio can increase to about 3, with a cut off freq uency much less susceptible to parasitic capacitance. Then chann el length scaling behavior of graphene FET is studied to analyze RF performance metrics under ideal ballistic conditions with thin gate insulator thickness The simulated intrinsic unity curr ent gain frequency f T increases to value of 5THz around L g = 10 nm for t ins = 2 nm However, the intrinsic power gain frequency, f MAX is less than the unity current gain frequency. Including the source and drain parasitic resistance lowers both unity current ga in frequency as well as power gain frequency by several factors. Since drain and gain contact resistance is always present in real circuits, proper choice of the contact material is necessary to utilize full RF potential of graphene FETs. It is also propos ed that careful choice of DC bias point is needed to get improved power gain frequency performance of graphene FETs. To discuss the non quasi static effect, the kinetic inductance of the graphene is computed and the LC characteristic frequency is about As the intrinsic cut off frequency is close to this LC characteristic frequency, it is expected that the non

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62 quasi static effects can start to play a role as the transistor is optimized to perform close to its intrinsic cut off fr equency.

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63 Figure 3 1 Device structure for the modeled graphene FET. Pd is used as the contact material, Al 2 O 3 is used as the insulator material, and its thickness is 2nm A B Figure 3 2. Simulated I V characteristics for the nominal device described in text. A) The I D vs. V G characteristic at V D = 0.5 V. B) The I D vs. V D characteristics at V G = 0.25 V to 2.25 V at 0.5 V per step (from the bottom to top curve). The graphene channel length is L ch = 100 nm. The flat band voltage is zero. The source/drain contac t barrier height for holes is E F E D = 0.2 eV which is the difference between the metal Fermi level and the Dirac point of graphene.

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64 A B Figure 3 3. Channel length scaling A ) I D vs. V G characteristics for the graphene FET as shown in Fig. 3 1 with differe nt channel lengths, L ch = 100, 50, 40, 30 and 20nm. B) The on off current ratio (left axis) and transconductance (right axis) as a function of the channel length. The on current is computed at V G = 2.25 V and the off current is at V G = 0 V The transconductance i s obtained at V G = 1.5 V The top gate insulator thickness is t ins = 16 nm and dielectric constant is ins =9 The applied drain voltage is V D = 0.5 V A B Figure 3 4. Effect of channel length scaling on cut off frequency and gate capacitance. A) Intrinsic (solid ) and extrinsic (dashed) cut off frequency as a function of the channel length for the graphene FET as shown in Fig. 3 1 B) The intrinsic gate capacitance as a function of the channel length. The top gate insulator thickness is t ins =16nm and dielectric co nstant is ins =9 The applied gate voltage is V G = 1.5 V and drain voltage is V D = 0.5 V A constant parasitic capacitance of is assumed for computing the extrinsic cut off frequency.

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65 A B Figure 3 5. Band to band tunneling A) The Dirac po int o f graphene as a function of the channel position (bottom axis) and the current spectrum (top axis) for the graphene FET as shown in Fig. 3 1 with a channel length of L ch = 50 nm at V G = 1.5 Vand V D = 0.5 V The current component below the dashed is identifie d as non tunneling component because carriers always remain in the valence band as they travel from source to drain. The current component above the dashed line is identified as Klein band to band tunneling component because carriers in the conduction band near the source go to the valence band as they travel from source to drain. B) Ratio between the BTB tunneling current and the drain current as a func tion of the channel length at V G = 0.25 V (solid), 1.5 V (dashed) and V D = 0.5 V

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66 A B Figure 3 6. Effect of gate oxide thickness A ) I D vs. V G characteristics for a graphene FET as shown in Fig. 3 1 with a channel length of L ch = 20 nm and different gate insulator thicknesses, t ins = 16 nm (cyan solid) 12nm (pink with asterisks), 8 nm (black with triangles), 5 nm (red with squares) and 2 nm (blue with circles). The applied drain voltage is V D = 0.5 V B) The intrinsic (solid) and extrinsic (dashed) cut off frequency as a function of the top gate insulator thickness. The cut off frequencies are computed at V G = 1.25 V and V D = 0.5 V. A constant parasitic capacitance of (dashed pink with diamonds), (dashed red with squares) and (dashed black with triangles) is assumed for computing the extrinsic cut off frequency. A B Figure 3 7 Small signal model and energy band diagram of graphene FET A) Small signal equivalent circuit of GFET where g m is the transconductance, g ds is the output conductance, R g is the gate resistance, R s ( R d ) is the source (drain) contact resistance, C gs is the small signal gate to source ca pacitance, C gd is the small signal gate to drain capacitance and C ps ( C pd ) is the parasitic capacitance B) Band profile of the GFET at V D = 0.5 V and V G = 0.6 V. The channel length is 20 nm and E FS ( E FD ) is the source (drain) Fermi level.

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67 A B C Figure 3 8 I V characteristic of the GFET as shown in Fig. 3 1 at the balli stic limit. The gate length is L g = 20 nm and t ins = 2 nm. A) I D versus V D at V G = 0.6 V. B) I D versus V G at V D = 0.5 V. C) Output Conductance g ds as a function of drain voltage, V D at V G = 0.4 V a nd 0.6 V, respectively.

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68 A B C D Figure 3 9. Extracted circuit parameters from quantum device simulations as a function of the gate length at V D = 0.5 V and V G = 0.6 V at the ballistic limit The gate length is L g = 20 nm and t ins = 2 nm. A) Small signal gate to source capacitance C g s B) small signal gate to drain capacitance C g d C) transconductance g m and D) output Conductance g ds as function of channel length Lg

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69 A B C D Figure 3 10. RF figures of merit of GFET vs. the gate length at V D = 0.5 V and V G = 0.6 V at the ballistic limit The gate length is L g = 20 nm and t ins = 2 nm. One side metal gate with sheet resistivity of is assumed here. A ) Intrinsic unity current gain frequency (the cutoff frequency) f T B ) intrinsic unity power gain fre quency (the maximum oscillation frequency) f MAX which is computed with zero source/drain parasitic capacitance and resistance C ) extrinsic unity current gain frequency f T and D) extrinsic unity power gain frequency f MAX as a function of the gate length. The extrinsic frequencies are computed by considering a parasitic source and drain resistance of R s = R d =

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70 A B Figure 3 1 1 Kinetic inductance and th e LC characteristic frequency A ) Kinetic inductance as a function of the Fermi energy level for 2D graphene. B ) The LC characteristic frequency (blue solid line), the intrinsic cut off frequency f T (red dashed line) of graphene FETs and the intrinsic cut off frequency f T (black dashed dotted line) of ballistic carbon nanotube FETs [ 100 ] as a function of the channel length. The intrinsic cut off frequency is computed at V G = 0.6 V and V D = 0.5 V. The top gate insulator thickness is t ins = 2 nm and dielectric constant is ins = 9

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71 CHAPTER 4 A COMPUTATIONAL STUD Y OF GRAPHENE SILICO N CONTACT 4.1 Introductory Remarks Graphene has triggered a lot of research interest owing to its unique two dimensional structure and extraordinary electronic [ 2 ], [ 4 ] [ 6 ] [ 12 ], [ 2 7 ] [ 2 8 ] mechanical [ 10 ] [ 1 7 ] [ 1 9 ] [ 10 2 ] a nd optical properties [ 1 3 ] [ 1 7 ] Consider ing remarkable electronic and optical properties of graphene, it has been a topic of extensive study for applications like solar cells [15 ] [ 17 ] [ 103 ], sensors [ 8 ] [ 104 ], thin film transistors [10 ] [ 18 ] [ 16 ] [ 101 ], photo detectors [105 ] [ 106] etc. T here has been constant quest for material with good conductivity, stability and transparency to replace to indium tin oxide (ITO) as a transparent and conductive electrode Carbon Nano Tube (CNT) Silicon (Si) based solar cells [107 ] [ 110] with high transpa rency have been extensively studied for potential application s However, t he films composed of CNT/Si consume a lot of interspace and exhibit low conductivity. Since layer of graphene can maintain higher conductivity at the same time with high optical tran sparency, high thermal and chemical stability, graphene has been considered as a good material for solar cells and flexible electronics Large thin transparent sheets of graphene can be easily transferred to other substrates and have been successfully fabr icated i nto touch screen devices [101] Graphene on Silicon forms Schottky contacts [111 ] [ 114] and acts as transparent active layer in solar cells In fact, graphene on silicon forms semi metal to semiconductor contact. The graphene silicon contact exhibi ts an additional flexibility of controlling the electronic properties. This additional knob allows tuning of Schottky barrier height (SBH) and thereby, achieving higher off resistance to on state resistance

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72 ratio, lower off state leakage and noise The tun able SBHs in graphene silicon contacts by doping with Au on surface [113] and intercalation of Br [114] have already been demonstrated with a potential for sensor applications. The tunable S chottky barrier height of graphene silicon contact is different f rom metal semiconductor contacts (M S junction) [115] where SBH is a constant determined by material parameters. The study analyses the electrostatic and transport behavior of graphene silicon contacts. The analytical electrostatic theory for calculating the SBH analytically is also developed as part of study. It is found that the gate modulation of SBH can be achieved in graphene silicon contacts. Silicon doping as well as interface states affects the SBH formed in graphene silicon contacts. The presence of interface sates lowers the SBH achieved at interface thereby increasing the off state resistance and leakage current. In addition, the increased density of interface states tends to reduce the gate modulation of SBH achievable in graphene silicon contac ts. Hence a clean surface is necessary to ensure good performance metrics in solar cells. The effect of replacing single graphene by multiple layers of graphene on SBH is also demonstrated. It is found that increasing the layers beyond 6 screens out the ga te modulation of SBH though equilibrium SBH formed increases. To study the transport behavior of graphene silicon contacts and capture the quantum effects of tunneling through Schottky barrier, quantum transport is modeled by non on (NEGF) formalism. OFF state and ON state contact resistance is calculated for multiple graphene layers. The modulation from OFF to ON state becomes essentially pinned as number of layers is increased. Thus increasing number of layers beyond 6 might rip off the effect of increased mobility demonstrated with multiple layers. Since strong off state to on sate transition is

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73 necessary to reduce leakage current in solar cells and to maintain high rectification ratio using multiple layers of graphene more tha n 6 is not recommended 4.2 Simulation Approach Gated graphene silicon contacts as shown in F igure 4 1 are simulated. A single layer of g raphene r is present between silicon and oxide. Multilayer graphene structure is used instead of monolayer graphene in some of the simulations. The nominal graphene silicon contact device has a gate insulator thickness of t ins = 10 nm. The dielectric constant of = 3.9 for SiO 2 is used. The n type s ilicon with nominal charge density of N Si = 10 18 /cm 3 which corresponds to E C E F = 0 .2 2 eV forms the silicon channel side of the contact Donor type interface states are simulated at the interface to study SBH dependency on interface states in few simulations. The values of parameters mentioned here are the nominal ones and are varied as we r un various simulations as part of study Graphene forms a Schottky junction in contact with Silicon. The band diagrams before the physical contact and in thermal equilibrium are shown in Figure 4 2A and 2 B respectively where E m is the D irac point energy of graphene, m = 4.6 6eV [114] is the graphene work function and = 4.05 eV [115] is the silicon electron affinity, E 1 is the shift of the Fermi level due to charge transfer from silicon to Graphene to maintain charge neutrality of the system is the potentia l drop due to interfacial dipole formed at the interface from charge rearrangement between graphene and silicon often refereed as S chottky dipole [116] and E 0 is the energy difference between Fermi level E F and conduction band edge, E C in silicon The ene rgy E 0 is calculated as [115]: ( 4 1)

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74 w here N C is effective density of conduction band states in silicon, N Si is the silicon doping concentration. Gate electrostatics are modeled by solving a two dimensional Poisson equation se lf consistently with the equilibrium carrier statistics of the silicon channel and the graphene. Multiple layers of graphene are simulated assuming AB stacking with each layer behaving as an independent graphene layer. The Poisson equation solved is as fol lowing: ( 4 2) where U 0 is the local potential energy, N Si is the silicon doping concentration, N C is effective density of conduction band states in silicon, N 2D is the effective two dimensional charge density in graphene, F 1/2 i s the Fermi Dirac integral of order 1/2, E f is the Fermi level under equilibrium in silicon, E fn and E fp are equilibrium electron and hole Fermi levels in graphene. In presence of donor type interface states, the Poisson equation solved is: ( 4 3) w here N I is the donor type interfa ce state surface charge density, E f is the Fermi Level and E CN is the charge neutrality level for interface states Graphene has a linear density of states (DOS) as compared to metals which has very high DOS. This causes F ermi level shift in graphene due to charge rearrangement and leads to gate modulation of SBH in graphene silicon contacts. The low DOS in graphene makes SBH dependent on doping in silicon channel due to charge

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75 rearrangement at the interf ace from silicon to graphene. The behavior is quite similar to SBH modulation of contacts between carbon nanotube films and organic semiconductors [107] However, in case of metals with very high density of states, SBH is fixed and depends on the metal use d. The external tuning of SBH is not possible in metal semiconductor contacts [115] The transport behavior of graphene silicon contacts is modeled by dividing the transport mechanism into two parts: (1) the transport of carriers from graphene into silicon side.(2) transport of carriers through Schottky barrier at the graphene silicon interface. The transport of carrier from graphene to silicon is modeled by simulating graphene as source contact, with contact self energy proportional to linear density of st ates of graphene. The self energy of graphene source contact is given as: ( 4 4) w here alpha is a constant depending on coupling from graphene to silicon k states E is the energy of carrier with respect to Dirac point energy of graphene E m To simply the problem, the condition of transverse wave function matching is relaxed therefore, alpha is a constant and used as a fitting parameter in simulations. The approximation of relaxing transverse k matching is valid in our simulations since the surfaces are not perfectly clean and dislocations at interface allow transverse k intermixing. The transport through Schottky barrier in silicon is simulated by solving the ballistic quantum transport equation using the non unction (NEGF) formalism with the effective mass Hamiltonian [89] The thermionic and tunneling

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76 currents, the dominant transport mechanisms through Schottky barrier are captured effectively using this approach. The effective mass Hamiltonian is discretized using the finite difference method x and y direction (as shown in Figure 4 1 ) assuming parabolic E k relation for silicon. ( 4 5) where H is the Hamiltonian in effective mass approxi mation, s is the source contact self energy given by E q uation ( 4 4 ) D is the drain contact self energy given as with m D 0 is the source (drain) contact self energy of the metal contacts [91] with t m as the coupling parameter between metal and graphene and D 0 a s the metal density of states near its Fermi level. We use a value of in simulations. After the Green ission function is calculated as [89 ]: ( 4 6) w here S ( D ) is the source(drain) broadening function, G function calculated using E q ( 4 5) The conductance is expressed as [11 7 ]: ( 4 7) w here A(E) is spectral density function is the coupling from state on left side (graphene side ) to k state on right side of contact (silicon side ). The equation can be further simplified assum ing is a constant between all states on left and right side of the contact:

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77 ( 4 8) w here is the reduc Tr( E) is the transmission from graphene side (left) of the S chottky barrier to silicon side (right ) of the S chottky barrier as a function of energy, is the thermal broadening function [89] is the summati on over the transverse k states, k z Since the transverse k z dependence of graphene contact is more involved, the summation cannot be replaced by integral possible in case of silicon. The summation over transverse k z is carried out rigorously using periodi c boundary conditions in the z direction. All the simulations are done under ballistic conditions to examine the ballistic limits of graphene silicon contacts. Scattering in the silicon region can be treated using quantum dissipative transport but is beyon d the scope of this study and is not included as part of this study. 4.3 Results and Discussions We start by first analyzing the electrostatics of graphene silicon contacts. Graphene on contact with silicon form S chottky contact as shown in Fig. 4 2 B. The

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78 S cho ttky barrier height is extracted by looking at the potential profile at the interface between silicon and graphene. Analytical model to calculate the Schottky barrier height is explained. The rest of section addresses the modulation of SBH in graphene sili con contact by applying gate voltage. The last section addresses the effect of multilayer graphene and interface states on gate modulated as well as the SBH formed at the interface. 4.3.1 Thermal Equilibrium Electrostatics From the band profile under equilibriu m as shown in Fig. 4 2B the energy balance equation can be written as: (4 9) where m is the g raphene work function, E vac is the vacuum energy level representing E 1 is the shift of the Fermi level due to c harge transfer from silicon to g raphene to maintain charge neutrality of the system E 0 is the energy difference between Fermi level E F and conduction band edge, E C formed at the interface bn is the S chottky barrier height at the interface between graphene and silicon as: (4 10) w here Q is the depletion charge in silicon or charge in graphene in the energy range E 1 C ins is the capacitance corresp onding to the atomistic thin gap of thickness t air the interlayer distance between the graphene and silicon with a typical value of 0. 3 nm [118]

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79 The depletion charge in silicon is calculated as: (4 11) w here N Si is the silico n doping concentration, W d is the depletion width. The depletion width W d can be extracted from simulated profile or can be calculated using depletion approximation as [ 119 ] : ( 4 12) w here bn is the S chottky barrier height at the interface between graphene and silicon, N Si is the silicon doping concentration, Si = 11.9 is the dielectric constant of silicon. The charge in graphene in the energy range E 1 with respect to D irac point is given as : ( 4 13) E 1 can be extracted by equating equation ( 4 11) and equation ( 4 13) as: ( 4 14) The Schottky barrier height bn is extracted from equation 4 8 as: ( 4 15) 4.3.2 Effect of Silicon Doping The effect of silicon doping on barrier height is shown in Fig. 4 3. As the silicon doping increases the barrier height decreases as shown in Fig. 4 3 (blue line with circles). The S chottky barrier height is extracted from the simulated pot ential profile at the interface between silicon and graphene. The charge transfer from silicon to graphene with increased doping results in an increase in the dipole at the interface,

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80 (show n in equilibrium band profile (F igure 4 2 A of graphene silicon co ntacts ). This results in decrease in SBH with increase in silicon doping. On the same plot, we also plotted the value of the Schottky barrier height bn calculated using Equation ( 4 8) ( 4 15). Both the results agree with an error less than 5 %. This clearly validates the analytical model developed. On the same plot we plotted the bn using depletion charge in silicon calculated based on depletion approximation for depletion width W d (equation 4 12) [ 119 ] ( 4 16) w here E 0 is N Si is the silicon doping concentration, N C is effective density of conduction band states in silicon, S i = 11.9 is the dielectric constant of silicon. The depletion theory tends to underestimate the barrier height at high doping con centration in silicon and therefore more detailed description of depletion charge in silicon in needed. Thus, SBH in graphene silicon contacts can be changed by varying the silicon doping. A proper choice of silicon doping is however necessary since the de pletion width formed determined by silicon doping controls the incident photon to electron conversion efficiencies and is not considered as part of this study. 4.3.3 Gate Modulation Next we studied the gate modulation of SBH of graphene silicon contacts. The SBH can be modulated by applying gate potential as shown in Figure 4 4 A. Applying positive gate voltage leads to transfer of electrons from silicon to graphene and the barrier on silicon side is lowered as shown in Fig. 4 4 A. But the transfer of electrons fro m graphene to silicon raises the interface dipole and decreases the S chottky barrier

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81 height as can be seen in Figure 4 4 B. The decrease in barrier height with gate voltage is also reflected as the contact resistance modulation with gate voltage as shown i n Fig. 4 4 C. 500 over an applied gate voltage range of 5 V. This gives solar cells the much needed rectifying behavior. Gate modulation of contact resistance can be used to reduce the off current in solar cells. 4.3.4 Effect of Multilayer Graphene at Interface Next we addressed the effect of using multilayer graphene at the interface. As the number of graphene layers increase the equilibrium S chottky barrier height at the interface increases as shown in Fig. 4 5 A. The multiple layers of graphene have larger density of states and reduce the shift E 1 in the Fermi level on graphene side resulting from the charge transfer between silicon and graphene while maintaining the charge neutrality of the system. However, usi ng multiple layers of graphene screens the gate modulation achievable in graphene silicon contacts as can be seen in Figure 4 5 B. The percent modulation of SBH achievable over a n applied gate voltage range of 5V decreases from 50 % for single layer graphene to less than 5 % for layers close to 6 as shown in Figure 4 5 C. The effect of multiple layers of graphene on contact resistance is studied. Figure 4 6 A shows the contact resistance as a function of gate voltage V G for number of graphene layers=1(blue line with squares), 2 (red line with circles, 4 (black line with triangles), 8 (pink line with asterisks), 16 (green line with crosses). As the number of layers increase from 1 to 16 the contact resistance loses gate modulation. Figure 4 6 B shows the OFF state contact resistance c(O FF) (contact resistance defined at voltage V G =0) and the ON state contact resistance c(O N ) ( contact resistance defined at V G =5 V) as a function of number of layers. As the number of layer increases the contact

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82 resistance increases and for numbers of lay ers more than 6 the contact resistance become essentially constant. This is due to SBH remaining unaffected as shown in Fig 4 5 C for number of layers greater than 6. At the same time the ratio of OFF and ON resistance which is a measure of rectifying beha vior of solar cell junctions, decreases significantly. To illustrate this, Figure 4 6C shows the ratio of c(O FF) (contact resistance defined at voltage V G =0 V ) to c(O N ) ( contact resistance defined at V G = 5 V) decreases 500 to 70 for bilayer to less than 10 for layers more than 6. Thus, multiple layers of graphene at the graphene semiconductor contact interface screens out the gate voltage modulation possible in graphene silicon contacts and reduces the rectification ratio in solar cells. 4.3.5 Effect of Interface States The effect of interface states is studied next. The presence of interface states has been serious concern in most of the heterogeneous material interfaces. As part of our study donor type states are simulated with charge neutrality level fixed at energy of 0.025 eV Below the charge neutrality level the states being donor type are neut ral when filled and positive charged when empty. It has been found that donor states decreases the SBH under equilibrium conditions. The presence of donor sates creates interface dipole in a direction so as to decrease the SBH at the graphene silicon inter face. As we increase the density of donor states the SBH further decreases as shown in Figure 4 7 A. The interface states also screens the gate modulation possible in graphene silicon contacts. As the density of interface states increases, most of the charg e transfer occurs with interface states thereby decreasing the gate modulation possible in graphene silicon contacts. This is true as long as the density of interface states is low enough to avoid Fermi level pining. If the density of interface states beco mes very high,

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83 the Fermi level is essentially pinned at charge neutrality level. Thus, making surfaces clean is necessary to turn off solar cells completely by applying external gate voltage otherwise the problem of leakage current can pose serious challe nges. 4.4 Summary In Summary, the gate electrostatics and transport behavior of graphene silicon contacts is studied. The electrostatic theory to calculate the S chottky barrier height formed at the interface between graphene and silicon is developed. The gate modulation of SBH over a wide range is possible unlike metal semiconductor contacts. The SBH formed at the interface can also be modified by changing the doping on silicon unlike metal semiconductor contacts. These results provide an external knob to tune the SBHs in junctions due to lower density of states in graphene. Multiple graphene layers increase the SBH formed under equilibrium. But at the same time gate modulation of phene increased to 6. Increasing the number of graphene layers beyond 6 can significantly decrease the rectification ratio in solar cells. Interface states at the interface when present reduce the SBH at the interface. The increased density of interface st ates screens out the gate modulation of SBH possible in graphene contacts

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84 Figure 4 1 Device structure of the modeled graphene silicon contact. Graphene is present on top of oxide, SiO 2 is used as the insulator material with thickness of 10 nm, n type silicon layer with doping of 10 18 /cm 3 and thickness 40 nm forms semiconductor side of contact.

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85 A B Figure 4 2 Energy Band d iagram A ) Energy band diagram for isolated graphene and n type silicon separated by nearly infinite distance. B ) Energy band diag ram of graphene silicon S chottky contact under thermal equilibrium. Here, E m is the D irac point energy of graphene, m is the Graphene work function, E vac is the vacuum energy level representing the energy at which electron can be on electron affinity, E 1 is the shift of the Fermi level due to charge transfer from silicon to graphene to maintain charge neutrality interface, E 0 is the energy difference betw een Fermi level E F and conduction band edge, E C given by Equation ( 4 1) bn is the S chottky barrier height at the interface between graphene and silicon.

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86 Figure 4 3 Schottky b arrier h eight bn under thermal equilibrium as a function of silicon dopin g density Blue line with circles is the simulated SBH, dotted black line is the calculated SBH with depletion width extracted from simulations, red line is the calculated SBH with depletion width calculation using Equation ( 4 12 ).

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87 A B C Figure 4 4 Gat e Modulation. A ) Energy band diagram with positive gate voltage applied B) Schottky barrier height bn as a function of applied gate voltage V G C) Contact resistance as a function of applied gate voltage V G The doping on silicon side is 10 18 /cm 3

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88 A B C Figure 4 5 Effect of multiple layers of graphene on Schottky barrier height A ) Schottky barrie r height bn under thermal equilibrium as function of number of layers of graphene at the graphene silicon interface. B ) Schottky barrier height bn as a function of applied gate voltage V G for the number of graphene layers= 1 (blue line with squares), 2 (r ed line with circles ) 4 (black line with triangles), 8 (pink line with asterisks) 16 (green line with crosses). C ) Modulation of S chottky barrier height bn over applied gate voltage range of 5V as a function of number of graphene layers. The doping on s ilicon side is 10 18 /cm 3

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89 A B C Figure 4 6. Effect of multiple layers of graphene on contact resistance A) Contact resistance as function of applied gate voltage V G for number of graphene layers=1 (blue line with squares), 2 (red line with circles), 4 ( black lin e with triangles), 8 (pink line with asterisks), 16 (green line with crosses). B ) O FF state contact resistance ( c(OFF) defined at V G = 0 V ) and O N state contact resistance ( c(O N ) defined at V G = 5 V) as a function of number of graphene layers. C ) Ratio of OFF state contact resistance ( c(OFF) defined at V G = 0 V) and ON state contact resistance ( c(O N ) defined at V G =5V) as a function of number of graphene layers. The doping on silicon side is 10 18 /cm 3

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90 A B Figure 4 7 Effect of interface charge density A ) Schottky barrier height bn under thermal equilibrium as a function of interface charge density B ) Modulation of S cho ttky barrier height bn over applied gate voltage range of 5V as a function of funct ion of interface charge density. The doping on silicon side is 10 18 /cm 3

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91 CHAPTER 5 A COMPUTATIONAL STUD Y OF THERMOELECTRIC TRANSPORT PROPERTIES OF GRAPHENE 5.1 Introductory R emarks Graphene has been choice of extensive study since its inception in year 2004 [2] Remarkable electronic properties [2 ] [ 4 ] [ 31 ] [ 65 ] [ 66] of graphene have spa rked off lots of interest in its fundamental properties and potential device application s. The thermo electr ic transport properties which clarify details on scattering and ambipolar transport properties have been studied theoret ically as well as experimentally [ 1 20 ] [ 12 3 ]. In particular, Thermoelectric power which displays sensitivity to elec tron hole symmetry and provides useful insight into electronic transport properties. It has been found that graphene has large thermoelectric power and can be usefu l for applications, such as generating electricity from heat, thermoelectric cooling etc G raphene shows high ability to conduct heat i.e. high thermal conductivity which reduces its thermo electric figure of merit ZT defined as where S measured in V/K is the thermo electric power often called as Seebeck coefficient, K is the thermal Since h igh ZT is necessary for efficient energy generation from heat ; phonon engineering might be needed to reduce the thermal conductivity without significant reduction i n thermo electric power and electrical conductivity or by engineering thermoelectric power itself The chapter has focused on studying the thermo electric properties of graphene FETs on micrometer scale under ballistic conditions as well in presence of sca ttering. The behavior of thermoelectric power in presence of scattering is studied. We also

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92 in the thermo electric power is in agreement with experiments. In this study we have developed full Boltzmann Transport Equation (BTE) solver to capture thermo electric transport in graphene FETs in three dimensional phase space. The validity of Boltzmann approach to thermal transport by applying semi classical Mott relati on has a lready been demonstrated [ 12 1 ] [ 123 ] BTE effectively models the thermoelectric transport and is validated by progressive evolution of carrier distribution function from low temperature on source side to high temperature region on drain side. BTE solver developed to measure the thermoelectric power (TEP) also captures the ambipolar transport in graphene This is demonstrated as the sign of TEP switches about Dirac point. The effect of surface polar phonon and elastic scattering is also incorporated in the model. Since low field conductivity is affected by both elastic as well as surface polar phonon scattering, the thermo electric power also varies with scattering. The peaks in thermo electric power show strong dependence on the scattering mechanisms on co mparison with ballistic transport. The symmetry in TEP about the Dirac point seen in ballistic transport is broken in presence of surface polar phonon scattering similar to experiments [ 12 2 ] 5.2 Simulation Approach Top gated graphene FETs as shown in Fig. 5 1 were simulated. The nominal device has a top gate insulator thickness of t in s =100nm and dielectric constant of ins = 3.9 which result in a gate insulator capacitance of C ins 300aF/ m 2 The dielectric constant of ins = 3.9 is used for SiO 2 .No gate underla p is assumed, and the gate length

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93 is equal to the channel length L g =L ch which can be achieved experimentally by self align process. A simple linear E k relation is used for graphene which is valid in the energy range of interest, (5 1) where cm/s is the Fermi velocity in graphene. To capture ambipolar transport in graphene, transport in both conduction and valence band is considered. The Boltzman n Transport Equation is given as [82] : (5 2) where is the distribution function, is the collision term is the force on carrier due to electric field, is the group velocity of a particular sub band and is the Due to translation symmetry in y direction in graphene and two dimensional nature, the problem is reduced to three dimensional space of x k x k y only. Hence only three co ordinates and time are needed to specify the system and BTE for graphene in three dimensional space can be written as : (5 3) The discretization schemes and modeling of scattering mechanisms used to solve the equation are same a s described in chapter 2 Isotropic scattering is assumed for both elastic as well as surface polar phonon scattering included as part of study. After discretization the final equation is given as [82] :

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94 (5 4) w here is matrix equivalent for differential operator in x and k x incorporates the boundary conditions due to and is the scattering vector. To start with the simulatio n, initial guess of distribution function is calculated assuming ballistic transport conditions which give (5 5) Thus, is the equilibrium ballistic distribution function. The BTE is then solved self consistently with nonlinear Poisson equation using Newton Raphson method. The temperature conditions are incorporated in the term At the left contact i.e. source contact, only positive moving carriers are respo nsible for influx into the device, therefore, the boundary condition at x=0 holds true for only. Thereby, left contact couples to all the k x k y nodes at x=0 and carriers are distributed according to source F ermi potential a t th e source end and is given as: (5 6 ) Similarly, right contact couples to all k x k y nodes at x=L for and carriers in these states are distributed according to drain F ermi level. (5 7 ) W here and are the source and drain F ermi levels, and are the conduction band edges at x=0 and x=L respectively, T S and T D are the temperature a t

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95 source and drain end respectively, and E(k) is energy at every k x k y node corresponding to x being considered in both conduction and valence band. As part of this study, elastic phonon scattering is modeled with as the fitting parameter, where is the mean free path ( mfp ) of carrier in presence of elastic scattering. The scattering rate for elastic scattering is calculated as: ( 5 7 ) w here is the energ y of initial state as there is no exchange of energy due to elastic scattering so energy remains the same and is used as fitting parameter. [56 ] [ 76 ] [ 83]. 5.3 Results and Dis cussions Figure 5 1 shows the schematic of the device used in our simulations. Top gated graphene FET with two dimensional graphene as the channel is simulated. All the simulations have been done for channel length L ch= 1 m and room temperature of 300K. The TEP measurement is done by applying a controlled temperature to the channel such that t he temperature at the source and drain end is given as (5 8 ) end. The thermally induced voltage is measured by the d rain voltage applied to reduce the thermally induced current to zero. The I D V D characteristic of the device with applied

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96 temperature difference of 80K between the source and drain ends at V G = 1 V is as shown in Fig 5 2 A The drain voltage V D corresponding to I D =0 with applied temperature difference at the ends gives the thermally induced voltage. The TEP is calculated as: (5 9 ) 5.3.1 Ballistic Transport We start by simulating TEP under ballistic conditions at 300 K as shown in Fig. 5 2 A. The simulated TEP versus V G is qualitatively similar to experiments [ 122 ] with the difference of its symmetric shape to the Dirac point under ballistic conditions. The behavior of TEP can be qualitatively explained using semiclassical Mott relation wh ich states [ 122 ]: (5 10) w here e is the electron charge, k B is the Boltzmann constant and G is the electrical conductance. Thus thermoelectric power is proportional to the energy derivative of the conductivity evaluated at the F ermi energy. Close to charge neutrality point in non degenerate limit, thermoelectric power increases with increase in applied gate voltage | V G |. Far away from charge neutrality point, the TEP monotonically decreases with electron concentration (proportion al to the applied gate voltage, V G ) according to relation as rolls off [ 122 ]. The symmetry of the thermoelectric curve about the Dirac point can be explained by symmetric conductance of graphene under ballistic conditions

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97 as sh own in Fig. 5 2 C. The sign of TEP changes from positive to negative around Dirac point and indicates the sign of majority charge carrier. The maximum calculated value of TEP is 118 V/K. The carrier distribution function can be easily extracted from the so lution of Boltzmann transport Equation solver. Figure 5 3 shows the numerically computed carrier distribution function at position, x = 0 x = 0.5 and x = 1 m when temperature difference of 100 K is applied between source and drain ends. The temperature differenc es applied at source and drain end results carrier distribution function to evolve gradually from source to drain end. The carrier distribution function at center of channel x = 0.5 m is found to be distorted from the distribution function at the beginning o f channel. As the temperature difference increases from source to drain end, the negative half diminishes gradually. This occurs due to thermal spread in distribution function by the temperature gradient. Thus, Boltzmann transport equation, a semiclassical approach effectively captures the thermoelectric behavior of graphene. We also simulated the TEP under ballistic conditions at room temperature of 200 K, 250 K and 300 K as shown in Figure 5 4. The peak value of TEP decreases with decrease in temperature in a greement with theory [ 121 ] and experiments [ 122 ]. It is found that several k B T above the Dirac point, the thermoelectric power varies proportionally to the temperature. 5.3.2 Effect of Elastic Scattering Next we studied the effect of elastic scattering on TEP in graphene. Figure 5 5 shows the Thermo Electric power, TEP as a function of applied gate voltage, V G under ballistic conditions(blue line) and in presence of elastic scattering(red dashed line) with = 40 0 nm defined at energy E = 0.1 eV. The qualitative shape of TEP vs. V G plot is similar

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98 to ballistic results. Elastic scattering increases the peak TEP. The peak value increases from 118 V /K under ballistic condition to value of 13 5 V/K for with = 400 nm defined at energy E = 0.1 eV The elastic scattering decreases the current flowing when temperature difference is applied between source and drain ends of channel. But at the same time the electrical conductance is also reduced due to scattering. This results in large thermally induced voltage to be applied to reduce the current to zero. Thus scattering increases the thermo electric power and decreases the thermal conductance. Change in both factors due to scattering is favorable to increase the thermal efficiency, ZT factor. However, the degradation of electrical con ductance with scattering might outweigh both the factors and thermal efficiency might not increase as expected. In presence of scattering, where is the conductance in presence of scattering, T is related to the mean free path of scattering, G ballistic is the conductance under ballistic cond itions Using equation 5 10, TEP in presence of scattering is given as:

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99 = S + S (5 11) where is the TEP in presence of ela s tic scattering and S is the TEP under ballistic conditions The S term due to is positive and explains the increase in peak value of thermo electric power in presence of elastic c scattering. However if T(E) is constant then in presence of scattering thermoelectric power is expected to be same as thermoelectric power under ballistic conditions. Hence explains qualitatively the increase in TEP in presence of scattering but deta iled semi classical approach of BTE is needed for more precise insights into effect of scattering on thermal transport in graphene. 5.3.3 Effect of Surface Polar Phonon Scattering Since surface polar phonon also affects the field behavior in graphene field effec t transistors, next we simulated the effect of surface polar phonon scattering on TEP. Figure 5 6 shows TEP as a function of applied gate voltage, V G under ballistic conditions (blue line) and in presence surface polar phonon scattering for = 87 meV for Al 2 O 3 [ 83 ] (red line with circles), = 55 meV for SiO 2 [ 83 ] (green line with triangles). As phonon energy decreases, the scattering becomes stronger. This results in increase in the maximum value of TEP in pr esence of SPP phonon scattering. The peak value increases from 11 8 V /K under ballistic condition to value of 145 V/K for = 87 meV and 1 7 5 V/K for = 55 meV. The SPP phonon scattering also breaks the symmetry s een in ballistic transport and in presence of elastic scattering. This is due to the fact that the phonon emission (absorption) shown in Fig 5 6 B and Fig 5 6 C above

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100 and below the Dirac point result in transition to different energies. Since graphene has linear density of states, the same phonon emission (absorption) in conduction and valence band translates to different carrier density and thereby, breaks the symmetry of thermo electric power. 5.3.4 Effect of Surface Polar Phonon Scattering and Elastic Scatter ing Next we simulated t he effect of SPP scattering on TEP for =87meV and (elastic)= 4 0 0 nm at E = 0.1 eV as shown in Fig 5 7 With both mechanisms present, we get conductance determined by both mechanisms and the peak value of TEP increases from 118 V/K to 1 2 8 V/K. The TEP becomes asymmetric with respect to Dirac point due to phono n scattering. 5.4 Summary In summary, the semiclassical Boltzmann Transport Equation solver is developed for the thermal transport of the graphene filed effect of transistors. The numerically calculated carrier distribution function evolves gradually along the channel length with temperature gradient. Graphene with high value of thermoelectric power has potential for energy harvesting. The dependence of thermo electric power on various scattering mechanisms is studied. It has been found that thermoelectric powe r increases in presence of scattering and might increase the thermal efficiency if the degradation in electrical conductivity is reduced. The validity of semiclassical Mott s formula in presence of scattering is also discussed. It has also been found that surface phonon scattering breaks the symmetry of TEP with respect to Dirac point.

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101 Figure 5 1 Cross section of the device structure simulated. The device is simulated at room temperature of 300K. The length of graphene channel is 1 m

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102 A B C Figure 5 2. Output characteristics and thermo electric power under ballistic conditions A ) The current I D vs V D curve for L ch = 1 m at V G = 1 V The device is simulated at room temperature of 300 K A temperature difference of 8 0 K is applied be tween source and drai n ends. B) Thermo e lectric power, TEP as a fu nction of applied gate voltage, V G C) L ow field c hannel conductance of graphene FET as a function of applied gate voltage V G All the simulations are done under ballistic conditions at temperature of 300 K

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103 A B C Figure 5 3. Carrier distribution function along the channel A) at the beginning of channel, x = 0 m B) in the center of channel, x = 0.5 m C) at the end of channel, x = 1 m The device is simulated at temperature of 100 K A temperature difference of 80 K is applied between source and drain end.

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104 Figure 5 4. Thermo electric power, TEP as a function of applied gate voltage, V G under ballistic condi tions at 300 K (blue line), 250 K (red dashed line) and 200 K ( black with circle s) Figure 5 5. Thermo electric p ower, TEP as a function of applied gate voltage, V G under ballistic conditions (blue line) and in presence of elastic scattering (red dashed line) with = 40 0 nm defined at energy E = 0.1 eV Surface polar phonon scattering is absent in all these simulations

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105 A B C Figure 5 6. A) Thermo electric power, TEP as a function of applied gate voltage, V G under ballistic conditions (blue line) and in presence surface polar phonon scattering = 8 7 meV for Al 2 O 3 (red line with circles), = 55 meV for SiO 2 (green line with triangles). Elastic scattering is ab sent in all these simulations. B) Schematic sketch of inelastic phonon absorption and C) inelastic phonon emission for electrons in conduction and valence bands of graphene

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106 Figure 5 7. Thermo electric power, TEP as a function of applied gate voltage, V G under ballistic conditions (blue line) and in presence of both surface polar phonon scattering with = 8 7 meV for Al 2 O 3 and elastic scattering (red dashed line) with = 40 0 nm defined at energy E = 0.1 eV

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107 CHAPTER 6 CONCLUSIONS AND FUTURE WORK 6.1 Conclusions In this dissertation, graphene devices are numerical studied and various to affecting the performance of graphene device are investigated. The same semiclassical approac h is used to study inelastic phonon scattering in detail using numerical method to solve BTE self consistently with Poisson Equation for graphene FETs in micrometer regime. This model successfully captures the interplay of self consistent electrostatics an d transport properties in graphene FETs. It is found low bias mobility is also controlled by inelastic surface polar phonon scattering in ad dition to elastic scattering. Good linearity is observed in high quality FETs in agreement with recent experiments and it is explained by average carrier injection velocity at the source end remaining nearly constant with the increase in applied gate bias voltage, which makes them desirable for analogue applications. A simpler model tends to over estimate the saturation velocity as well as intrinsic cut off frequency of the graphene FETs under certain bias conditions The next section of dissertation assesses the high frequency perfo rmance limits of graphene FETs along channel length scaling which has been aggressively pursued experimentally The simulated intrinsic cut off frequency is about 640GHz at a channel length of 100nm and increases to about 3.7THz at L ch =20nm with thick gate insulator thickness of 16 nm However, for a thicker insulator s caling down the channel length to 20nm result s in significant decrease of on off current ratio. Because of the low transconductance, the high cut off frequency is highly susceptible to parasitic gate

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108 capacitance. As the gate insulator scales down to about 1/10 of the 20nm channel length, the on off current ratio can increase to about 3, with a cut off frequency much less susceptible to parasitic capacitance The simulated intrinsic unity current gain frequency f T increases to value of 5THz around L g = 10 nm wi th reduced gate insulator thickness of 2nm However, the intrinsic power gain frequency, f MAX is less than the unity current gain frequency. Including the source and drain parasitic resistance lowers both unity current gain frequency as well as power gain frequency by several factors. Since drain and gain contact resistance is always present in real circuits, proper choice of the contact material is necessary to utilize full RF potential of graphene FETs To discuss the non quasi static effect, the kinetic i nductance of the graphene is computed and the LC characteristic frequency is about It is found that the intrinsic cut off frequency is close to th is LC characteristic frequency and thus, non quasi static effects can start to play a role as the transistor is optimized to perform close to its intrinsic cut off fre quency T he gate electrostatics and transport behavior of graphene silicon contacts is studied. The electrostatic theory to calculate the S chottky b arrier h eight formed at the interface between graphene and silicon is developed. The gate modulation of SBH over a wide range is possible unlike metal semiconductor contacts. The SBH formed at the interface can also be modified by changing the doping on silicon unlike metal semiconductor contacts. These results provide an external knob to tune the SBHs in juncti ons due to lower density of states in graphene. Multiple graphene layers increase the SBH formed under equilibrium. But at the same time gate modulation of graphene

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109 to 6. Increasing the number of graphene layers beyond 6 can significantly decrease the rectification ratio in solar cells. Interface states at the interface when present reduce the SBH at the interface. The increased density of interface states screens out t he gate modulation of SBH possible in graphene contacts. La s t section focuses on the thermal transport behavior in graphene FETs using semi classical approach. Both elastic as well as surface polar phonon scattering results in increase in peak value of The rmo Electric Power. Surface polar s cattering also breaks the symmetry of TEP vs. V G curve with respect to the Dirac Point. 6.2 Future Work This work can be extended in following ways: (1) As graphene FETs suffer from low I on / I off ratio, opening of band gap in bi layer graphene has made graphene a viable replacement for semiconductors. Since the device physics of bilayer graphene transistors is still in embryonic stage, the knowledge of graphene and semiconductors can be extended to analyze the behavior of bilayer graphene and prospects in nano photonics and nano scale electronics. A band gap is opened in bilayer graphene by applying an electric perpendicular to the layers that break s the sublattice symmetry of the lattice In addition to band gap opening anot her electronic property that can be harnessed in design of logic transistors based on bilayer graphene is a pseudo spin degree of freedom associated with the electron density difference between the two layer [ 12 4 ] [ 12 5 ] A model for pseudo spin based bila yer graphene FETs can be developed. Bilayer g raphene n anoribbon is still an unexplored area. Effect of quantum confinement, edge effects in bilayer graphene Nano ribbon can be studied to address practical issues which can change the expected transport beha vior in bilayer graphene GNRs. The first principle study of bilayer graphene is focused on A B stacking. At the same time possibility of angular alignment of layers in bilayer cannot be ruled out. Thus, study of angular aligned layers in bilayer graphene c an help in developing general model to study bilayer graphene. The band gap opening in bilayer graphene is also affected by the presence of surface adsorbent s [ 12 6 ] and can be used as a mean to open band gap in

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110 bilayer graphene FETs rather than using doubl e gated geometry. The study of different surface adsorbents in bilayer graphene can be extended in design of bilayer graphene based sensors. (2) High transparency in the visible and near infrared region has made graphene a probable candidate for transparent el ectrodes in solar cell s [11 ] [ 16] The model for graphene based solar cell can be developed to gain an insight into performa nce limits and design issues.

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111 APPENDIX CODE FOR NUMERICAL S OLUTION OF BOLTZMANN TRANSPORT EQUATION FOR HOMOGENEOUS GRAP HENE %%%%% BTE for a 2D Homogenous Graphene in kx and ky space clear all ; %%%% Physical constants global vF hbar q kk0 kBT flag_abs rate Energy Ef Emax hbar=1.055e 34; % reduced P lan ks constant vF=9.5e5; % in m/s q=1.6e 19; % electron charge in C oulombs kBT=0.0 259; % Boltzman n Constant at T=300K epso0=8.854e 12; % Dielectric constant in F/m kk0=q/(hbar*vF); % in /m, the wave vector unit for 1eV. N0=q^2/(pi*hbar^2*vF^2); % the charge density @ E=1eV N2D=2*(kBT*q)^2/(pi*hbar*vF)^2; % valley and spin deg eneracy included % Scattering Parameters hw=0.2; % % in eV, the OP energy rom=7.66e 7; % in kG/m^2, mass density of graphene vph=1.73e4; % in m/s, velocity of sound in graphene q=1.6e 19; %% OP scattering rate @ Efinal=1eV, The rate scales a s 1/Efinal Dop=25*(q/1e 10); % in J/m, OP deformation potential Rop=Dop^2/(2*hbar*hw*q*rom*vF^2)*q; % in 1/s per eV nSP=1/(exp(hw/kBT) 1); % number of optical phonons %% Elastic scattering parameter lamda_e=3000e 9; % in m, the elastic scattering mfp used as fitting parameter for scattering rate Srlim=2e15; % the upper limit of the elastic scattering rate to avoid singularity Emax=0.70; % in eV, the energy cut off in E k % % Electric field simulation data points efld= [1e4:1e4:9e4 1 e5:1e5:1e6 ]; % % number of simulation data points nefld=numel(efld); % % Fermi Level to specify the charge density Ef=0.250; %% set up the discretization Nkx=120; % number of the kx grid points Nky=120; % number of the ky grid points Nk=N kx*Nky; % total k points, dkx=2*Emax*kk0/Nkx; % 2 for from kmax to +kmax, dk along x direction dky=2*Emax*kk0/Nky; % dk along y direction

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112 %% discretized the position derivative term %% translational symmetry with y (width) position, non df /dy term. kx=dkx*((1:Nkx) (1+Nkx)/2); ky=dky*((1:Nky) (1+Nky)/2); %%% vx (velocity in transport direction at exh kx,ky node ) kxmin=min(kx) dkx/2; kymin=min(ky) dky/2; for ii_ky=1:Nky % iterate over ky for ii_kx=1:Nkx % iterate over kx ind=Nkx*(ii_ky 1)+ii_kx; kt=sqrt(kx(ii_kx)^2+ky(ii_ky)^2); % magnitude of total k %% the coefficient for computing vx*(f(i+1) f(i))/dx (for vx<0) %% or vx*(f(i) f(i 1))/dx (for vx>0) vx(ind,1)=vF*kx(ii_kx)/kt; end end %%%%%%% Calculating the matri x equivalent of collision term in BTE %%%%%%% Skkp is the out scattering matrix %%%%%%% Isotropic scattering is assumed Nsita=80; sita=(1:Nsita)*(2*pi/Nsita); Skkp=sparse(Nkx*Nky,Nkx*Nky); % the out scattering matrix tic for ii_ky=1:Nky % conduction band states for ii_kx=1:Nkx ind=Nkx*(ii_ky 1)+ii_kx; %%%% SP phonon emission kt=sqrt(kx(ii_kx)^2+ky(ii_ky)^2); % wave vector of initial state kf=(kt/kk0 hw)*kk0; % the wave vector of the final state if kf>0 % the final state is in the conduction band Sr=Rop*((kf/kk0))*(nSP+1); % the scattering rate kfx=kf*cos(sita); % x component of kf kfy=kf*sin(sita); % y component of kf ikfx=ceil((kfx kxmin)/dkx); ikfy=ceil((kfy kymin)/dky); ikfx=ikfx(ikfx>0 & ikfx<=Nkx); ikfy=ikfy(ikfy>0 & ikfy<=Nky); % final state in the modeled k region indkf=Nkx*(ikfy 1)+ikfx; Skkp(ind,indkf)=Skkp(ind,indkf)+Sr/Nsita;

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113 end % end of ii_sita iteration %%% SP phonon absorption kf=(kt/kk0+hw)*kk0; % the wave vector of the final state if kf0 & ikfx<=Nkx); ikfy=ikfy(ikfy>0 & ikfy <=Nky); % final state in the modeled k region indkf=Nkx*(ikfy 1)+ikfx; Skkp(ind,indkf)=Skkp(ind,indkf)+Sr/Nsita; end % end of if kf0 & ikfx<=Nkx); ikfy=ikfy(ikfy>0 & ikfy<=Nky); % final state in the modeled k region indkf=Nkx*(ikfy 1)+ikfx; Skkp(ind,indkf)=Skkp(ind,indkf)+Sr/Nsita; Skkp(ind,ind)=0; % self scattering can be omitted. end end Sin=Skkp'; % the in scattering matrix %%%%%% End of Scattering Term Calculation % Equilibrium fermi distribution function used as initial guess for BTE for ii_ky=1:Nky % iterate over ky for ii_kx=1:Nkx % iterate over kx ind=Nkx*(ii_ky 1)+ii_kx; kt=sqrt(kx(ii_kx)^2+ky(ii_ky)^2); % magnitude of total k fBc(ind,1)=1/(1+exp(((kt/kk0) Ef)/kBT)); % conduction band end % end of ii_kx iteration end % end of ii_ky iteration %%%%%% Iteration over all electric field data points

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114 for ii_fld=1:nefld %%%%%%% Calculation of force term (qE/hbar*df/dkx) in BTE dkx=kx(2) kx(1); %%%% the backward difference matrix, f(k_i) f(k_i 1) M1=spdiags(ones(Nkx,1),0,Nkx,Nkx) spdiags(ones(Nkx,1), 1,Nkx,Nkx); M1(1,Nkx)= 1; % periodic b.c. for kx discritization M1=kron(eye(Nky),M1); %%%% the forward difference matrix, f(k_i+1) f(k_i) M2= spdiags(ones(Nkx,1),0,Nk x,Nkx)+spdiags(ones(Nkx,1),1,Nkx,Nkx); M2(Nkx,1)=1; % periodic b.c. for kx discritization M2=kron(eye(Nky),M2); De= q*efld(ii_fld)/(hbar*dkx); % in /s, the field discretization term Dep=max(De,0); % the positive force terms, the backward differ ence Den=min(De,0); % the negative force terms, the forward difference Aefld=kron(diag(Dep),M1)+kron(diag(Den),M2); %%%%% force term %%%% End of field force term calculation % Initialization of parameters for Newton Raphson Method Res=sparse(Nk,1); Jac=sparse(Nk,Nk); error_inner=1; criterion_inner=1e 5; ff_P=[fBc]; % the initial guess assuming Maxwellian Distribution ff_P=min(1,ff_P); ff_P=max(0,ff_P); % 0criterion_inner ff_P_old=ff_P; Res=(Aefld)*ff_P (1 ff_P).*(Sin*ff_P)+ff_P.*(Skkp*(1 ff_P)); Jac=Aefld spdiags(1 ff_P,0,Nk,Nk)*Sin+spdiags(Sin*ff_P,0,Nk,Nk) ... spdiags(ff_P,0,Nk,Nk)*Skkp+spdiags(Skkp*(1 ff_P),0,Nk,Nk); dff= gmr es(Jac,Res,[],1e 3,500); ff_P=ff_P_old+1.0*dff; ff_P=min(1,ff_P); ff_P=max(0,ff_P); % 0
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115 Je_bias(ii_fld)=4*q*dkx/(2*pi)*dky/(2*pi)*Je_bias; Id_bias(ii_fld)=Je_bias(ii_fld); velocity(ii_fld)=Je_bias(ii_fld)/(q*Ne_old); end % end of electric field iteration figure(1) plot(abs(efld)*1e 6,Id_bias, 'linewidth' ,[2]); hold on t itle( 'the current' ) set(gca, 'linewidth' ,[2], 'fontsize' ,[20], 'position' ,[0.20,0.2,0.70,0.7]) xlabel( 'Electric Field [V/ \ mum]' ); ylabel( 'I_D [ \ muA/ \ mum]' ); figure(2) plot(abs(efld)*1e 6,velocity, 'linewidth' ,[2]); hold on title( 'the current' ) set(gca, 'linewi dth' ,[2], 'fontsize' ,[20], 'position' ,[0.20,0.2,0.70,0.7]) xlabel( 'Electric Field [V/ \ mum]' ); ylabel( 'Vsat [m/s]' );

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127 BIOGRAPHICAL SKETCH Jyotsna Chauhan received the B.E. in Electronics and Computer engineering from National Institute of Technol ogy, Hamirpur, India in 2006 She is working towards he r Ph.D. in electrical and computer engineering from University of Florida (UF) .She has been working for Prof. Jing Guo in Computational Nanotechnology Group at UF since 2008. Her current research work centers on device physics and potential applications of graphene devices.