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Growth and Characterization of Novel Thin Films on Gallium-V Semiconductors for Enhanced Functionality

Permanent Link: http://ufdc.ufl.edu/UFE0022898/00001

Material Information

Title: Growth and Characterization of Novel Thin Films on Gallium-V Semiconductors for Enhanced Functionality
Physical Description: 1 online resource (176 p.)
Language: english
Creator: Stewart, Anthony
Publisher: University of Florida
Place of Publication: Gainesville, Fla.
Publication Date: 2008

Subjects

Subjects / Keywords: dielectrics, gaas, gan, interfaces, magnetic, oxide, spintronics, thin
Materials Science and Engineering -- Dissertations, Academic -- UF
Genre: Materials Science and Engineering thesis, Ph.D.
bibliography   ( marcgt )
theses   ( marcgt )
government publication (state, provincial, terriorial, dependent)   ( marcgt )
born-digital   ( sobekcm )
Electronic Thesis or Dissertation

Notes

Abstract: Compound semiconductor-based devices form a critical component in high speed communications and radar technologies. Future advances in these areas will require integration of multiple functionalities and development of new capabilities. Such development can only occur if precise control of surface and interfacial properties can be achieved. This study represents an experimental study of control of two kinds of interfaces in Gallium-V semiconductors. Gallium arsenide (GaAs) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices require the use of a gate dielectric to reduce leakage current, passivate surface traps, and provide electrical isolation between devices. A suitable gate dielectric material must satisfy two requirements: (1) the interface between the GaAs substrate and the gate dielectric must have a low interface state density (Dit) to prevent the Fermi level from being pinned; and (2) the gate dielectric must have a high breakdown field to allow a gate voltage to be established. Samarium oxide (Sm2O3) and samarium gallium oxide (SmxGa1-x)2O3 were investigated as dielectric materials for GaAs MOSFET technology. The growth conditions of were optimized to improve their structural and electrical properties. Spintronics devices will seek to exploit the spin quantum state of the electron in an effort to sustain the innovation in microchip technology. With the ultimate goal of an electron-spin quantum computing machine becoming practical, a magnetic materials system with strong bonding and a Curie temperature (TC) at or above room temperature (RT) compatible with existing semiconductor technology is a promising candidate. Manganese arsenide (MnAs) was investigated as a spin aligner injection on gallium nitride (GaN) substrates. The growth conditions were optimized to improve their structural and magnetic properties. All films were deposited by molecular beam epitaxy (MBE) which allows for abrupt cessation and initiation of growth and the potential for in-situ monitoring of film growth. All films were characterized to determine film thickness, crystal structure, and surface roughness. Electrical diodes were fabricated with the Sm2O3/GaAs heterojunction to evaluate it electrically. The magnetic properties of MnAs/GaN were investigated using a Superconducting Quantum Interference Device (SQUID). Samarium oxide (Sm2O3) and (SmxGa1-x)2O3 have been proposed as candidate dielectric materials for development of gallium arsenide (GaAs) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) technology. Growth of thin (20nm-50nm) samarium oxide and samarium gallium oxide layers on GaAs substrates via plasma-assisted molecular beam epitaxy (MBE) has been performed using a range of growth temperatures and samarium cell temperatures. X-ray photoelectron spectroscopy (XPS) of the deposited films showed evidence of residual Sm metal in the films which decreased with decreasing Sm cell temperature, but was relatively independent of substrate temperature. Stoichiometry of the oxide was found to be independent of substrate temperature, but increased in oxygen to metal ratio as the Sm cell temperature was decreased. Decreasing the Sm cell temperature also suppressed the formation of the monoclinic phase and promoted the growth of the cubic phase. Films grown at higher (500?C) temperature showed the presence of a crystalline interface, but relatively high surface roughness and the presence of multiple crystalline phases. Current-voltage analysis of one hundred micron diameter MOS diodes showed breakdown fields at 1 mA/cm2 of up to 4.35 MV/cm. Breakdown field was found to decrease with increasing Sm free metal content in the films. Post-growth annealing under an oxygen plasma in the MBE chamber of films grown at higher temperatures resulted in an increase in the oxygen to metal ratio but effected no change in the crystalline phase distribution. The effect of stoichiometry, phase distribution and microstructure on the interface state density and capacitance-voltage behavior of MOS diodes was also investigated. The effect of Ga incorporation on the electrical properties of the binary oxide was also investigated. Growth of MnAs on GaN requires a high V/III ratio in the chamber during growth to suppress the formation of Mn-rich compounds. It appears that once a critical thickness is reached the MnAs phase nucleates with excellent crystal quality. MS and RMS values were markedly improved by increasing the MnAs (004) to Mn3As (217) XRD peak ratio. These results indicate that the structural and magnetic properties of the MnAs/GaN system strongly depend on the V/III ratio in the chamber during growth. A saturation magnetization (MS) as high as 276 emu/cm3with a TC of 315K was achieved with MnAs growth at high V-III ratios.
General Note: In the series University of Florida Digital Collections.
General Note: Includes vita.
Bibliography: Includes bibliographical references.
Source of Description: Description based on online resource; title from PDF title page.
Source of Description: This bibliographic record is available under the Creative Commons CC0 public domain dedication. The University of Florida Libraries, as creator of this bibliographic record, has waived all rights to it worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law.
Statement of Responsibility: by Anthony Stewart.
Thesis: Thesis (Ph.D.)--University of Florida, 2008.
Local: Adviser: Abernathy, Cammy R.

Record Information

Source Institution: UFRGP
Rights Management: Applicable rights reserved.
Classification: lcc - LD1780 2008
System ID: UFE0022898:00001

Permanent Link: http://ufdc.ufl.edu/UFE0022898/00001

Material Information

Title: Growth and Characterization of Novel Thin Films on Gallium-V Semiconductors for Enhanced Functionality
Physical Description: 1 online resource (176 p.)
Language: english
Creator: Stewart, Anthony
Publisher: University of Florida
Place of Publication: Gainesville, Fla.
Publication Date: 2008

Subjects

Subjects / Keywords: dielectrics, gaas, gan, interfaces, magnetic, oxide, spintronics, thin
Materials Science and Engineering -- Dissertations, Academic -- UF
Genre: Materials Science and Engineering thesis, Ph.D.
bibliography   ( marcgt )
theses   ( marcgt )
government publication (state, provincial, terriorial, dependent)   ( marcgt )
born-digital   ( sobekcm )
Electronic Thesis or Dissertation

Notes

Abstract: Compound semiconductor-based devices form a critical component in high speed communications and radar technologies. Future advances in these areas will require integration of multiple functionalities and development of new capabilities. Such development can only occur if precise control of surface and interfacial properties can be achieved. This study represents an experimental study of control of two kinds of interfaces in Gallium-V semiconductors. Gallium arsenide (GaAs) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices require the use of a gate dielectric to reduce leakage current, passivate surface traps, and provide electrical isolation between devices. A suitable gate dielectric material must satisfy two requirements: (1) the interface between the GaAs substrate and the gate dielectric must have a low interface state density (Dit) to prevent the Fermi level from being pinned; and (2) the gate dielectric must have a high breakdown field to allow a gate voltage to be established. Samarium oxide (Sm2O3) and samarium gallium oxide (SmxGa1-x)2O3 were investigated as dielectric materials for GaAs MOSFET technology. The growth conditions of were optimized to improve their structural and electrical properties. Spintronics devices will seek to exploit the spin quantum state of the electron in an effort to sustain the innovation in microchip technology. With the ultimate goal of an electron-spin quantum computing machine becoming practical, a magnetic materials system with strong bonding and a Curie temperature (TC) at or above room temperature (RT) compatible with existing semiconductor technology is a promising candidate. Manganese arsenide (MnAs) was investigated as a spin aligner injection on gallium nitride (GaN) substrates. The growth conditions were optimized to improve their structural and magnetic properties. All films were deposited by molecular beam epitaxy (MBE) which allows for abrupt cessation and initiation of growth and the potential for in-situ monitoring of film growth. All films were characterized to determine film thickness, crystal structure, and surface roughness. Electrical diodes were fabricated with the Sm2O3/GaAs heterojunction to evaluate it electrically. The magnetic properties of MnAs/GaN were investigated using a Superconducting Quantum Interference Device (SQUID). Samarium oxide (Sm2O3) and (SmxGa1-x)2O3 have been proposed as candidate dielectric materials for development of gallium arsenide (GaAs) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) technology. Growth of thin (20nm-50nm) samarium oxide and samarium gallium oxide layers on GaAs substrates via plasma-assisted molecular beam epitaxy (MBE) has been performed using a range of growth temperatures and samarium cell temperatures. X-ray photoelectron spectroscopy (XPS) of the deposited films showed evidence of residual Sm metal in the films which decreased with decreasing Sm cell temperature, but was relatively independent of substrate temperature. Stoichiometry of the oxide was found to be independent of substrate temperature, but increased in oxygen to metal ratio as the Sm cell temperature was decreased. Decreasing the Sm cell temperature also suppressed the formation of the monoclinic phase and promoted the growth of the cubic phase. Films grown at higher (500?C) temperature showed the presence of a crystalline interface, but relatively high surface roughness and the presence of multiple crystalline phases. Current-voltage analysis of one hundred micron diameter MOS diodes showed breakdown fields at 1 mA/cm2 of up to 4.35 MV/cm. Breakdown field was found to decrease with increasing Sm free metal content in the films. Post-growth annealing under an oxygen plasma in the MBE chamber of films grown at higher temperatures resulted in an increase in the oxygen to metal ratio but effected no change in the crystalline phase distribution. The effect of stoichiometry, phase distribution and microstructure on the interface state density and capacitance-voltage behavior of MOS diodes was also investigated. The effect of Ga incorporation on the electrical properties of the binary oxide was also investigated. Growth of MnAs on GaN requires a high V/III ratio in the chamber during growth to suppress the formation of Mn-rich compounds. It appears that once a critical thickness is reached the MnAs phase nucleates with excellent crystal quality. MS and RMS values were markedly improved by increasing the MnAs (004) to Mn3As (217) XRD peak ratio. These results indicate that the structural and magnetic properties of the MnAs/GaN system strongly depend on the V/III ratio in the chamber during growth. A saturation magnetization (MS) as high as 276 emu/cm3with a TC of 315K was achieved with MnAs growth at high V-III ratios.
General Note: In the series University of Florida Digital Collections.
General Note: Includes vita.
Bibliography: Includes bibliographical references.
Source of Description: Description based on online resource; title from PDF title page.
Source of Description: This bibliographic record is available under the Creative Commons CC0 public domain dedication. The University of Florida Libraries, as creator of this bibliographic record, has waived all rights to it worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law.
Statement of Responsibility: by Anthony Stewart.
Thesis: Thesis (Ph.D.)--University of Florida, 2008.
Local: Adviser: Abernathy, Cammy R.

Record Information

Source Institution: UFRGP
Rights Management: Applicable rights reserved.
Classification: lcc - LD1780 2008
System ID: UFE0022898:00001


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1 GROWTH AND CHARACTERIZATION OF NOVEL THIN FILMS ON GALLIUM-V SEMICONDUCTORS FOR E NHANCED FUNCTIONALITY By ANTHONY DUANE STEWART A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL OF THE UNIVERSITY OF FLOR IDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY UNIVERSITY OF FLORIDA 2008

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2 2008 Anthony Duane Stewart

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3 To my mother

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4 ACKNOWLEDGMENTS I want to give thanks to the Lord for blessing m e with the opportunity, strength, and courage to pursue a Ph.D. During my graduate experience when it seemed like the responsibilities and stress was too overwhelming for my outward man, it was the Lord who renewed my inward man day by day. Dr. Aberna thy deserves special re cognition for welcoming me into her group and providing me with research direction and purpose. I want to acknowledge Andrew Herrero, Ryan Davies, Dr. Brent Gila, Dr. Kim Allums, Andrew Gerger, and Andrew Scheuerman for help with interpretation of e xperimental results, conducting the TEM work and most of the AFM characterization of my films. I would also like to give thanks to Dr. Pearton, Dr. Norton, Dr. Ren, and Dr. Hebard for serving on my supervisory committee. Very few individuals have positively impacted my life as positively professionally and personally as Dr. Nigel Shepherd, currently an a ssistant professor at the University of North Texas. During my time in graduate school, he made the most significant contribution to my overall intellectual growth as we spent many even ings discussing science and politics. I would also like to thank Joseph Lee, who has been a friend I can rely on for good judgment, relentless encouragement, and therapeutic laughter. Lastly, I want to give thanks to all of my family members. Their steadfast belief in my abilities to accomplish my goal was apparent in the endless financial support and personal sacrifice endured by them throughout my graduate studies. I want to acknowledge my father and my brother. My father deserves credit for providing my brother and me with an environment and a set of circumstances from which we could prosper. My brother has always provided me with a blueprint for success which enabled me to avoid potential pitfalls and setbacks. For this, I am eternally grateful. I want to give a very special thanks to my mother. My mother has inspired me to strive for greatness as sh e passed on individual gain to ensure that my brother and I had the

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5 best chance at success in life. Her experiences have taught me that life measures perseverance, perseverance builds character, and character em bodies hope. She deserves all the credit for nurturing my hopes and cultivating my dreams.

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6 TABLE OF CONTENTS page ACKNOWLEDGMENTS...............................................................................................................4 LIST OF TABLES................................................................................................................. ..........9 LIST OF FIGURES.......................................................................................................................10 ABSTRACT...................................................................................................................................16 CHAP TER 1 INTRODUCTION..................................................................................................................19 Motivation...............................................................................................................................19 Study Overview................................................................................................................. .....21 2 BACKGROUND AND LI TERAT URE REVIEW................................................................ 23 Introduction to MOSFET........................................................................................................23 Basic Operation of e-Mode n-Channel MOSFET Device ............................................... 23 The Two-Terminal MOS capacitor................................................................................. 24 The Ideal and Real MOS Capacitor................................................................................. 24 Gate Dielectric Properties................................................................................................25 GaAs Surface Passivation.......................................................................................................27 Thermal Cleaning of GaAs..............................................................................................27 Sulfur Passivation............................................................................................................28 Atomic Hydrogen............................................................................................................ 29 Dielectrics on GaAs................................................................................................................30 Gallium Oxide.................................................................................................................30 Gallium Gadolinium Garnet (GGG)................................................................................ 32 Silicon Dioxide................................................................................................................ 33 Magnesium Oxide........................................................................................................... 34 Introduction to Spintronic Devices.........................................................................................35 Dilute Magnetic Semiconductors.................................................................................... 36 Ferromagnetic Metals...................................................................................................... 38 MnAs...............................................................................................................................39 3 EXPERIMENTAL APPROACH........................................................................................... 41 Molecular Beam Epitaxy........................................................................................................ 41 Substrate Preparation..............................................................................................................44 GaAs................................................................................................................................44 GaN..................................................................................................................................46 MOS Capacitor Fabrication....................................................................................................46

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7 Ellipsometry and Profilometry........................................................................................ 47 Photolithography.............................................................................................................48 Metallization....................................................................................................................49 Materials Characterization......................................................................................................49 Powder X-Ray Diffraction..............................................................................................50 Atomic Force Microscopy............................................................................................... 50 Reflection High Elect ron Diffraction .............................................................................. 51 Auger Electron Spectroscopy..........................................................................................52 X-ray Photoelectron Spectroscopy.................................................................................. 53 SQUID.............................................................................................................................53 Electrical Measurements................................................................................................. 54 Current-Voltage Measurements............................................................................... 55 Capacitance-Voltage Measurements........................................................................ 55 4 GROWTH AND CHARACTERIZATI ON OF SAMARIUM OXIDE ................................. 65 Growth Conditions..................................................................................................................65 Growth at Low Substrate Temperature................................................................................... 65 Growth at High Substrate Temperature.................................................................................. 65 5 XPS MEASUREMENT OF THE SAMARI UM OXIDE-GALLIUM AR SENIDE HETEROJUNCTION BAND OFFSET................................................................................. 76 Core Level Photoemission Method for Dete rm ining the Heterojunction Band Offset.......... 76 Results of Sm2O3-GaAs Heterojunction Band Offset Measurement......................................77 Summary of Heterojunction Band Offset Measurem ent........................................................ 79 6 GROWTH AND CHARACETERIZATION OF SAMARIUM GALLI UM OXIDE........... 88 Growth and Characterization of Oxides Grown at 100C ...................................................... 88 Growth and Characterization of Oxides Grown at Higher Substrate Tem peratures.............. 90 Growth and Characterization of Bi-Layer (SmxGa1-x)2O3 Oxide Stack.................................92 7 ANNEALING STUDY OF SAMARIUM-BASED OXIDES............................................. 125 Annealing in Oxygen............................................................................................................125 Annealing in Forming Gas.................................................................................................... 126 8 GROWTH AND CHARACTERIZATION OF MANGANESE ARSENIDE..................... 132 MnAs Growth Procedure and Conditions.............................................................................132 MnAs Growth Using AsH3...................................................................................................132 MnAs Growth with a Solid Arsenic Source......................................................................... 133 9 CONCLUSIONS AND FUTURE WORK ........................................................................... 157 Conclusions and Suggestions for Future Work with Sm2O3 Growth on GaAs.................... 157 Conclusions and Suggestions for Future Work with MnAs Growth on GaN......................158

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8 APPENDIX A ANALYSIS OF CV CURVES............................................................................................. 161 CV curves.............................................................................................................................161 Dit Calculations.....................................................................................................................162 VFB Determination................................................................................................................ 165 LIST OF REFERENCES.............................................................................................................169 BIOGRAPHICAL SKETCH.......................................................................................................176

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9 LIST OF TABLES Table page 6-1 List of (SmxGa1-x)2O3 films grown with different Sm cell temperatures showing the oxide, metal, and oxygen XPS peak intensities, ratio of XPS peak intensities, breakdown field, and RMS roughness. ............................................................................94 6-2 (SmxGa1-x)2O3 films grown with different subs trate temperatures showing oxide, metal, and oxygen XPS peak intensities, ra tio of XPS peak intensities, breakdown field, and RMS roughness. The Sm cell temperature was 550C for all samples............. 94 7-1 XPS peak intensities and their ratios for a Sm2O3 film grown at a substrate temperature of 100 C and 500C and a Sm cell temperature of 550C before and after annealing in oxygen.................................................................................................127 7-2 Oxide, metal, and oxygen XPS peak intensit ies, ratios of peak intensities, breakdown field, and rm s roughness for a film grown at a substrate temperature of 500C and a Sm cell temperature of 550C before and after annealing in oxygen.............................. 130 7-3 List of oxide, metal, and oxygen XPS peak intensities, ratios of peak intensities, breakdown field, and rms roughness for a film grown at a substrate temperature of 500C and a Sm cell temperature of 510C before and after RTA annealing in forming gas......................................................................................................................130

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10 LIST OF FIGURES Figure page 3-1 Top view sketch of the Riber 2300 MB E system used for the oxide growth. ................... 56 3-2 A top view sketch of the Varian MOD Gen II MBE growth system................................. 57 3-3 Spotty RHEED image of GaAs after thermal cleaning up to 600C................................. 58 3-4 RHEED image of a Sulfur-passivated GaAs (1x1) at 500C............................................. 58 3-5 Typical optical emission spectrum of the hydrogen plasm a operating at a forward power of 200 W and a flow rate 0.12 sccm....................................................................... 59 3-6 Streaky RHEED patterns of GaAs exposed to AH for different times.............................. 60 3-7 AFM images of GaAs. .....................................................................................................61 3-8 RHEED images of Epi-ready GaAs substrate...................................................................62 3-9 Schematic of the resist scheme for diode processing. ...................................................... 63 3-10 Layout of shadow mask used to fabr icate diodes with 100m diam eter windows for metallization.................................................................................................................. .....64 4-1 Amorphous Sm2O3 grown on GaAs at a substrate temperature of 100C and a Sm cell temperature of 570C ( growth rate ~ 6/min).......................................................... 67 4-2 Morphology of amorphous Sm2O3 grown on a GaAs at a substrate temperature of 100C and a Sm cell temperature 570 C (growth rate ~ 6/min)...................................... 68 4-3 Sm 3d5/2 core level XPS peak from Sm2O3 grown at a substrate temperature 100C and a Sm cell temperature of 570C ( growth rate ~ 6/min) showing evidence of Sm unbonded metal............................................................................................................ 69 4-4 Electrical char ac terization of Sm2O3 on GaAs at a substrat e temperature of 100C and a Sm cell temperature of 570C (growth rate ~ 6/min)........................................... 70 4-5 RHEED image taken 12 minut es into the growth of Sm2O3 grown at a substrate temperature of 500C and a Sm cell temperature of 550C............................................... 71 4-6 Crystalline Sm2O3 grown on GaAs at a substrate temperature of 500C and a Sm cell temperature of 570C ( grow th rate ~ 6/min)................................................................. 72 4-7 Morphology of crystalline Sm2O3 grown on a GaAs at a substrate temperature of 500C and a Sm cell temperature 570 C (growth rate ~ 6/min)...................................... 73

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11 4-8 XPS narrow scan measurement of the Sm 3d5/2 core level from Sm2O3 grown at a substrate temperature 500C and a Sm cell temperature of 570C ( growth rate ~ 6/min)..............................................................................................................................74 4-9 Current versus voltage plot of crystalline Sm2O3 on GaAs at a substrate temperature of 500C and a Sm cell temperature of 570C (growth rate ~ 6/min)............................ 75 5-1 Ga 3d5/2 core level XPS peak taken from a sputtered GaAs substrate...............................80 5-2 Sm 3 d5/2 core level XPS peak taken from a thick (94 nm) Sm2O3/GaAs heterojunction interface..................................................................................................... 81 5-3 GaAs Valence Band Maximum showing th e in tersection of a fitted line to the background energy and the fi rst slope past 0 eV............................................................... 82 5-4 Sm2O3 Valence Band Maximum measurement by XPS showing the intersection of the fitted line to the background energy and the first slope past 0 eV...............................83 5-5 Narrow scan of the Ga 3d5/2 core level XPS peak for the thin (50 ) Sm2O3/GaAs heterojunction interface..................................................................................................... 84 5-6 Sm 3 d5/2 core level XPS peak taken from the thin (50 ) Sm2O3/GaAs heterojunction interface showing the unbonded Sm metal peak................................................................ 85 5-7 Survey scan of a thin (50 ) Sm2O3/GaAs Heterojunction interface (topmost curve). Survey scan of a thick (100 nm) Sm2O3/GaAs Heterojunction interface (middle curve). Survey scan of sputtered GaAs substrate.............................................................. 86 5-8 Energy band spectrum of a thin Sm2O3/GaAs Heterojunction interface. EB is the corresponding core level sepa ration across the interface................................................... 87 6-1 Amorphous (SmxGa1-x)2O3 grown at 100C and a Sm cell temperature of 550C............. 95 6-2 TEM micrograph of (SmxGa1-x)2O3 grown at a substrate temperature of 100C and a Sm cell temperature of 550C............................................................................................ 96 6-3 Morphology of (SmxGa1-x)2O3 grown at a substrate temp erature of 100C and a Sm cell temperature of 550C..................................................................................................97 6-4 Auger survey scan of (SmxGa1-x)2O3 grown at 100C and a Sm cell temperature of 550C..................................................................................................................................98 6-5 Depth profile of (SmxGa1-x)2O3 grown at 100C and a Sm cell temperature of 550C obtained with AES............................................................................................................. 99 6-6 Capacitance versus voltage of (SmxGa1-x)2O3 grown at a substrate temperature of 100C and a Sm cell temperature of 550C. The frequency was 1 MHz........................ 100

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12 6-7 Growth rate and Gallium Concentra tion as determined by AES in (SmxGa1-x)2O3 grown at a substrate temperature of 100C as a function of Sm cell temperature............ 101 6-8 Plot of breakdown volta ges for diodes with (SmxGa1-x)2O3 layers grown at a substrate temperature of 100C as a function of Sm cell temperature............................. 102 6-9 RMS roughness values of (SmxGa1-x)2O3 layers grown on GaAs at various Sm cell temperatures................................................................................................................... ..103 6-10 AFM images of (SmxGa1-x)2O3 layer grown at a substrat e temperature of 100C .......... 104 6-11 RHEED images of (SmxGa1-x)2O3 layer grown at a subs trate temperature 300C.......... 105 6-12 XRD scan for (SmxGa1-x)2O3 grown at a substrate temp erature of 300C and a Sm cell temperature of 550C................................................................................................106 6-13 Surface survey scan for (SmxGa1-x)2O3 grown at a substrate te mperature 300C and a Sm cell temperature of 550C taken by AES................................................................... 107 6-14 Auger depth profile for (SmxGa1-x)2O3 grown at a substrate te mperature 300C and a Sm cell temperature of 550C.......................................................................................... 108 6-15 AFM image for (SmxGa1-x)2O3 grown at a substrate temperature 300C and a samarium cell temp erature of 550C................................................................................ 109 6-16 Current versus voltage characteristics for (SmxGa1-x)2O3 grown at a substrate temperature of 300C and a samarium cell temperature of 550C................................... 110 6-17 Capacitance versus voltage measurements for (SmxGa1-x)2O3 grown at a substrate temperature 300C and a samarium cell temp erature of 550C. The frequency was 1MHz...............................................................................................................................111 6-18 RHEED images of (SmxGa1-x)2O3 growth at a substrate temperature of 500C 112 6-19 XRD scans of (SmxGa1-x)2O3 grown at Sm cell temperat ures of 510C (top red curve) and 550C (middle black curve) at substrate temperature of 500C. The GaAs substrate scan is shown for comparison (bottom green curve).............................. 113 6-20 XRD scans of (SmxGa1-x)2O3 grown at 500C (green cu rve), 300C (red curve), and 100C (magenta curve) substrate temper atures, respectively (beginning from the topmost curve)................................................................................................................. 114 6-21 Surface scan for (SmxGa1-x)2O3 grown at a substrate temperature 500C and a Sm cell temperature of 550C....................................................................................................... 115 6-22 Auger data showing spike in Ga concentration at the interface of (SmxGa1-x)2O3 grown at a substrate temperature 500C and a Sm cell temperature of 550C................ 116

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13 6-23 Morphological image of (SmxGa1-x)2O3 grown at a substrate temperature 500C and a Sm cell temperature of 550C.......................................................................................... 117 6-24 Microstructural data of (SmxGa1-x)2O3 grown at a substrate temperature 500C and a Sm cell temperature of 550C.......................................................................................... 118 6-25. Current versus voltage measurements for (SmxGa1-x)2O3 grown at a substrate temperature a 500C and a samarium cell temperature of 550C.................................... 119 6-26 Capacitance versus voltage measurements for (SmxGa1-x)2O3 grown at a substrate temperature 500C and a samarium cell temperature of 550C....................................... 120 6-27 Hysteretic capacitance versus vol tage plot taken at 10 kHz of (SmxGa1-x)2O3 grown at a substrate temperature of 500C and Sm cell temperature of 550C.......................... 121 6-28 Structural characteri zation of bi-layer (SmxGa1-x)2O3 oxide stack. The oxide was grown at substrate temperat ure of 500C for the first 7.5 minutes of growth and at 100C for the remaining 22.5 minutes of gr owth. The Sm cell temperature was 550C................................................................................................................................122 6-29 AFM image of a bi-layer (SmxGa1-x)2O3 oxide stack. The oxide was grown at substrate temperature of 500 C for the first 7.5 minutes of growth and at 100C for the remaining 22.5 minutes of growth............................................................................. 123 6-30 Current versus voltage meas urem ents for a bi-layer (SmxGa1-x)2O3 oxide stack. The oxide was grown at substrate temperatur e of 500C for the first 7.5 minutes of growth and at 100C for the re maining 22.5 minutes of growth...................................... 124 7-1 XRD scans of Sm2O3 on GaAs at a substrate te mperature 500C and a Sm cell temperature of 570C (growth ra te ~ 6/min) before a nd after annealing under an O plasma for 30 minutes at 500C....................................................................................... 128 7-2 A comparison plot of XRD scans of (SmxGa1-x)2O3 on GaAs at a substrate temperature 500C and a Sm cell temperatur e of 550C before and after annealing under an O plasma for 30 minutes at 500C.................................................................... 129 7-3 Capacitance versus voltage measurements taken after annealing in form ing gas for (SmxGa1-x)2O3 grown at a substrate temperature of 500C and a Sm cell temperature of 550C...........................................................................................................................131 8-1 MnAs grown at a substrate temperature of 300C a manganese cell temperature of 810C and an arsine injector temperatur e of 1050C .The AsH3 flow rate was 10 sccm.................................................................................................................................137 8-2 AFM image of MnAs grown at a substrate tem perature of 300C and a manganese cell temperature of 810C and an arsi ne injector temp erature of 1050C........................ 138

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14 8-3 Hysteresis of MnAs grown at a substrat e tem perature of 300C and a manganese cell temperature of 810C and an arsine injector temperature of 1050C............................... 139 8-4 XRD scan of MnAs grown at a substr ate tem perature of 300C, a manganese cell temperature of 815C an arsine injector temperature of 1050C..................................... 140 8-5 Surface characterization by AFM of MnAs grown at a subs trate temperature of 300C and a manganese cell temperature of 815 C and an arsine injector temperature of 1050C.........................................................................................................................141 8-6 Magnetic characterization by SQUID of MnAs grown with 300C, a m anganese cell temperature of 815C and an arsine injector temperature of 1050C............................... 142 8-7 Saturation magnetization (MS) vs. Ratio of (004) MnAs peak with the (220) Mn3As peak plot of MnAs grown at different V-II I ratios. Solid squares were obtained from samples grown with AsH3. Open squares were derived from solid As.......................... 143 8-8 RMS roughness versus ratio of the (004) MnAs XRD peak with the (220) Mn3As XRD peak plot of MnAs grown at various V-III ratios................................................... 144 8-9 Structural characterizati on of MnAs grown at a substr ate temperature of 300C and a m anganese cell temperature of 800C a nd an As cell temperature of 270C................... 145 8-10 Hysteresis of MnAs grown at a substr ate tem perature of 300C, a manganese cell temperature of 800C and an As cell temperature of 270C............................................ 146 8-11 AFM image of MnAs grown at a substrat e tem perarture of 300C and a manganese cell temperature of 800C and an As cell temperature of 270C..................................... 147 8-12 Structural characterizati on by XRD of MnAs grown at a substrate tem perature of 300C with a manganese cell temperature of 795C and an As cell temperature of 260C................................................................................................................................148 8-13 Morphology of MnAs grown at a substrate tem perature of 300C and a manganese cell temperature of 795C and an As cell temperature of 260C..................................... 149 8-14 SQUID data of MnAs grown at a subs trate tem perature of 300C and a manganese cell temperature of 795C and an As cell temperature of 260C..................................... 150 8-15 MnAs grown at a substrate temperature of 300C a manganese cell temperature of 740C and an As cell te mperature of 300C....................................................................151 8-16 Hysteresis curve of MnAs grown at a substrate tem perature of 300C, a manganese cell temperature of 740C and an As cell temperature of 300C..................................... 152 8-17. Magnetization versus temperature plot of MnAs grown at a substrate tem perature of 300C and a manganese cell temperature of 740C and an As cell temperature of 300C................................................................................................................................153

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15 8-18 AFM image of MnAs grown at a substrate tem perature of 300C and a manganese cell temperature of 740C and an As cell temperature of 300C..................................... 154 8-19 HRTEM image of MnAs grown at a substrate temperature of 300C with a m anganese cell temperature of 795C a nd an As cell temperature of 260C................... 155 8-20 Energy Dispersive Spectroscopy (EDS) da ta showing an increase in Mn concentratio n near the interface of MnAs/GaN heterostructure...................................... 156 9-1 A comparison plot of the leakage current versus the breakdown field for the Sm2O3 bilayer oxide, Sm2O3 and (SmxGa1-x)2O3 at substrate temperatures of 100C and 500C................................................................................................................................159 9-2 Family of C-V curves taken at different frequencies for (SmxGa1-x)2O3 grown at a substrate temperature of 500C a nd Sm cell temperature of 550C................................. 160 A-1 MOS capacitance-voltage curv es for p-type sem iconductor........................................... 166 A-2 High frequency CV measurement for an ideal MOS capacitor....................................... 167 A-3 Illustration of ideal and real CV plots. ........................................................................... 168

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16 Abstract of Dissertation Pres ented to the Graduate School of the University of Florida in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy GROWTH AND CHARACTERIZATION OF NOVEL THIN FILMS ON GALLIUM-V SEMICONDUCTORS FOR E NHANCED FUNCTIONALITY By Anthony D. Stewart December 2008 Chair: Cammy Abernathy Major: Materials Science & Engineering Compound semiconductor-based devices form a critical component in high speed communications and radar technologies. Future a dvances in these areas will require integration of multiple functionalities and development of new capabilities. Such development can only occur if precise control of surface and interf acial properties can be achieved. This study represents an experimental study of contro l of two kinds of interfaces in Gallium-V semiconductors. Gallium arsenide (GaAs) Metal Oxide Semico nductor Field Effect Transistor (MOSFET) devices require the use of a gate dielectric to re duce leakage current, passivate surface traps, and provide electrical isolation between devices. A suitable ga te dielectric material must satisfy two requirements: (1) the interface between the GaAs s ubstrate and the gate dielectric must have a low interface state density ( Dit) to prevent the Fermi level from being pinned; and (2) the gate dielectric must have a high breakdown field to a llow a gate voltage to be established. Samarium oxide (Sm2O3) and samarium gallium oxide (SmxGa1-x)2O3 were investigated as dielectric materials for GaAs MOSFET technology. The growth conditions of were optimized to improve their structural and electr ical properties.

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17 Spintronics devices will seek to exploit the spin quantum state of the electron in an effort to sustain the innovation in microchip technolog y. With the ultimate goa l of an electron-spin quantum computing machine becoming practical a magnetic materials system with strong bonding and a Curie temperature (TC) at or above room temperat ure (RT) compatible with existing semiconductor technology is a promising candidate. Manganese arsenide (MnAs) was investigated as a spin aligne r injection on gallium nitride (G aN) substrates. The growth conditions were optimized to improve th eir structural and magnetic properties. All films were deposited by molecular beam epitaxy (MBE) which allows for abrupt cessation and initiation of growth and the potentia l for in-situ monitoring of film growth. All films were characterized to dete rmine film thickness, crystal structure, and surface roughness. Electrical diodes were fabricated with the Sm2O3/GaAs heterojunction to ev aluate it electrically. The magnetic properties of MnAs /GaN were investigated us ing a Superconducting Quantum Interference Device (SQUID). Samarium oxide (Sm2O3) and samarium gallium oxide (SmxGa1-x)2O3 have been proposed as candidate dielectric materials for development of gallium arsenide (GaAs) Metal Oxide Semiconductor Field Effect Transistor (MOSF ET) technology. Growth of thin (20nm-50nm) samarium oxide and samarium gallium oxide layers on GaAs substrates via plasma-assisted molecular beam epitaxy (MBE) has been performed using a range of growth temperatures and samarium cell temperatures. X-ray photoelect ron spectroscopy (XPS) of the deposited films showed evidence of residual Sm metal in the films which decreased with decreasing Sm cell temperature, but was relatively i ndependent of substrate temperatur e. Stoichiometry of the oxide was found to be independent of substrate temperat ure, but increased in oxygen to metal ratio as the Sm cell temperature was decreased. Decreasi ng the Sm cell temperature also suppressed the

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18 formation of the monoclinic phase and promoted the growth of the cubic phase. Films grown at higher (500C) temperature showed the presence of a crystalline interface, but relatively high surface roughness and the presence of multiple crysta lline phases. Current-voltage analysis of one hundred micron diameter MOS diodes s howed breakdown fields at 1 mA/cm2 of up to 4.35 MV/cm. Breakdown field was f ound to decrease with increasing Sm free metal content in the films. Post-growth annealing under an oxygen pl asma in the MBE chambe r of films grown at higher temperatures resulted in an increase in the oxygen to metal ra tio but effected no change in the crystalline phase distribution. The eff ect of stoichiometry, phase distribution and microstructure on the interface state density a nd capacitance-voltage be havior of MOS diodes was also investigated. The effect of Ga incor poration on the electrical properties of the binary oxide was also investigated. Growth of MnAs on GaN requires a high V/II I ratio in the chamber during growth to suppress the formation of Mn-rich compounds. It a ppears that once a critic al thickness is reached the MnAs phase nucleates with excellent crystal quality. MS and RMS values were markedly improved by increasing the MnAs (004) to Mn3As (217) XRD peak ratio. These results indicate that the structural and magnetic properties of the MnAs/GaN sy stem strongly depend on the V/III ratio in the chamber during growt h. A saturation magnetization (MS) as high as 276 emu/cm3with a TC of 315K was achieved with MnAs growth at high V-III ratios.

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19 CHAPTER 1 INTRODUCTION Motivation W ith the advent of MOSFET technology, research into dielectrics for semiconductors has risen dramatically. The Si-SiO2 interface forms the basis for current MOSFET technology. A thermally stable, electrically insulating layer of SiO2 with high breakdown electric field ( Eb ~ 10 MV/cm) and low interface trap density ( Dit ~ 1x 1010/cm2eV) readily forms on the Si surface by thermal oxidation. Due to the dimensional scal ing requirements predicted by Moores Law, Si device technology will require increasingly thinner gate oxides capable of providing the requisite drain current response to a decreasing applied voltage. Eventually, fundamental limitations imposed by the physics and chemistry of the Si-SiO2 interface will prevent further transistor miniaturization and require a new materials syst em to continue scaling trends predicted by Moores Law. Silicon is an indirect band gap material which makes it an inefficient light emitter. Compared to GaAs, Si has a smaller band gap (1.1 eV) and an electron mobility (1500 cm2/V-s) over 5x smaller. GaAs has a direct band gap material that makes it suitable for optical communications, solar cells, and photonic devices such as IR emitters. Its band gap (1.42 eV) and electron mobility (8500 cm2/V-s) allow it to be used in high temperature and high frequency applications. The capability to produce devices in semi-insulating GaAs substrates provides greatly reduced parasitic capacitances, thus faster devices. Furthermore, it is ideally suited to integrated circuit fabrication because devices made in semi-i nsulating GaAs by direct ion implantation are self-isolating. Despite of all the advantages GaAs has as a substrate material for MOSFET technology compared to Si, there is still an urgent need for a technology capable of forming insulating layers

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20 on GaAs with dielectric and interfac e properties comparable to the Si-SiO2 system. GaAs-based MOSFET technology is also complicated by the high number of GaAs surfaces states that can lead to a pinning of the Fermi level midgap whic h is incompatible with complementary MOS (cMOS) technology. Alternative techniques for na tive oxide removal and surface passivation of GaAs as well as a deposition technique capable of forming insulating layers on GaAs with dielectric and interface propert ies comparable to the Si-SiO2 system are essential for the continued development and realization of practical GaAs MOSFET devices. Spin-based electronics, also known as spintroni cs, is another approach used to avoid the looming fundamental limitations of conventiona l Si-based electronics by seeking to exploit electron spin as well as charge. Spin injecti on, spin transport, and spin detection must be demonstrated at room temperature before a co mmercially viable spintronics device can be realized. One materials system used to manipulate spin-based curre nts is the creation of ferromagnet-semiconductor (FM/SC) heterostructures Spin injection across heterostructural interfaces at cryogenic temperatur es, let alone room temperature, remains challenging. The interface must be free of undesired phases which can act as magnetically d ead layers. MnAs is an attractive candidate as a spin injection laye r because of its RT-ferromagnetic properties. Current III-Nitride-based visible light emitting di odes represents part of a healthy technology base with which Mn-containing magnetic material s can be integrated. The crystallographic symmetry of MnAs and GaN (hexagonal crystal stru cture) should lead to the growth of films with good crystal quality resulting in atomic regi stry at the interface and possibly the growth of epitaxial, single crystal, ferromagnetic MnAs films. Indeed, the growth of a heterostructure with an abrupt interface is ideal for demonstr ating spin injection across an interface.

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21 Study Overview The first objective of this study was to grow a gate dielectric with high breakdown voltage so that it could be used in an enhancem ent m ode GaAs MOSFET. This study also included the optimization of the growth conditions and their effects on stoichiometry, phase distribution and microstructure. The Dit value and capacitance-voltage behavior of MOS diodes was used to evaluate the relationship betw een growth conditions and interfacial quality. The second objective of this study was to grow a magnetic ma terial with room temperature ferromagnetism that could be potentially integrated into a II I-Nitride technology base. Th e growth conditions in this study were also optimized to produce f ilms with high saturati on magnetization and low surface roughness. A brief introduction to MOSFETs and their basic operation was required for the basic understanding essential for investig ating the properties of dielectri cs. An extensive literature review of GaAs surface passiva tion techniques and dielectrics on GaAs was carried out to determine the state of the art. A literature re view of spintronics devi ces and magnetic materials used to demonstrate spin injection across a heterointerface was conduc ted to determine the current state of research. Since the surface pr operties of the semiconductor will largely affect the properties of the deposited film, initial experiments focu sed on optimizing a substrate cleaning procedure for obtaining a clean GaAs and GaN surface. Next, the binary oxide, Sm2O3, was deposited at two substrate temperatures and then characterized stru cturally, morphologically, and electrically. Before begi nning the fabrication of electrica l diodes, the heterojunction band offset in the Sm2O3/GaAs system was measured by X-ray Photoelectron Spectroscopy (XPS) to determine if Sm2O3 would be useful as a dielectric for GaAs MOSFETs. Next, the ternary oxide, (SmxGa1-x)2O3, was deposited to investigate the effect s of Ga incorporation. Optimization experiments were used to determine the effect s of substrate temperat ure and samarium cell

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22 temperature (i.e. growth rate) on film stochiometry, phase dist ribution, and microstructure in these films. Since all of the samarium base d oxides (i.e. samarium oxide with and without gallium) used in this study were found to have unbonded Sm metal, anne aling experiments were carried out in oxygen and forming gas to determine the effects of annealing on film stochiometry. Lastly, the optimal growth conditions for deposition of MnAs on GaN were arrived at through a series of growth runs i nvolving different arsenic sources. In conclusion, recommendations for future work were established for the MnAs/GaN system based on the results of various characterization techniques. A comparison of electrical data for all of the oxide films was investigated and some conclusions and recommendations for future work were determined

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23 CHAPTER 2 BACKGROUND AND LITERATURE REVIEW Introduction to MOSFET The MOSFET is a three term inal device which uses a metal gate to control a conducting channel that electrons or holes (depending on the type of conduc ting channel) can flow through from a metal source to a metal drain. The two types of MOSFET devices are depletion mode (normally on) and enhancement mode (normally off). In the depletion mode MOSFET, the semiconductor material beneath the oxide is doped with the same type of material as the source and drain regions. A conducting channel is alrea dy present at a gate volta ge of zero, so a gate voltage must be applied to turn the device o ff. In the enhancement mode (e-mode) MOSFET, the semiconductor material beneath the oxide is li ghtly doped to create a region of opposite type to the material under the source and drain regions A conducting channel is not present at gate voltage zero, so a gate voltage must be applied to create a conducting cha nnel and turn the device on. The e-mode MOSFET is most commonly used as a switch. An e-mode n-channel device will be used for further description rega rding the basic operation of a MOSFET. Basic Operation of e-Mode n-Channel MOSFET Device An e-m ode n-channel device has n+ source and drain regions that have been implanted or diffused into a lightly doped p-type substrate. At a gate voltage of zer o, there is no conducting nchannel between the n+ regions, so no current can flow fr om the drain to the source. At equilibrium, the Fermi level is flat and a potential barrier is present that prevents the flow of electrons from the source to the drain. As a positive bias is applied to the gate, the valence band moves away from the Fermi level and a depletio n region begins to form as holes underneath the gate oxide are repelled. A corres ponding negative charge (ionized acceptors) is induced in the ptype channel, and the barrier for electrons betw een the source, channel, and drain is reduced.

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24 Further reduction of the barrier will lead to the formation of a channel in which electrons flow from the source to the drain. The minimum gate voltage required to induce this channel is known as the threshold voltage (VT). Increasing the gate voltage beyond the threshold voltage will induce more negative charges in the channel as minority carrier electrons generated in the bulk will drift across the deplet ion layer to the surface layer (inversion layer) of charge. Applying a drain bias initially increases the drain current linearly. However, as more drain current flows in the channel, more ohmic voltage drop occurs along the channel, and eventually a drain bias is reached that causes the conducting channel to pinch-off and the drain current to saturate. Pinch-off will occur when the difference between the gate voltage and drain bias is equal to the threshold voltage. Increasing the drain bias further will move the pinch-off point farther into the channel and closer to the source end1. The Two-Terminal MOS capacitor The phenomenal success of the MOS transistor has been driven by the dimensional scaling of the MOS transistor and the stabil ity and reproducibility of the Si-SiO2 interface. The latter has led to an extensive research effort of the twoterminal MOS structure often referred to as a MOS capacitor. The MOS capacitor is a two terminal device that uses a metal gate to determine the number of carriers available for conduction at the surface of the semiconductor substrate. Detailed studies conducted with the th ree-layer structure has led to the development of better fabrication methods which have greatly reduce the undesirable eff ects that pl agued earlier work. The Ideal and Real MOS Capacitor The ideal MOS capacitor has a flatband condition where the energy difference between the m etal work function ( m) and semiconductor work function ( s) is zero at an

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25 applied bias of zero. Under an applied bias, three distinct operation modes exist which are known as accumulation, depletion, and inversion. In accumulation, majority carriers accumulate at the surface of the semiconduc tor, forming a larger carrier concentration than the doping concentration in the bulk of the semiconductor. For a p-type semiconductor, the valence and conduction bands will bend up, and for an n-type semiconductor, the bands will bend down. In both cases, the intrinsic Fermi level (Ei) is farther away from the Fermi level (EF) of the semiconductor. In depletion, majority carriers ar e depleted near the semiconductor surface. The bands will bend down in p-type material and will bend up in n-type material, with the bands bending far enough for Ei to equal EF at the surface. Under in version, the bands bend down strongly enough in the p-type material so that Ei lies below EF at the surface, and the bands bend up strongly enough in the n-type material so that Ei lies above EF at the surface. Majority carriers at the surface of the semiconducto r have been further depleted and minority carriers are collected at the surface2,3. Gate Dielectric Properties For a m aterial to be an effective dielectric, it needs to possess the following characteristics: chemical and thermal stability, a dielectric cons tant higher than the semiconductor, a wide band gap with confinement at both e dges, and a lattice constant and thermal expansion coefficient close to that of the underlying substrate. Large differences in the lattic e constants can create defects such as misfit dislocati ons in the underlying substrate that can serve as trapping centers. If the growth occurs at high temperatures, large differences in the thermal expansion coefficients can produce stress at the interf ace during cooling that will relie ve itself through the formation and propagation of dislocations. High operating temperatures with wide band gap semiconductor devices makes thermal stability an absolute necess ity for the dielectric. In addition to needing a larger band gap than the semiconductor, larg e valence band and conduction band offsets with

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26 respect to the semiconductor are highly desirable. A higher di electric constant than the semiconductor is needed to prevent the formation of a high electric fi eld in the dielectric that can lead to potential breakdown of the dielectric. Effectiveness of the dielectric can also be determined through analysis of the charges at the dielectric/semiconductor interface and in the dielectric itself. Positive or negative charges trapped at the dielectric/semiconductor interf ace are known as interface trapped charge (or interface state density). The trappe d charge is due to structural defects (i.e. dislocations), dangling bonds, and impurities. The Dit should have a value less than or equal to 1011 eV-1cm-2 for a device to be successful. Charges trapped in the first 2-3 monolayers of the dielectric due primarily to structural defects are known as fixed dielectric charge (Qf). Positive or negative charges in the bulk of the dielectric due to trapped holes or electrons are dielectric trapped charge (Qot). These charges can be injected into the dielectric from the gate or semiconductor under large gate biases Mobile dielectric charge (Qm) is attributed to ionic impurities that can drift under an applied electric fi eld. It is critical to minimize the amount of charge in the insulator as trapped or mobile ch arges can cause shorting and effect the depletion of a semiconductor3. The integrity of the oxide can be determin ed from current-voltage measurements by calculating the breakdown field of the oxide The breakdown field (in MV/cm) provides a measure of how much gate voltage can be appl ied before the oxide breaks down and charges flow freely from the gate to the semiconductor. It is extremely important to limit the number of defects (such as dislocations a nd pinholes) and charges in the di electric as they can serve as electrical pathways that can lead to premature breakdown.

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27 Oxide charge is also an important parameter for devices. Oxide charge can alter the threshold voltage of a MOSFET, alter the surf ace potential of the se miconductor, and alter common emitter current gain at low collector current in a bipolar transistor. Fixed oxide charge can be measured from the capacitance versus vo ltage (C-V) curves of an MOS capacitor. The simplest and most widely used me thod for measuring oxide charge de nsity is to infer this density from the voltage shift of the depletion-to-weak inversion portion of the C-V curve (discussed in more detail in APPENDIX A). GaAs Surface Passivation Preparation of a clean crysta lline sem iconductor surface under vacuum conditions remains to be one of the most challenging issues in III-V semiconductor technology. A semiconductor surface exposed to air is covered with native oxides which have to be removed in vacuum or in an inert atmosphere before any epitaxial overgr owth can occur. After native oxide removal, a passivation process is used to provide stability against further chemical modification of the surface and better control of the electronic properties (unpinni ng of the Fermi level and reduced surface recombination). One of the major drawbacks of the III-V semiconductors particularly GaAs has been the high number of surface state defects, and the te chnological inability to reduce them. A number of passivation techniques both wet and dry have been investigated yet the search for a highly reproducible simple technique for GaAs pa ssivation remains to be urgent. Thermal Cleaning of GaAs Therm al desorption of surface oxides is perhap s the simplest technique used to obtain a clean semiconductor surface in vacuum. However, careful attention must be paid to surface roughening during oxide removal, as many fabrication processes require smooth, high-quality surfaces for the growth of 3D structures such as quantum dots. Thermal cleaning of GaAs is generally performed by heating the substrate above 580C under a group V overpressure. The

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28 GaAs-oxide layer decomposition occurs in a multiple-step process. First the As2O5 is removed by forming volatile AsH3. Then, the decomposition of the ga llium oxide layer, which comes off above 580C, requires the reducti on of the relativ ely stable Ga2O3 to the more volatile Ga2O. Problems with this technique for GaAs are th e high processing temperature around 600C which can result in the excessive desorption of arsenic and significant surface roughening4,5. Optimal thermal cleaning conditions for GaAs require the us e of an arsenic source such as arsine (AH3) or trisdimethylamino-arsenic (TDMAA) to obtain a smooth (< 0.2 nm) GaAs surface6,7. A model assuming that the oxide layer is removed by void formation and the desorption rate is proportional to the area of void formation has been suggested. This model predicts the GaAs surface inevitably becomes rough after thermal re moval of oxides, because the GaAs surface exposed earlier to vacuum th rough void openings loses more Ga As from the substrate through the As2/As4 desorption and Ga migrati on to the void perimeter8. Sulfur Passivation Despite the focus of intensive research effort s for nearly 30 years, the surface chemistry of GaAs after the sulfide treatment remains to be controversial due to a lack of consistency in the experimental results reported in the literature These inconsistencies in the outcome of the sulfidation of GaAs are reflected in a spread of results in terms of the identification of sulfur bonds to GaAs and the position of the Fermi leve l within the band gap. A number of sulfide surface treatments involving the immersion of the GaAs wafer in Na2S, (NH4)2Sx, (NH4)2S, and S2Cl2 solutions under specific conditions have been employed. It is believed that sulfidation of GaAs relies on the elemental forms of Ga and As binding with S to produce Ga-S and As-S bonds which are responsible for the passivation effects of GaAs9,10,11 Prior to the sulfur treatment, the GaAs wafer is etched to expose a pristine GaAs surface for which S can strongly bond. These wet techniques have proven to be successful at reducing surf ace state densities, but

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29 issues with long term stability and reproducibil ity have resulted in some variation in the interpretation of experimental results12,13,14,15,16,17,18,19,20,21. These problems are rooted in the absence of a clear explanation of the chemical processes occurring at the GaAs surface and the mechanism for the changes of electrical properties. Atomic Hydrogen The need for a dry vacuu m technique capable of removing surface oxide s at relatively low temperatures has fueled interest in the interac tion of atomic hydrogen (AH) with GaAs surfaces. Several AH sources have been employed to gene rate a flux of atomic hydrogen in vacuum among them are the dissociation of H2 via a hot filament, radio-fre quency (rf) plasma discharge, or electron cyclotron resonance. Ideally, the source should provide a high-purity flux of atoms free of high-energy species which would damage the surface. The efficacy of the hydrogen source is directly related to the efficiency of that source to produce AH which reduces GaAs native oxides. Compared to conventional therma l cleaning which requires temperatures in the vicinity of 600C4, the oxide desorption temperature (b etween 350C-400C) is significantly lower in AH cleaning with ECR, an rf discharge plasma, or dissociation of H2 via a hot filament 22,23,24,25,26,27,28,29,30,31. This substantial re duction in the oxide deso rption temperature is particularly beneficial in light of the surface roughening issues associated with conventional thermal cleaning. However, the problem of at omic hydrogen diffusion into bulk GaAs at 200C can be problematic in controlling the electronic properties of the su rface. In this study32, AH was supplied to the GaAs surface by two methods. In the first approach, molecular hydrogen was thermally dissociated on a resistively heated co iled tungsten filament placed at a normal angle to the sample at a distance of 5 cm. AH was generated by passing molecular hydrogen through a tungsten capillary in the second a pproach. The AH doser was kept about 3 cm away from the sample at 50 normal to the sample surface. Th e cracking efficiency was estimated to be 10%

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30 and unity, respectively. It was determined th at an AH induced slow decomposition of GaAs occurs after around 700L (Langmuirs ) of AH dose even at RT and can result in the pinning of the Fermi level which is associated with an increase in surface states. However, this process occurs very slowly due to the amount of AH dose needed to observe these charact eristic changes in the electrical properties. Dielectrics on GaAs A suitable gate dielectric for GaAs MOSFET t echnology must have two cr itical properties. (1) The in terface between the III-V surf ace and the oxide must have a low Dit to prevent the Fermi level from being pinned. (2) The oxide should have a high breakdown field to allow a gate voltage to be established. For nearly four decades, an enormous research effort has been expended to form insulators on GaAs with good di electric and interface pr operties suitable for MOSFET applications. Gallium Oxide As m entioned previously, thermal oxidation of the GaAs surface induces complicated arsenic and gallium oxides at th e surface which leads to a large Dit around midgap For nearly four decades, an enormous research effort has been expended trying to reduce the Dit at the Ga2O3-GaAs interface. Prior to the widespread use of MBE, GaAs MOS structures were primarily grown using a thermal oxidation proces s or an anodic oxidati on process. Thermal oxidation of GaAs was undertaken in a simple tube furnace through which pure oxygen gas flowed in a conventional manner yielded oxi de films with a microcrystalline nature33. Electron diffraction images showed that the film consisted of only -Ga2O3, the most common form of gallium oxide. In this study, an oxidized and unoxidized were simultane ously heated to 950C in an argon atmosphere overnight. Both samples were reduced to a gallium droplet suggesting the outdiffusion of arsenic in the oxidized sa mple possibly along the grain boundaries of the

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31 microcrystalline oxide. Therefore, thermal oxi dation of GaAs produces films which are not suitable for oxide masking, a key technique in MO SFET device technology. It was believed that the poor electrical properties were due to the chemical composition lack ing arsenic trioxide. Based on these considerations native oxide f ilms grown under controlled vapor pressure of As2O3 was proposed34. A combination of auger electron spectroscopy (AES) measurements and electron beam diffraction patterns confirmed that the dominant cons tituents of films grown in arsenic trioxide vapor are represen ted by a quasibinary solid system As2O3--Ga2O3. The electrical properties of these films were char acterized in terms of their breakdown field and leakage current. A breakdown field strength of 5-7 x 106 V/cm and a leakage current density of 1 x 10-8 A/cm2 per 1000 thickness at an applied voltage of 10 V was reported. As compared to thermal oxidation of GaAs in a tube furn ace under pure oxygen, oxide films grown under controlled vapor pressure of arsenic trioxide showed significant improvements in terms of their electrical properties. Films grown by this method were found to have incorporated crystalline and amorphous allotropes of ar senic with the amorphous form be ing found closest to the GaAs substrate. Mobile charge contamination is unde sirable from an electr ical standpoint as the incorporation of metallic species during growth can adversely affect the insulating properties of the oxide. Comparable results have been achieve d with anodizing of GaAs. One approach uses an electrolyte composed of a pol yhydric alcohol such as ethylene glycol or propylene glycol, a weak carboxylic acid such as tartaric acid or citric acid, and water was used to produce glassy uniform native oxides with thickness depending linear ly on the voltage applied across the formed oxide35. Electrical characteristics were reported in terms of breakdown field strength of 4-5 x 106 V/cm and a leakage current density of 10-1110-9 A/cm2. However, the very high Dit value of 1012-1013 cm-2eV-1 reported in this system limits its usefulness as a gate dielectric for MOSFET

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32 applications. Plasma or dry anodizing36 was found to decrease the num ber of surface states at the oxide-GaAs interface but there is still no cl ear consensus on the growth mechanism of the oxide. Gallium Gadolinium Garnet (GGG) Ga2O3(Gd2O3) films were deposited by electron-b eam evaporation of a single crystal Gd3Ga5O12 source37,38 (also known as GGG Gadoliniun Gallium Garnet) under ultrahigh vacuum conditions for gate dielectrics on GaAs. Subseque nt to the growth of thick 1.5 m n(1.6 x 1016cm-3) or p-type (4.4 x 1016cm-3) GaAs layers on heavily Si or Zn doped GaAs substrates, the wafers with As stabilized (2x4) surfaces were transferred under vacuum of 6 x 10-11 Torr from the III-V solid source molecular beam epitaxy chamber (background pressure of 2 x 10-11 Torr) to another chamber (background pressure of 1 x 10-11 Torr) for oxide deposition. Thus, no surface contamination or oxidation was incurred. The Ga2O3(Gd2O3) films were deposited at substrate temperature below 600C. Depositions at temperatures >600C yielded films of poor electrical properties due to ch emical reaction with the GaAs substrate. Following oxide deposition, MOS capacitors were fabricated usi ng a standard shadow mask process. A Dit value in the low 1010 cm-2eV-1 range was reported for this hetero structure and the C-V measurements showed evidence of accumulation and invers ion, the basic requirements for MOSFET technology39. The films were found to have a nonunifo rm Gd concentration characterized by an essentially Gd free interfacial region and a p eak in Gd concentration at the oxide surface confirmed by x-ray photoelectron spectroscopy. It should be pointed out he re that the deposition of Ga2O3 by electron beam evaporati on was carried out using a Gd3Ga5O12 target because there was no single crystal of Ga2O3 available. The Gd3Ga5O12 source material is composed of Ga2O3 which volatizes at 2000K and Gd2O3 which has a boiling point of 4000K. If the deposition temperature is kept low, film s are composed primarily of Ga2O3, with Gd2O3 as a minor phase.

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33 The nonuniform Gd concentration was found to have a significant effect on the Dit value which was found to increase at a distance of 2 nm aw ay from the interface. Oxides grown on airexposed GaAs epilayers were found to have an interface trap density in the upper 1010cm-2eV-1 range40 The substrate temperature was 480C. In this ex-situ pr ocess, after the deposition of thick 1.5 m n-type (1.6 x 1016cm-3) GaAs epilayers on heavily Si doped (2 x 1018cm-3) GaAs substrates the wafers were removed from the MB E chamber, exposed to air for three days, and then placed into another chamber for oxide deposition. No surface reconstruction and discontinuous reflective high en ergy electron diffraction (RHEED) (discussed in Chapter 3) streaks were observed on the ex-situ GaAs. The discontinuous streaks suggest the surface has been contaminated with carbon and/or oxygen. As compared to the insitu process, the increase of Dit can be attributed to oxidation which occu rred as a result of air exposure. Silicon Dioxide Silicon d ioxide (SiO2) films have been deposited on GaAs substrates by an electron beam evaporation method of a single crystal of SiO2 39, plasma enhanced chemical vapor deposition (PECVD)41, photo-chemical vapor deposition (photo-CVD)42, and a liquid phase deposition (LPD) technique43. It was shown that silicon dioxide films with low interface trap density deposited by electron beam evaporation on Ga As cannot be easily obtained. Silicon dioxide films were amorphous for substrat e temperatures from RT to 500C as observed from TEM and RHEED studies. The SiO2-GaAs interface was shown to be intrinsically pinned at the midgap, as demonstrated by PL and C-V measurements39. Silicon dioxide films deposited by PECVD have also shown limited success as a dielectric for GaAs. In this study, the GaAs surface was exposed to a hydrogen sulfide plasma for 20 minutes at RT prior to oxide deposition. This RT hydrogen sulfide plasma treatment yields a thin sulfide layer at the interface. Three possible explanations were proposed for the high Dit value obtained for this heterostructure: (1)

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34 Reoxidation of the surface from reactive oxygen from the SiO2 film, (2) charge trapping in sulfide compounds at the interface, or (3) SiO2 defects produced by init ial reactions with the sulfide layer41. SiO2 films deposited by photo-CVD using a deuterium lamp as an excitation source were found to have a Dit value of 6.5 x 1011cm-2eV-1 for the as-deposited native oxide with a breakdown field of 11 MV/cm42. The high breakdown fiel d indicates the good crystal quality of the film deposited with this technique; however, the relatively high Dit value needs to be reduced for GaAs MOSFET technology. A breakdown field of approximately 7.6 MV/cm was reported for SiO2 films deposited by the LPD technique43. The electrical properties of LPDSiO2 were attributed to the suppression of interd iffusion due to a low processing temperature of 40C. Magnesium Oxide Magnesium oxide films (MgO) have been deposited by electron beam deposition on pGaAs substrates for gate dielectrics. The f ilms were deposited in th e range of 200C between 500C. Films grown below 250C had stochiomet ry problems while films grown above 450C had significant interdiffusion pr oblems. MgO films deposited at 300C showed no significant interdiffusion problems with abrupt interfaces. Current-voltage (I-V) and C-V measurements showed MIS behavior of A l/MgO/p-GaAs diodes with a Dit value of 1.9 x 1011eV-1cm-2 and a dielectric constant of 9.0644. MgO films have also been deposited by magnetron sputtering on GaAs45. In this study, a nucleation mechanism is proposed for the growth of epitaxial MgO on GaAs. Based on the results of Electron Energy Loss Spectra (EELS) and TEM-Energy Dispersive Spectra (TEM-EDS), it was concluded that the native oxide of GaAs volatilized, exposing bare GaAs at pinholes where Mg O nucleation can occur. High Resolution Transmission Electron Microscopy (HR-TEM) rev ealed a composition characterized by excess Ga with respect to stoichiometric GaAs and excess O with respect to stoichiometric MgO. The

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35 presence of excess Ga with respect to GaAs s uggests partial volatilization of the native oxide prior to the nucleation of the MgO film, since the oxides of arsenic have higher vapor pressures than the oxides of gallium. Pulsed laser deposition has also been used to deposit MgO on Sbpassivated GaAs. It was previously shown that Sb passivation provides a smooth reconstructed GaAs surface suitable for the growth of epitaxi al MgO films with no large-scale interfacial layer46. A clockwise hysteresis with a voltage shift of 0.8 V in the C-V curves indicated a trap of density of 7x10-11cm-2. In this study, two sets of samples we re grown to investig ate the effects of residual Sb on the structural a nd electronic properties of the MgO/GaAs heterostructures. The first set of samples was grown at 380C five minutes after the appearance of the (1x3) reconstructed RHEED pattern. For the second set of samples, the substrate was heated to 500C until the (2x4) reconstructed pattern was observe d, held at 500C for five minutes and then rapidly cooled to 380C for MgO growth. AES measurements confirmed that residual Sb is present at the interface of epitaxial MgO film s grown on Sb-passivated GaAs at substrate temperatures between 350C and 40 0C. XPS measurements indica ted that the Sb coverage was reduced by a factor of 3.6 during heating from 350C to 500C. It was concluded that Sb desorption is necessary to produce a uniform inte rface and residual Sb at the interface results in increased frequency dispersion in the C-V characteristics, as co mmonly observed with dielectrics on GaAs. Introduction to Spintronic Devices Spin-based electronics s eek to exploit the sp in of an electron for information storage and processing in an effort to further increase IC packing density and switching speed as well as reduce power consumption47. One approach to manipulating sp in-based currents is the creation of the Dilute Magnetic Semiconductors (DMS). A second approach to manipulating spin-based currents is the creation of ferromagnet-semiconductor (FM/SC) hete rostructures. Fe with a TC of

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36 1043 K has been deposited by MBE on (7 x 7) recons tructed Si(001) and (2 x 1) reconstructed Si(111) but were unsuccessful due to reactive interfaces RT48. Thin films of Fe have been deposited by MBE on GaAs(001) substrates resulti ng in the absence of ma gnetic signature at RT due to the formation of a magnetically dead layer in the range of the first few monolayers49. By contrast, Fe growth on molecular-beam epitaxy-prepared GaAs(001)c (2x4) and c(4x4) surfaces result in a relatively abrupt interf ace with good magnetic properties, suppression of midgap states, and does not pin the Fermi energy (EF)50,51,52. However, there is concern that mismatches in the EF at the interface may preclude efficient spin injection. Alternatively, manganese arsenide (MnAs) which also exhibits RT-ferromagnetism (TC = 318K)53 has been deposited on GaAs(111) and GaAs(001) oriented surfaces resulting in epitaxial ferromagnetic MnAs layers with promising magnetic properties54,55,56. However, the coexistence of hexagonal ferromagnetic -MnAs phase and paramagnetic -MnAs phase which have been stabilized by residual strain57,58 has been reported in the literature. Th is phase coexistence can be attributed to a large lattice mismatch (7.36%) and a ferromagnetic-paramagnetic transi tion (at approximately 40C) during sample cooling from the growth temperature which is accompanied by a ( 1% )59 change of the lattice parameters. Growth of MnAs on GaAs is complicated by the differences in crystal structure (hexagonal vs. cubic) and by the large lattice mismatch. By contrast, the crystallographic symmetry of MnAs and GaN (h exagonal crystal structure) should lead to improved crystal quality resulting in atomic regi stry at the interface and possibly the growth of epitaxial, single crystal, ferromagnetic MnAs films. Dilute Magnetic Semiconductors Dilute Magnetic Sem iconductors are semiconductor materials which a have been doped with magnetic ions. The magnetic dopants provid e spin magnetic moment associated with the

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37 electron spin. Most notable among this group are GaMnN and InMnN which are predicted to have TCs in excess of 400 and 300 K, respectively. Indeed recent reports have reported epigrowth of single phase GaMnN w ith RT ferromagnetism. However, a fraction (1-36%) of the total Mn concentration depending on growth cond itions could be present as small Mn clusters according to EXAFS measurements. The highest degree of ordering per Mn atom was found for a Mn concentration of 3 atomic percent. A ZnMnSe/AlGaAs-GaAs spin-polarized LED ha s been reported. Grown in a dedicated III-V MBE machine, the spin-LED uses the DMS material, n-Zn0.94Mn0.06Se, as a spin aligner layer and as a contact to an III-V based LED structure. The III-V structure consists of a 15 nmthick GaAs QW sandwiched by 50 nm-thick p-dope d and n-doped AlGaAs barrier layers on both sides. In this device, spin pol arized electrons are injected from the ZnMnSe into the GaAs QW, where radiative recombination of the carriers wi th unpolarized holes results in the emission of circularly polarized light. These devices are impractical because ZnMnSe is a paramagnetic material and requires a magnetic field to ali gn the spins before spin injection occurs. Furthermore, it has been shown that stacking faults nucleating n ear the ZnMnSe/AlGaAs interface enhance the spin-flip s cattering in this material. Spin alignment and injection has been repor ted in ZnMnSe/ZnCdSe quantum structures. The investigated structures cons isted of a thin ZnMnSe spin aligner layer and a nonmagnetic 7 nm-thick ZnCdSe QW as a dete ctor for spin injection by mon itoring spin-dependent excitonic recombination. A nonmagnetic ZnSe spacer layer (4-10 nm-thick) was inserted between the spin aligner layer and the QW to provide a tunneling barrier. The excitation mechanism of the spinpolarized carriers in this device is optical. In the case of optical spin injection, spin polarization can be created by either circul arly polarized optical pumping in a nonmagnetic semiconductor or

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38 by unpolarized optical excita tion of a DMS followed by fast spin relaxation to its preferred spin orientation. Spin injection effi ciency is rather limited (i.e., ty pically less than 30%) in this system. Determination of an explanation for th e low efficiency has proven to be nontrivial due to the complicated nature of spin and mome ntum relaxation during optical pumping by high energy photons well above the band gap of both materials. Ferromagnetic Metals The use of Fe film s, grown by MBE on GaAs, to polarize spins of elect rons injected into the GaAs has also been reported49,50,51,60,61,62,63,64,65,66. These reports were important because theoretical work predicted that spin injecti on from any metal into a SC should almost be impossible in the diffusive ohmic regime. The LED device structure consists of p-GaAs (001) substrate with 500 nm-thick p+-GaAs buffer layer. The active region consis ts of two 4 nm-thick In0.2Ga0.8As QWs separated by 10 nm-thick GaAs barri er layers and sandwiched by two 50 nmthick undoped GaAs spacer layers. The spin inj ection layer was the ferromagnetic metal, Fe. The circular polarization degree of the emitted lig ht reveals a spin polarization for recombining electrons of about 2% at room temperature60. Theoretical predictions limited the spin injection efficiency to less than 0.1% due to the resistan ce mismatch. The discrepancy has been attributed to Schottky-type contacts, which give rise to tunneling under appropriate bi as conditions. It has been reported that a tunneling process can lead to enhanced spin injection efficiency since it is not affected by the resistance mismatch. Indeed experimental evidence to support this has been reported by STM. However, the formation of a magnetically dead layer at the Fe/GaAs interface due to Fe and As interdif fusion has been identified as an obstacle for spin injection in these structures50. Spin injection efficiencies of 13% have been reported at 5K across the Fe/GaAs (001) interface69, 6% across a Fe/AlxGa1-xAs/GaAs interface at 295K69, and 32% at RT for CoFe/MgO injectors grown on p-GaAs (100)71.

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39 MnAs MnAs is ferrom agnetic below 40C72. Above 40C72, in magnetic zero field, the material undergoes a phase transition from the ferromagne tic NiAs hexagonal crystal structure to the paramagnetic MnP orthorhombic crystal stru cture. The phase transition at 40C72 which is accompanied by some loss in ferromagnetic ordering has been described with an exchange striction model assuming a strongly volume-de pendent exchange energy. At about 125C72, another phase transition occurs resulting in the paramagnetic NiAs hexagonal crystal structure. MnAs like other transition metal pnictides exhibits metallic condition. Conduction is by 3 d electrons. A band scheme which is based on a molecular orbital approach has been proposed. Mn and As s and p states form bonding and antibonding sp bands72. The bonding band is completely filled and the antibonding band is completely empty. In the gap between these sp bands, partially filled Mn d orbitals overlap to an extent su fficient to form narrow bands. The peculiar nature of the band stru cture in this material has led some to characterize MnAs as semimetallic72. These bands have energies about the Fermi energy, thereby giving rise to the metallic conduction band. Mutual repulsions be tween these bands could cause some bands to rise above and below the Fermi energy, thereby creating a gap with semiconductor behavior. The zinc-blende phase of MnAs has been predic ted to be a nearly half-metallic ferromagnet making it an ideal materials system for spintroni c applications. Occupancy and width of these d bands are strongly influenced by th e crystal field, i.e. crystal symmetry and crystal dimensions. Half-metallic ferromagnetism (100% spin polarizatio n) in the NiAs or related MnP structure of MnAs, if realized, deserves to be studied as these materials can serve as models for future systems. It is well known that transition metal compounds with the NiAs -type crystal structure exhibit a mixture of ionic, covalent, and meta llic bonds. Therefore, in MnAs, conduction by Mn d states not only is determined by the crystal fi eld but also by the amount of orbital overlap.72,73

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40 MnAs has been deposited on GaAs by MBE with promising results54,55,56,57,59,74,75,76,77,78,79,80,81,82,83 The magnetic properties of this heterostructure has been characterized by a phase coex istence of the ferromagnetic and paramagnetic MnAs phases59,74,76,84,85,86,87,88 and have been found to depend on the substrate orientation89 The impact of different strain states was investigated by characterizing the spatial distribution of these two phases between the isotropically strained MnAs/GaAs(111) and the anisotropically strained MnAs/GaAs(100). The MS was found to strongly depend on the epitaxial orientation of the substrate and can be improved with post-growth annealing under an As overpressure.

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41 CHAPTER 3 EXPERIMENTAL APPROACH Molecular Beam Epitaxy Molecular beam epitaxy (MBE) was used to depo sit all films. MBE uses localized beams of atoms or molecules in an ul tra-high vacuum environment (UHV) to provide a source of the constituents to the growing surface of a substrat e crystal. The beams impinge on the substrate crystal kept at a moderately elevated temperat ure that provides sufficient thermal energy to the arriving atoms for them to migrate over the surf ace to lattice sites. The vacuum environment surrounding the growing crystal must be kept as low as possible to avoid contamination that might adversely affect electrical properties, f ilm morphology, and film stoichiometry. These purity constraints required for MBE growth are achieved by th e use of liquid nitrogen (LN2) chilled walls surrounding the source ovens and th e substrate. The cold chamber walls ensures that the beam flux makes a single pass through the chamber before condensing on the chamber walls, thus keeping the background pressure low in the system. The low background pressure also allows the use of a RHEED system to ope rate without corrosive damage from residual gases. The advantage of RHEED is that it allows the system to operate while the substrate is exposed to the molecular beams, thus generating a real time surface anal ysis in terms of the growth mechanism, film morphology, and thickne ss. Other advantages of the MBE include precise thickness control, film stoichiometry, a nd the ability to rapidly turn beams on and off enabling the growth of atomically abrupt interfaces. A Riber 2300 MBE system was used for all the oxide growths (Figure 3-1). The growth chamber was pumped down to a range of 1-5x10-9 torr using an Oxford Cryo-Torr 8 cryopump. The MBE system is equipped with a RHEED gun to provide in-situ charac terization of the oxide film during growth. The MBE system contains si x ports with five of them containing Knudsen

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42 cells ( 3 Riber 125 LKs with 25 cc crucibles, 1 Varian 0981-4135 with a 40 cc crucible, and 1 EPI 91-734 with a 25 cc crucible) for various (Sc, Ga, Mg, Ca, and Sm) sources and the remaining port for the oxygen plasma source. The temperature of the Knudsen cells is controlled by a FICS 10 controller th at adjusts the power output of an external power supply whose power cables are connected to two posts on the cell. An MDP21 radio frequency (rf) source from Oxford Applied Research was used as the oxygen source for growth. It was operated at a frequency of 13.56 MHz with a forward power of 300W and reflected power of 2-3W. Oxygen (99.995%) was supplied to the plasma head using a high purity 8161c Unit (Celerity) O2 mass flow controller (MFC) th at had a 3 sccm full scale range. The plasma is generated as soon as a high enough voltage is applied between the two electrodes to create an electric fi eld in the reactor that exceeds the breakdown voltage of the gas. The dissociated atoms and undissociated molecule s then escape into th e vacuum environment through an array of fine holes in the aperture plate. The elec trical potential remains low enough so that negligible currents of ions and elec trons will escape through th e discharge tube. A Varian Intevac Modular Gen II system was us ed to deposit all arsenide films (Figure 32). The three separate zones of this system ar e the main growth chamber, the loadlock (for sample introduction), and the conjoining buffer ch amber. The main chamber is pumped to high vacuum (~ 10-8 torr) using a 2200 L/s turbo pump and a CTI-8 cryogenic pump. Further pumping of the growth chamber (during a growth run) is provided by an LN2 cryoshroud within the growth chamber. This cryoshroud also pr ovides cooling for the system effusion ovens. Attached to the main chamber source flange are all of the points of inje ction for the Group III, Group V, and dopant sources used. These sources ar e angled to converge at a point at the sample heater, which is calibrated to provide contro lled temperature growth to over 1000 C. The

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43 system mass spectrometer and RHEED gun and screen (for in-situ sample characterization) are also attached to the main growth chamber. The MOMBE is equipped with gas-based sources to provide reactive As, P, and N. The system is outfitted with arsine (AsH3) and phosphine (PH3) to provide the As and P fluxes. Due to the toxicity of these hydride gases, their bottl es are contained in a gas cabinet outside of the system facility, and plumbed into the building th rough an evacuated conduit to contain the gas in the event of a leak. The hydride gas flow is regulated through a dedicated mass flow controller, and introduced into the chamber through a catalytic-b ased thermal cracker unit. This injector is operated at high temperature to decompose the hydride gas into its monatomic and diatomic species, plus H2 gas. These species are then free to react at the substrate, while the H2 is pumped out of the system. A gas source for As and P is an alternative to the du al zone solid effusion cells that can be used to provide the monatomic and diat omic species from solid As4 and P4. Through the mass flow controller, it is easier to consistently contro l the group V flux than through resistive heating and evapor ation of a solid. Replenishing the source is also easier, as the bottle simply has to be changed. A dual zone solid effusion cell was also used to evaporate As pellets by resistive heating. The manganese was supplied by evaporating 6 N manganese pellets in an effusion oven through resistive heating. The substrate temperature was measured in bo th systems using a backside thermocouple. The substrate thermocouple was calibrated by using pieces of gallium antimonide (GaSb) and indium antimonide (InSb), which have melting points of 707C and 525C respectively. The pieces of GaSb and InSb were heated in the growth position under a nitrogen plasma to reduce the chance of losing Sb. Loss of the group V species during heating would result in an incorrect melting temperature.

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44 Substrate Preparation GaAs A series of s urface treatments ex-situ and in-situ were employed to clean the GaAs substrates prior to oxide deposition. Epi -ready silicon doped (n-type) GaAs wafers from University Wafer were As capped in the MOMBE sy stem by raising the substrate temperature to 770C for 10 minutes under an As overpressure until a streaky RHEED pattern was observed. Then the substrate was cooled to 50C also und er As overpressure. This process results in a thick amorphous As capping layer with a disconti nuous milky appearance. The substrates were then mounted on recessed molybdenum blocks using tantalum wire so as to avoid As removal during sample mounting with indium on the hot plat e. The substrate was then placed in the MBE system used for oxide deposition. The substrat e temperature was increased to 400C and held there for 10 minutes. A very faint RHEED pattern with arcs was observed. As the temperature was raised to 500C and held there for 10 minutes the pattern became spotty with faint arcs. Lastly, the temperature was ra ised to 600C and a spotty RHEED pattern was immediately observed (Figure 3-3). After oxi de deposition, the substrate was examined with atomic force microscopy (AFM) measurements which revealed a root mean square (RMS) roughness value of 8.5 nm. A streaky RHEED pattern was ne ver observed with this process. The second surface treatment employed involve d the sulfur passivation of GaAs using a super-saturated ammonia sulfide (NH4)Sx solution. The solution was prepared by dissolving precipitated 99.5% sulfur powder pu rchased from Alfa Aesar in a beaker of ammonium sulfide (NH4)Sx solution purchased from Fisher Scientific. Silicon doped (n-type) GaAs wafers from Wacker-Chemitronic GHMB were used in these expe riments. First, the substrate was etched with a solution of H3PO4:H2O2:H2O (3:1:50) to remove the native oxide. Then, a UVDOCS, Inc. ultraviolet-ozone (UV-O3) system was used for twenty-five minutes to remove hydrogen on

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45 surface left behind by the acid etch. The samples were then dipped in buffered oxide etch (BOE) to remove the oxide left behind from the oxygen rich environment of the UV-O3 cleaning. Lastly, the sample was dipped in the (NH4)Sx solution for sulfur passiva tion, rinsed in deionized water (DI H2O), and N2 dried. This process leaves a di scontinuous hazy film on the GaAs surface. Then the substrate was immediately placed in the MBE system and the surface analyzed with RHEED at room temperature before oxide deposition. Very faint streaky RHEED patterns (Figure 3-4A) were observed at room temperatur e and became spotty at 500C (Figure 3-4B). The very faint RHEED pattern, issues with surface roughening, and difficulty with reproducibility of this pattern made the sulfur passivation process unreliable. By far, GaAs cleaning with AH was the most effective and reproduc ible technique. The source of AH was an MDP21 radio frequency (rf) source from Oxford Applied Research. The rf power used to create the discharge was 300W while the equilibrium background pressure of hydrogen in the MBE chamber was 5x10-7 Torr. Emission lines in the visible spectrum (H(434), H(486), H(650)) characteristic of the hydrogen atom were seen in a typical optical spectrum recorded under standard operating conditions of the source (Figure 3-5). This spectrum is identical to spectra reported in the literature and suggests that a large fraction of the flux emanating from the source is comprised of AH24. Initial experiments produced very bright streaky RHEED patterns of GaAs (1x1) after 60-75 minutes of AH e xposure at a substrate temperature of 500C (Figure 3-6). The recipe was later refined to include an ex-situ wet etching step to remove the native oxide. Wacker-Che mitronic GHMB GaAs substrates were submerged in a H3PO4:H2O (3:80) solution for 2 minutes and then immediately loaded in the system. A very bright spotty-streaky RHEE D pattern was observed after 20-30 minutes of AH exposure at a substrate temperature of 500C. AFM measurements revealed a significant incr ease in surface

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46 roughness of the as-received substrate ( ~ 0.35 nm) after the ex-situ etching for 2 minutes and 20 minutes of AH exposure ( ~ 2.34 nm) (Figures 3-7A and 3-7B). The recipe was refined again to compensate for the increase in surface roughness which was believed to be due to overetching by decreasing the etch time to 90 seconds. Conse quently, streaky RHEED pa tterns were routinely observed around room temperature and 20 minu tes of AH exposure. As the substrate temperature was increased to 300C the RHEED pa ttern became increasingly brighter. This recipe was used on an epi-ready Si-doped (7x106) GaAs (100) wafer purchased from Wafer World, Inc. Since the surface of the wafer contains one or two monolayers of oxide the wet etching step was omitted. The wafer was expos ed to AH for approximately 35 minutes (Figure 3-8A-D) and a streaky RHEED pattern was never observed. GaN MOCVD grown gallium nitride (GaN) substrates purchased from Uniroyal were used for these experiments. Prior to being loaded in the system, the substrates were etched with a HCl:H2O (1:1) solution for five minutes. Then the substrates were exposed to UV-O3 for twenty-five minutes followed by a BOE for three minutes and N2 dried. Before loading the samples in the growth chamber, the substrate he ater was outgassed for five minutes facing away from the sources. While the cryopanels were be ing cooled with liquid nitrogen, the As shutter was opened while being heated to temperature to create an As-ri ch environment in the growth chamber. The substrates were then loaded on the car and the substr ate was taken up to 700C and held there for five minutes under As-rich conditions until a stre aky RHEED pattern was observed. The substrate was then cooled to 300C for MnAs growth. MOS Capacitor Fabrication After the oxide film s were deposited and th e samples removed from the MBE system and molybdenum block were processed to make MOS capacitors. Before any processing occurs the

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47 oxide thickness was measured by ellipsometry and verified by profilometry. The first processing step involved applying a thin layer ( ~ 500 nm) of lift-off resist (LOR). The second step was to apply a second layer of thick ( ~ 1500 nm) photor esist (PR) on top of the LOR. The samples were then exposed in an aligner to open up wi ndows to the oxide. After exposure, the PR was developed and rinsed with DI H2O. To ensure that the PR has been fully developed and washed away the sample was inspected visually with a li ght microscope. Profilometry was also used to verify the efficacy of this process. The final processing step involved depositing platinum/gold metal gates. Fabrication of the MOS capacitors allowed I-V and C-V measurements to be taken which helped to determine the performance of the oxide. The key processing steps involved etching, photolithography and metallization. These processing steps will be discussed in more detail in the following sections. Ellipsometry and Profilometry Ellipsom etry is used for determining the thickness and optical constants (n and k) of dielectric films. The technique involves the us e of plane-polarized light which reflects off a sample at a given angle and is then analyzed fo r a change in the polariz ation. Analysis of the change in polarization yields two parameters (t he azimuth and phase difference) from which the optical properties are calculated. A Rudolph V-530044 Auto EL IV ellipsometer was used for characterization of the oxide films. The ellips ometer was programmed to measure the thickness and optical constants of any transparent film on any substrate. Etching experiments were conducted to verify the thickness measurements generated by ellipsometry. A Dektak profilometer was used to measure a step edge in the oxide created by pas ting an acid-resistant black wax across one side of sample and subm erging the sample in the etch solution. A HCl:H2O (1:400) solution was used for the etching of Sm2O3. It was determined that etching for 50 seconds completely removes a ~ 47.5 nm thick film corresponding to an etch rate of 9.5

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48 /sec. A thickness difference of ~ 2% wa s found between ellipsometry and profilometry measurements. Photolithography Shipley 1818 was used as the PR in a bi-layer stack with lift-off resist (L OR 3B). A Laurell WS-400A 6NPP/Lite was used to spin the PR on the samples. First, the LOR 3B was spun on the samples using a Headway Research sp inner. The high development rate of the LOR 3B provides an undercut profile (Figure 3-9) of the film below the 1818, making it attractive for metal lift-off. Dynamic dispense was used to apply both resists as they were dispensed individually at 1000 rpm (and acc eleration of 1200 rpm/sec) a nd spun to a final speed of 5000 rpm (and acceleration of 1500 rpm/sec). A spin speed of 5000 rpm corresponded to a thickness range of 2.0.2 m. The samples were then given a so ft bake on a Thermo lyne hot plate at 105C for 1 1.5 minutes. A Karl Suss MA6 mask aligner was used to alig n the sample to the pattern in the mask and then expose the sample with a mercury xenon la mp at a 365 nm wavelength. Hard contact mode was used which presses the sample firmly against the mask to minimize any diffraction effects. A shadow mask was used to deposit metal ga tes of 100m diameter (F igure 3-10). Other parameters included an Al gap of 100 m, WEC offset of 0, and WE C type as contact. The exposure time was calibrated based on the PR thickness and exposure dose. After exposure, the samples were devel oped in AZ 300 MIF developer at room temperature. The development time was 30 s econds, depending on the exposure time. After developing the samples, they were rinsed in DI water and then blown dry with an N2 gun

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49 Metallization A Kurt Lesker CMS-18 multi ta rget sputter depo sition tool was used to sputter the metal gates. Sputtering involves the ejection of atoms from a solid metal target due to the momentum transfer from bombarding energetic ions (i.e., Ar+). A DC voltage is maintained across plane parallel electrodes with the metal target serving as the cathode and the substrate (or sample) serving as the anode. A large supply of energetic ions in the interelectrode region is accelerated to the material target und er an applied electric field. Once the energetic ions strike the target, atoms are dislodged from the metal target by momentum transfer. The dislodged metal atoms then deposit on the substrat e. The sputter yield depends on the ion flux of the target, the probability that the impact of the energetic ion ejects a target atom, and the transport of the sputtered material across th e interelectrode region to the substrate. Gate contacts on the dielectric included a bi-l ayer structure of Pt (20 nm)/Au (80 nm). The Pt layer promotes adhesion to the dielectric, and the Au laye r is used for making contact to tips since the layer does not oxidize. Gate c ontact diamaeters of 100 m were used for the MOS capacitors. After metal deposition, metal lift-off was performed in a sonicator. Samples were immersed in a beaker of MicroChem Nano Remo ver PG, which was then transferred into the sonication bath. Samples experiencing difficulty with lift off were heated up to 50 C for 30 minutes on a Thermolyne hot plate before using the sonicator again. Once lift-off was complete, samples were rinsed in isopropanol then DI water and finally blown dry with an N2 gun. Materials Characterization After oxide deposition, all sam ples were characte rized with a repertoire of techniques to determine the effects of varying the growth parameters. This chapter will briefly review the

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50 different characterization techniqu es used to characterize all film s during the course of this study. All of the characterization tool s described in this chapter ar e located on the campus of the University of Florida and are available to trained graduate st udents upon request. Powder X-Ray Diffraction Structu ral information was determined usi ng powder X-Ray Diffraction (XRD). Powder x-ray diffraction is a powerful t echnique used to identify the cr ystalline phases present and to measure a host of structural properties such as strain state, grain size, and phase composition. The XRD measurements were performed using a Phillips APD 3720 diffractometer. The system uses a copper (Cu) x-ray source wh ich predominantly generates the CuK 1 x-rays with a 1.54056 wavelength and, to a lesser extent, the Cu1K(1.39217 ) and the Cu2K (1.54434 ) x-rays. In XRD, the incident x-rays are subjected to constructive and destructive interference due to their interaction with atomic planes of the crystalline sample, in acco rdance with Braggs law seen in Equation 3-190: sin2 dn (3-1) where is the angle between the incident x-ray beam and an atomic plane and d is the atomic plane spacing. The Phillips 3720 uses an automate d goniometer with an attached photon counter to measure and store digitally the intensity of th e diffracted x-rays. A pl ot of intensity versus 2 yields the diffraction pattern of the sample. Throughout the course of this thesis work, the diffraction pattern is used primarily to identify crystalline phases in the sample Atomic Force Microscopy Morphological m easurements were done using a Dimension 3100 Atomic Force Microscope (AFM) with a nanoscope IIIa controller. The AFM uses a very sharp tip as a probe moving over the surface of a sample in a raster scan. The tip is attached to the end of a

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51 cantilever which bends in response to a force between the tip and the sample. The cantilever has a spring constant of about 0.1 N/m, which is more than an order of magnitude lower than the typical spring constant between two atoms. A la ser light is reflected at an oblique angle from the very end of the cantilever. A force between the tip and the sample is sufficient to cause deflection of the cantilever which can be measured as a function lateral pos ition. A plot of laser deflection versus tip position on the sample su rface constitutes the su rface topography of the sample. Reflection High Electron Diffraction Reflection High Energy Electron Diffraction (R HEED) is a powerful tool for investigating the surface structure of crystall ine samples in ultrahigh vacuum. Information on the surface symmetry, atomic step density, and evidence of surface roughness are contained in the RHEED pattern. For deposited materials that are lattice-mi smatched to a substrate, strain will build up at the interface generating misfit di slocations until eventually it becomes energetically favorable for 3D clusters of the deposited material's relaxe d crystal structure to form. Direct evidence on the growth mode of a film lies in the ability of the technique to different iate between 2D and 3D structure. Surface reconstructions during depos ition can be monitored with RHEED to obtain optimal growth conditions. RHEED will be employed in-situ to gain all of the useful information regarding film growth stated in this study. A Staib electron gun operating at 15 kV was used to perform all RHEED measurements. RHEED is performed by striking the surface of a sample at a grazing angle (1-2) with a high energy electron beam. Due to the small angle of incidence, the incident electr ons will only diffract from the first few atomic layers, making RHEED useful for observing surface reconstructi ons and determining the surface growth mode. The diffracted electron beams are made to impi nge a phosphor screen op posite the electron gun. This light produces a pattern on the screen whic h can be recorded by camera. A polycrystalline

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52 film produces a ring pattern, whereas an amorphous film produces no pattern due to a lack of long range order for diffraction. A surface grow ing layer-by-layer (2D) will produce a streaky pattern. A spotty pattern is indicative of an island growth mechanism (3D). Owing to its grazing angle geometry, RHEED is very sensitive to isla nd formation because the reflected beam is transmitted through island asperities which give rise to new diffraction features. Transmission Electron Microscopy (TEM) was used to verify the absence of second phases in the specimens and it will also be used to investigate the cr ystal quality of interfaces. However, sample preparation and data interpre tation are non-trivial, so TEM was explored only on selected samples. Auger Electron Spectroscopy Che mical composition information was de termined by Auger Electron Spectroscopy (AES). AES involves the detection of electrons emitted from th e sample surface due to the interaction of an incident elec tron beam. Auger electrons are lo w energy and are released from the first few atomic layers of the sample making AES a very surface-sensitive technique. The basic Auger process involves th e production of an atomic sh ell vacancy, usually by electron bombardment, and the decay of the atom from th is excited state by an electronic rearrangement and emission of an electron with characteristic ener gy. This characteristic energy is the basis for the identification of chemical composition. Sp ectra are acquired usi ng a cylindrical mirror analyzer (CMA) and a computer-controlled digital signal acquisition system. The resulting detected energy spectrum then allows a qualitative compositional analysis to be obtained of the surface, and through peak height analysis using published elemental sensitivity factors, an approximate analysis can be calculated. The Pe rkin Elmer 6600 Auger system used in this study is fitted with an Ar sputter gun allowing compositional depth profiling.

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53 X-ray Photoelectron Spectroscopy A Perkin-Elm er PHI 5100 ESCA system was used for all XPS characterization. This characterization technique was used to look at chemical bonding in the deposited films by measuring the binding energies of atoms in the top few monolayers. It uses x-rays as its source to eject photoelectrons from the sample. Due to the small escape depth (depends on KE of photoelectron and material through which it travels) of the photoelectron s, XPS is limited to surface analysis (top few monolayers). The kinetic energy of the photoelectrons is measured by a hemispherical analyzer and the binding energy is calculated using Equation 3-290: BE = h KE SP (3-2) where h is the energy of the incident x-ray (1486.6 eV for Al and 1256.6 eV for Mg), KE is the kinetic energy (in eV) of the photoelectron, SP is the work function of the spectrometer, and BE is the binding energy (in eV) of the photoelect ron. The Mg anode was used in all of these experiments. The electron binding energy is hi ghly influenced by its chemical surroundings. The general trend is that bindi ng energy increases with increasing charge on the atom. The characteristic peaks produced in the spectru m were identified us ing handbooks containing previously determined standards. The handbooks show the energies of co re and valence level electrons and Auger electrons for atoms in their zero-valence state and their different oxidation states when bonded to other chemical species. This information was used to identify the chemical constituents present in the film and whether any of the constituents were bonded to each other. SQUID All the m agnetic measurements in this dissertation were performed in a Quantum Design magnetic property measurement system superconducting quantum interference device

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54 magnetometer. In a SQUID, a system of superconduc ting detection co ils is connected to a closed loop of superconducting material containing two Josephson junctions. The measurements are made by moving the sample through these detecti on coils. As the sample moves through the coils, the magnetism of the sample induces an elec tric current in the coils. The SQUID device can be configured with it s related electronics to produce an output voltage that is proportional to the magnetic moment of the sample. A hysteretic plot of the magnetization of the sample versus applied field (M vs. H) can be obtained to confirm the ferromagnetic behavior of the sample. The system is calibrated with a sample of known magnetism. A s uperconducting solenoidal magnet is used to produce magnetic fields in the range of 7 T. A s uperconducting shield is placed between the magnet and the SQUID device to shield the SQUID from the field generated in the magnet and to stabilize the field contained by the shield, due to the high sensitivity of the SQUID device. A SQUID can detect a change of 10-15 T in a field of up to 7 T. Due to the superconducting nature of the detection system a nd the magnet, the system is cooled to liquid helium temperatures. The ferromagnetism of the sample can also be confirmed with a field cooled/zero field cooled (FC/ZFC) measurement of magnetization versus temperature (M vs. T). The ZFC part of the measurement consists of first cooling the sample to approximately 10 K with no applied field, turning on the magnet to a predetermined value, and measuring the magnetization at the temperature is increased back to room temper ature. With the field still on, the sample is cooled back to 10 K, while measuri ng the magnetization. This is the FC part. The temperature at which these two curves inters ect is a measure of the Curie temperature. Electrical Measurements All electrical m easurements were conduc ted with a Signatone S-1160 Series General Purpose Analytical Probe Station. The probe stat ion is interfaced with the appropriate equipment for measuring electrical propertie s such as capacitance, current, and voltage. Although all of the

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55 electrical measurements perfor med during the course of this study were performed at room temperature, the probe station is equipped with a temperature-controlled stage allowing for temperature-dependent measur ements to be collected. Current-Voltage Measurements Current versus Voltage (I-V) m easurements were performed with an Agilent 4155C Semiconductor Parameter Analyzer. Compliance wa s set at 100 nA, and the voltage was swept in both negative and positive directions until the forward and reverse breakdowns were reached. Voltages were extracted from the I-V plot at 78.5 nA which corresponds to a current density of 1 mA/cm2 (typical breakdown voltages are reported at this current dens ity). The extracted voltages were then divided by the dielectric film th ickness to determine the forward and reverse breakdown voltages. Capacitance-Voltage Measurements Capacitance versus Voltage (C-V) measurem ents collected with an Agilent 4284A 20Hz1MHz Precision LCR meter connected to a Lab Vi ew based PC was used to m ake capacitancevoltage measurements. The LCR meter supp lied a voltage signal of superimposed analog current (AC) and direct cu rrent (DC). Devices were cycl ed at frequencies ranging from 10 kHz to 1 MHz in the series (Cs-Rs) mode at an oscillation voltage between 50 mV2000 mV. All devices were swept with from accumulati on to depletion and back to accumulation to investigate the nature of fixed oxide traps. The devices were also swept from depletion to accumulation and back to depletion for comparison. The data from the C-V curve was used to determine the interface state densit y, flat band voltage shift, and di electric constant (discussed in more detail in Appendix A)

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56 RF PLASMA SOURCE SOLID SOURCES PHOSPHOR SCREEN RHEED GUN LOAD-LOCK MANIPULATOR ARM Figure 3-1. Top view sketch of the Riber 2300 MBE system used for the oxide growth.

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57 Viewport Figure 3-2. A top view sketch of the Varian MOD Gen II MBE growth system.

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58 Figure 3-3. Spotty RHEED image of GaAs after thermal cleaning up to 600C. A B Figure 3-4. RHEED image of a Sulfur-passivated GaAs (1x1) at 500C (A) Faint spotty-streaky RHEED pattern (B) Bright spotty imag e indicative of surface contamination.

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59 Figure 3-5. Typical optical em ission spectrum of the hydrogen plasma operating at a forward power of 200 W and a flow rate 0.12 sccm.

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60 A B C D Figure 3-6. Streaky RHEED patterns of GaAs expos ed to AH for different times (A) before AH exposure, (B) 15 minutes of AH exposure, (C) 45 minutes of AH exposure, and (D) 60 minutes of AH exposure

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61 200nm A 200nm B Figure 3-7. AFM images of GaAs. (A) as-recei ved substrate. (B) corresponding substrate after 20 minutes of AH exposure.

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62 A B C D Figure 3-8. RHEED images of Ep i-ready GaAs substrate (A) before, (B) after 12 minutes of AH exposure, (C) after 25 minutes, and after 35 minutes of AH exposure.

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63 Figure 3-9. Schematic of the resist scheme for di ode processing. (A) Profile of bi-layer resist showing undercut profile after exposure. (B ) Profile of bi-layer resist with deposited metal (black) showing the advantage of undercut profile.

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64 100 um Figure 3-10. Layout of shadow mask used to fabricate diodes with 100m diameter windows for metallization.

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65 CHAPTER 4 GROWTH AND CHARACTERIZATION OF SAMARIUM OXIDE Growth Conditions The objective of this work was to deposit Sm2O3 on GaAs. Sm2O3 has a bixbyite crystal structure which is composed of two interpenetra ting face centered cubic. The lattice parameter of Sm2O3 is 5.32 nm representing a lattice mismatch of 3.3% with the zinc blende cubic structure of GaAs (lattice parameter 5.65 nm). Sm2O3 was grown using a Sm cell temperature of 570C and the O provided via an oxygen plasma attached to the system. Two substrate temperature were used (100C and 500C) in at tempt to affect the cr ystalinity (amorphous vs. crystalline) of the oxide. Growth at Low Substrate Temperature XRD measurements of Sm2O3 grown on GaAs at a substrate temperature of 100C showed an amorphous nature of the film verified by RHEED measurements. The peaks at 32.15 and 66.53 are associated with GaAs ( 200) and the GaAs (400) of the cubic phase (Figure 4-1). XRD scans of films grown at 100C showed no peak s. The RMS roughness value was measured at 1.41 nm (Figure 4-2). XPS measurements confirmed the presence of Sm free metal in the film (Figure 4-3). The small broad peak located at 1082.5 eV represents the Sm free metal peak and the more dominant peak associated with Sm bonde d to O. The breakdown field strength was measured at 3.96 MV/cm (Figure 4-4). The C-V characteristics were poor. Growth at High Substrate Temperature XRD measurem ents of Sm2O3 grown on GaAs at a substrate temperature of 500C showed a crystalline nature of the film verified by RH EED measurements (Figure 4-5) taken 12 minutes into the growth of Sm2O3. The RHEED image remained str eaky for the duration of growth. XRD measurements showed a broad peak at 29.95 which is attributed to the Sm2O3(321) of the

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66 cubic phase (Figure 4-6). The peak at 44.15 is associated with Sm2O3(403) of the monoclinic phase The very small shoulder at 28.33 is associated with Sm2O3(222) of the cubic phase The peaks at 32.15 and 66.53 are a ssociated with GaAs (200) and the GaAs (400) of the cubic phase. AFM measurements revealed a smoot h film surface with a RMS roughness value of 0.631 nm (Figure 4-7). XPS measurements confirme d the presence of Sm free metal in the film (Figure 4-8). The small broad peak located at 1078.9 eV represents the Sm free metal peak and the peak at 1082.3 represent Sm bonded to O. The breakdown field strength was measured at 3.38 MV/cm (Figure 4-9). The C-V characteristics diodes with this film showed a very small change in capacitance when swept from depletion to accumulation.

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67 Figure 4-1. Amorphous Sm2O3 grown on GaAs at a substrate temperature of 100C and a Sm cell temperature of 570C ( growth rate ~ 6/min).

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68 Figure 4-2. Morphology of amorphous Sm2O3 grown on a GaAs at a substrate temperature of 100C and a Sm cell temperature 570 C (growth rate ~ 6/min).

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69 Figure 4-3. Sm 3d5/2 core level XPS peak from Sm2O3 grown at a substrate temperature 100C and a Sm cell temperature of 570C ( growth rate ~ 6/min) showing evidence of Sm unbonded metal.

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70 Figure 4-4. Electrical ch aracterization of Sm2O3 on GaAs at a substrate temperature of 100C and a Sm cell temperature of 570C (growth rate ~ 6/min).

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71 Figure 4-5. RHEED image taken 12 minutes into the growth of Sm2O3 grown at a substrate temperature of 500C and a Sm cell temperature of 550C

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72 Figure 4-6. Crystalline Sm2O3 grown on GaAs at a substrate temperature of 500C and a Sm cell temperature of 570C ( grow th rate ~ 6/min).

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73 Figure 4-7. Morphology of crystalline Sm2O3 grown on a GaAs at a substrate temperature of 500C and a Sm cell temperature 570 C (growth rate ~ 6/min).

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74 Figure 4-8. XPS narrow scan measurement of the Sm 3d5/2 core level from Sm2O3 grown at a substrate temperature 500C and a Sm cell temperature of 570C ( growth rate ~ 6/min).

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75 Figure 4-9. Current versus voltage plot of crystalline Sm2O3 on GaAs at a substrate temperature of 500C and a Sm cell temperature of 570C (growth rate ~ 6/min).

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76 CHAPTER 5 XPS MEASUREMENT OF THE SAMARI UM OXIDE-GALLIUM AR SENIDE HETEROJUNCTION BAND OFFSET Core Level Photoemission Method for Determ ining the He terojunction Band Offset One of the major challenges in compound se miconductor device technology has been the development of a thermodynamically stable dielect ric technology suitable for use in MOSFETs. For this application, the dielectric must provide good surface passivation, good resistance to breakdown under an applied field and must ha ve a band alignment with the underlying semiconductor such that carriers in both the conduction and valence bands are confined to the semiconductor. For the latter requirement, disconti nuities of at least 1 eV are desired. Promising results on GaAs have been obtained us ing crystalline ga dolinium oxide (Gd2O3)38, in spite of the bond length mismatch with GaAs of ~4.4%. Based on this success with Gd2O3, Sm2O3 would appear to be a promising dielectr ic material for GaAs substrates based on its higher dielectric constant (18 vs. 11)91 and lower lattice mismatch with GaAs (3.3% vs. 4.4%).91 Also, based on available electron affinity data, the Sm2O3 would be expected to produce better confinement on the valence band, though no data has yet been reported for band offsets with GaAs. Such data is essential if this dielectric is to be considered for use in a GaAs-based c-MOS technology. This section reports an x-ray photoele ctron spectrosco py (XPS) study on Sm2O3/GaAs heterostructures for the determ ination of band discontinuities using a core-level photoemission based method.92,93,94,95,96,97 The oxide material in this st udy was deposited by plasma assisted molecular beam epitaxy (MBE). The surfaces of the specimens were examined initially by low-resolution survey scans to determine which elements were present and their respective concentrations. Very-highresolution spectra were acquired to determine the precise binding energy (i.e ., chemical state) of each core-level. As mentioned previously, a core-level photoemission based method was used to

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77 determine the valence band offset. Appropriate core-level peaks were referenced to the top of the valence band for the GaAs and the thick Sm2O3, using a linear extrapolation method to determine the valence band maximum. The resu lting binding energy differences between core level and valence band maxima for each layer were combined with the core level binding energy difference of the heterojunction sample (5nm Sm2O3/GaAs) to determine the valence band offset, according to Equation 5-1: EV = ( ECL)BA + ( ECL EV )B ( ECL EV )A (5-1) where ECL is the energy difference of core leve ls of material A and material B. EV is the valence band maximum. Core levels were loca ted with Gaussian-Lorentzian curve-fits. To precisely determine peak position, a full width at half maxi mum (FWHM) method98,99 was used to determine the exact binding en ergy after all peaks have been accounted for over the entire narrow scan region. Results of Sm2O3-GaAs Heterojunction Band Offset Measurement The XPS Ga 3d5/2 and Sm 3d5/2 narrow scan and valence band spectrum were measured from a sputter-exposed GaAs subs trate and the ( 94 nm ) thick Sm2O3 layer, respectively (Figures 5-1 and 5-2). The position of the Ga 3d5/2 peak (ECL)B was determined to be 20.07.1 eV. The position of the Sm 3d5/2 ( ECL)A was determined to be 1084.57.1 eV. A pass energy of 17.9 eV and a step size of 0.05 eV were used to collect measurements near the valence band maxima of the GaAs substrate and the thick Sm2O3 layer (Figures 5-3 and 5-4). High resolution measurements were taken near the VBM to ensu re exact band edge location. The valence band value, EV, was determined by linearly fitting the lead ing edge of the valence band and linearly fitting the flat energy distribution and finding the intersection of these two lines. The valence band maxima were determined to be 0.405.05 eV and 3.04.05 eV for the GaAs substrate

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78 and the thick Sm2O3 layer, respectively. The XPS Ga 3d5/2 (top) and Sm 3d5/2 (bottom) narrow scans were taken from the thin (5.0 nm) Sm2O3 layer. The Ga 3d5/2 and Sm 3d5/2 core levels were determined to be positioned at 19.690.1 eV and 1083.83.1 eV, respectively. The energy difference between the Ga 3d5/2 and Sm 3d5/2 core levels, ECL, was determined to be 1064.14 eV. The Ga 3d5/2 peak can be deconvoluted to give a predominant peak at 19.49 eV which is typical of GaAs100,101 (Figure 5-5). The well pronounced asymmetry in the high binding energy (BE) side of the Ga 3d5/2 shows the existence of gallium oxides.101 A low intensity, broad peak on the high BE side associated with the O 2s peak located at 23.33 eV102 and a second low intensity, very broad peak at 22.37 eV which is probably associated w ith a mixture of the compounds GaAsO4 and Ga2O3.103,104,105 These peaks do not show up in the Ga 3d5/2 narrow scan of the GaAs substrate because the substrate was sputtered for nearly ten minutes to remove native oxides. The Sm 3d5/2 peak can be deconvoluted to gi ve a predominant peak at 1083.83 eV and a low intensity, broad peak at 1079.8 eV (Figur e 5-6). The shoulder to the low BE side of the predominant peak at 1083.83 eV is probably a consequence of strong ch arge-transfer effects due to unpaired 4f electrons in Sm2O3.106 Core-level survey spectra of a GaAs substrate, a 94 nm thick Sm2O3/GaAs, and a thin (50 ) Sm2O3/GaAs sample were taken with a pass energy of 44.75 eV at a takeoff angle of 45 (Figure 5-7). The topmost curve is the XPS survey scan for the thin sample (50 ) of Sm2O3/GaAs, the bottom curve is the XPS survey scan of a bulk GaAs substrate, and the middle curve is the X PS survey scan of the 94 nm thick Sm2O3/GaAs sample. The Sm 3d5/2 and the O 1s have been labeled on the scans of the oxide samples. The Ga 3d5/2 and As 3p3/2 have been identified on the scan of the Ga As substrate. The substrate was sputtered for approximately ten minutes to remove native oxides. An energy band diagram of the Sm2O3/GaAs system generated using the values obtained in this study (Figure 5-8).

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79 Summary of Heterojunction Band Offset Measurement The valence band offset, EV, has been measured in the Sm2O3/GaAs system by XPS for the first time. EV was determined to be 2.63.1 eV. Given a band gap difference of 3.68 eV, the EC was determined to be 1.13.1 eV. Th ese results show that good valence and conduction band offsets can be obtai ned in this materials system.

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80 Figure 5-1. Ga 3 d5/2 core level XPS peak taken from a sputtered GaAs substrate.

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81 Figure 5-2. Sm 3 d5/2 core level XPS peak taken from a thick (94 nm) Sm2O3/GaAs heterojunction interface.

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82 Figure 5-3. GaAs Valence Band Maximum showi ng the intersection of a fitted line to the background energy and the fi rst slope past 0 eV.

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83 Figure 5-4. Sm2O3 Valence Band Maximum measurement by XPS showing the intersection of the fitted line to the background energy and the first slope past 0 eV.

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84 Figure 5-5. Narrow scan of the Ga 3 d5/2 core level XPS peak for the thin (50 ) Sm2O3/GaAs heterojunction interface.

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85 Figure 5-6. Sm 3 d5/2 core level XPS peak taken from the thin (50 ) Sm2O3/GaAs heterojunction interface showi ng the unbonded Sm metal peak.

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86 Figure 5-7. Survey scan of a thin (50 ) Sm2O3/GaAs Heterojunction interface (topmost curve). Survey scan of a thick (100 nm) Sm2O3/GaAs Heterojunction interface (middle curve). Survey scan of sputtered GaAs substrate.

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87 Sm2O3 EG= 5.1 eVGaAs EG= 1.42 eV EV= 2.630.1 eV EvEvEcECEC= 1.130.1 eV EGa3dEB = (ESm3d5/2-EGa3d) =1064.5 eV (EVBM-ESm3d5/2) =1081.53 eV ESm3d5/2Sm2O3/GaAs Sm2O3Sm2O3Sm2O3GaAs GaAs Sm2O3 Sm2O3 EG= 5.1 eVGaAs EG= 1.42 eV EV= 2.630.1 eV EvEvEcECEC= 1.130.1 eV EGa3dEB = (ESm3d5/2-EGa3d) =1064.5 eV (EVBM-ESm3d5/2) =1081.53 eV ESm3d5/2Sm2O3/GaAs Sm2O3Sm2O3Sm2O3GaAs GaAs Sm2O3 Figure 5-8. Energy band spectrum of a thin Sm2O3/GaAs Heterojunction interface. EB is the corresponding core level sepa ration across the interface

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88 CHAPTER 6 GROWTH AND CHARACETERIZATION OF SAMARIUM GALLI UM OXIDE Growth and Characterization of Oxides Grown at 100C The objective of this work was to characterize ternary oxides grown by depositing Sm2O3 with GaOx. The degree of crystallinity was investig ated to determine a set of growth conditions for growing a thermally and environmentally stab le oxide film. A low growth temperature was chosen to promote the growth of an amorphous or fine grained poly-crystalline dielectric film which from previous work has been shown to enhance I-V performance. A low growth temperature is also ideally suite d for these experiments due to th e delicate nature of the clean GaAs surface. After the substrate was cleaned the sample was rotated out of the growth position. The H2 plasma was discharged and the O2 plasma lit. The O2 plasma conditions were set to 300 W forward power at a flow rate of 0.25 sccm. The background pressure in the chamber was 5.5x10-6 Torr. Once the O2 plasma conditions were set, the sa mple was then rotated back into the growth position. The sama rium cell shutter and the O2 plasma shutter were opened simultaneously to initiate oxide growth. Ga present as a contaminant in the Sm cell and was evaporated along with the Sm. For comparison pu rposes, this growth procedure was also used for the oxides grown at 300C and 500C. Powder XRD measurements of f ilms grown at 100C with a TSm of 550C (Figure 6-1) revealed no evidence of peaks associated with cr ystalline oxides, suggesti ng that the films grown are amorphous or very fine grained poly-cryst alline. Peaks located at 31.9 and 66.3 are associated with the GaAs (200) and GaAs (400). The peak at 59.1 could not be identified with JCPDS files, but it consistently shows up in scans of the GaAs substrate. This peak could be attributed to an artifact due to the polychromatic of the x-ray source used in the powder system. The growth rate was 12.9 /sec. The RHEED pa ttern immediately disappears at the onset of

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89 oxide growth and never returns, also suggesti ng an amorphous film. TEM micrographs confirm the presence of an amorphous la yer, showing an amorphous interf acial region of approximately 65 (Figure 6-2). The surface was smooth with an RMS roughness measured by AFM to be 0.366 nm (Figure 6-3). An AES survey scan of the oxide surface revealed Sm, Ga, O concentrations of 45.1%, 4.0%, and 50.9% respectiv ely (Figure 6-4). A depth profile showed that the Ga concentration remained constant throughout the thickness of the film, except for a sharp increase in the O and Ga concentration occurring at 40 cycles whic h suggests the presence of gallium oxide at the interface (Figure 6-5). The cycle interval was 0.20 min/cycle. To confirm that the Ga was being incorporated from the source beam and not from the GaAs substrate, a depth profile was conducted on a silicon substrate mounted on the same molybdenum block during the same growth run. Th is sample also showed the presence of Ga throughout the deposited film. Films grown at 100C showed a breakdown field strength as high as 3.63 MV/cm. The CV characteristics (Figure 6-6) clearly showed accumul ation in the forward direction, but full depletion in the reverse direction was not reached before revers e breakdown occurred. The gate voltage was swept from depletion to accumulation. To investigate the effect of Sm cell temp erature, films were grown using Sm cell temperatures ranging from 510C to 570C. As expected, the growth rate increases with increasing cell temperature (Figure 6-7). AES i ndicates that the Ga composition ranges from 1.3% to just over 10% (Figure 67). X-ray photoelectron spectroscopy (XPS) of the deposited films showed evidence of residual Sm metal in the films which was highest at the highest Sm cell temperature (Table 6-1). This is most likely due to the redu ced oxygen to metal ratio present during growth given that the Sm flux is increas ing with increasing cell temperature. As one

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90 would expect, the breakdown field was lowest in the film with the largest amount of free metal (Figure 6-8). The layer grown at a TSm = 550C showed the highest oxygen to metal ratio, the lowest RMS surface roughness (Figure 6-9 and 6-10) and had a good breakdown field (Figure 68). Consequently, subsequent growths were performed using this cell temperature. Growth and Characterization of Oxides Grown at Higher Substrate Temperatures Films grown at 300C using the same proce dure as discussed in the previous section showed streaky-dashed RHEED patterns which appeared around five minutes into the oxide growth corresponding to thickness of ~ 5.4 nm (i.e. growth rate of 1.08 nm/sec) (Figure 6-11A). The initial streaky RHEED pattern of the GaAs substrate disapp ears after one minute of oxide growth. After thirty minutes of oxide growth the RHEED pattern showed a mixture of arcs and lines suggesting the polycrystalline nature of the film at the end of growth (Figure 6-11B). The background pressure in the chamber was 5x10-6 Torr. Powder XRD measurements revealed a textured morphology (Figure 6-12). Peaks posi tioned at 28.9, 42.2 a nd 52.3 are associated with the cubic phase of Sm2O3 (222), Sm2O3 (134), and Sm2O3 (026) orientations, respectively. Peaks located at 47.3 and 54.8 are associated with the monoclinic phase of the Sm2O3 (602) and Sm2O3 (514) orientations. The remaining peaks in the spectrum are attributed the GaAs substrate. An Auger survey scan confirms the Sm, Ga, and O concentrations of 49.7%, 6.5%, and 43.9% respectively (Figure 6-13). Gallium was also detected throughout the thickness of the oxide with a sharp increase in Ga concentration occurring around 25 cycles into the depth profile with a cycle interval of 0.20 min/cycle (Figure 6-14). XPS analysis of the films showed an Oxygen to Sm metal ratio roughly comparable to that obtained in films grown at 100C (Table 62). The film showed an RMS roughness of 0.679 nm (Figure 6-15). Electr ical characterization of diodes fabricated from the material showed a breakdown field strength was 3.68 MV/cm, and

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91 poor C-V behavior with no indication of accumula tion or complete depletion before breakdown occurs (Figures 6-16 and 6-17). Films grown at 500C showed a bright streaky RHEED pattern with thick diffuse lines after twelve seconds of oxide gr owth (Figure 6-18A). As the growth proceeds, the lines become faint and arcs begin to appear (Figure 6-18B). Sm cell temperatures of 510C and 550C were investigated. XRD analysis indicated that the 550C cell temperature enhanced the formation of the cubic phase (Figure 6-19 and Figure 6-20). Therefore a 550C cell temperature was used for subsequent growths. As compared to the films grown at 300C with the same Sm cell temperature, the crystal quality of the cubic phase was enhanced based on an increase in intensity of the peak located at 30.1 (Figure 6-20). This peak is labeled C and shows up only on the XRD scan of (SmxGa1x)2O3 grown at a substrate temperat ure of 500C and a Sm cell temperature of 550C (green curve in Figure 6-20). Auger survey scans show the concentrations of Sm, Ga, and O to be 54.2%, 3.1%, and 42.7% respectively (Figure 6-21). The Ga and O concentration show a sharp increase at 55 cycles of the depth profile with a cycle interval of 0.20 min/cycle (Figure 6-22). XPS analysis of the films showed an O to Sm metal ratio roughly comparab le to that obtained in films grown at 100C (Table 6-2).The RMS roughness value was 0.992 nm, representing a significant increase with substrate temperat ure (Figure 6-23). The TEM micrographs clearly show evidence of atomic registry at a crystalline interface (Figure 6-24). The breakdown field strength was 2.95 MV/cm and the C-V characteristics indicated a flat band voltage sh ift of 1V accumulation in the forward direction and depletion in the reverse directi on (Figures 6-25 and 6-26). Since the C-V curves with this sample showed a significant ( 3 pF) change in capacitance as the device was swept from depletion to accumulation, hysteretic CV curves were also collected. Measurements

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92 collected at 10 kHz clearly showed the hysteretic behavior of the C-V curves (Figure 6-27). The gate voltage was swept from depletion to accumulation and back to depletion. Growth and Characterization of Bi-Layer (SmxGa1-x)2O3 Oxide Stack A dielectric layer with high breakdown field is desirable from an electrical standpoint allowing for the growth of thinner oxides with less leakage. As me ntioned previously, polycrystalline oxide films deposited at low s ubstrate temperatures typically produce better breakdown behavior than more te xtured or single crystal films deposited at higher substrate temperatures. Conversely, the crystalline interfa ces obtained at the higher substrate temperatures typically produce lower interface state densities. One method of combining the best characteristics of both of these microstructures is to grow the interfacial oxide layer at a high temperature and then drop the temperature for the remainder of the layer. Such a bi-layer oxide stack was grown to combine the interfacial properties of oxide growth at 500C and the high breakdown field and surface morphology properties of oxide growth at 100C. The oxide film grown at 100C exhibited an amorphous nature with breakdown field strength of 3.63 MV/cm and rms value of 0.366 nm. Films grown at 500C were crystalline at the interf ace with a breakdown field strength of 2.95 MV/cm. A flat band voltage shift of 1 V for the oxide film grown at 500C is an indication of smaller fixed oxide charge and the C-V characteristics clearly showed accumulation and depletion. The growth procedure used for the growth of each layer was identic al the only difference being the substrate temperature. The growth of the bi-layer oxid e stack began with a substrate temperature of 500C. The substrate temper ature remained at 500 C for 7.5 minutes. The substrate was rotated away from the sources and c ooled to 100C. The sample was then rotated back into the growth positi on for the remainder of the growth run. The powder XRD measurements of the bi-layer st ack showed the presence of the cubic phase at 30.01 associated with Sm2O3 (321) orientation (Figur e 6-28). The remaining peaks in the spectrum were

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93 identified as GaAs peaks. The surface morphology was relatively smooth with an RMS roughness value of 0.545 nm (Figure 6-29). The breakdown field was measured at 3.13 MV/cm (Figure 6-30). The C-V characteristics of the bi-layer oxide were extrem ely noisy and thus a Dit measurement could not be determined.

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94 Table 6-1. List of (SmxGa1-x)2O3 films grown with different Sm cell temperatures showing the oxide, metal, and oxygen XPS peak intensities, ratio of XPS peak intensities, breakdown field, and RMS roughness. The s ubstrate temperature was 100C for all samples Samarium Cell Temperature (C) Intensity of oxide peak (counts) Intensit y of Sm metal peak (counts ) Intensity of oxygen peak (counts) Ratio of peak intensities (Metal:Oxi dized Metal) Ratio of peak intensities (Oxygen: Sm Metal) Breakdown Field (MV/cm) RMS (nm) 510 42,011 6,830 9,150 0.163 0.187 4.35 0.49 530 41,386 7,373 8,161 0.178 0.167 3.11 0.53 550 30,467 5,635 6,904 0.185 0.191 3.63 0.37 570 23,907 9,599 5,759 0.402 0.172 0.114 0.97 Table 6-2. (SmxGa1-x)2O3 films grown with different substrate temperatures showing oxide, metal, and oxygen XPS peak intensities, ra tio of XPS peak intensities, breakdown field, and RMS roughness. The Sm cell temperature was 550C for all samples. Substrate Tempera ture (C) Intensity of oxide peak (counts) Intensity of Sm metal peak (counts) Intensity of oxygen peak (counts) Ratio of peak intensities (Metal:Ox idized Metal) Ratio of peak Ratio of peak intensities (Oxygen: Sm Metal) Breakdo wn Field (MV/cm ) RMS (nm) 100 30,467 5635 6,904 0.185 0.191 3.63 0.37 300 38,376 6490 8,606 0.169 0.192 3.68 0.68 500 33,236 5905 7,532 0.178 0.192 2.95 0.99

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95 Figure 6-1. Amorphous (SmxGa1-x)2O3 grown at 100C and a Sm cell temperature of 550C.

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96 Figure 6-2. TEM micrograph of (SmxGa1-x)2O3 grown at a substrate temperature of 100C and a Sm cell temperature of 550C.

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97 200nm Figure 6-3. Morphology of (SmxGa1-x)2O3 grown at a substrate temp erature of 100C and a Sm cell temperature of 550C.

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98 Figure 6-4. Auger survey scan of (SmxGa1-x)2O3 grown at 100C and a Sm cell temperature of 550C.

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99 Figure 6-5. Depth profile of (SmxGa1-x)2O3 grown at 100C and a Sm cell temperature of 550C obtained with AES.

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100 Figure 6-6. Capacitance versus voltage of (SmxGa1-x)2O3 grown at a substrate temperature of 100C and a Sm cell temperature of 550C. The frequency was 1 MHz.

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101 Figure 6-7. Growth rate and Gallium Con centration as determined by AES in (SmxGa1-x)2O3 grown at a substrate temperature of 100C as a function of Sm cell temperature.

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102 Figure 6-8. Plot of breakdown voltages for diodes with (SmxGa1-x)2O3 layers grown at a substrate temperature of 100C as a function of Sm cell temperature.

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103 Figure 6-9. RMS roughne ss values of (SmxGa1-x)2O3 layers grown on GaAs at various Sm cell temperatures.

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104 100nm A 100nm B 100nm C 100nm D Figure 6-10. AFM images of (SmxGa1-x)2O3 layer grown at a substrat e temperature of 100C and a Sm cell temperature of 510C (A), 530C (B), 550C (C) 570C (D).

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105 A B Figure 6-11. RHEED images of (SmxGa1-x)2O3 layer grown at a substr ate temperature 300C (A) five minutes into oxide growth (B) at the end of oxide growth.

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106 Figure 6-12. XRD scan for (SmxGa1-x)2O3 grown at a substrate temperature of 300C and a Sm cell temperature of 550C.

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107 Figure 6-13. Surface survey scan for (SmxGa1-x)2O3 grown at a substrate temperature 300C and a Sm cell temperature of 550C taken by AES.

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108 Figure 6-14. Auger de pth profile for (SmxGa1-x)2O3 grown at a substrate temperature 300C and a Sm cell temperature of 550C.

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109 200nm Figure 6-15. AFM image for (SmxGa1-x)2O3 grown at a substrate temperature 300C and a samarium cell temperature of 550C.

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110 Figure 6-16. Current versus vo ltage characteristics for (SmxGa1-x)2O3 grown at a substrate temperature of 300C and a samarium cell temperature of 550C

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111 Figure 6-17. Capacitance versus voltage measurements for (SmxGa1-x)2O3 grown at a substrate temperature 300C and a samarium cell temp erature of 550C. The frequency was 1MHz.

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112 A B Figure 6-18. RHEED images of (SmxGa1-x)2O3 growth at a substrate temperature of 500C (A) streaky pattern taken twelve seconds into oxide growth (B) streaky pattern at the end of growth.

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113 Figure 6-19. XRD scans of (SmxGa1-x)2O3 grown at Sm cell temperat ures of 510C (top red curve) and 550C (middle bl ack curve) at substrate temperature of 500C. The GaAs substrate scan is shown for comparison (bottom green curve).

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114 Figure 6-20. XRD scans of (SmxGa1-x)2O3 grown at 500C (green cu rve), 300C (red curve), and 100C (magenta curve) substrate temper atures, respectively (beginning from the topmost curve). The Sm cell temperature wa s 550 C for all films. XRD scan of a GaAs substrate is shown for comparison (bottom black curve).

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115 Figure 6-21. Surface scan for (SmxGa1-x)2O3 grown at a substrate temperature 500C and a Sm cell temperature of 550C.

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116 Figure 6-22. Auger data showing spike in Ga concentration at the interface of (SmxGa1-x)2O3 grown at a substrate temperature 500C and a Sm cell temperature of 550C.

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117 200nm Figure 6-23. Morphological image of (SmxGa1-x)2O3 grown at a substrate temperature 500C and a Sm cell temperature of 550C.

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118 Figure 6-24. Microstr uctural data of (SmxGa1-x)2O3 grown at a substrate temperature 500C and a Sm cell temperature of 550C.

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119 Figure 6-25. Current versus vo ltage measurements for (SmxGa1-x)2O3 grown at a substrate temperature a 500C and a samarium cell temperature of 550C.

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120 Figure 6-26. Capacitance versus voltage measurements for (SmxGa1-x)2O3 grown at a substrate temperature 500C and a samarium cell temperature of 550C.

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121 Figure 6-27. Hysteretic cap acitance versus voltage plot taken at 10 kHz of (SmxGa1-x)2O3 grown at a substrate temperature of 500C and Sm cell temperature of 550C

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122 Figure 6-28. Structural char acterization of bi-layer (SmxGa1-x)2O3 oxide stack. The oxide was grown at substrate temperat ure of 500C for the first 7.5 minutes of growth and at 100C for the remaining 22.5 minutes of gr owth. The Sm cell temperature was 550C.

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123 200nm Figure 6-29. AFM image of a bi-layer (SmxGa1-x)2O3 oxide stack. The oxide was grown at substrate temperature of 500 C for the first 7.5 minutes of growth and at 100C for the remaining 22.5 minutes of growth

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124 Figure 6-30. Current versus voltage measurements for a bi-layer (SmxGa1-x)2O3 oxide stack. The oxide was grown at substrate temperat ure of 500C for the first 7.5 minutes of growth and at 100C for the re maining 22.5 minutes of growth

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125 CHAPTER 7 ANNEALING STUDY OF SAMARIUM-BASED OXIDES Annealing in Oxygen Annealing in oxygen was attem pted to oxidi ze residual Sm metal in the oxide layer revealed by XPS measurements. Sm2O3 and (SmxGa1-x)2O3 samples were ann ealed at 500C for thirty minutes while being exposed to the oxygen plasma attached to the system. The ratio of intensities of the oxidized metal peak to the Sm free metal peak increased while the ratio of the intensities of the Sm free metal peak to the oxidized metal peak decreased as a result of post-growth annealing in oxygen of Sm2O3 films (Table 7-1). XRD measurements were taken of sample grown at a substrate temperature of 500C before and after annealing at 500C for 30 minutes under an O plasma (Figure 7-1). The crystal quali ty appears to have degraded as a result of annealing with no change in phase distribution. As result of post-growth annealing in O, the RMS roughness value increa sed from 1.41 nm to 1.56 nm and 0.631 nm to 0.707 nm for Sm2O3 on GaAs grown at substrate temperat ure of 100C and 500C respectively. The very sharp peak around 28 degrees is believ ed to be an artifact due to the polychromatic nature of the x-ray source. The post-growth annealing of (SmxGa1-x)2O3 films resulted in an increase in the oxygen to metal ratio but effected no change in the crys talline phase distribution (Figure 7-2, and Table 72). The breakdown field was increased from 2.95 MV/cm to 3.37 MV/cm which is consistent with the increase in the oxygen to metal ratio and it seems to i ndicate a more insulating film as a result of the post-growth ann ealing. XRD measurements were taken of a sample grown at a substrate temperature of 500C and a Sm cell temp erature of 550C before and after annealing at 500C for 30 minutes under an O plasma (Figure 7-2) It appears that th e phase distribution was not affected but the crystal quality of the film is degraded as a re sult of post-growth annealing in

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126 oxygen. The RMS roughness value increased from 1.008 nm to 1.502 nm for SmxGa1-xO3 on GaAs grown at a substrate temperature of 500C. Annealing in Forming Gas Rapid Therm al Annealing (RTA) of (SmxGa1-x)2O3 films was conducted under forming gas at 300C for forty five seconds. Annealing in a reducing atmosphere should create more dangling bonds by reacting with the oxygen and shoul d result in an increase in the metal to oxygen ratio (Table 7-3). The metal to oxygen ratio increased from 0.161 to 0.249. The hysteretic C-V characteristics ta ken at 10 kHz was measured (Figure 7-3) and compared to the hysteretic C-V curve taken at 10kHz before annea ling in forming gas(Figur e 6-27). Since it was determined that annealing in forming gas results in a film with more unbonded metal, Sm2O3 films were not annealed in forming gas.

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127 Table 7-1. XPS peak intensi ties and their ratios for a Sm2O3 film grown at a substrate temperature of 100 C and 500C and a Sm ce ll temperature of 550C before and after annealing in oxygen. Substrate Temp (C) Ratio of peak intensities (Metal:Oxidized Metal) before annealing Ratio of peak intensities (Oxidized Metal:Oxygen) before annealing Ratio of peak intensities (Metal:Oxidized Metal) after annealing Ratio of peak intensities (Oxidized Metal:Oxygen) after annealing 100 0.296 1.643 0.198 4.078 500 0.191 2.088 0.128 4.618

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128 Figure 7-1. XRD scans of Sm2O3 on GaAs at a substrate te mperature 500C and a Sm cell temperature of 570C (growth ra te ~ 6/min) before a nd after annealing under an O plasma for 30 minutes at 500C.

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129 Figure 7-2. A comparison pl ot of XRD scans of (SmxGa1-x)2O3 on GaAs at a substrate temperature 500C and a Sm cell temperatur e of 550C before and after annealing under an O plasma for 30 minutes at 500C.

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130 Table 7-2. Oxide, metal, and oxygen XPS peak inte nsities, ratios of peak intensities, breakdown field, and rms roughness for a film grown at a substrate temperature of 500C and a Sm cell temperature of 550C before and after annealing in oxygen. Annealing Conditions (C, min) Intensity of oxide peak (counts) Intensity of Sm metal peak (counts) Intensity of oxygen peak (counts) Ratio of peak intensities (Metal: Oxidized Metal) Ratio of peak intensiti es (Oxydiz ed Metal: Oxygen) Breakdown Field (MV/cm) RMS (nm) Asdeposited 33,236 5,905 7,532 0.178 4.413 2.95 0.99 500C, 30 min 42,291 6,824 8,765 0.161 4.825 3.37 1.50 Table 7-3. List of oxide, metal, and oxygen XPS peak intensities, ratios of peak intensities, breakdown field, and rms roughness for a film grown at a substrate temperature of 500C and a Sm cell temperatur e of 510C before and after RTA annealing in forming gas. Annealing conditions (C, min) Intensity of oxide peak Intensity of free Sm metal peak Intensity of oxygen peak M:OM OM:ORMS As deposited 31,332 5041 5746 0.161 5.453 0.591 RTA Anneal 300C 45 sec in H2: N2 3038 755 887 0.249 3.425 0.965

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131 Figure 7-3. Capacitance versus voltage measurem ents taken after annealing in forming gas for (SmxGa1-x)2O3 grown at a substrate temperature of 500C and a Sm cell temperature of 550C.

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132 CHAPTER 8 GROWTH AND CHARACTERIZATION OF MANGANESE ARSENIDE MnAs Growth Procedure and Conditions Arsenic was supplied by resistive heating of solid arsenic in an effusion oven and by a catalytic-bas ed thermal cracker unit supplied by a bottle of AsH3 (discussed in Chapter 3). Before creating an As-rich environment, the cryopanels were cooled with LN2. In the case where a solid source of As was used, the As-rich conditions were created by allowing arsenic to enter the chamber by opening the shutter while the cel l was being heated to temperature. As-rich conditions were created with the ga s source by establishing a flow of AH3 in the chamber. The mass spectrometer was used to monitor the conditions in the chamber. Af ter establishing the Asrich conditions in the chamber, the GaN substrat es were loaded and thermally cleaned in-situ by a 700C anneal for five minutes. Then th e substrate temperature was cooled to 300 C under As rich conditions for growth. The manganese shu tter was opened to initiate growth. Film growth was monitored in-situ by RHEED. The growth rate was varied by adjusting the cell temperature of the manganese (TMn) from 740C to 820C, as measured by the cell thermocouple. Films with thicknesses ranging from 15 nm to 400 nm were grown. MnAs Growth Using AsH3 MnAs layers were first grown with AsH3. An injector was used to decompose the hydride gas into its monatomic and diat omic arsenic species, plus H2 gas. The injector was outgassed for ten minutes at 1100C before the growth, then cooled to an operating temperature of 1050C. Two Mn cell temperatures were investigated, 810C and 815 C. The XRD data from the sample grown at 810 C showed a phase di stribution consisting of MnAs and Mn3As (Figure 8-1). The peaks located at 64.82, 68.22, and 69.12 are attributed to the Mn3As (216), Mn3As (217), and Mn3As (220) respectively. The MnAs (004) is lo cated at 65.22. The XRD peak intensity ratio

PAGE 133

133 of the MnAs (004) peak to the Mn3As (220) was 1.07. The peaks at 66.08 and 65.02 are attributed to the MnAs (202) and Mn2As (422). The film thickness was 2767 and the growth rate was 45 /min. The morphology of the film was quite rough, with an RMS value of 11.2 nm as measured by AFM (Figure 8-2). In light of the mixed phases and the rough morphology, it is not surprising that the magnetic properties of this f ilm were found to be rather poor. The MS, remnant magnetization (MR) and coercivity (HC) values were 0.89 emu/cm3, 0.12 emu/cm3, and 123 G (Figure 8-3). XRD measurements of MnAs gr own with a Mn cell temperatur e of 815C also showed the presence of the Mn3As and MnAs phases (Figure 8-4). The XRD peak ratio of the MnAs (004) peak to the Mn3As (220) was only slightly higher than the previous sample at 2.07. The film thickness was 2532 and the growth rate was 55 /min. Also like the previous sample, the morphology appears to suggest a poly-crystalline film with a very rough surface as shown in Figure 8.5 (RMS roughness of 133 nm). In this sample, however, the morphology does appear to indicate a larger grain size. The MS, MR, and HC values were higher than for the film grown at the lower cell temperature, at 8.96 emu/cm3, 0.77 emu/cm3, and 72 G (Figure 8-6). As shown in Figure 8-7, higher ratios of the MnAs (004) XRD peak to the Mn3As (220) typically correlate with improved magnetic properties as one would e xpect. Thus the improvement in the magnetic behavior of the film with the higher ratio is not surprising. However, though the magnetic properties are improved in this sample, the Ms is still substantially lower than that reported for films grown on GaAs, where an MS value as high as 580 emu/cm3 at 250 Oe has been obtained.107 MnAs Growth with a Solid Arsenic Source From the work using AsH3, it was concluded that significantly higher V/III ratios would be needed in order to suppress the formation of th e undesirable Mn-rich phases. Due to limitations in the pumping capacity of the sy stem, further increases in AsH3 flow were not possible. Thus to

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134 increase the As overpressure present during growth an As effusion cell was added to the growth chamber. A set of conditions for optimizing th e structural and magnetic properties of MnAs were arrived at by consider ing the growth conditions th at yielded the highest MS value and XRD peak ratio of MnAs (004) to the Mn3As (220) orientation. The MS in films grown using solid As was found to depend on the XRD peak ratio of the MnAs (004) to the Mn3As (220) orientations just as was found for films grown using AsH3 (Figure 8-7), however the Ms appears to saturate at a peak ratio of about 3 or higher. Overall, the MS as well as the XRD peak ratio were both increased substantially relative to the AsH3 grown films. A similar relationship was found between surface roughness as measured by AFM and XRD peak ratio (Figure 8-8). The RMS roughness value was decreased by increasing the XRD peak ratio, indicative of improved crystallinity, and was lower in the samples grow n with solid As, further indication of improved crystal quality relative to the films grown with AsH3. Initial films were grown with a Mn cell temp erature of 800C and an As cell temperature of 270C. The ratio of the MnAs (004) XRD peak intensity to the Mn3As (220) XRD peak intensity was 118. The broad peak at 66.99 is attr ibuted to a less preferre d orientation (202) of the MnAs phase. The peak at 70.25 is the Mn2As (220) (Figure 8-9). The MS, MR, HC of this film was 148 emu/cm3, 85.2 emu/cm3 and 247 G (Figure 8-10). The film thickness was 913 and the growth rate was 30 /min The area inside the hysteresis loop indicates that this layer was also a hard magnetic material The surface is rather rough as shown in figure 8.11, though it represents a significant improvement over the films grown with AsH3. A slightly lower growth rate was explored by using a Mn cell temperature of 795C and an As cell temperature of 260C. Both cell temperatur es were decreased in an attempt to keep the V-III ratio roughly constant. In this case, the XRD intensity ratio of the MnAs (004) and Mn3As

PAGE 135

135 (220) peaks was 166 (Figure 8-12), a significant improvement over the film grown with a higher growth rate. Similarly, the morphology was substantially improved as well, as shown in figure 8-13, with an RMS roughness of 1.6 nm. SQUID measurements revealed a hysteresis loop with high remnant magnetization and coercive field which indicated the hard magnetic nature of the film (Figure 8-14). The maximum MS of this film was measured to be 276 emu/cm3 with a coercivity (HC) of nearly 383 G (Gauss). The remnant magnetization (MR) was 182 emu/cm3. The film thickness was 1408 and the growth rate was 31 /min. Given the improvement obtained in the previ ous experiments by increasing the V-III ratio and reducing the growth rate, the final experiment employed a Mn cell temperature of 740C and an As cell temperature of 300C. These conditions were expected to yiel d the highest XRD peak ratio of the MnAs (004) to the Mn3As (220); however the peak ra tio was only 2.86 (figure 8-15). Despite the low XRD peak ratio, the MS was 289 emu/cm3. The MR and HC were 103 emu/cm3 and 135 G (Figure 8-16). Magnetization (M) ve rsus temperature measurements reveal a TC of 315K which is in good agreement with th e previously reported value of 318 K53 (Figure 8-16). The film thickness was 113 and the growth ra te was 2.5 /min. The surface morphology was the smoothest obtained in this study, with an RMS roughness of 1.3 nm (Figure 8-18). To investigate the interfacial regi on of this film, a high resolutio n TEM image of 113 thick MnAs thin film on a GaN substrate (Figure 8-19). Evid ence of atomic registry can be seen at the interface, though the MnAs film is clearly di vided into two regions. Energy Dispersive Spectroscopy (EDS) data (Figure 8-20) indicates th at the 2.2 nm layer closest to the GaN is Mnrich. The presence of an interfacial layer is in agreement with the RHEED data taken during growth which showed a change from streaky to s potty after initial nuclea tion. Presence of this layer would also explain the multiple phase s observed by XRD. Given the poor magnetic properties of Mn-rich MnAs, it is reasonable to assume that spin injectio n across this interface

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136 would be difficult at best. Thus even though the f ilms deposited in this study appear to be of high quality at some distance from the interface, it is unlikely th at efficient spin injection is achievable using this approach.

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137 Figure 8-1. MnAs grown at a substrate temperat ure of 300C, a manganese cell temperature of 810C and an arsine injector temperatur e of 1050C .The AsH3 flow rate was 10 sccm.

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138 1.0m Figure 8-2. AFM image of MnAs grown at a su bstrate temperature of 300C and a manganese cell temperature of 810C and an arsi ne injector temperature of 1050C.

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139 Figure 8-3. Hysteresis of MnAs grown at a subs trate temperature of 300C and a manganese cell temperature of 810C and an arsine injector temperature of 1050C.

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140 Figure 8-4. XRD scan of MnAs grown at a s ubstrate temperature of 300C, a manganese cell temperature of 815C an arsine injector temperature of 1050C.

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141 1.0m Figure 8-5. Surface characteriza tion by AFM of MnAs grown at a substrate temperature of 300C and a manganese cell temperature of 815 C and an arsine injector temperature of 1050C.

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142 Figure 8-6. Magnetic characteri zation by SQUID of MnAs grown with 300C, a manganese cell temperature of 815C and an arsine injector temperature of 1050C

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143 Figure 8-7. Saturation magnetization (MS) vs. Ratio of (004) MnAs peak with the (220) Mn3As peak plot of MnAs grown at different V-II I ratios. Solid squares were obtained from samples grown with AsH3. Open squares were derived from solid As.

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144 Figure 8-8. RMS roughness versus ratio of the (004) MnAs XRD peak with the (220) Mn3As XRD peak plot of MnAs grown at various V-III ratios.

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145 Figure 8-9. Structur al characterization of Mn As grown at a substrate temperature of 300C and a manganese cell temperature of 800C a nd an As cell temperature of 270C.

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146 Figure 8-10. Hysteresis of MnAs grown at a substrate temperature of 300C, a manganese cell temperature of 800C and an As cell temperature of 270C.

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147 1.0m Figure 8-11. AFM image of MnAs grown at a su bstrate temperarture of 300C and a manganese cell temperature of 800C and an As cell temperature of 270C.

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148 Figure 8-12. Structural charac terization by XRD of MnAs grown at a substrate temperature of 300C with a manganese cell temperature of 795C and an As cell temperature of 260C.

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149 1.0m Figure 8-13. Morphology of MnAs grown at a substrate temperature of 300C and a manganese cell temperature of 795C and an As cell temperature of 260C.

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150 Figure 8-14. SQUID data of MnAs grown at a substrate temperature of 300C and a manganese cell temperature of 795C and an As cell temperature of 260C.

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151 Figure 8-15. MnAs grown at a substrate temperature of 300C, a manganese cell temperature of 740C and an As cell te mperature of 300C.

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152 Figure 8-16. Hysteresis curve of MnAs grown at a substrate temperature of 300C, a manganese cell temperature of 740C and an As cell temperature of 300C.

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153 Figure 8-17. Magnetization versus temperature plot of MnAs grown at a substrate temperature of 300C and a manganese cell temperature of 740C and an As cell temperature of 300C.

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154 1.0m Figure. 8-18. AFM image of MnAs grown at a substrate temperature of 300C and a manganese cell temperature of 740C and an As cell temperature of 300C.

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155 Figure 8-19. HRTEM image of MnAs grown at a substrate temperature of 300C with a manganese cell temperature of 795C a nd an As cell temperature of 260C.

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156 Figure 8-20. Energy Dispersive Spectroscopy (EDS) data showi ng an increase in Mn concentration near the interface of MnAs/GaN heterostructure.

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157 CHAPTER 9 CONCLUSIONS AND FUTURE WORK Conclusions and Suggestions for Future Work with Sm2O3 Growth on GaAs GaAs surface cleaning by ex-situ etching with a solution of H3PO4:H2O (3:80) for 90 seconds and then an in-situ exposure time of 2030 minutes with a hydrogen plasma is very effective for reproducing a clean GaAs surface under vacuum. Sm2O3 growth at a high temperature (500C) yields single crystal films. Sm2O3 growth at low temperature (100C) yields amorphous films. Electrical testing of Sm2O3/GaAs diodes show good breakdown fields (3.9 MV/cm) with good capacitance versus voltage behavior (Dit). Growth of the ternary compound SmxGa1-xO at 500C yields polycrysta lline films with a crystall ine interfacial layer of approximately 65 Some evidence of Ga segr egation at the interface was observed with AES depth profiling. Similar growth at 100C pr oduced films which were amorphous. A significant amount of Sm free metal was also observed in all of these films. In spite of this, breakdown fields as high as 4.35 MV/cm were achieved. Higher growth temperatures produced better CV behavior. Overall however the best leakage currents were obtained in the pure Sm2O3. Post-growth annealing under an oxygen plas ma in the MBE system was successful in oxidizing some of the unbonded Sm metal. However it was not successful in changing the phase composition from a mixture of monoclinic a nd cubic oxide to one of pure cubic phase. Annealing in an RTA under forming gas did not im prove the electrical properties of the material and in fact increased the amount of unbonded Sm metal in the oxide. The leakage current as a function of the breakdown field was compared for films grown under all growth conditions (Figure 9-1). It was determined that the binary oxide grown at 100C exhib ited the best electrical properties in terms of breakdown field. Ternar y oxides grown at 500C showed the best CV behavior (Figure 9-2). Future work on this material system should focus on further reducing the

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158 unbonded metal in the oxide which should lead to im proved electrical behavior. In its present form, the oxide should be adequate for use as a fi eld plate, but needs further optimization to be useful as a gate dielectric. Conclusions and Suggestions for Future Work with MnAs Growth on GaN Growth of MnAs on GaN requires a high V/II I ratio in the cham ber during growth to suppress the formation of Mn-rich compounds. It a ppears that once a critic al thickness is reached the MnAs phase nucleates with improved crystallinity. MS and rms values were markedly improved by increasing the MnAs (004) to Mn3As (220) XRD peak ratio. These results indicate that the structural and magnetic properties of the MnAs/GaN sy stem strongly depend on the V/III ratio in the chamber during growth. Future experiments should focus on eliminating the interfacial layer which is composed of elemental Mn and Mn-rich compounds such as Mn3As and Mn2As.

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159 Figure 9-1. A comparison plot of the leakage current versus the breakdown field for the Sm2O3 bilayer oxide, Sm2O3 and (SmxGa1-x)2O3 at substrate temperatures of 100C and 500C.

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160 Figure 9-2. Family of C-V curves ta ken at different frequencies for (SmxGa1-x)2O3 grown at a substrate temperature of 500C a nd Sm cell temperature of 550C.

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161 APPENDIX A ANALYSIS OF CV CURVES CV curves The m easured capacitance of a MOS capacitor co nsists of two capacitors in series. The capacitors include a voltage-i ndependent gate oxide capacitor and a voltage-dependent semiconductor capacitance. In ac cumulation, the series capacitance is repres ented by the oxide capacitance shown in Equation A-1: Cox = ox ooxt (A-1) where Cox is the capacitance of the oxide (measured in F/cm2), ox is the dielectric constant of the oxide, ois the permittivity of free space (8.854x10-14 F/cm), and toxis the thickness of the oxide film (measured in cm). In depletion, the semiconductor surface become s depleted of majority carriers under the applied gate bias (holes are depl eted in p-type material with in creasing gate voltage and electrons are depleted in n-type material with decreasing gate voltage), causing a decrease in the measured capacitance. The overall capacitance is now repr esented by the series connection of the oxide capacitance (Cox) and depletion layer capacitance (Cd) seen in Equation A-2: C 1 = OXC 1 + dC 1 (A-2) Under strong inversion, minority carriers are generated in the bulk and then drift across the depletion region to form a surface layer charge. Ho wever, this will only occur if a low frequency (100 kHz) is applied and if the gate bias is changed slowly. The low frequency and slow changing gate bias allow the minority carriers enough time to respond to the ac probe frequency

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162 and dc voltage signal. The overall capacitance is now represented by the oxide capacitance once again (Figure A-1a). For high frequency (1MHz) measurements at sl ow changing gate bias, the minority carrier generation rate is too low as the carriers do no t have enough time to respond to the ac voltage signal. The semiconductor depletion layer capacit ance is now at a minimum, corresponding to a maximum depletion width. The overall capacitan ce is also at a minimum and is represented by the series capacitance of the oxide and the semiconductor depletion layer (Figures A-1b and A2). For high or low frequency measurements at a large gate bias sweep rate, the generation rate of minority carriers is too low and the measured capacitance can go into deep depletion (Figure A-1c). Dit Calculations The frequency and gate bias sweep rate can have a significant eff ect on the response of interface states at the oxide/se miconductor interface. As the app lied gate bias changes, the surface potential of the MOS device changes, which causes the in terface states (whose positions with respect to the band edges are fixed) in the band gap to move above or below the Fermi level. Since energy levels below the Fermi level have a higher probabi lity of occupying an electron, an interface state moving above the Ferm i level would likely give up a trapped electron (or equivalently capture a hole) while an inte rface state moving below the Fermi level would likely capture an electron (or give up a hole). Th e stored charge from the interface states gives rise to a capacitance which is in series with th e depletion layer capacitor (the combination of the two would be in series with the oxide capacitance). At very high (~1 MHz) frequencies, the interface states do not have time to respond. At low (~1 Hz) frequencies and/or low gate bias sweep rates, the interface states can respond quickly to the voltage changes and follow the ac probe frequency. The Terman me thod was used to calculate the Dit value from the measured

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163 CV data. The method relies on measurements take n at sufficiently high frequencies in which interface traps do not respond. Although the interf ace traps do not respond to the ac probe frequency, they do respond to slow gate bias sweep rates. As the in terface trap occupancy changes with gate bias, the CV curve stretches ou t along the gate axis (cha nge in slope of real CV curve from ideal curve. The total theoreti cal capacitance is given by the series capacitance of the oxide and semiconductor. To calculat e the theoretical semiconductor capacitance (Cs), the semiconductor flatband capacitance (CFBS) is calculated from Equation A-3: CFBS= D OSL (A-3) where CFBS is the semiconductor flatband capacitance (in F/cm2), s is the dielectric constant of GaAs (12.85), o is the permittivity of free space (8.854x10-14 F/cm), and LD is the Debye length (in cm). The Debye length is calculated from Equation A-4: LD= Nq TkosB 2 (A-4) where LD is the Debye length (in cm), kB is Boltzmanns constant (1.38x10-23 J/k), T is the temperature (in K), s is the dielectric constant of GaAs (12.85), ois the permittivity of free space (8.854x10-14 F/cm), q is the hole or electron charge (1.6x10-19 C), and N is the effective carrier density (in cm-3). The effective carrier density can be calculated from Equation A-5: N = 22 Aqos VC /)/1( 12 (A-5) where N is the effective carrier density (in cm-3), s is the dielectric constant of GaAs (12.85), o is the permittivity of free space (8.854x10-14 F/cm), q is the hole or electron charge (1.6x10-19

PAGE 164

164 C), A is the area of metal gate (in cm), and VC)/1(2is the slope of the experimental 1/C2 vs. Vg plot. After calculating the flatba nd capacitance of the semic onductor, the theoretical semiconductor capacitance can be calculated from Equation A-6: Cs= 25.0 Sgn(V)CFBS( eV-1)5.0)1(Ve V (A-6) where Cs is the semiconductor capacitance in (F/cm2); V is the non-dimensional band bending (in V); Sgn(V) returns a value of 1 for positive values of V, 0 for a value of 0 for V, and -1 for negative values of V; and CFBS is semiconductor flatband capacitance (in F/cm2). The nondimensional band bending is used in Equation A-7 to calculate the surface potential: s = q VTkB (A-7) where s is the surface potential (in eV), Bk is Boltzmanns constant (8.62x10-5 eV/K), V is the non-dimensional band bending (in V), T is the temperature (in K), and q is the hole or electron charge (1.6x10-19 C). After constructing the theoreti cal curve by plotting the theore tical total capacitance vs. the surface potential, a surface poten tial value is found for a given capacitance value. The gate voltage from the experimental curve is then f ound for the same capacitance value. Repeating the procedure for other points allows an s vs. Vg curve to be constructed. The Dit can be determine from this curve using Equation A-8: Dit= q CV q Cs s G ox 1 (A-8)

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165 where Dit is the interface state density (in eV-1 cm-2 ), oxC is the oxide capacitance (in F/m2 ), q is the hole or electron charge (1.6x10-19 C), VG is the gate bias (in V), s is the surface potential (in eV), and sC is the surface capacitance (in F/m2). VFB Determination For an ideal MOS capacitor, the metal and semiconductor work functions are equal at a gate bias of 0 V. However, in a real MOS cap acitor, there is typical ly a metal-semiconductor work function (MS) difference and oxide and interface ch arges that produce a flatband voltage (FBV) shift (parallel shift of real plot from ideal plot is seen in Figure A-3). The flatband voltage is the voltage required to achieve the flat ba nd condition where the energy bands are flat. A negative flatband voltage shift indicates a positiv e oxide charge that induces an equivalent negative charge in the semiconductor. A positiv e flatband voltage shift indicates a negative oxide charge that induces an equivalent positive charge in the semiconductor. To determine the flatband voltage shift, the th eoretical CV curve must be compared to the experimental CV curve. The first step is to locate the normalized th eoretical capacitance (C/Cox) at a gate bias of 0 V. The same value is then located on the normalized experimental capacitance curve with the corresponding gate bias value. This gate bias value represents the flatband voltage of the MOS capacitor. Another method th at can be used to determine the flatband voltage shift experiment ally includes plotting 2)/(1hfCvs. GV The gate bias at the lower knee of the curve represents the flatband voltage2,3.

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166 Figure A-1. MOS capacitance-voltage curves for p-type semiconductor A) low frequency. B) high frequency. C) depletion [Reprinted with permission from B.P. Gila, 2000. Growth and Characterization of Dielectr ics for Wide Band Gap Semiconductors. PhD dissertation (pg. 129 A1-2). University of Florida, Gainesville, Florida.]

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167 Figure A-2 High frequency CV measurement for an ideal MOS capacitor. [Reprinted with permission from B.P. Gila, 2000. Growth and Characterization of Dielectrics for Wide Band Gap Semiconductors. PhD dissertation (pg. 131 A1-4). University of Florida, Gainesville, Florida.]

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168 Figure A-3. Illustration of ideal a nd real CV plots. Shift in real curve indicates flat band voltage shift, and change in slope of real curve indicates interface traps. Reprinted with permission from B.P. Gila, 2000. Growth and Characterization of Dielectrics for Wide Band Gap Semiconductors. PhD dissertation (pg. 132 A1-5). University of Florida, Gainesville, Florida.]

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176 BIOGRAPHICAL SKETCH Anthony Duane Stewart was born in Baton Rouge, Louisiana. He is the son of Jackie Barrett and Ronald Stewart and brother to Kirby Stewart. He gr aduated from high school as the valedictorian of his class in 1995. Then, as an honor student, he attended Southern University and A&M College in Baton Rouge, Louisiana. He earned the BS degree with honors (magna cum laude) in 1999. During his undergraduate work, he was fortunate to be a part of a mentoring and research participa tion program, where he was exposed to scientific research. He then matriculated at the University of Florida in pursuit of the doctoral degree in materials science under the supervision of Dr. Rolf Hummel in 2000. After successful completion of the qualifying examination, he began doing research with gate dielectrics under Dr. Cammy Abernathy. He completed the doctoral degree in December of 2008. Post graduation plans are to pursue employment as a research engineer.