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PAGE 1 1 BROADBAND BALUN EMBEDDED MEASUREMENT FOR DIFFERENTIAL CIRCUITS By KOOHO JUNG A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL OF THE UNIVERSITY OF FLOR IDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY UNIVERSITY OF FLORIDA 2007 PAGE 2 2 2007 Kooho Jung PAGE 3 3 To my family, friends, teachers, and the people of Cascade Microtech PAGE 4 4 ACKNOWLEDGMENTS My forem ost honor goes to my family and friends for their ince ssant support. Among them, Im in forever debt to my dear parents, whose teachings through examples has enlightened and strengthened my mo rals, patient, compassion, and logical thinking. I am very grateful to have studied at the Un iversity of Florida. I thank my advisor, Dr. William R. Eisenstadt, for his invaluable teachin gs and for his generous care for us students during our difficulties, which I will try my best to follow through out my future career. I also thank my coadviser, Dr. Robert M. Fox, for s howing the ways for theoretical approaches in identifying the key problems, which became a central tool in my engineer ing strategies. I also thank other members of my committee, Dr. Kenneth K. O and Dr. Oscar D. Crisalle, for their critical feedback through out my research. I thank my colleagues, Jongshick Ahn, Sudeep Puligundla for their help through numerous discussi ons and for their valuable friendship. I also thank my seniors and friends at the Gainesvi lle Korean Catholic Community, which became a second family to me through many voluntee red work, among which, Sanghoon Han, Jangsup Yoon, and Hyeopgoo Yeo, who had always looked after for my wellbeing with the utmost generosity. I thank the past and present engineers of Cascade Microtech; Richard Campbell, Peter Navratil, Mike Andrews, Leonard Hayden, and Thaine Allison, and its founders, K. Reed Gleason and Eric W. Strid, for providing the in ternship opportunity and for their continuous support, which became the essential driving force for this work. I also thank the Center for Circuit and System Solutions (C2S2) of Focu s Center Research Program (FCRP) for their support and providing helpful networks to other leading research groups. Furthermore, I thank the Ministry of Information a nd Communication, Republic of Korea, for the scholarship, and Dr. DongHo Lee of Hanyang University, Republic of Korea, for his recommendation. PAGE 5 5 I give special acknowledgement to my advisors during my Masters program at Hanyang University, Republic of Korea Dr. Jongin Shim and Dr. Yungseon Eo. Their passion for science and the intellectual search for answers had infl uenced me in so many ways. It was my great honor to have had learn from them which I will treasure for th e rest of my life. PAGE 6 6 TABLE OF CONTENTS page ACKNOWLEDGMENTS...............................................................................................................4LIST OF TABLES................................................................................................................. ..........8LIST OF FIGURES.........................................................................................................................9ABSTRACT...................................................................................................................................13 CHAP TER 1 INTRODUCTION TO BALUN EMBEDDED MEASUREMENTS .................................... 151.1 Advantages of Differential Circuits..................................................................................151.2 Conventional Measurements of Differential Circuits....................................................... 161.3 Proposed Measurements of Differential Circuits Using Broadband Baluns....................181.4 Applications Beyond NetworkAnalyzers........................................................................ 192 BACKGROUND THEORIES IN BALUNS AND MIXEDMODES SP ARAMETERS...212.1 Introduction MixedMode SParameters.......................................................................... 212.2 MixedMode Sparameter Calculation Using SPICE....................................................... 252.2.1 Extraction Circuits for MixedMode Sparameters................................................ 252.2.2 Application Examples............................................................................................ 292.3 Introduction to Balun and RelativeBandwidth................................................................363 MARCHAND BALUN EMBEDDED PROBE..................................................................... 393.1 Introduction to Marchand Balun Embedded Probe.......................................................... 393.2 Coaxial Marchand Balun and the Migration to its Planar Type....................................... 393.3 Analytical Derivation for Optimum Design..................................................................... 453.3.1 General QuarterWavelength Coupled TL............................................................. 453.3.2 Optimum Design for Planar Marchand Balun........................................................ 483.3.3 CommonMode Matching......................................................................................503.4 Structural Realization.......................................................................................................513.5 Measurement Results........................................................................................................ 554 CHARACTERIZATION AND CALIBRATION FOR 3PORT ERROR NETWORK ....... 584.1 Introduction to 3port ErrorBox and its Characterization............................................... 584.2 Proposed ISS and Extraction Algorithm........................................................................... 594.2.1 Proposed ISS..........................................................................................................604.2.2 Required Measurements.........................................................................................614.2.3 Extracting Sparameters of the 3port ErrorBox................................................... 624.2.4 Verification and its Comparison to the Use of 7 DualLoad Patterns.................... 65 PAGE 7 7 4.3 Application to Marchand Balun Embedded Probe........................................................... 664.4 Calibration........................................................................................................................665 EVALUATION OF ERRORS CAUSED BY COMMONAND CROSSMODES ............. 705.1 Measurement Errors Caused by CommonModes and CrossModes............................... 705.2 CommonModes and CrossModes in Balun Embedded Measurements......................... 705.3 Error Evaluation and the Used Approximations............................................................... 715.4 Application to FullyDifferential Amplifier..................................................................... 786 ACTIVE BALUN USING COMBINED CA SCODECASCADE CONFIGURATION ...... 836.1 Introduction to Various Active Baluns............................................................................. 836.1.1 Distributed Amplifier Type.................................................................................... 846.1.2 Differential Amplifier Type...................................................................................856.1.3 SourceDrain Outp ut Configuration.......................................................................856.1.4 CommonSource and CommonGate Pair Configuration...................................... 876.2 The Proposed Combined CascodeCascade Configuration.............................................. 886.3 Measurement Environment............................................................................................... 946.4 Measurement Results........................................................................................................ 976.5 LowPass BiasFeedback Network for Stable Bias Conditions..................................... 1016.6 Summary and Applications.............................................................................................1057 CONCLUSION..................................................................................................................... 106LIST OF REFERENCES.............................................................................................................110BIOGRAPHICAL SKETCH.......................................................................................................115 PAGE 8 8 LIST OF TABLES Table page 31 Using doublecoax vs. using PCB c oupledT L in realizin g Marchandcoupling................... 4541 Used sparameter values for simulation verification.............................................................. 6642 RMS errors of the extracted sparameter values.................................................................... 6661 C3baluns internal bias points and AC voltage swings at 5 dBm input................................ 9062 Forward gains of C3balun for the input power of 25 dBm ~ 5 dBm................................. 10063 Change of bias performances of the proposed C3balun due to process variations............. 105 PAGE 9 9 LIST OF FIGURES Figure page 11 Circuits in their various types............................................................................................1512 Conventional method for measuring a di fferential circuit using a 2port VNA................ 1713 Balun embedded measurements......................................................................................... 1921 Nodal scatteringwave representation of threeport and fourport circuit.........................2122 Mixedmode scatteringwave representati on of threeport and fourport circuit..............2223 Decomposing nodal voltages in terms of propagation direction....................................... 2624 Extraction circuit for [ s]4s first and third.......................................................................2725 Extraction circuit for [ s]4s second and fourth column................................................... 2826 Extraction circuit for [ s]3.................................................................................................2927 Twostaged 5GHz CMOS fullydifferential amplifier...................................................... 3128 SPICEbased extraction of [ s]4 for the circuit shown in Figure 28................................ 3229 Layout of a differential transformer w ith unbalanced coupling of a nearby loop............. 33210 Circuit model of a differentia l transformer shown in Figure 29....................................... 33211 SPICEbased magnitude extraction of [ s]4 for the circuit shown in Figure 210 (4port case)..................................................................................................................... .......34212 SPICEbased phase extraction of [ s]4 for the circuit shown in Figure 210 (4port case)...................................................................................................................................34213 SPICEbased magnitude extraction of [ s]3 for the circuit shown in Figure 210 (3port case)..................................................................................................................... .......35214 SPICEbased phase extraction of [ s]3 for the circuit shown in Figure 210 (3port case)...................................................................................................................................35215 Ratrace balun operating at 6 GHz.....................................................................................3731 Crosssectional view of a coaxial cable and its currents.................................................... 4032 Coaxial Marchand balun.................................................................................................... 4033 Transmissionline model of Marchand balun.................................................................... 42 PAGE 10 10 34 Equivalent circuit for the impedance s een at Marchand baluns differential port .............4235 Normalized frequency plot of the diffe rentialmode impedance seen at Marchand baluns differential port...................................................................................................... 4336 Planartype Marchand balun.............................................................................................. 4437 General c/4 coupled transmissionline............................................................................. 4638 Impedances of planar Marchand balun with symmetric c/4 coupled TL......................... 4839 Simulation results of an optimized planar Marchand balun operating at fc = 6 GHz........ 49310 Planar Marchand balun with commonmode matching..................................................... 50311 Crosssection of various c oupled microstripTL structures............................................... 51312 Crosssection of the proposed coupled microstripTL structures...................................... 52313 PCB layout of the proposed Marchand balun.................................................................... 53314 Proposed balun embedded probes...................................................................................... 54315 Measuring balun embedded probes using a dualthrough connected to a dualprobe....... 55316 Measurement results of the proposed balun embedded probes......................................... 5641 Full Characterization of the 3port e rrorbox in the measurements using balun embedded probe................................................................................................................. 5942 Proposed impedancestandardsubstrate (ISS).................................................................. 6043 Required measurements for th e proposed extraction algorithm........................................6144 Flowgraph of the ISS measurement through the errorbox............................................... 6345 Extracted sparameters of a balun embedded probe using the proposed ISS and extraction algorithm and their comparison w ith the previous me thod of using a dualthough pattern connected to a dualprobe..........................................................................6746 Full 2port balun embedded measurement and their 2 x 2 differentialmode sparameter matrices............................................................................................................. 6851 Mixedmode flowgraph for diffe rential measurement using baluns.................................. 7152 Mixedmode flowgraph for VNAs noncalibrated s11 and s21..........................................7253 Mixedmode flowgraph for VNAs noncalibrated s22 and s12..........................................74 PAGE 11 11 54 Measuring dualreflections of the DUT.............................................................................7755 Ratrace type balun; mismatches were randomly induced from the shown nominal values in order to achieve large CXM............................................................................... 7856 Mixedmode sparameters of a Ratrace type balun shown in Figure 55......................... 7857 Fullydifferential amplifier; 10% varia tions were randomly induced from the shown nominal values in order to achieve large CXM................................................................. 7958 Mixedmode sparameters of the fullydifferential amplifier shown in Figure 57........... 8059 Differentialmode sparameters of the DUT; original, measured, and calibrated sparameters, with anticipated maximum and minimum, using 102, 103, and 104 samples...............................................................................................................................8161 Comparing singleended a nd mixedmode sparameters between passive balun and active balun................................................................................................................... .....8362 Distributed amplifier type active balun.............................................................................. 8463 Differential amplifier type active balun............................................................................. 8564 Active balun using sourcedrain output configuration.......................................................8665 Matched sourcefollower for maximu m forwardgain at low frequencies........................ 8666 Simplified ACequivalent circuit of th e active balun using sourcedrain output configuration......................................................................................................................8767 Active balun using commonsource and commongate pair.............................................. 8868 Proposed active balun using combined cascodecascade configuration (C3balun)......... 8969 Simulation results of the proposed C3balun..................................................................... 90610 Chip layout of the proposed C3blaun in IBM 8HP 130 nm BiCMOS process................ 91611 Chip photo of the proposed C3blaun in IBM 8HP 130 nm BiCMOS process................. 92612 Layout for NMOS interconnect; M3 of the proposed C3balun........................................ 92613 Layout for NMOS interconnect; zoomin area of Figure 612.......................................... 93614 Layout for NMOS interconnect; zoomin area of Figure 613.......................................... 93615 Threepin DCprobe wi th embedded bypass capacitors.................................................... 94616 Using GSGs through pattern for unknownthrough measurements.............................. 95 PAGE 12 12 617 Full 3 x 3 sparam eter and yparameter matrices of active balun with pads, pads only, and active balun without pads............................................................................................96618 Measured magnitude of the singleended sparameters of the proposed C3balun at the input power of 25 dBm............................................................................................... 98619 Measured phase of the singleended spa rameters of the proposed C3balun at the input power of 25 dBm..................................................................................................... 98620 Mixedmode sparameter measurement of the proposed C3balun at 25 dBm input....... 99621 Mixedmode sparameter measurement of the proposed C3balun at 5 dBm input.......... 99622 Noise measurement of the proposed C3balun................................................................ 100623 C3balun with network for stable biasing........................................................................ 102624 Low frequency amplifier used for lowpass biasfeedback network in the proposed C3balun...........................................................................................................................103625 Thresholdreferenced selfbiasing networ k used in the proposed C3balun and the attached lowpass biasfeedback network........................................................................ 103626 Overall performances of the C3b alun the attached biasing network..............................10471 Proposed balun embedded measur ement for differential circuits.................................... 106 PAGE 13 13 Abstract of Dissertation Pres ented to the Graduate School of the University of Florida in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy BROADBAND BALUN EMBEDDED MEASUREMENT FOR DIFFERENTIAL CIRCUITS By Kooho Jung December 2007 Chair: William R. Eisenstadt Cochair: Robert M. Fox Major: Electrical and Computer Engineering Conventional 2port vectornetwo rkanalyzers are used for measuring 4port differential circuits, where each port is embedded with a balu n, either using external baluns, onchip baluns, or baluns integrated in onwafer probes. Th e proposed strategy requires the development of compact sized broadband baluns, an algorithm for calibrating the parasitic effects of the embedded baluns, and an evaluation method for the measurement errors caused by the baluns imperfections. The proposed strategy can be app lied to virtually all singleended equipment, which enables them to be free from post measurement processes for estimating virtualdifferential measurement results. The baluns are realized using Marchands configuration given th eir large relativebandwidth and compact structure. The optimum values for the differentialand commonmode characteristic impedances of the Marchandcoupling are analytica lly derived as 58.58 and 85.36 respectively. In order to obtain such high coupling, a new coupling structure is proposed using a doublesided singlelayer printedcircuitboard surrounded by conductive fixtures. The designed baluns ar e assembled to onwafer probes, and the measurements results show that the balun embedded probes ha ve broad 3 dBrelativ ebandwidths of 0.909. PAGE 14 14 For characterizing and calibrating the 3por t errorbox in the balun embedded onwafer measurements, a new set of impedancestandardsubstrate and an extraction algorithm are proposed. This method fully extracts all 9 mixe dmode sparameters of the 3port errorbox, where 4 differentialmodes are used for the ca libration, and the remaining 5 commonand crossmodes are used for evaluating their associated measurement errors. The proposed method uses the pseudoinverse of overdetermined matric es, by which it becomes more tolerant to measurement errors, when compared to a pr evious method of usi ng a dualthrough pattern connected to a dualprobe. Since the calibrations are for only the differe ntialmodes, measurement errors occur due to the undesired commonand cros smodes of the embedded baluns and deviceundertest, even under the most ideal calibration conditions. Thes e errors are evaluated using a newly proposed algorithm, which calculates the anticipated mini mum and maximum of the sparameters that can result due to the commonand crossmodes. In efforts to further increase the measur ement bandwidth of the proposed measurement strategy, active baluns are developed using a newly proposed combinedcascodecascade configuration, which is designed in the IBM 8HP 130 nm BiCMOS process. For input power as high as 5 dBm, the bandwidth is shown to be DC 17 GHz, where the imbalance of the differential output is less than 1.8 dB in amplit ude and less then 10 degrees in phase. With the development of a calibration algorithm for unidir ectional errornetworks, active baluns become a promising solution for the proposed balunbased measurements, due to their large bandwidth and compact structure. PAGE 15 15 CHAPTER 1 INTRODUCTION TO BALUN EMBEDDED MEASUREMENTS 1.1 Advantages of Differential Circuits Differential signals are defined as tw o si gnals with the same strength and opposite polarities. Differential circuits ar e defined as networks which use differential signals for their inputs and outputs. The key advantage of using di fferential circuits, comp ared to using singleended circuits (networks with singleended signals as their inputs and outputs) is the fundamental balanced characteristics by which one can minimi ze the flow of undesired energy transferring to and from the system, such as electromagnetic interference/compatibility (EMI/ EMC) and fluctuations of voltagebiases including ground (GND). Another advantage of using differential circuits is the rejection of even harmonics cause d by the circuits nonlinearity of largesingle responses, because the even harmonics are in phase at each port of the differential output, from which they are cancelled out when observing the difference between the two ports. These key advantages of differential circuits enable them to be applied to a wide range of highspeed RF applications, where recent advances are report ed in areas such as power amplifiers [1.1], frequency doublers [1.2], and distributed amplifiers [1.3]. A B C Figure 11. Circuits in their va rious types. A) Singleended. B) Differential. C) GNDless differential. A further advantage of using differential circuits is in re gards to the GND. In a signalended circuit, as shown in Figure 11A, the circuits nodepotentials are assumed to be PAGE 16 16 referenced to the underlying GND plane. However, such an assumption is only possible, when the shortest wavelength of the si gnal traveling in the ci rcuit is much longer than the dimensions of the GND plane. Any distant tw o points on the GND plane, if the resulting electric al path is comparable to the signals wavelength, cannot be modeled as the same node. Therefore, at high frequencies, the various locations in the underl ying GND plane cannot be treated as the actual GND sharing the same node. Such uncertainty of the GNDs model can cause critical design errors, which often create difficult modeling ch allenges. However, the problems caused by the GNDs uncertainty are less severe for a differential circuit, as shown in Figure 11B. This is because the balanced signals can make virt ualGND nodes (nodes that behave like GND for AC signals) in local points inside the circuit, whic h are not influenced by the uncertainty of the underlying GND plane. Furthermore, the prob lem caused by the GNDs uncertainty can be solved completely by using GNDless differential circuit [1.4], as shown in Figure 11C, where the two balanced signals are referenced to each other rather than to GND. 1.2 Conventional Measurements of Differential Circuits In m easuring a differential circuit, or a di fferential deviceundertest (DUT), the most convenient method is to use a 4port vectornetwo rkanalyzer (VNA) with balanced differential sources and receivers [1.5]. However, due to the high cost of new test equipment, a more practical approach is sought ut ilizing 2port VNAs, which are avai lable in most laboratories for RF circuits. The most common measurement method for utilizing the 2port VNA is to terminate (connect to a 50 load) two of the four ports, and ca librate and measure the nonterminated ports. As shown in Figure 12, six combinations of such 2port calibration and measurement are required, and the measurement results are mathem atically combined to characterize the DUTs differential operations. However, this met hod requires long measurement cycles, and the PAGE 17 17 connecting and disconnecting of the ports between each measurement compromises the measurement accuracy. The most critical problem occurs when measuring active differential circuits, because their nonlinear largesignal re sponses cannot be characterized by superposing the six measurements. Figure 12. Conventional method for measuring a differential circuit using a 2port VNA. Advanced solutions for the nonlinear behavi or are proposed in [1.6][1.7] using a puremode VNA (PMVNA), where the 2port VNA is connected to 3 dB hybridjunctions that convert the two singleended signals to and from their difference (differentialmode) and their average (commonmode). The 3 dB hybridjunctions are further connected to switches for choosing between differentialmode and commonmode, and phaseshifters for compensating any mismatched delays in the interconnections betw een the connected parts. In the PMVNA, all of the mentioned parts are connected to a PC through the GPIB (Gener al Purpose Interface Bus) for central controls. Although this method can provide a complete solution for measuring differential circuits, the method requires sophis ticated engineering expertise in the measurement setup and in correctly interpreting the measurement results. PAGE 18 18 1.3 Proposed Measurements of Differential Circuits Using Broadband Baluns In efforts to efficiently m easure differential circuits while av oiding the engineering overhead mentioned in [1.6][1.7], a new method is proposed using baluns that focuses on measuring the differentialmode. A balun is a 3port network that converts between balanced differential signals (bal) and unba lanced singleended signals (un); the detail descriptions of its basic operations are presented in Chapter 2. By using baluns operating over a wide frequency range, the differentialmode of a differential circuit can be meas ured efficiently, as shown in Figure 13; the baluns are embedded into the meas urements, either using external baluns (Figure 13A for coaxial interfaced DUT and Figure 13B for onwafer DUT) or using compacted sized baluns embedded in the onwafer probes (Figure 13C). Note, by embedding the baluns on the probes, one can avoid the change s in the electrical lengths an d contact resistances of the connectors when maneuvering the probes betwee n the calibration and the measurements. The proposed measurement method requires the devel opment of the items shown below, which are the main topics of this work. Compact sized broadband baluns (for the case shown in Figure 13C) An algorithm for calibrating the effects of the embedded baluns Evaluation of measurements errors cause by the baluns imperfections The compact sized broadband balun is show n in Chapter 3, which is realized using Marchands configuration [1.8]. The new algorithms for ch aracterizing and calibrating the effects of the baluns and evaluating the errors cause by baluns imperf ections are respectively shown in Chapters 4 and 5. Active baluns are shown in Chapter 6, which are unidirectional converters between differential a nd singleended signals. Despite th eir inability to convert bidirectionally, they are used becau se they can realize broad bandwidth in limited areas, which is beyond what passive baluns can provide. With the development of a calibration algorithm for PAGE 19 19 unidirectional errornetworks, this becomes a promising solution for the proposed strategy shown in Figure 13C. A B C Figure 13. Balun embedded measurements. A) Using external baluns. B) Using external baluns connected to onwafer probes. C) Using balun embedded probes. 1.4 Applications Beyond NetworkAnalyzers The potential of the proposed m easurement st rategy need not be confined to VNAs. It can be applied to virtually all si ngleended equipment operating in the frequency domain (such as signal generators and spectrum analyzers), so that they can be used for differential measurements. This enables the measurements to be free from post measurement processes and mathematical PAGE 20 20 calculations for achieving vi rtualdifferential measurement results. The broadband balun components developed in this work can also be used for other embedded test applications, such as on deviceinterface boards (DIB), ICchips (for active baluns), and load boards for automated test equipment (ATE). The compact size of the activ e baluns make them especially suitable for Builtin Self Test (BIST) applic ations [1.9][1.11], as well as for general onchip differential circuits requiring compac t sized broadband baluns. PAGE 21 21 CHAPTER 2 BACKGROUND THEORIES IN BALUNS AND MIXEDMODES SP ARAMETERS 2.1 Introduction MixedMode SParameters The spar ameter matrix ([ s ]) is generally used to re present multiported networks operating in the RF/microwave range, as shown in Figure 21 for 4port and 3port circuits. The scattering waves (or power wa ves) [2.1][2.2], labeled as a s and bs, are defined as the squareroot of the power of each ports (P1 ~ P4) propagating toward and away from the network, respectively. The ratios of these powerwaves define the singleended sparameter matrix, as shown in Equation 21 for 4port circuits and in Equation 22 for 3port circuits. The elements of the sparameter matrix are used to define the ne tworks operation, such as the gain from P1 to P3, s31, or the reflections at P2, s22. A B Figure 21. Nodal scatteringwave representation of A) threeport circuit and B) fourport circuit. 4 3 2 1 4 3 2 1 44434241 34333231 24232221 14131211 4 3 2 1a a a a a a a a ssss ssss ssss ssss b b b b4s (21) PAGE 22 22 3 2 1 3 3 2 1 333231 232221 131211 3 2 1a a a a a a sss sss sss b b b s (22) In order to observe differentialmode and co mmonmode behavior, as well as the crossmode (the conversionmode between differen tialmode and commonmode) behavior, of the differential ports P1 (P1 and P2), P2 (P3 and P4 of 4port network), and P2 (P3 of 3port network), mixedmode (differentialmode a nd commonmode) scattering waves are used as shown in Figure 22 and Equations 23 and 24 [2.3][2.4]. The subscripts d and c in the powerwaves and sparameters represent the differen tialmode and the commonmode. In Equations A3 and A4, the differentialmodes and commonmode sparameters are grouped together, and the ungrouped sparameters are the crossmodes. A B Figure 22. Mixedmode scatteringwave representation of A) thre eport circuit and B) fourport circuit. 2 1 2 1 4 2 1 2 1 22 21 22 21 12 11 12 11 22 21 22 21 12 11 12 11 2 1 2 1 c c d d c c d d cc cc cd cd cc cc cd cd dc dc dd dd dc dc dd dd c c d da a a a a a a a ssss ssss ssss ssss b b b b s (23) differentialmode commonmode PAGE 23 23 1 2 1 3 1 2 1 11 12 11 21 22 21 11 12 11 1 2 1 c s d c s d cc cs cd sc ss sd dc ds dd c s da a a a a a sss sss sss b b b s (24) Mixedmode powerwaves are defined with mi xedmode voltages and currents. Consider P1 (P1 and P2) shown in Figure 22 (and Figur e 21). The mixedmode voltages and currents are defined in Equation 25, a nd their decomposition with respect to their propagation direction is shown in Equation 26, which is in the same format as the singleended representation shown in Equation 27. The superscripts and correspond to waves propagating towards and away from the network, respec tively. Each decomposed term shown in Equation 26 also follows the same definitions in Equation 25. Th e asymmetry with the fact or of 1/2 in Equation 25 was chosen for power conservation [2.3][2.4], which results in the different characteristic impedances for differentialmode and comm onmode, as shown in Equations 28 through Equation 210. Definitions presented in Equations 25 through 210 also apply for P2 in the same way. The mixedmode voltages and currents define the mixedmode scatteringwaves as shown in Equations 211 and 212, which is in the same format as the singleended representation shown in Equations 213 and 214 Finally, the ratios of these mixedmode scattering waves define the mixe dmode sparameters matrix, [s], as introduced in Equations 23 and 24. Note, for the 3port case, the singleen ded port is represented by s. Therefore, the singleended port P2 is the same as P3, hence, vs 2, is 2 as 2 and bs 2 are respectively same as v3, i3, a3, and b3. 2 1 2 1 1 1 1 11100 2/12/100 002/12/1 0011 i i v v i i v vc d c d (25) differentialmode commonmode PAGE 24 24 1 1 1 1 1 1 1 1 1 1 1 1 c d c d c d c d c d c di i v v i i v v i i v v (26) 2 1 2 1 2 1 2 1 2 1 2 1i i v v i i v v i i v v (27) 222211110//// ivivivivz (28) 0 11 11 02// zivivzdd ddd (29) 2///011 110zivivzcc ccc (210) cc dd cc dd c c d d c c d d cc dd cc dd c d c dzi zi zi zi zv zv zv zv iv iv iv iv a a a a02 02 01 01 02 02 01 01 22 22 11 11 2 2 1 1/ / / / (211) cc dd cc dd c c d d c c d d cc dd cc dd c d c dzi zi zi zi zv zv zv zv iv iv iv iv b b b b02 02 01 01 02 02 01 01 22 22 11 11 2 2 1 1/ / / / (212) 04 03 02 01 04 03 02 01 54 33 22 11 4 3 2 1/ / / / zi zi zi zi zv zv zv zv iv iv iv iv a a a a (213) 04 03 02 01 04 03 02 01 54 33 22 11 4 3 2 1/ / / / zi zi zi zi zv zv zv zv iv iv iv iv b b b b (214) PAGE 25 25 2.2 MixedMode Sparameter Calculation Using SPICE In order to obtain simulations of [ s], an IC designer would first obtain [s] via a microwavecircuit simulator, and then convert it into [ s], through linear matrixoperations [2.3]. The problem occurs when the circuits are entered in SPICE, where a circuits schematic cannot be reentered on a microwavecircuit simulator fo r fear of making fatal tr anslation errors. Some linking programs exist to transfer files between microwave design tools and IC CAD systems, but these require technology support, additional installed software, and sophisticated user capability. Another disadvantage is that th e relationships between the extracted [s] and the circuits operation (nodevoltages and branchcurrents) are not traceable. The linear matrix operation in converting [s] into [ s] further hides [ s]s relationship to the circuits operation. Furthermore, transient simulations of the mixe dmode sparameters fo r monitoring nonlinearity as well as the stability are not available using this conve ntional method. To overcome these problems, a new way to directly extract mixedmode sparameters from SPICE for 4port and 3port circuits is shown in this section, which is an extension from the previous work for singleended 2port networks presented by [2.2] and [2.5]. 2.2.1 Extraction Circuits for MixedMode Sparameters The analysis for building the attached extrac tion circuits starts with decomposing the ports nodal voltages in terms of their propagation directions as shown in Figure 23A. This is a 2port circuit, where the source of vA is applied to PS and the load is connected to PL, through transmissionlines both matched with z0. The propagationloss and phaseshifting effects of the transmission lines are assumed to be calibrated ou t. For the source port, onehalf of the applied voltage propagates towards PS ( vS +=vA/2) due to a voltage division occurring between the sourceimpedance and the transmissionlines charact eristic impedance. The total nodal voltage vS must PAGE 26 26 A B Figure 23. Decomposing nodal vo ltages in terms of propagation direction. A) Transmissionline model. B) SPICE model. equal the sum of vS + and vS ; hence, vS = vS vA/2. For the load port, wh ere no waves are injected towards PL ( vL +=0), vL is equal to vL. Keeping in mind this decomposition, Figure 23A can be converted into Figure 23B where the transm ission lines are repla ced by their Theveninequivalent circuit seen at STh and LTh. The extraction of [ s]4s 1st column starts from the definition stated in Equation 23, where only the differentialm ode wave is injected at P1 while rest of the incident waves remain zero. This is achieved by applying unit voltages with opposite polarity at P1. Using the Theveninequivalent circuits shown in Figure 23, this is modeled as Figure 24A. The equation of [ s]4s 1st column is shown in Equation 215. Each element begins with its definition, which is expressed in terms of v+ 1,2 and v1~4. These terms are replaced by v1~4, via the same decomposition analysis shown in Figure 23. The final expression of Equation 215 can be PAGE 27 27 realized by the attached circuitry as shown in Figure 24A. Voltages v1~4, control the dependent sources of the attached circuits which are arranged in accordance with the final term of Equation 215 to generate the outputs sdd 11, sdd21, scd 11, and scd 21, which are node voltages interpreted as dimensionless quantities. By applying unit volta ges with the same polarity, the elements of [ s]4s third column can be extracted using a si milar procedure. These results are shown in Equation 216 and in Figure 24B. A B Figure 24. Extraction circuit for [ s]4. A) First column. B) Third column. 43 21 43 21 43 21 43 21 21 02 01 02 01 01 21 11 21 111 1 / / / / / 1 vv vv vv vv vv vv vv vv vv zv zv zv zv zv s s s sc c c c d d d d d d cd cd dd dd (215) 43 21 43 21 02 01 02 01 01 21 11 21 111 / / / / / 1 vv vv vv vv zv zv zv zv zv s s s sc c c c d d d d c c cc cc dc dc (216) The extraction circuits for elements of the [ s]4s 2nd and 4th columns can be achieved by switching the two differential ports, P1 (P1 and P2) and P2 (P1 and P3), followed by the PAGE 28 28 same procedure, as shown in Equations 217 and 218. The final terms of these equations can be realized in circuits as shown in Figure 25. The extraction circuits for extracting elements of [ s]3 are also done in the same way as that of [ s]4. The derivation procedure for extracting elements of [ s]3 are shown in Equations 219 through 221, and the resulting extraction circuits are shown in Figure 26. 43 21 43 21 02 01 02 01 02 22 12 22 121 / / / / / 1 vv vv vv vv zv zv zv zv zv s s s sc c c c d d d d d d cd cd dd dd (217) 1 / / / / / 143 21 43 21 02 01 02 01 02 22 12 22 12vv vv vv vv zv zv zv zv zv s s s sc c c c d d d d c c cc cc dc dc (218) A B Figure 25. Extraction circuit for [ s]4. A) Second column. C) Fourth column. 21 3 21 01 03 01 01 11 21 112 1 / / / / 1 vv v vv zv zv zv zv s s sc c d d d d cd sd dd (219) PAGE 29 29 21 3 21 01 03 01 03 12 22 122 12 2 / / / / 1 vv v vv zv zv zv zv s s sc c d d cs ss ds (220) 1 2 / / / / 121 3 21 01 03 01 01 11 21 11vv v vv zv zv zv zv s s sc c d d c c cc sc dc (221) A B C Figure 26. Extraction circuit for [ s]3. A) First column. B) Second column. C) Third column. 2.2.2 Application Examples The mixedmode sparameters are extracte d with the proposed SPICEbased method and they are compared with the results obtained from Agilent ADS, followed by linear matrix operations shown in Equations 222 and 223 for 4port and Equations 224 and 225 for 3port, which can be derived from definitions shown in Section 2.2.1. The extractions are done for a 5 PAGE 30 30 GHz CMOS fullydifferential amplifier, and also for a differential transformer (adapted from [2.6]) with unbalanced coupli ng of a nearby conductive loop. 1010 1010 0101 0101 1100 0011 1100 0011 2 14 4s s (222) 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 244433433424132314443343342413231 24231413 22211211 24231413 22211211 44433433424132314443343342413231 24231413 22211211 24231413 22211211 4ssssssssssssssss ssss ssss ssss ssss ssssssssssssssss ssss ssss ssss ssss s (223) 020 101 101 011 200 011 2 13 3s s (224) 2 2 2 2 2 2 2 222211211 2313 22211211 3231 33 3231 22211211 2313 22211211 3ssss ss ssss ss s ss ssss ss ssss s (225) The circuit diagram of the fullydifferential amplifier is shown in Figure 27. All of the inductances (and the transformers) include a series resistance to account for a finite Q of 10, and the current source is replaced by a CMOS current mirror. The first stage (MP1 and MP2) is a differential commonsource conf iguration with LCresonator loads to achieve high drain impedance, and hence, achieve high gain. Th e second stage (M1 and M2) also uses commonsource configuration with LCresonators, where the LCresonators also work as impedance PAGE 31 31 matching networks to achiev e output resistances of 50 The input matching circuits attached in P1 and P2 are designed using LCnetworks. To achieve high commonand crossmodes, the authors deliberately made the size and current carrying capabilities of the CMOS asymmetric via the CMOS NFET model Kp parameters (0.02 mA/V2 for MP1 and M1, and 0.022 mA/V2 for MP2 and M2). The magnitude of the extracted mixedmode sparameters are shown in Figure 28. The solid lines are obtained via this new method (using SPICE), and the dotted lines are obtained by microwave circuit simulation and the mixedmode matrix conversion operation. Both results show almost identical responses, with a slight difference due to the different MOS models (as well as parasitic models) between SPICE and the microwave simulator. The other elements of [ s]4 which are not shown here, have magnitudes lower than 60 dB, and were unsuitable to compare due to the noise of th e numerical simulation errors. Figure 27. Twostaged 5GHz CMOS fullyd ifferential amplifier; CMOS NFET model Kp parameters are 0.020 mA/V2 for MP1 and M1, and 0.020 mA/V2 for MP2 and M2; all L includes series resistance to achieve finite Q of 10. PAGE 32 32 Figure 28. SPICEbas ed extraction of [ s]4 for the circuit shown in Figure 28. The layout and the circuit diagram for the fu llydifferential transf ormer (4port) and a differential to singleended transformer (3port) are shown in Figures 29 and 210. Note, P4 remains open in the 4port case, and P4 is s horted to ground for 3port case. The inductance of the metal path P1toP2 (black) and P3toP4 (g ray) are respectively 0.5 nH and 0.3 nH, and the coupling coefficient between thes e two inductances is 0.8. The transformer is unbalanced by the asymmetrical coupling of a nearby inductance of 0.2 nH (white), where the couplingcoefficients to the upper spiral structur e (k) is 5 times larger than that of the lower spiral structure (k'). The resistances associated with the inductance acc ount for the finite Q of 10 at 5 GHz, and the parasitic capacitances are omitted for simplicity. As shown in Figures 211 through 214, the SPICEbased extractions are identical to those obtained via ADS, both in magnitude and in phase, which prove that the proposed method is accurate and free from any approximation or assumption. The elements of [ s]4 and [ s]3 that PAGE 33 33 are not shown in Figures 211 through 214 are the ones with the magnitudes smaller than 120 dB, where the simulations numerical errors became predominant. Figure 29. Layout of a differential transfor mer with unbalanced coupling of a nearby loop. Figure 210. Circuit model of a differe ntial transformer shown in Figure 29. PAGE 34 34 Figure 211. SPICEbased magnitude extraction of [ s]4 for the circuit show n in Figure 210 (4port case). Figure 212. SPICEbased phase extraction of [ s]4 for the circuit shown in Figure 210 (4port case). PAGE 35 35 Figure 213. SPICEbased magnitude extraction of [ s]3 for the circuit show n in Figure 210 (3port case). Figure 214. SPICEbased phase extraction of [ s]3 for the circuit shown in Figure 210 (3port case). PAGE 36 36 2.3 Introduction to Balun and RelativeBandwidth A balun is 3port network, as shown in Figure 21B, which converts between balanced differential signals (bal) and unbalanced singleended signals ( un). As shown in Equation 226, an ideal balun is define d as a 3port network where s13 (= s31) and s23 (= s32) are both 1/sqrt(2) with opposite polarities (180 differe nce in phase), while all other singleended sparameters are zero. Such a singleended spara meter matrix means that the singleended signal in P3 splits its power into (or combines its pow er from) P1 and P2 with opposite polarities, while all ports do not reflect any powers and maintains perfect isolation betwee n P1 and P2. The same balun can be represented using a mixedmode 3port network, as shown in Figure 22B. As shown in Equation 227, an ideal balun is defined as a 3port network where sds 12 (= ssd 21) is 1, while all other undesired mixedmode sparamete rs are zero. Such a mixedmode sparameter matrix means that the singleended signal in P3 completely transfers its power to (and receives its power from) P1 in its differentialmode, while all other transfers and reflections are zero. 180 ; 0 2 2 20 0 20 0 21 2 1 1 1 2 1 1 1 333231 232221 131211 sss sss sss (226) 000 001 010 11 12 11 21 22 21 11 12 11 cc cs cd sc ss sd dc ds ddsss sss sss (227) The frequency behavior of a ba lun is often characterized by using a figure of merit called the relativebandwidth. Its definition is shown using Figure 215, which is a frequency response of an example balun (Ratrace ba lun [2.7]) operating with the cen ter frequency of 6 GHz. At 6 GHz, the singleended sparameters (Figure 215A) show that it transmits with 3 dB loss through s13 (= s31) and s23 (= s32) with opposite polarities of 180, while the other undesired PAGE 37 37 singleended sparameters are very low. Figure 215B shows the same balun in mixedmode sparameters, where at 6 GHz, th e differential transmission of sds 12 (= ssd 21) is 0 dB, while the other undesired mixedmode sparameters are very low. However, these undesired sparameters increase as the frequency approaches the side bands, towards 3 GHz and 9 GHz, where the balun no longer operates ideally. A B Figure 215. Ratrace balun operating at 6 GHz. A) Singleended. B) Mixedmode. As shown in Figure 215B, absolutebandwid th (BW) of a balun can be defined using which denotes the minimu m required difference between sds 12 (= ssd 21) and all other undesired sparameters. In this work, ab solutebandwidth is defined by using = 3 dB, and the PAGE 38 38 relativebandwidth is defined by normalizing the absolutebandwidth by its center frequency, as shown in Equation 228. This figur e of merit is often convenient wh en characterizing baluns that are realized using passive compone nts, such as coupled microstr ip transmissionlines (TL) or transformers using coiled ferrites, since this main tains its value regardless of the change of center frequency via structural scaling; if the used materials electromagnetic performances are maintained through the change of frequencies, the center frequency can be increased (or decreased) by scaling down (or scal ing up) the structural dimensions. 717.0 GHz 6 GHz 85.3GHz 15.8 frequency center bandwidthabsolute bandwidthrelative (228) From various types of baluns, the planartype Marchand balun [2.8][2.9] is chosen in this work, for its areaefficient structure and its cap ability to produce large relativebandwidths compared to other balun types such as the lumped delay type [2.10] or the Ratrace type [2.7]. The detail operation of Marchand baluns and their app lications to balun embedded measurements are shown in the next chapter. PAGE 39 39 CHAPTER 3 MARCHAND BALUN EMBEDDED PROBE 3.1 Introduction to Marchand Balun Embedded Probe Baluns are embedded into onwafer probes in o rder to provide accurate differential measurement capabilities for c onventional singleended twoport VNAs, as shown in Figure 13C. From various types of baluns, the planar Marc hand balun is chosen in this research, for its areaefficient structure and its capability to produce large relativebandwidths compared to other balun types of passive baluns. The review of coaxial Marchand Balun [1.8] and its migration to the planar type is shown in S ection 3.2. The analytical derivation procedure for designing the optimum planartype Marchand ba lun and the newly proposed Marc handcoupling structures are respectively presented in Sections 3.3 and 3.4. The final measurement results are discussed in Section 3.5. 3.2 Coaxial Marchand Balun and the Migration to its Planar Type A crosssectional view of a general coaxial cable is shown in Fi gure 31. Although this has only two conductors, it has three current compone nts as annotated as I_center, I_outer, and I_shield, where I_center is alwa ys equal to I_outer with oppos ite directions. Using coaxial transm issionlines (TL), the original Marchand balun can be designed as shown in Figure 32, along with its crosssectional view It uses doublecoax structures where the inner coaxes have the characteristic impedances of za (at the lefthand side) and ze (at the righthand side) and the outer coaxes have the characteristic impedance of zb. The I_center and I_outer of the zacoax share the same values but are in opposite directi ons. The goal is to couple these currents into the two center conductors of the z0coaxes located at the bottom. However, the problem is that in the zacoax, the current in the outer conductors innerpart (I_outer) is connected to its outerpart (I_shield) at any cut interfaces. Hence, th is I_outer couples into I_center of the zbcoax. As PAGE 40 40 Figure 31. Crosssectional view of a coaxial cable and its currents. A B Figure 32. Coaxial Marchand balun. A) 3D view. B) Cr osssectional view. PAGE 41 41 shown in the remainder of this section, the c/4length (where, c is the wavelength of the center frequency of fc) of the zbcoax and the series openended zecoax enables these undesired coupling to be cancelled out over a wide range of frequency. Figure 33 is the TL model of the Marchand balun, where the conductive bodies, labeled as A ~ Q, can be compared with labels shown in Figure 32. The TL model shows that signals at P1 and P2 always have opposite polarity. Furtherm ore, since this is a pa ssivelossless network, the matching of the differential port, P1 and P2, to 100 enables the singleended port, P3, to be matched to 50 Therefore, the bandwidth of the impeda nce seen at the differential port can be directly translated as the bandwidth in which the Marchand balun operates. Figure 34 shows the equivalent circuit for calculati ng the differentialmode impedance seen at the differential port, zD, which is 2 times the value of the displayed zodd, as shown in Equation 31. This factor of 2 is due to the definitions of differentialmode currents an d voltages, which is shown in the Equation 25. The equivalent lumped elements zX, zY, and zZ, are the impedances of the shorted c/4stub of zbcoax (Equation 32), 50 terminated zacoax, and the opened c/4stub of zecoax (Equation 33), respectively, where is the normalized frequency as shown in Equation 34. By assuming za = 50 (hence, zY = 50 ), one can derive th e matching condition of zD = 100 which is ze = za 2/(2zb). Note that the differentialmode impedance, zD, tends to maintain a constant value over a wide range of because the variation caused by the tan term of the shorted c/4stub ( zX) and variation caused by the cot term of the opened c/4stub ( zZ) tends to cancel each other, as shown in Figure 35. The flatness increases for higher zb. However, if zb is too large (beyond 200 ) the shorted c/4stub could no longer be modeled as Equation 32, because of the increasing dimensions of the outer coax, wher e the propagation can no longer be treated as purely transverseelectromagnetic (TEM) mode. PAGE 42 42 Figure 33. Transmissionline model of Marchand balun. Figure 34. Equivalent circuit for the impeda nce seen at Marchand baluns differential port. 222ZYX odd Dzzz zz (31) tan b Xzjz (32) cot 22 0 b Zz z jz (33) c c cvelocityphase ; 2 f f f (34) PAGE 43 43 A B Figure 35. Normalized freque ncy plot of the differentialmode impedance seen at Marchand baluns differential port A) Real value of zD. B) Imaginary value of zD. Although the doublecoax typed Marchand balun provides convenient theoretical designs, there are critical challenges with respect to the actual manufacture and assembly process. So it is often practical to reali ze the concept using planar TLs that can be created usi ng printedcircuitboard (PCB) or thinfilm process. The basic circuit for such plan ar Marchand balun is shown in Figure 36, where the singleended port, P3, bidirectionally converts the signal transmitted to and from the differential balanced ports, P1 and P2. At the center frequency of fc, the signal entering the singleended port, P3, goes into a coupled TL structur e, and reaches plane A after traveling c/4, where the balanced signals can be ach ieved when given the correct amount of PAGE 44 44 coupling. However, in order to main tain the balance at the sidebands, zopen is connected in series to P1 for phase compensation, which enables a broad 3 dBrelativebandwidth of 1~1.3. Hence, the Marchandcoupling consists of two c /4 coupled TLs, where one is connected to the singleended port, P3, and the other one connected to an openended te rminal. This Marchandcoupling need not be symmetric where one c /4 coupled TL is the exact mirror image of the other. However, this work uses the symmetric type, because of the convenience in the manufacturing, and also because it provides superi or balance of the signals at P1 and P2, due to their symmetric structure with respect to GND [3.1][3.3]. Figure 36. Planart ype Marchand balun. For the planartype Marchand balun, the manufacturing and assembly process are far more convenient than that of the coaxial type, especially in high frequencies, where the availability of the coaxial cables with the required characteristic impedances is limited. However, the design and optimization aspect is more difficult compared to the coaxial type. This is primarily because the design paramete rs of the previous doublecoax, za and zb, which can be chosen independently from each other, are now replaced by the coupled TLs differentialmode and commonmode charact eristic impedances, z0 d and z0, that are coupled to each other. The comparative study between two approaches is list ed in Table 31. To overcome these challenges for designing planar Marchand baluns, a new optimi zation procedure is deve loped analytically as shown in the next section. PAGE 45 45 Table 31. Using doublecoax vs. using P CB coupledTL in realiz ing Marchandcoupling Design Issues DoubleCoax PCB CoupledTL characteristic impedances za = va/ ia zb = vb/ ib z0 d = 2( v1v2)/ ( i1i2) z0 c = 0.5( v1+v2)/ ( i1+i2) analytical solutions za,b = 59.9591sqrt( r/ r) x ln ( radout/ radin) none need to use fullwave simulators design standpoint convenient za and zb are independent difficult z0 d and z0 c are coupled manufacture standpoint difficult inconsistent dimensions medium convenient custom PCB vendors 3.3 Analytical Derivation for Optimum Design 3.3.1 General QuarterWavelength Coupled TL Designing a planar Marchand balun requires finding the optimum values for the characteristic impedances of Marchandcoupled TL z0 d of the differentialmode and z0 c of the commonmode. This starts with characterizing a general c/4 coupled TL, as s hown in Figure 37, where z2 ~ z3 are arbitrary terminal impedances. The goal here is to solve for the input impedance, zin, at the center frequency, fc, which will be used as the central tool for finding the optimum values of z0 d and z0 c. As shown in Equation 35, the singleended v s in ports P1 and P3 can be written in terms of differentialmode, vd 0, and commonmode vc0, where they are split in to their direction of propagation (the superscript + denotes the co mponent propagating towards P2 and P4, while PAGE 46 46 the superscript denotes the component propaga ting towards P1 and P3). Similarly, Equation 36 shows the differentialand commonmode vs at ports P2 and P4, where the terms j is to account for the c/4 propagation. From Equations 35 and 36, v1~4 can be written in terms of the directional vd 0s and vc0s as shown in Equation 37. The same can be is applied to the currents as shown in Equations 38 through 310, where the characteristic impedances are defined in Equation 311. Applying an AC 1V signal to the node v1, Kirchoffs voltagelaw gives the first term of Equation 312. Its v1~4 and i1~4 can be replaced by the directional vd 0s and vc0s, as shown in the rest of Equation 312. From this equation, the directional vd 0s and vc0s can be solved using the inverse matrix of M. The results are inserted in to Equation 37 and Equation 310, by which the analytical form of v1~4 and i1~4 respectively obtained. Si nce the input is AC 1V, the inverse of the current i1 becomes equal to input impedance as shown in Equation 313. Figure 37. General c/4 coupled transmissionline. 0 0 0 0 0 0 3 12/12/1 11c d c d c dv v v v v v v v (35) 0 0 0 0 4 22/12/1 11c d c dv v j v v j v v (36) 0 0 0 0 4 3 2 12/2/ 112/12/1 2/2/ 112/12/1c c d dv v v v jjjj jjjj v v v v (37) PAGE 47 47 0 0 0 0 0 0 3 111 2/12/1c d c d c di i i i i i i i (38) 0 0 0 0 4 22/12/1 11c d c di i j i i j i i (39) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 3 2 12/2/// 2/12/1/1/1 2/2/// 2/12/1/1/1 2/2/ 2/12/111 2/2/ 2/12/111c c d d c c d d c c d d c c d d c c d d c c d dv v v v zjzjzjzj z z zz zjzjzjzj z zz z i i i i jjjj jjjj i i i i (310) 00 00 00 00 0 0/ / / /cc dd cc dd c div iv iv iv z z (311) c c d d c c d d c c d d c c d dz z j z z j z z j z z j z z z z z z z z z z j z z j z z j z z j v v v v ziv ziv ziv v0 4 0 4 0 4 0 4 0 3 0 3 0 3 0 3 0 2 0 2 0 2 0 2 0 0 0 0 444 333 222 12 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 1 2 1 2 1 ; 0 0 0 1 0 0 0 1 M M (312) 2 0 04 2 0 02423 2 0 023 2 0 043 2 002 2 2 2 4 2 2 2 2 4 d c d c d c d c cd inz zz z zzzzz z zzz z zzzzz z (313) PAGE 48 48 3.3.2 Optimum Design for Planar Marchand Balun The planartype Marchand balun is shown ag ain in Figure 38A, where the equivalent impedances of the Marchandcoup ling networks are defined as zeq1 and zeq2, as shown in the equivalent circuit in Figure 38B. The impedan ces seen at various positions are labeled as zX, zY, and zZ. For the balun to work ideally, the input si gnal at P3 must be delivered to a matched impedance of zZ = 50 For balun to become lossless, half of this 50 must be due to the coupling to P1 and the other half must be due to the coupling to P2. Hence, the real part of zeq 1 and zeq 2 must both be equal to 25 However, Equation 313 indicates that zeq 2 is purely real (when assuming the z0 d and z0 c are also purely real). This also means zeq 1 is purely real since zeq 1 + zeq 2 must be equal to 50 Hence, zX = 25 and zY = 75 where the additional 50 in zY comes from the source impedance at P3. A B Figure 38. Impedances of planar Marchand balun with symmetric c/4 coupled TL. A) Original circuit. B) Equivalent circ uit using lumped impedances, zeq 1 and zeq 2. PAGE 49 49 Using Equation 313, zX and zY can be expressed in terms of z2~3, where the appropriate values for z2~3 can be chosen by comparing the port numberings between Figure 37 and Figure 38A. The results are shown in Equations 314 and 315, from which the final the optimum values for z0 d and z0 c are found, as shown in Equations 316. Note that in obt aining Equations 316, the proper signs can be chosen using the physical fact that 2 z0 c is always greater than or equal to z0 d/2. Figure 39 shows the simulated sparamete rs of the planartype Marchand balun using the optimum characteristic impe dances shown in Equation 316. 25 2/2 2/2 50 0 502 00 2 00 4 3 2 dc dc inXzz zz z z z zz (314) 7525 2/250 4 0 50 502 00 2 00 4 3 2 dc cd inYzz zz z z z zz (315) 36.85 58.58 2/11/25 2/11/1000 0 c dz z (316) Figure 39. Simulation results of an optim ized planar Marchand balun operating at fc = 6 GHz. PAGE 50 50 3.3.3 CommonMode Matching As shown in Figure 39, the Marchand ba lun offers a broadband matching at the differential port, P1 and P2, for differentialmode, but it becomes an open circuit for commonmode. This can be interpreted as poor isolation between P1 and P2. If the differential DUT has any significant commonor cro ssmodes, any reflections of the unmatched commonmodes of the balun will result in measurement errors, ev en under the most accurate calibrated conditions. Therefore, when the baluns are being used for testing differential DUTs, it is very important for them to be matched in both the di fferentialand commonmode, in other words, P1 and P2 need to be well isolated. This is achieved by attaching 50 resistors at P1 and P2 which are looped with a 50 halfwavelength TL [3.4], as shown in Figure 310. Due to the electrical symmetry, the center point of the looped TL beco mes a virtualopen for the commonmode and a virtualGND for the differentialmode, at the center frequency, fc. Therefore, when the signals travel c/4 towards the terminals of the attached resistors, they become virtualGND for commonmode and a virtualopen for differentia lmode. As a result, the attached network provides 50 terminations at each port for the comm onmode, while remaining transparent for the differentialmode. Note that the same will not apply for the sidebands of the center frequency, fc, resulting in a narrower 3 dBrelativebandwidth, as will be shown in Section 3.5. Figure 310. Planar Marchand ba lun with commonmode matching. PAGE 51 51 3.4 Structural Realization The previous section showed that the optim ized design for planartype Marchand balun required a very large coupling where z0 d is low as 0.7 x z0 c. This gives rise to new challenges in the structural design of the coupled TL. The crosssectional views of their various structures are shown in Figure 311. Figure 311A is most commonly used [3.5], but its coupling is too small where the z0 d cannot be made as low as 0.7 x z0 c. This can be solved by coupling on both sides [3.6][3.7], as shown in Figure 311B. However, this requires bondwires, which degrades the reproducibility with respect to manufacturing. Also, this makes it difficult to place and route the Marchandcoupling while connecting the commonm ode matching network. An alternative way is to couple vertically [3.8], as shown in Fi gure 311C. This provides ve ry large coupling where there are virtually no limits to how small the z0 d can be made with respect to z0 c. However, a critical problem is that the derived optimum z0 d and z0 c cannot be applied, because the two coupled TL are asymmetric wi th respect to the GND. A B C Figure 311. Crosssection of various coupled microstripTL structures. In order to achieve large coup ling between the two TL that are symmetric with respect to the GND, a new coupled TL is proposed, where its crosssectional view is shown in Figure 312. It uses a doublesided singlelayer PCB surrounded by conductive fixtures. Note that regardless of the type of coupled TL, such conductive fixtur e is expected to inhe rently exist, for EMI protection and for the structural robustness in preparation for the final assembly to the probe. Large coupling can be easily achieved in th is structure, because the majority of the PAGE 52 52 electromagnetic field propagates inside the P CBs substrate of high dielectric constant ( r = 2 ~ 4) for differentialmode, while that of the commonmode propagates in air ( r = 1). However, since the phasevelocitie s of the differential and commonmo de are no longer the same, as was the case in Section 3.3.1, it requires further stru ctural tuning from its no minal values that had produced the characteristicimpedan ces presented in Equation 316. In choosing the operatin g center frequency, fc, one must consider that it requires more area for lower fc, due to the increased length of the Marchandcoupling and the commonmode matching network, whic h are proportional to c. Considering the limited available area in the probes holder, this work was challenged to achieve an fc as low as 6 GHz, which fully occupies the available area as shown in the next secti on. However, by allowing the balun to become somewhat larger than the probes holder, fc can be anticipated to become as low as 3 GHz. Note, there is less motivation to make Marchand baluns lower than fc = 3 GHz, because for such low frequencies, compact sized ferritetransformers can be used instead, which can operate from DC to 1 ~ 2 GHz. Figure 312. Crosssection of the propos ed coupled microstripTL structures. Using the proposed coupled TL structure, two types of Marchand baluns of fc = 6 GHz are realized using an 8 milth ick Rogers (RO4003) PCB, as shown in Figure 313. The top trace and the bottom trace are not only used as coupled TLs for the Marchandcoupling, but also as signalpath and GND for microstrip TLs before and after the Marc handcoupling; at the single PAGE 53 53 A B Figure 313. PCB layout of the proposed Marchand balun. A) TypeA. B) TypeB. PAGE 54 54 ended port, P3, the bottom trace is the signals pa th while the top trace is the GND, and for the differential ports, P1 and P2, as well as for the commonmode matching branch, the top trace is the signals path while the bottom trace is th e GND. Such a design provides convenient portinterfaces to coaxial cables, and enables the structure to be free from vias and bondwires, by which one can achieve high costefficiency and high reproducibility in manufacturing. Note that the commonmode matching branch for typeA uses a thinner trace than that of typeB and any other 50 traces. This is because of the finite length of the dual trace (along with their undesired coupling e ffects) that exists between th e Marchandcoupling and the chip resistors terminals. This makes the optimum characteristic impedance of the commonmode matching branch to be higher than its nominal 50 and this new thinner TL was chosen to be optimum with respect to achieving the broadest relativebandwidth. A B Figure 314. Proposed balun embedded probes. A) TypeA. B) TypeB. PAGE 55 55 The designed planar type Marc hand baluns are assembled w ith the conductive fixtures and embedded onto the onwafer probes as shown in Figure 314. The probe holder and probes tips are ones used by the commercial Dual Infi nity Probe series manufactured by Cascade Microtech Inc. 3.5 Measurement Results The balun embedded probes are measured using a dualthrough pattern that is connected to a dualprobe, as shown in Figure 315. The disp layed ports, P1 ~ P3, are measured 2 ports at a time using a 2port VNA, while the 3rd port is terminated. This is followed by a post measurement process that shifts the reference pha se plane, as shown in the figure. Finally, the full 9 mixedmode sparameters are calculated by combining all 3 combinations of such measurements and using Equation 225. Figure 315. Measuring balun embedded probes using a dualthr ough connected to a dualprobe. The measured mixedmode sparameters are shown in Figure 316. It shows wellbalanced signals at the fc = 6 GHz, which gradually degrades as they approach towards the sidebands, 3 GHz and 9 GHz. Although these im perfections become transparent through calibration, the effects of these undesired reflecti ons, as well as commonand crossmodes of the differential DUT, can degrade the accuracy of the measurement, as presented in Chapter 4. However, one can roughly estimate the m easurement bandwidth by using 3 dBrelativebandwidth as introduced in Section 2.3. The sdd21 = sdd12 of typeA and type B are shown to be PAGE 56 56 A B Figure 316. Measurement results of the propos ed balun embedded probes. A) TypeA. B) TypeB. PAGE 57 57 3 dB larger than the other sparameters at 3.25 GHz ~ 8.67 GHz and 3.43 GHz ~ 8.55 GHz, respectively. Hence, their center frequencies are respectively 5.96 GHz and 5.99GHz, and the resulting relativebandwidths are respectively 0.909 and 0.855. The measurement results showed that the proposed balun embedded probes can be used in differential measurement for br oad relativebandwidths, as long as the effects of the baluns are calibrated. The calibration pro cedure along with a new characte rization method for the balun embedded probes are presented in the following chapter. PAGE 58 58 CHAPTER 4 CHARACTERIZATION AND CALIBRATI ON FOR 3P ORT ERROR NETWORK 4.1 Introduction to 3port ErrorBox and its Characterization In the proposed balun embedded measurement strategy, the errorne twork (or errorbox), from each port of the VNA to the DUT, is 3por t rather than the conventional 2port. The calibration of such errorboxes is shown in [4.1] and [1.7]. These methods can efficiently extract the 4 mixedmode sparameters of interest (e ither the differentialmode or the commonmode, depending on the type of the 3 dBcoupler used for the measurements), out of the 9 mixedmode sparameters. However, it is also very important to extract the other remaining 5 mixedmode sparameters describing the imperfection of the 3 dBcoupler, because they contribute to critical measurement errors that can occur even unde r the most accurate calibrated conditions, as discussed in Chapter 5. Extracting the full 9 mixedmode sparamete rs of the errorbox is shown in [4.2]. However, its application is limited to measuring th e reflections of differential loads, and requires the use of 3 dB hybridjunctions that are capable of converting both differentialmode and commonmode, simultaneously. The general method to characterize a 3port errorbox that converts only to differentialmode or only to commonmode is to use a dualthrough pattern connected to a dualprobe. This is shown in Figure 41, for the case of balun embedded probes (Figure 13C). The dualthrough is a pattern availa ble in the impedancest andardsubstrate (ISS) made for dualprobes, and the Coa xial Cable is the same coax that will be used during the actual balun embedded measurement. The displayed ports, P1 ~ P3, are measured 2 ports at a time using a 2port VNA, while the 3rd port is terminated. This is followed by a postmeasurement process that shifts the reference pl ane, as shown in the figure. Finally, the full mixedmode sparameters are calculated by comb ining all 3 combinations of such measurement PAGE 59 59 as shown in Equation 225. However, this method cannot account for the errors associated with the imperfections of the dualthr ough pattern and dualprobe, and any errors that occur in the VNA itself. It also requires connecting and disconnecting of ports betw een each measurement, which compromises the accuracy. Figure 41. Full Characteriza tion of the 3port errorbox in the measurements using balun embedded probe. To overcome these problems, this work pr oposes a new set of ImpedanceStandardSubstrate (ISS) that can be used to efficiently characterize the full mixedmode sparameters of the 3port errorbox, which will be presented and verified in Section 4.2. The proposed method uses a pseudoinverse of an overdetermined matrix by which the extracted results are tolerant to errors that occur when measuring the impedan ce standards. Although the work focuses on balun embedded measurements, the same method can be applied to general onwafer measurements using 3 dBcouplers. Furthermore, by a minor va riation, the proposed method can be used to efficiently extract the full mixedmode sparameters of the 3 dBcoupler embedded probe itself, which becomes a valuable tool in the probes de velopment stage. The application for a Marchand balun embedded probe is shown in Section 4.3, and Section 4.4 shows th e calibration procedure using the 4 differentialmode sparameters of the extracted 9 mixedmode sparameters. 4.2 Proposed ISS and Extraction Algorithm The goal is to extract the full 9 mixedmode sparameter of the 3port errorbox, from the VNAs ports to the tip of the balun embedded probes. As shown in this section, this is done by PAGE 60 60 extracting the full 9 singleended sparameters using the proposed ISS, and than mathematically converting them into the full 9 mixedmode sparameters, which is basically a variation of the conventional method used for singl eended 2port errorboxes [4.3]. 4.2.1 Proposed ISS The circuitschematic of the proposed ISS is shown in Figure 42A. It consists of 9 patterns of dualloads for P1 and P2, and 1 patt ern of through (thru) which connects them. The 9 dualload patterns are labeled with two lettered acr onyms, where the first and second letter respectively denote the load of P1 and P2, and the letters S, O, and M, respectively represent short, open, and matched. It is assumed that the two ports are well isolated in A B Figure 42. Proposed impedancestandardsubstrate (ISS). A) Ci rcuit schematic. B) Locations on the reflection plane. PAGE 61 61 the ISS (less then 32dB up to 10 MHz ~ 40 GH z), which can be achieved by placing a GND strip between the two landing pads of P1 and P2 Figure 42B shows the locations of the 9 dualload patterns in a reflection plane where its axis X and Y are the reflectioncoefficients at P1 and P2, respectively. It shows that the 9 patterns are equally spaced among themse lves, so that all of the patterns produce well distin ct dualreflections at high frequencies. The proposed ISS is designed to be applicable for 100 um ~ 150 um pitched GSSG (GNDSi gnalSignalGND) probe tips, and its prototype is manuf actured by Cascade Microtech Inc., which is a variation of their commercial ISS (P/N 129246) made for dualprobes. 4.2.2 Required Measurements Two sets of measurements ar e required in using the proposed ISS, as shown Figure 43. The first set, Figure 43A, characterizes the impe dances of the patterns so that they become known dualloads. Hence, the pa tterns are measured using a dualprobe that is calibrated up to planea. For 9 dualload patterns, the measured s11 and s22 are respectively stored in variables A B Figure 43. Required measurements for the prop osed extraction algorithm. A) Measuring ISS only. B) Measuring ISS through errorbox. PAGE 62 62 Xi and Yi,, where the index i = 1 ~ 9 corresponds to 9 dualload patterns. For the thru pattern, the measured s11, s22 and s21 (= s12) are respectively stored in X10, Y10, and Z10. Note, if this proposed algorithm becomes systematically inco rporated into the VNA, this first set of measurements can be avoided by simply typing in the calcoefficients of the dual patterns. The second set of measurements, Figure 43B, characterizes the raw reflections of the patterns through the 3port errorbox. Therefore, the measur ements are done without calibration. The measured reflections are stored in variables Ri, where i = 1 ~ 10 corresponds to the same index used in the first set. 4.2.3 Extracting Sparameters of the 3port ErrorBox The flowgraph of the singleended sparame ter for the 3port errorbox and the ISS is shown in Figure 44. The goal is to extract the unknown sparameters of the 3port errorbox (the es which are substituted by a ~ f and g for convenience), using the known sparameters of the ISS ( Xi, Yi, and Zi) and the measured reflections (Ri). For the 9 dualload patterns with Zi=1~9 = 0, Ri=1~9 can be expressed using Masons Rule [4.4], as shown in Equation 41. By rearranging the terms and writing for each of the i s, this can be expressed in a matrix from, as shown in Equation 42. Since M is a 9 x 7 overdetermined matrix, its pseudoinverse (M+) is used to solve for X = M+R, which is the unique solution that makes the error of RMX2 minimum [4.5]. For the thru pattern with Zi=10 0, R10 can be expressed using Masons Rule, as shown in Equation 43, which is rearranged in Equati on 44 to achieve separate expressions for gf and c. From the solved X from Equation 42 and the expression of gf and c shown in Equation 44, the unknown a ~ f and g can be extracted by the following procedure. First, a b and d are obtained from the first 3 elements of X. These are then used in the next 3 elements X, from which, g2, f2, and c2 are obtained. To extract their sign information, the obtained a b d g2, f2, and c2 are used in 7th elements of X to solve for gfc Finally, by inserting the obtained a b d g2, PAGE 63 63 Figure 44. Flowgraph of the I SS measurement through the errorbox. f2, c2, and gfc into Equation 44, the signs of gf and c can be determined. Although, Equation 44 solves for the complete gf and c, only the sign information is bei ng utilized. This is because the previously obtained g2, f2, and c2 are expected to be more accurate due to their superior tolerance to measurement errors that occur while measuring the ISS. This is discussed in detail in the following section. The sign of gf only offers the relative signs between g and f Even with measuring more Ris of known patterns, it is fundamentally im possible to extract th e individual signs of g and f because the reflection path will always consists of g2, f2, or gf While the relative sign of g and f is sufficient to characterize the errorboxs mixedmode sparameters, there remains an uncertainty of 180 x N degree (N = any integer) phaseshift in the errorboxs ssd 21 (= sds 12) and ssc 21 (= scs 12). However, the procedure presented in this section is only show n for the 3port error PAGE 64 64 box leading to VNAs port1. Therefor e, at this point, it become s only applicable for calibrating and measuring a dualreflection at V NAs port1, where the effects of 180 x N degree phaseshift cancel out. This 180 x N degree uncertainty only becomes a problem for a full 4port case, when measuring the DUTs mixedmode forward and reverse transmission. In such case, 180 x N degree uncertainty does not always cancel out be cause the N in the erro rbox attached to VNAs port1 may not necessary be the same as that of VNAs port2. The same problem also exists in the conventional singleended 2port calibration, and it is solved by measuring both errorboxes backtoback via a known through pattern [4.3]. The same algorithm can be applied for this work by using dualthrough patterns, which are ava ilable in ISSs made for general dualprobes, such as Cascade Microtech ISS P/N 129246. ii i i ii i i iYXcabYbXa YXbfaggfcYgXf dR 2 2 2 2 21 2 (41) abddcbfaggfc abc adf bdg d b a R R R YXRYXXYRYRX YXRYXXYRYRX YXRYXXYRYRX222 2 2 2 9 2 1 9999999 9999 2222222 2222 1111111 11112 ; 1 1 1 ; X R M XMR (42) 2 10 1010 2 10 10 10 2 10 1010 2 2 10 10 2 10 2 102 1 2 2 ZYXcabZfYbXa ZYXbfaggfcZgfYgXf dR (43) PAGE 65 65 2 10 1010 2 2 10 2 10 2 10 10 2 10 10 10 10 2 22 102 2 ZYXgfcbfagdRcab YgdRbXfdRadR Z gfcdRc fgdRgfc c gf (44) 4.2.4 Verification and its Comparison to the Use of 7 DualLoad Patterns Using the MATLAB program, the proposed algorithm is put into test for a set of known sparameters, and compared with an alternat ive approach of using minimum number of measurements of the dualload patterns, which is 7 corresponding to the 7 unknown elements in the vector X. The resulting 7 x 7 matrix is shown in Equation 45 and its matrix equation is shown in Equation 46, from which the solution becomes X = M1R. Note that i = 1 ~ 7 can represent any of the 9 dualload patterns. 1 1 17777777 7777 2222222 2222 1111111 1111 YXRYXXYRYRX YXRYXXYRYRX YXRYXXYRYRXM (45) 7 2 1 ; R R R RXMR (46) The sparameters used for this verificati on are shown in Table 41. For the proposed approach of using 9 dualload patterns, the patterns SO, MO OO, SM, MM, OM, SS, MS, and OS, are assigned sequentially to i = 1 ~ 9. For the alternative approach of using 7 dualload patterns, the patterns SO, MO, SM, MM, OM MS, and OS, are assi gned sequentially to i = 1 ~ 7. In order to emulate measurement errors, the Ris were added with a rando m variable that ranges of 0.005 ~ 0.005 with uniform probability dist ribution. The rootmean square (RMS) of the errors of the extracted a ~ f and g are obtained by r unning the program 104 times, and the results PAGE 66 66 are shown in Table 42. It show s that the proposed approach of using 9 dualload patterns is less susceptible to measurements errors, compared to alternative approach of using the minimum 7 dualload pattern. For one element, b ( e22 in Figure 44), the proposed method of using 9 patterns, showed approximately 5 times lower magnitude of RMS error compared to that of using the minimum 7 patterns. Table 41. Used sparameter va lues for simulation verification Variables for sparameters a b c d f g Used values 0.11 0.12 0.16 0.15 0.93 0.14 Table 42. RMS errors of th e extracted sparameter values Variables for sparameters a b c d f g Extraction using 9 patterns 0.0024 0.0368 0.0089 0.0017 0.0009 0.0072 Extraction using 7 patterns 0.0040 0.1815 0.0314 0.0029 0.0012 0.0092 4.3 Application to Marchand Balun Embedded Probe With minor variation, the proposed method can be used to extract the full mixedmode sparameters of the 3 dBcoupler embedded probes, which becomes a valuable tool in their development stage. This is done by calibrati ng up to planeb for the second set of measurements shown in Figure 43B. This is applied to a Marchand balun embedded probe shown in Figure 314B, where the extracted results are shown in Figure 45. In order to check reproducibility, the extraction pro cedure is repeated 9 times, wh ich are shown by the overlapping multiples lines. The results show that the extrac ted sparameters using the proposed method are in good agreement with that of previous method (symbol o) of using a dualthrough pattern connected to a dualprobe. 4.4 Calibration From the extracted 9 mixedmode sparameters, the 4 differentialmode sparameters are used for calibration, which is shown in this se ction. The measurement setup for a full 4port PAGE 67 67 A B C D E F G H I Figure 45. Extracted sparameters of a balun embedded probe (Figure 314B) using the proposed ISS and extraction algorithm (lines ) and their comparison with the previous approach of using a dualthough pattern connected to a dualprobe (symbol o); the multiple conjoining lines represent the repeated sets of measurements (total of 9 sets). A) sdd11. B) sds 12. C) sdc 11. D) ssd 21. E) sss22. F) ssc 21. G) scd 11. H) scs 12. I) scc11. balun embedded measurement is shown in Figure 46, where [s] is the differentialmode elements of [s]4 of the DUT, and [e1] and [e2] are differentialmode elements of [s]3 of the errorboxes. Along with VNAs noncalibrated measurement, [m], these are all 2 x 2 sparameter matrices, which is the case for the deembeddi ng procedure of the conventional singleended 2port calibration. The deembedding procedure begins with sw apping the ports of errorbox leading VNAs port1, as shown in Equation 47. This new [e1] is in cascaded connection to [s] and eventually PAGE 68 68 to [e2], which calls for the use of tparameters [4.6] as defined in Equation 48 and the conversion equations shown in Equation 49, where a s and b s are powerwaves propagating to and from the 2port network, respectively. Usi ng the tparameters, the measurement network can be described as Equation 410, where [s]t, [m]t, [e1] t, and [e2]t are the tparameters of [s], [m], [e1] and [e2]. This equation is rearranged into Equation 411, from which the errorboxes are be deembedded. Finally, the deembedded [s] can be achieved by the re verse conversion equation shown in Equation 49. Figure 46. Full 2port balun embedded measurement and their 2 x 2 differentialmode sparameter matrices; [m] is a 2 x 2 singleended sparameter matrix which is measured using a noncalibrated VNA. 11 11 1 11 1111 12 21 22 22 21 12 11 ee ee ee ee ][e [e1] (47) 2 2 2221 1211 1 1 a b tt tt b a (48) 11 12 11 11 11 21 21 21 11 21 22 211 det & det 1 t t t tt t ss s s s s t [s] s [t] (49) PAGE 69 69 ttt t[e2][s]][e1[m] (410) 1 1 tt t t[e2][m]][e1[s] (411) Form the extracted 9 mixedmode sparameters, the other 5 sparameters that are not used in the calibration are commonmode and crossmode sparameters. These can cause critical measurement errors, even under the most accurate calibration of the differentialmodes. The evaluation of these errors in re lation to extracted commonmode a nd crossmode sparameters of the 3port errorboxes are presen ted in the following chapter. PAGE 70 70 CHAPTER 5 EVALUATION OF ERRORS CAUSED BY COMMONAND CROSSMODES 5.1 Measurement Errors Caused by CommonModes and CrossModes In the proposed balun embedded measurem ent strategy and the calibration algorithm shown in the previous chapters, measurement erro rs will still exist even under the most accurate extraction and calibration of the 3port errorbox. These are due to the undesired commonmode and crossmodes (the conversi on between the differentialmode and commonmodes) of the embedded balun and the differential DUT. This chapter proposes a new algorithm that evaluates these errors, by which the users can convenientl y be informed of the measurements accuracy. Although it focuses on differential measurements where the errors are due to commonmode and crossmodes (CXM), the same procedure can al so be applied to commonmode measurements using embedded powersplitters, wh ere the errors are due to the differentialmode and crossmodes. The differential measurement setup and their commonmode and crossmodes errors are shown in Section 5.2. In Secti on 5.3, the proposed algorithm for evaluating these CXM errors is presented, along with the employed approximations. Finally, the verification of the proposed algorithm using a fullydifferential amplifier meas ured via Ratrace baluns [2.7] is shown in Section 5.4. 5.2 CommonModes and CrossModes in Balun Embedded Measurements The mixedmode sparameter flowgraph of the proposed measurement setup (Figure 46) is shown in Figure 51, where s, e 1, and e 2 are the mixedmode sparameters of the DUT, errorbox1, and errorbox2 respectively. These are represented by letters a ~ z in order to provide convenient notation in the next se ction. The dark lines are the differentialmodes and the lightgray lines are commonand crossmodes. In the ideal case, only the dark lines exist where the errorboxes can be calibrated out to give the accurate characterization of the DUTs 2 x 2 PAGE 71 71 differentialmode sparameters. However, in prac tice, the lightgray lines coexist providing additional paths. Hence, the extracted mixedmode sparameters of the DUT will be distorted with these errors cause by CXM, even under th e most accurate characte rization and calibration of the errorboxes differentialmodes. Figure 51. Mixedmode flowgraph for differential measurement using baluns. 5.3 Error Evaluation and the Used Approximations The goal is to evaluate the error of the calibrated 2 x 2 differentialmode sparameters of the DUT caused by the CXM. This starts with developing an approximate solution to the VNAs noncalibrated 2 x 2 sparameters that includes the effect s of the CXM of the errorbox and the DUT. The first approximation is that the two errorboxes are id entical, by which the primes (') of errorbox2 are dropped. Figur e 52 shows the mixedmode flowgraph of the VNAs noncalibrated s11 and s21. Although the differentialmodes (black lines) are split from the CXM (lightgray lines), the flowgraph is essentially the same as Figure 51, because the nodes ( N1~4 and the input node) and the errors ( e1~4, e11, and e21) are interlinked. The nodes of the flowgraph can be expressed as Equation 51, where there associated terms are shown in Equations 52 through 55, and [I] is a 6x6 identity matrix. The matrix [M1] is obtained by observing only the black lines, and the error terms in Equations 53 through 55 are obtai ned by applying Masons PAGE 72 72 Rule [4.4] on the lightgray lines. Finally, Equa tions 56 is obtained by inserting Equations 53 into Equations 51, where its first and last elements are respectively s11 and s21. The same procedure is applied for VNAs noncalibrated s22 and s12, as shown in Figure 53. It starts with the Equation 57, where the associated terms shown in Equations 58 through 510. The final Equations 511 is obtained by inser ting Equations 59 into Equations 57, where its first and last elements are respectively s22 and s12. Figure 52. Mixedmode flowgraph for VNAs noncalibrated s11 and s21. 21 4 3 2 1 11 21 4 3 2 1 11 1 21 4 3 2 1 11 0 0 0 0 e e e e e e S N N N N S f d S N N N N S M (51) PAGE 73 73 00000 00000 0000 0000 00000 00000 f a j h k i a f1M (52) 21 4 3 2 1 11 2 2 2 21 4 3 2 1 111 1 1 1 1 1 S N N N N S yg ycg ybgqwbtg xybgbtgn yzbcgbtcgr yzbgbtrg e e e e e eE E E1M (53) yzbbrbtE 211 (54) 0 1 1 1 0 0 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 0 0 1 1 1 02 2 2 2 2 2 2 2 2 2 2 2 2 2vybg brgp yzbcg brcgt ycg ybgm ubrg vybc brcp yzbc brtc yc ybcm ubrc wzpb vyqb brbpq vwbtb wzbc brcq ybcq wbtc uwzb ymqb ubrbq wbtbm znpb vxyb xbrbp vbtbn zbcn xbrc xybc btcn uznb xymb uxbrb btbmn zbcp vbtc zc yzbc btrc uzbc btcm zbgp vbtg zcg yzbcg btcgr uzbg btgmE1M (55) PAGE 74 74 yg ycg ybgqwbtg xybgbtgn yzbcgbtcgr yzbgbtrg f d S N N N N SE E 2 2 2 1 1 21 4 3 2 1 111 1 1 1 1 0 0 0 0 1E1M MI (56) Figure 53. Mixedmode flow graph for VNAs noncalibrated s22 and s12. 12 4 3 2 1 22 12 4 3 2 1 22 2 12 4 3 2 1 22 0 0 0 0 e e e e e e S N N N N S f d S N N N N S M (57) PAGE 75 75 00000 00000 0000 0000 00000 000002f a i k h j a f M (58) 12 4 3 2 1 22 2 2 2 12 4 3 2 1 221 1 1 1 1 1 S N N N N S zg zcg zbgnxbrg wzbgbrgq yzbcgbrcgt yzbgbrtg e e e e e eE E E2M (59) 0 1 1 1 0 0 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 0 0 1 1 1 02 2 2 2 2 2 2 2 2 2 2 2 2 2uzbg btgm yzbcg btcgr zcg zbgp vbtg uzbc btcm yzbc btrc zc zbcp vbtc xymb uznb btbmn uxbrb xybc btcn zbcn xbrc vxyb zpnb vbtbn xbrbp ymqb uwzb wbtbm ubrbq ybcq wbtc wzbc brcq vyqb wzpb vwbtb brbpq ybcm ubrc yc yz bc brtc vybc brcp ybgm ubrg ycg yzbcg brcgt vybg brgpE2M (510) PAGE 76 76 zg zcg zbgnxbrg wzbgbrgq yzbcgbrcgt yzbgbrtg f d S N N N N SE E 2 2 2 1 2 2 12 4 3 2 1 221 1 1 1 1 0 0 0 0 1EM MI (511) Note that the same soluti on for the VNAs noncalibrated 2 x 2 sparameters can be achieved by directly extracting the nodes matrix equation from the mixedmode flowgraph in Figure 51. This will result in an 11 x 11 matrix in correspondence to the 12 nodes less the input node. For the proposed method to be applicable to VNAs post measurement processes, fast calculation speed is essential. Howeve r, calculating the inverse of an 11 x 11 matrix can become too much overhead for the system to process at ea ch point of the swept frequency. Therefore, it becomes more beneficial to use Equations 56 and 511, since they onl y require calculating the inverse of a 6 x 6 matrix. The calculation time of the pr oposed post measurement processes is discussed in detail in the following section. The mixedmode sparameters ( a ~ z) for solving Equations 56 and 511 are obtained as follows. The errorboxes a ~ f and g can be are obtained by using the characterization method proposed in [4.2] for hybridjunctioned measur ements or by using the method proposed in Chapter 3 for onwafer balun embedded measur ements. The dualloads of the 4port DUT ( m n i j p q r, and t ) can be obtained using 2port measuremen ts as shown in Figure 54, which can be done fairly easily for both coaxialinterf aced and onwafer measurements. As a second approximation, the DUTs forward and reverse differential gains ( h and k ) are substituted with their results obtained through the balun embedded measurements where the 3port errorboxes are calibrated out using the method presented in Chapter 3. As th e third and final approximation, the other unknown CXM ( u ~ z) of the DUT are each substituted by complex random variables, PAGE 77 77 where their amplitudes range from 0.3162 ~ 0.3162 (where, 0.3162 = 10 dB) and 0.1 ~ 0.1 (where, 0.1 = 20 dB) for forward gains ( u w and y) and the reserve gains ( v, x, and z ), respectively, all with uniform probability distribution. The rando m phases range from ~ also with uniform probability distribution. This third approximation is assuming that the forward and reverse CXM gains are respec tively less then 10 dB and 20 dB. However, the user can change these numbers when given more information on the DUTs CXM, where the measurements accuracy will increase if the DUT is guaranteed to have lower CXM gains. A B Figure 54. Measuring dual reflections of the DUT. Using these mixedmode sparameters as inputs, the VNAs noncalibrated 2 x 2 sparameters are calculated using Equations 56 an d 511. The results are th en calibrated using the procedure presented in Chapter 4, which represent a 2 x 2 differential sparameter of a DUT for randomly generated complex variables for u ~ z. In order to find out how much u ~ z can contribute to the measurement, this process is repeated at least 100 times (each time using different random values for generated for u ~ z), from which the maximum and the minimum amplitude of each 2 x 2 differential sparameter are chosen. As shown in the next section, these anticipated maximum and minimum provide the quant itative information of the CXMs effects to the measurements, from which their accura cies can be efficiently evaluated. PAGE 78 78 5.4 Application to FullyDifferential Amplifier Using circuit sim ulations, the proposed method is put into test for a fullydifferential amplifier that is being measured using a Ratra ce type balun. The Ratrace type balun is shown in Figure 55. It is designed to have the center frequency, fc (= phasevelocity x c) of 6 GHz. In order to achieve large CXM, the delay paths electrical length and their characteristic impedances were purposely skewed from the displayed nominal values, where the resulting mixedmode sparameters are shown in Figure 56. The same is done for the fullydifferential Figure 55. Ratrace type balun; mismatches were randomly induced from the shown nominal values in order to achieve large CXM. Figure 56. Mixedmode sparameters of a Ratrace type balun shown in Figure 55. PAGE 79 79 amplifier which is shown in Figure 57. Each component is randomly designated to either be increased or decreased by 10 % from its nominal values shown in the figure. The resulting mixedmode sparameters of the fully diffe rential amplifier are shown in Figure 58. As shown in Figure 59, the 2 x 2 differential sparameters of the fullydifferential amplifier are measured using the ratrace bal un, and the effects of the ratrace balun are calibrated out. The noncalibrated sparameters (i ncluding the baluns) are shown in dashedblack lines and the calibrated sparameters (where the differentialmode networks of the baluns are calibrated out) are shown in solidblack lines. This is still off from the original sparameters (solidlightgray lines) due to the errors cause by the CXM of the balun and the DUT. Figure 57. Fullydifferential amplifier; 10% va riations were randomly induced from the shown nominal values in order to achieve large CXM. Since the original sparameters are not availa ble in the actual meas urement environment, the user cannot be informed of th e amount of errors that are associ ated with the measured results (solidblack lines). However, the user can be informed of the anticipated maximum and minimum sparameters, where their variations are caused by CXM. From this, the users are PAGE 80 80 efficiently informed of the measurement accuracy along with their measurement results. This is done by the proposed method of using Equatio ns 56 and 511 along with random complex variables for the unknown CXM of the DUT, as s hown in Figure 59. The anticipated maximum and minimum are respectively shown in symbols and The filled colors of the symbols, A B Figure 58. Mixedmode sparameters of the full ydifferential amplifier shown in Figure 57. A) Elements larger than 25 dBm. B) Elements lower than 24 dBm. PAGE 81 81 A B C D Figure 59. Differentialmode sparameters of the DUT; the lines represent the original (solidlightgray), measured (dashedblack), a nd calibrated (solidblack) sparameters; symbols represent the anticipated maximum ( ) and minimum ( ), using 102 (white), 103 (gray) and 104 (black) samples. A) sdd11. B) sdd 12. C) sdd21. D) sdd22. and represent the number of random comple x samples used, from which the maximum and minimum sparameters were chosen. The colors white, gray, and black, respectively correspond to using 102, 103, and 104 random complex samples, where the CPUs calculation times were respectively 3.8, 38.3, and 390.9 seconds, when using Intels 1.4 GHz Celeron Mobile Processor. The results show that the original and the calibrated sparameters are all well within the anticipated maximum and minimum sparameters. Note that the dBranges between the PAGE 82 82 anticipated maximum and minimum sparameters b ecome larger as the frequency approaches the sidebands of 6 GHz. This is due to the limited ba ndwidth of the ratrace type balun, where its CXM is minimal at the fc = 6 GHz, but gradually increases as it approaches the sidebands. As mentioned in the previously section, the dBrang es between the anti cipated maximum and minimum sparameters can be decreased if the DUT was respectively guaranteed with lesser forward and reverse CXM gains than 10 dB and 20 dB. So far, passive baluns were used for the proposed balun embedded measurement. Although, the Marchand balun can provide broad 3 dBrelativebandw idth, it is difficult to make this larger than 1, due to in the increase of CXM and their associated measurement errors. Therefore, in efforts to further increase the bandwidth of the proposed measurement strategy, active baluns are developed using a newly proposed combined cascode and cascade pair, as shown in the next chapter. PAGE 83 83 CHAPTER 6 ACTIVE BALUN USING COMBINED CASCODECASCADE CONFIGURATION 6.1 Introduction to Various Active Baluns Active balu ns are unidirectional converters be tween differential and singleended signals, as shown in Figure 61, where th e singleended and mixedmode sparameters are compared with that of a passive balun. In spite of their inabi lity for bidirectional conversion, as for the case of passive baluns, they are used fo r their large bandwidth, which is beyond what passive baluns can provide. The bandwidths upperend frequency of an active balun depends on the technologys Figure 61. Comparing singleended and mixedmode spara meters between passive balun and active balun, where 1 2 = 180. PAGE 84 84 speed, while the lowerend frequency can potentially extend to DC, when not considering the effects of the DCdecoupling capacitors in the ports. Such unbounded lowerend frequency enables active baluns to be realized in limited chipareas, which makes them the most suitable for Builtin Self Test (BIST) applications [1.9][1.11], as well as general differential circuits requiring compact sized broadband baluns. 6.1.1 Distributed Amplifier Type The distributed am plifier base d balun is shown in Figure 62. Similar to a conventional distributed amplifier, the input in P3 travels through a virtual transmissionline realized by the cascaded lumped LCnetwork (C is the parasi tic gate capacitance) where its characteristic impedance 1/(2 x sqrt(LC)) is equal to 50 and finally reaches P1. While the signals travel through the virtual transmissionline, each transist or generates an output signal at the drain, which is combined through another virtual tran smissionline realized by the cascaded lumped LCnetwork attached to the drain (C is the parasitic drain capacitance). The gain in each path can be designed to be 3 dB by maki ng the Ls lossy and controlling th e gain of each transistor. In a given CMOS or Bipolar process, the distributed amplifier conf iguration produces the largest bandwidth [6.1]. However, it occupies a fairly large area of at least 1 mm x 2 mm. Due to such large area overhead, it is seldom used in embedded test applications. Figure 62. Distributed am plifier type active balun. PAGE 85 85 6.1.2 Differential Amplifier Type A suitable approach in limited chipareas is the differential amplifier configuration [6.2], as shown ion Figure 63, which is most commonly used due to its large commonmode rejection. However at high frequencies, the two outputs b ecome unbalanced because two signals travel through different number of stages from the co mmon input one stage (commonsource of M2) for the inverting path and tw o stages (commondrain of M2 followed by commongate of M1) for the noninverting path. A series LCnetwork can be used to compensate for the mismatched phase [6.3][6.4], but this sacrifices the bandwidths lowerend frequency. Figure 63. Differential amplifier type active balun. 6.1.3 SourceDrain Output Configuration Matching the num ber of stages of can be achieved by using a sourcedrain output configuration [6.5][6.6], as show n in Figure 64. The unbalanced i nput at P3 is converted into balanced output to P1 (noninve rting sourceoutput) and P2 (invert ing drainoutput). This type of active balun is superior with rega rds to using a single transistor (M1), by which it becomes free from the magnitude imbalance caused by the mi smatches among multiple transistors in other configurations of active baluns However, other than its low dynamic range due to the required Vdsat of M1, it has some inherent critical problems, such as the requirement of a second gain stage and phase mismatch at high frequencies. PAGE 86 86 Figure 64. Active balun using s ourcedrain output configuration. The requirement of a second stage is invest igated in Figure 65, which is a sourcefollower with matched input and output (I/O). The maximum gain can be achieved by assuming that the currentsource is ideal. For Zs = 1/( gm(1+)) to be matched to 50 gm must be equal to 1/(50(1+)). Using this, along with v1 + = 0 and vi = 0 of matched case, the maximum s13 of the sourcedrain output ty pe balun can be expressed as Equation 61, which is shown to be always less than 1/2, and hence, less than the required gain of 1/sqrt(2) for baluns. Figure 65. Matched sourcefo llower for maximum forwardgain at low frequencies. 2 1 1 1 2 1 50 50/ 50/1 1 13 sm i izg v v v v s (61) The more critical problem is the imbalanced phase of the differe ntial output at high frequencies. Figure 66 shows the simplified ACequivalent circuit of the sourcedrain output configuration, where its forward gains to the source and the drain are respectively solved in PAGE 87 87 Equations 62 and 63. Practical values of the parameters in Equation 63 will make the enclosed first order term of s of the numerator to become positive. Using this sign information along with the fact that the last term its numerator is negative, one can see that Equation 63 has one positive and one negative zero. Therefore, Equa tion 63 has an additional pole and a negative zero when compared to Equation 62, where each produces an additional 45o / Dec decrease in the phase, compared to that of Equation 62. Figure 66. Simplified ACequiva lent circuit of the active ba lun using sourcedrain output configuration. 1 11m s gs mgs ig R sC gsC v v (62) d gd m s gs s m mgs m s gd gsgd iR sC g R sC R g gC g R CsCCs v v 1 1 1 1 12 2 (63) 6.1.4 CommonSource and CommonGate Pair Configuration The m ore promising method for achieving balanc ed phase at high fre quencies is to use commonsource and commongate pair [6.7][6.8], as shown in Figure 67. Using this configuration, the relative phase can maintain 180o at high frequencies beyond the first few poles. PAGE 88 88 However, a new challenge exists for matching th e input, due to its high parasitic capacitance at the two transistors (M1 and M2) which are accompanied by a thir d transistor from a currentsource for biasing M1. Figure 67. Active balun using co mmonsource and commongate pair. To overcome these problems, this paper pr oposes a new configuration of cascode and cascade pair using a shared input transistor, hence the name, combined cascodecascade balun (C3balun). This new configuration will be pr esented in detail in Section 6.2, and the measurement environment and the measurement re sults are respectively shown in Section 6.3 and 6.4. Furthermore, an attached low frequency feedback network is proposed in Section 6.5, which can improve the stability of the proposed circuits bias conditi on in future designs. 6.2 The Proposed Combined CascodeCascade Configuration The proposed C3blaun is shown in Figure 68, w here the transist ors transconductance are annotated in parenthesis. Th e cascaded noninverting path for s13 is combined with a cascoded inverting path for s23, using a common input stage transistor M3. Compared to the previous commonsource and comm ongate pair configuration, the proposed C3balun enables higher reverseisolation and a br oader frequency range for input matching due to the reduced parasitic capacitance at P3. The broadband input matching is further enhanced by dividing the PAGE 89 89 inputs 50 resistance into 22.6 and 27.0 where the remaining 0.3 is from the parasitic resistance of the 0.2nH inductor, which is th ere to achieve inductive peaking to maximize the bandwidths upperend frequency. The dividing of the 50 resistance reduces the input signal, thus requires the increases of the size of M3. Although this increases the gatecapacitance, a broader input matching can be ach ieved due to the separated 22.6 which is free from being shunted by the increased gatecapacitance. Figure 68. Proposed active balun using combin ed cascodecascade configuration (C3balun). The circuit contains no DCdecoupling capaci tors, other than the ones at the ports terminals. This is to best extend the baluns ba ndwidth on its lowerend frequency as close to DC as possible. However, from the design and optim ization standpoint, this also means that the selection of biaspoints is not as convenient. The biggest challe nge is deciding on the bias point PAGE 90 90 for v3, since it influences all three transistor s, simultaneously. For this reason, 4.7 is introduced to enable additional design freedom, so that bias point of M2s source, v 3, can be chosen to be different from that of M3s drain and M1s gate, v3. The biaspoints are optimally chosen for the circuit to operate up to 5 dBm of the input power, while maintaini ng all transistors to operate in the saturationmode and remain safe from gatedrain and gatesource oxide breakdown. The designed biaspoints and the simula ted AC voltage swings (peak valu es) are shown in Table 61. Note such optimization has resulted in large bias es for VDDs as high as 4.2 V. However, these values can be reduced if the desi gn is aimed for less operational power. The simulation result of the proposed C3balun is shown in Figure 69. It shows that the two forward gains maintain 3 dB with opposite polarities up to 30 GHz. All other undesired sparameters, such as reflections and isolations, are all shown to be less then 10dB up to 30 GHz. Table 61. C3baluns intern al bias points and AC volta ge swings at 5 dBm input Nodes DC bias points AC voltage swi ngs (peak) Result voltage swings vs 0.56 V vi 1.00 V 0.31 V 0.69 ~ 1.31 V v3 1.05 V 0.31 V 0.74 ~ 1.36 V v3 1.16 V 0.25 V 0.91 ~ 1.41 V v2 2.36 V 0.40 V 1.96 ~ 2.76 V v1 1.39 V 0.40 V 0.99 ~ 1.79 V A B C Figure 69. Simulation results of the proposed C3balun. A) Magnitude of s13 and s23. B) Phase of s13 and s23. C) Other undesired sparameters. PAGE 91 91 The proposed C3balun is manufactured us ing the IBM 8HP 130 nm BiCMOS process. The layout is shown in Figure 610 and the manu factured chip is shown in Figure 611. The dummy pads are placed for calibrating out the pads effects, as it will be presented in the next section. As shown in the figure, by repl acing the 0.2 nH lineinductor into an shaped inductor, one can anticipate that the compacted version of the la yout can be as small as 0.2 mm x 0.2 mm (without including the pads), which make s the proposed active balun to become suitable for BIST applications, as well as general diffe rential circuits requiri ng compact sized broadband baluns. The interconnect and routing of the fi ngers of the NMOS is shown in Figures 612 through 614, where M#, MQ, AM are the metal laye rs and G, S, D respectively denotes that the routing is to the gate, source, drain. Figure 610. Chip layout of the proposed C3blaun in IBM 8HP 130 nm BiCMOS process. PAGE 92 92 Figure 611. Chip photo of the proposed C3 blaun in IBM 8HP 130 nm BiCMOS process. Figure 612. Layout for NMOS interconnect; M3 of the proposed C3balun. Sub_Con denotes substrate contact. PAGE 93 93 Figure 613. Layout for NMOS interc onnect; zoomin area of Figure 612. Figure 614. Layout for NMOS interc onnect; zoomin area of Figure 613. PAGE 94 94 6.3 Measurement Environment The proposed C3balun is m easured with R ohde & Schwarzs ZVA40 which is a truedifferential 4port vector networ k analyzer (VNA) using phase controlled balanced differential sources and receivers [1.5][6.9 ]. The onwafer RF probing an d calibrations are done using Cascade Microtechs Infinity Probe Series (GSG for P3 and GSSG for P1 and P2, where G stands for ground and S stands for RF signal) and their ImpedanceStandardSubstrate (ISS) P/Ns 005016 (for GSG) and 12924 6 (for GSSG). The DC biasing is done using GGBs DC probes with bypass chip capacitors embedded at the tip and the rear to provide stable biases through out the frequency range of 10 MHz ~ 40 GHz, as shown in Figure 615. These capacitors are embedded because the onchip cap acitors cannot be made large enough to bypass the frequency components less than 1 GHz. Figure 615. Threepin DCprobe with embedded bypass capacitors. In calibrating for a 3port measurement, a new challenge emerges in the through measurements between the GSG an d the GSSG. This is because no grounds (Gs) should be left floating during the through measurements, in or der to achieve accurate calibrations up to tens of GHz. This is solved by using unknown th rough open short match (UOSM) PAGE 95 95 algorithm [4.3][6.10]. By tilted GSG through patter n of the ISS P/N 005016, as shown in Figure 616, one can measure the unknown through betw een GSG (P3) and the GSSG (P1 or P2). A B Figure 616. Using GSGs through patter n for unknownthrough measurements. A) Unknown through between P3 and P1. B) Unknown through between P3 and P2. Another challenge is the post m easurement process of calibrating out the pads effects, as shown in Figure 617. The measured sparameters of the active balun with pads ( [s]D) and those of the pads obtained by measuring the dummy pads shown in Figure 610 ([s]P), are respectively converted into yparameters of [y]D and [y]P. From this, the yparameters of active balun (without pads) can be obtained by [ y]A = [y]D [y]P, which can be converted back to its sparameters, [s]A. The conversion between the sparameters and yparameters of a 3port network, can be derived from their definitions as show n in Equations 64 and 65. The relationship between the sparameters powerwaves, and the yparameters vs and i s (where it is defined to direct inwards to the network) are shown in E quations 66 and 67. By inserting Equation 66 into Equation 64 and inserting Equation 67 into Equation 65, th e conversion equations between the two parameters can be derived as Equati ons 68 and 69. PAGE 96 96 A B C Figure 617. Full 3 x 3 sparameter and yparameter matrices of A) active balun with pads, B) pads only, and C) active balun without pads. 3 2 1 3 2 1 333231 232221 131211 3 2 1 a a a a a a sss sss sss b b b s (64) 3 2 1 3 2 1 333231 232221 131211 3 2 1v v v v v v yyy yyy yyy i i i y (65) k k k k ki v z z z z b a 2 2 1 2 2 10 0 0 0 3~1 (66) k k k k kb a zz zz i v0 0 0 0 3~111 (67) sIsIy1 01 z (68) yIyIs 0 1 0z z (69) PAGE 97 97 6.4 Measurement Results The singleended measurement of the proposed C3blaun is shown in Figure 618. The forward gains are 1 dB ~ 1.5 dB higher than that of the simulation. These are most possibly due to increased load resistances caused by the paras itic routing resistance, which can be amended in future designs by post layout simulations. The phase of the forward gains are shown in Figure 619, where their relative phase maintains 180 ( 10) up to 30 GHz. This is well beyond the point in which the gain starts to decrease, which ca nnot be achieved using th e previous sourcedrain output type active baluns, as pres ented in Section 6.1.3. The othe r undesired sparameters such as the reflections and the isolations ar e all less then 10 dB up to 30 GHz. The measured mixedmode sparameters ar e shown in Figure 620 and Figure 621 for the input power of 25 dBm and 5 dBm, respectiv ely. The forward differential gains in the two graphs show virtually the same results, which proves that the proposed C3blaun maintains its linearity for the inpu t as high as 5 dBm. The other undesired sparameters such as re flections and isolations are all under 10 dB up to 30 GHz, except for sdd11 during the frequency range 0. 4 GHz ~ 1 GHz and 20 GHz ~ 30 GHz, where it becomes as high as 6.1 dB. This is due to the constructive interference of the singleended reflections shown in Figure 618, which was neglected during the simulationlevel design stage of monitoring only the single ended sparameters. This can be solved in the future designs by monitoring the mixedmode sparamete rs as well, during the simulationlevel design stage. Table 62 shows the accuracies of the forwar d gains for various bandwidths. This shows that the proposed C3balun can be used directly with high ac curacy up to 10 GHz, and with moderate accuracy up to 17 GHz. However, if the errors caused by the baluns imperfections can be calibrated out, the proposed C3balun can be used up to 30 GHz. However, as discussed in PAGE 98 98 Figure 618. Measured magnitude of the singleended sparamete rs of the proposed C3balun at the input power of 25 dBm. Figure 619. Measured phase of the singleended sparameters of the proposed C3balun at the input power of 25 dBm. PAGE 99 99 Figure 620. Mixedmode sparameter measurem ent of the proposed C3balun at 25 dBm input. Figure 621. Mixedmode sparameter measurem ent of the proposed C3balun at 5 dBm input. PAGE 100 100 Table 62. Forward gains of C3balun for the input power of 25 dBm ~ 5 dBm Bandwidth  dB( s23) dB(s13)  [dB] ( s23) ( s13) [deg] dB( sds 12) [dB] DC ~ 10 GHz < 1.1 173 ~ 184 1.5 ~ 1.8 DC ~ 17 GHz < 1.8 170 ~ 184 2.7 ~ 1.9 DC ~ 30 GHz < 9.4 170 ~ 188 6.8 ~ 1.9 Chapter 4, applications beyond 30 GHz are not r ecommended due to the increase in the common and crossmode errors of the balun, where th ey can cause critical measurement errors, even under the most accurate calibration conditions. For the noise measurements, it is important to note that baluns must be characterized with differential noise rather then the conventional singleended noise, in or der to well describe circuits performances accordance to its applicat ions. Unfortunately, this cannot be obtained by mathematically combining the noise performances at each port, because their randomness cannot account for the relative phase and magnitude of th e differentialport. However, ZVA40 offers a Figure 622. Noise measurement of the proposed C3balun; symbols and O represent differentialmode and commonmode, respectively, where the filled symbols are the measured noise and the unfilled symbols are the VNA systems background noise. PAGE 101 101 spectrum analyzer mode, by which a truediffere ntial output powers can be measured as shown in Figure 622. Each frequency poi nt is plotted with the average value obtained from repeated noise measurements of 26 times. Symbols and O filled in gray respectively represent the output powers differentialmode and commonm ode, at zero input (terminated with 50 ). This is compared with the unfilled symbols, which represent the systems background noise of the ZVA40. This comparison shows that the measured noises (the filled symbols) are only valid roughly in frequency range of 0.2 GHz ~ 20 GHz. Within this valid frequency range the proposed C3balun showed low differential noise of less than 95 dBm. Note that in certain frequency range clusters, the differentialmode is shown to be at least 10 dB higher than that of the commonmode, which cannot be obtained by mathematically co mbining singleneeded noise measurements. 6.5 LowPass BiasFeedback Networ k for Stable Bias Conditions The internal bias points of the proposed C3bal un have significant a ffects to the circuits overall performances, especially on the gain and the dynamic range. However, minor process variations of the transistors will result in altern ate bias points, which can significantly change the transmission gains of the circuits. Therefore, developing a lowpass biasfeedback mechanism by which the circuit can maintain stable bias conditions regardless of the proce ss variations is one of the most important tasks for the proposed C3baluns future design. The lowpass biasfeedback network is shown in Figure 623, where the drain currents of ID1 (for M1) and ID2 (for M2 and M3) are matched to 17.12 mA. Despite the process variations of the transistors, the matching of the drai n currents are achieved by the attached lowpass feedback network; the lowere nd terminals of the two 62.9 resistors are connected to vip and vin, where their DC values tends to match each other (vip @ DC = vin @ DC) due to the large low PAGE 102 102 Figure 623. C3balun with network for stable biasing. frequency gain of the loop formed by attached lowfrequency amplifier (18 dB loop gain from vip vout sourcefollower of M2 commonsource of M1 back to vip). The circuit diagram for the lowfrequency amplifier is shown in Figure 624. The matching of the drain currents enables the matching of th e transconductances of M3 and M1, which results in the matching of s13 and s23. The lowpass biasfeedback network only controls the matching of s13 and s23 and not their values, which need to be maintained at 3 dB each. Since the values of the matched s13 and s23 depends on the matched bias curr ents of ID1 and ID2, these bi as currents need to be well controlled. This is done by IREF of the attached selfbiasing ci rcuit, as shown in Figure 625, which delivers VREF to the proposed C3balun. The selfbiased IREF is independent of VDD as shown in Equation 610, where VTH10 is the threshold of M10 and B10 is from the large signal equations for a shortchannel NMOS tr ansistor operating in saturation, IREF = B10( VREF VTH10). PAGE 103 103 Figure 624. Low frequency amplifier used for lowpass biasfeedback network in the proposed C3balun. Figure 625. Thresholdreferen ced selfbiasing network used in the proposed C3balun and the attached lowpass biasfeedback network. 1 9410 10 B V ITH REF (610) PAGE 104 104 Note that in Figure 623, the us ed C3balun is slightly modified from its previous version. The modification is done to use constant VDD (3.58 V) and also to accommodate for the increased parasitic capac itance associated with the attached selfbiasing circuit and the low frequency amplifier. This modified C3balun is designed using no inductors and operates in the frequency range from 10 MHz up to 10 GHz with the maximum input power of 0 dBm. However, the upperend frequency is expected to increase at least up to 17 GHz (as shown in the measurements of the previous design), by using onchip inductors (connected in series with the 94 in the selfbiasing ci rcuit shown in Figure 624), and al so by lowering the maximum input power to be less than 0 dBm. Further increase in the upperend freque ncy can be achieved by sacrificing the lowerend frequency, allowing one to use internal DC blocking capacitors by which the transistors operational biaspoints can be chosen independently from each other. The overall performances of the C3balun with the attached biasing network are shown in Figure 626, where the 3 dB bandwidth is up to 10 GHz. This figure also presents the stability response for the feedback branch IProbe shown in Figure 623, where the DC loop gain is 18 dB and the phase margin is 60 degrees. The large DC loop gain enables the two bias points at vip A B C Figure 626. Overall performances of the C3balun the attached biasing network. A) Magnitude of the sparameters. B) Phase of the s13 and s23. C) Stability response. PAGE 105 105 and vin to be matched, which results in the matched s13 and s23, as shown in Table 63. The results show that despite the 2 % process variations in M1 and M2, the ID1 and ID2 maintains their values with in 0.35 %, wh ich results in the small change in the transmission gain of less than 0.36 dB. Table 63. Change of performances of the proposed C3balun due to process variations Operation 2% decrease in M1 2% increase in M1 2% decrease in M2 2% increase in M2 ID1 [mA] 17.13 mA 17.11 mA 17.09 mA 17.15 mA s13 @ 0.1 GHz 3.12 dB 2.87 dB 2.81 dB 3.17 dB ID2 [mA] 17.15 mA 17.09 mA 17.12 mA 17.12 mA s23 @ 0.1 GHz 2.99 dB 3.02 dB 3.03 dB 2.98 dB s23s13 @ 10 GHz 187.60 187.81 187.76 187.77 6.6 Summary and Applications In efforts to further increase the measur ement bandwidth of the proposed measurement strategy, a new active balun is proposed which operates with the input po wer as high as 5 dBm, and the bandwidth up to 17 GHz, where the imbalan ce of the differential output was less than 1.8 dB in amplitude and less then 10 degrees in ph ase. The solution for stable biasing is also proposed by attaching a lowpass biasfeedback ne twork. With the develo pment of a calibration algorithm for unidirectional errornetworks, the proposed active balun is anticipated to become a promising solution for the proposed measurement strategy, due to their large bandwidth and compact size (as small as 0.2 mm x 0.2 mm), which are far be yond what passive baluns can provide. Such characteristics also make the propo sed active balun to become most suitable for BIST applications as well as general circu its requiring compact si zed broadband baluns. PAGE 106 106 CHAPTER 7 CONCLUSION The conventional 2port VNAs were used for m easuring 4port differential circuits, where each port was embedded with a balun, either using external baluns, onchip baluns, or baluns integrated in onwafer probes, as shown in Figure 71. The potential of this proposed measurement strategy need not be confined to VNAs. It can be applied to virtually all singleended equipments operating in the frequency doma in (such as, signal generators and spectrum analyzers) to be used for measuring differential circuits, which enables them to be free from post measurement processes of mathematical calc ulations for achieving virtualdifferential measurement results. Three major topics for the development of the proposed measurement strategy are listed below Figure 71. Figure 71. Proposed balun embedded measurement for differential circuits. Compact sized broadband baluns Algorithm for calibrating the eff ects of the embedded baluns Evaluation of the measurements errors cause by the baluns imperfections Mixedmode sparameters, as reviewed in Chapter 2, were used throughout the design and the characterization in this work. The SPICEbased extraction of the mixedmode sparameters [7.1][7.2] were especially useful, b ecause it allowed one to examine the relationship PAGE 107 107 between the extracted results and the circuits ope ration. Furthermore, the transient response of the SPICEbased extraction enabled the simulation to account for the circuits nonlinear effects [7.1][7.2]. The developed compact sized broadband baluns were shown in Chapter 3, which were realized using planartype Marcha nds configuration [7.3]. Such c onfiguration was chosen for its large relativebandwidth and compact structure. To achieve high performances, the optimum values for the differentialand commonmode characteristic impedances of the Marchand coupling were analytically derived using general transmissionline theories. For the case of symmetric Marchand baluns, these values were shown to be 58.58 for differentialmode and 85.36 for commonmode. In order to achieve such large coupling, a new coupling structure was proposed using a doublesided singlelaye r PCB surrounded by conductive fixtures. Large coupling was easily achieved in this structure, because the majority of the electromagnetic field propagates inside the PCBs substr ate of high dielectric constant ( r = 3.38) for differentialmode, while that of the commonmode propagates in air ( r = 1). Two planartype Marchand baluns were designed using alternativ e layout arrangements. Both de signs were integrated with commonmode matching branch in order to mini mize the errors associated with the commonand crossmodes. Finally, the designed baluns were assembled onto the onwafer probes. Using a dualthrough pattern conn ected to a dualprobe, the measur ement results showed large 3 dBrelativebandwidths of 0.909 and 0.855. In Chapter 4, a new set of ISS and an extr action method were proposed for characterizing the 3port errorbox in 3 dBcoupl ed (including baluns) onwafer measurements [7.4]. The proposed method fully extracted all 9 mixedmode sparameters of the 3port errorbox, where in the differentialmode measurements, the 4 differe ntialmodes were used for calibration, and the PAGE 108 108 remaining 5 commonand crossmodes were used for evaluating the measurement errors. This method required less work compared to the pr evious method of using a dualthrough pattern connected to a dualprobe, and it is anticipated to be more accurate because it avoids the reconnections of the coaxes leading to the VNA and avoids the errors associated with the imperfection of the dualthrough pattern, dualprobe, and VNA itself. The proposed method was also shown to be more tolerant to measuremen t errors that occur when measuring the ISS, because it used the pseudoinverses of overdetermined matrices. The proposed ISS was manufactured by Cascade Microtech Inc., and it was put into test for a Marchand balun embedded probe, where the extracted results show ed good agreement with that of the previous approach. A new evaluation method for the measurement errors cause by the baluns commonand crossmodes (CXM) [7.5] was shown in Chap ter 5. The proposed evaluation method used random variables to account for the unknown parame ters of the differential DUT, and displayed the anticipated minimum and maximum of the sparameters that can result under the pseudoworst conditions of the measurement errors caused by CXM. It was shown that the proposed method can be used in post measurement processes, by which the users can be conveniently informed of the measurements accuracy. The verification of the proposed algorithm was done for a fullydifferential amplifier that was bei ng measured through the Ratrace type baluns. The results showed that the DUTs original and the calibrated 2x2 differential sparameters were all well within the anticipated minimum and maxi mum sparameters provided by the proposed method. In efforts to further increase the bandwidth of the proposed measurem ent strategy, active balun were developed operating up to tens of GHz in limited chipareas, as shown in Chapter 6 PAGE 109 109 [7.6]. With the development of a calibration algo rithm for unidirectional errornetworks, this is anticipated to become a promising solution for the proposed strategy, due to their large bandwidth and compact size, which are far beyo nd what passive baluns can provide. The newly proposed active balun used a cascode and cascade pa ir with a shared input transistor, hence, was named as the combined cascodecascade balun (C3balun). The circuit cont ained no internal DCdecoupling capacitors, so that the bandwidths lowerend freque ncy was only limited by the DCdecoupling capacitors at the por ts interfaces. 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PAGE 115 115 BIOGRAPHICAL SKETCH Kooho Jung received the BS and MS degrees in electrical engineering from Hanyang University, Republic of Korea, in 1997 and 2001, respectively, where he had m ajored in device physics for semiconductor opticaldevice under the supervision of Dr. Jongin Shim. He received the Ph. D. degree in electrical engineering from the University of Florida, majoring in passive and active broadband Baluns and RF calibration/measurement theories. In 20012002, he was an associate engineer at Giga Electronic System Lab (National Lab), Republic of Korea, where he worked on RF toOptic Link and circuit modeling for optical devices. Concurrently, he had lectured in electr omagnetics, electronic circuits, and engineering mathematics at Kyungmin College. In 19992000, he served as the S4 NCOIC during his mandatory military tour at the 102nd Military Intelligence, 8th US Army, stationed in Republic of Korea, where he received 4 medals/awards from the Republic of Korea Army and the United States Army. Dr. Jungs research interests also in clude RF CMOS poweramplifiers and electromagnetics/circuitmode ling for passive devices. He received the Telecommunication National Scholarship in 20022006, from the Mi nistry of Information and Communication, Republic of Korea, and was awarded Fello wship from Texas Instruments in 2004. 