Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits

Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits


Material Information

Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits
Physical Description:
1 online resource (131 p.)
Puligundla, Sudeep
University of Florida
Place of Publication:
Gainesville, Fla.
Publication Date:

Thesis/Dissertation Information

Doctorate ( Ph.D.)
Degree Grantor:
University of Florida
Degree Disciplines:
Electrical and Computer Engineering
Committee Chair:
Eisenstadt, William R.
Committee Members:
Bashirullah, Rizwan
Harris, John G.
Welt, Bruce A.


Subjects / Keywords:
amplifiers, architecture, built, delay, embedded, high, in, indicators, limiting, line, logarithmic, samplers, signal, snapshot, speed, strength, test, vernier
Electrical and Computer Engineering -- Dissertations, Academic -- UF
Electrical and Computer Engineering thesis, Ph.D.
Electronic Thesis or Dissertation
bibliography   ( marcgt )
theses   ( marcgt )
government publication (state, provincial, terriorial, dependent)   ( marcgt )


Over the past decade, advancements in areas of semiconductor device physics, IC manufacturing and integration technologies on silicon have considerably increased the operating frequencies (ft) of transistors in the deep sub-micron regime. This enabled design engineers to design circuits that operate at high frequencies and use high-speed clock signals, both leading to increased signal-integrity problems for test engineers responsible for testing and validating integrated circuits. While the design community is able to push the design envelope far into the future, production IC test equipment has not kept pace with test requirements of high-speed, integrated wireless and wired communications designs. This explosive improvement of design performance has made testing of high-speed analog/mixed-signal circuits very challenging, particularly under the constraints of high quality and low price. In order to perform effective signal analysis and tests on such high frequency on-chip signals, one should be able to export those signals off-chip. However, exporting high-frequency on-chip signals off-chip without degrading the signal quality of the signals is not easy. A less attractive solution to this problem is to replace low cost testers with very expensive Automatic Test Equipment (ATE) systems and measurement equipment such as pico-probes and E-beam probes. The electronics industry is ready to welcome any solution that can substantially reduce the cost and time involved in testing its integrated circuits. Embedded test or Built-in-Test is a potential solution to face the challenges posed to the test community in the high-frequency domain. This method helps to keep up with the pace of the growing complexity of tests. Embedded test reduces the time to production without increasing the test cost and enables the use of low-cost testers, already on the factory floor, efficiently. However, there is some increase in chip die area and production chip cost. The fundamental idea in this solution is to move some of the external high-speed and high-bandwidth test functions on to the chip. This move, however, is not that simple, and still is in the development stage. This work involved development of some efficient test circuitry that could reside along with the Device-Under-Test (DUT) on the same die. These embedded test circuits help in extracting useful information from high-frequency on-chip signals and converting them to low-frequency (base-band) signals for easy transfer of information off-chip for post processing on an external, low cost, low frequency ATE. On-chip signal shape capturing circuits using high-speed samplers and on-chip signal strength measurement circuits were developed that can be used in embedded test of mixed-signal integrated circuits.
General Note:
In the series University of Florida Digital Collections.
General Note:
Includes vita.
Includes bibliographical references.
General Note:
Description based on online resource; title from PDF title page.
General Note:
This bibliographic record is available under the Creative Commons CC0 public domain dedication. The University of Florida Libraries, as creator of this bibliographic record, has waived all rights to it worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law.
Thesis (Ph.D.)--University of Florida, 2007.
General Note:
Adviser: Eisenstadt, William R.
General Note:
Statement of Responsibility:
by Sudeep Puligundla.

Record Information

Source Institution:
Rights Management:
Copyright Sudeep Puligundla. Permission granted to the University of Florida to digitize, archive and distribute this item for non-profit research and educational purposes. Any reuse of this item in excess of fair use or other copyright exemptions requires permission of the copyright holder.
lcc - LD1780 2007
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