<%BANNER%>

Time-Mode Circuits for Analog Computation

xml version 1.0 encoding UTF-8
REPORT xmlns http:www.fcla.edudlsmddaitss xmlns:xsi http:www.w3.org2001XMLSchema-instance xsi:schemaLocation http:www.fcla.edudlsmddaitssdaitssReport.xsd
INGEST IEID E20110209_AAAACG INGEST_TIME 2011-02-09T13:43:01Z PACKAGE UFE0015625_00001
AGREEMENT_INFO ACCOUNT UF PROJECT UFDC
FILES
FILE SIZE 19864 DFID F20110209_AABCPD ORIGIN DEPOSITOR PATH ravinuthula_v_Page_101.QC.jpg GLOBAL false PRESERVATION BIT MESSAGE_DIGEST ALGORITHM MD5
17e2ec341f19bfa12fd8777f33477077
SHA-1
db0baac78f839d181ce55428bc9c11e5f038d076
11018 F20110209_AABCOP ravinuthula_v_Page_094.QC.jpg
a698829a3bddb3812ff8e9edba75480f
480424ec93b5b22063a11e066845c993c40b9579
33838 F20110209_AABCPE ravinuthula_v_Page_102.jpg
d6ec6aa4be4645b9df0e44b237fb1db9
d9aebbe93e1b60ae04ec53c44aaaf2c72a3bfb2a
36833 F20110209_AABCOQ ravinuthula_v_Page_095.jpg
928f3af97b10b57bf2bbab4b9a87cdc3
b64dd394d6fec946cff0989d642e707664e7db30
10539 F20110209_AABCPF ravinuthula_v_Page_102.QC.jpg
ab508bb1116cf8a8fc7c060d2617ac2a
57edf72e38c06b879898156157cbefeb3b80b58b
12063 F20110209_AABCOR ravinuthula_v_Page_095.QC.jpg
91272e979939ca42651aba421c1d179a
0530919697fb77b055c1dbc71c27c4dfaf3ec544
54492 F20110209_AABCPG ravinuthula_v_Page_103.jpg
2e245ebc3774f5bf226e6fe8ca963443
d4e680712ba036441c899fdc3665fe7f586c0c00
39173 F20110209_AABCOS ravinuthula_v_Page_096.jpg
5ce1c048596aa9b87d4b3f9dce84e646
5d9cee59febf4c524a210be03c3271653163ebe9
16017 F20110209_AABCPH ravinuthula_v_Page_103.QC.jpg
0be57cfcae619e557468581250731dbd
76755422f08d0e174f645b0452f7a3a9eead7ad2
12621 F20110209_AABCOT ravinuthula_v_Page_096.QC.jpg
55136a131a0854ac7efb5cfa46560fb3
862f680a4f38237dd73864014c663c11497416fa
56076 F20110209_AABCPI ravinuthula_v_Page_104.jpg
ff9e55ea71b12a4f1e117ed2a00aeb2b
7aa9f4f76c921635a945e2e7ef68c647a45874b3
40613 F20110209_AABCOU ravinuthula_v_Page_097.jpg
5f8fda73049be1cdd068196ca6e94dcb
1b450aeec44d56b7d8f247df622efcc42c2593cf
20503 F20110209_AABCPJ ravinuthula_v_Page_104.QC.jpg
56090595799e59eff7610f6b52ad50cb
42ddb5700ad49d19e37d0f3dddbf65f6fcd4da94
13248 F20110209_AABCOV ravinuthula_v_Page_097.QC.jpg
4eaf1fb9f583e1b7a761f3631adc899c
a33374121d6bf852c26ad60685ef294d168a2393
56865 F20110209_AABCPK ravinuthula_v_Page_105.jpg
0868117a31ad2dfc4dcce2e9e5d4e26e
a0d368f9c26bc89fbbfa3a1124455c5587f299bc
35838 F20110209_AABCOW ravinuthula_v_Page_098.jpg
62467c4697d8a70c1b55240272073bb9
7137b91a099b6e0fe9b7581d1783fb3ce613cff6
17824 F20110209_AABCPL ravinuthula_v_Page_105.QC.jpg
0148524f62067ea5cb9a72dfa8f5be80
d4800a6eeee163fb0e5192f9920ca228c5c820a9
11834 F20110209_AABCOX ravinuthula_v_Page_098.QC.jpg
398af50ba585930561a45e9f312ac0a6
208543dee95a9a8daa9186320bfb97b912af6259
53794 F20110209_AABCPM ravinuthula_v_Page_106.jpg
134d81d286695d256ef251b6573007df
4f538b3a2e5a861ee1025eb812c56eef3f6515a8
59374 F20110209_AABCOY ravinuthula_v_Page_099.jpg
7decd478883333a9b8cdd97a738dda70
d523b540ad802aad752a3630070bb6b9549d233e
37383 F20110209_AABCQA ravinuthula_v_Page_113.jpg
7a98439ffececc6070faf69cab86d68d
059f6855342846343376e1cd4f29b5c06b2e3d53
16058 F20110209_AABCPN ravinuthula_v_Page_106.QC.jpg
d88a867705446d215cf2358b665d3b7e
cc1fae5895b29a1bc1040a5ac6437cfd309a7d40
17932 F20110209_AABCOZ ravinuthula_v_Page_099.QC.jpg
77ea2c02cae06970ab5d2640da985da8
cb5de9ce11db52363f9c4170becd1aff01ec4506
12328 F20110209_AABCQB ravinuthula_v_Page_113.QC.jpg
a3a77149c4bd8cd0d20e3a017903793f
f44f8f5ef92c052ebcbba75e74d27a99cdc3a6cd
48463 F20110209_AABCPO ravinuthula_v_Page_107.jpg
a57f99ba72d7b528274fa16b36204e92
a14d21d6bbd52b6903e3a3f33e72de0c8f65d883
39227 F20110209_AABCQC ravinuthula_v_Page_114.jpg
607b4b21350dabfb0c064d28094a8ab6
d013da2984eec45e2a3368ac74b828d4727c0093
15813 F20110209_AABCPP ravinuthula_v_Page_107.QC.jpg
eb84209310c34ed36a58dd0eb52b562b
db7f5a7698d6689e47d776f75f526b4fa3d2161f
12331 F20110209_AABCQD ravinuthula_v_Page_114.QC.jpg
16db0c3bec3f50be636ef1c41d7579da
5c6d3f22c6d834074e94639ca0be1fb340adecd0
40454 F20110209_AABCPQ ravinuthula_v_Page_108.jpg
120dc6a632a18f075e807251543c2059
5644ae7e7eac25fef8c08b53bd520c72bd33b36e
61992 F20110209_AABCQE ravinuthula_v_Page_115.jpg
6914c2016aa05f60a1d3639a61be23ff
7478559cea2ab5c14b194e0a5abea597976fab84
13036 F20110209_AABCPR ravinuthula_v_Page_108.QC.jpg
3bc7f2767dc14568ceedb47131102049
e438d68ca344e569900a5d5a44b4a452213c8162
19112 F20110209_AABCQF ravinuthula_v_Page_115.QC.jpg
537d908493d6d329aa39c42d188a3435
1747b11cbd072d577449d3b4cc6cd8af70948186
54281 F20110209_AABCPS ravinuthula_v_Page_109.jpg
d0c1592d5c1f4342f0c18c644cffa5e0
2518417a3984797ed40eeaa45f6fed973806475b
42062 F20110209_AABCQG ravinuthula_v_Page_116.jpg
f3a01ceebadb303c0d4b477212366168
2556f663844799e0b2034e53a3980bff391dd34c
17225 F20110209_AABCPT ravinuthula_v_Page_109.QC.jpg
b6501d7007a5354fcf63a349f1a74b63
bf6f6c77b927ec1259b68a0a7ac8f4d742957583
13799 F20110209_AABCQH ravinuthula_v_Page_116.QC.jpg
22a27af011cb0ad938cfc2195f917487
ca8d92ccde0178ee79d4e321b56db3ad0f01fdb3
87798 F20110209_AABCPU ravinuthula_v_Page_110.jpg
6579b551e89d65261754f0e983b42ba7
a4979261d3b94f66c77a14817ed769564cbe1e9d
74490 F20110209_AABCQI ravinuthula_v_Page_117.jpg
df3f735503039fd6c636eda414f8fc94
be534e2c24891ad4c7cd91f42a76b77083743aa4
23651 F20110209_AABCPV ravinuthula_v_Page_110.QC.jpg
f36348b5854ad3615c05e10af9093d7d
97011097ca348bf11f4acda47bd18592b400db15
22125 F20110209_AABCQJ ravinuthula_v_Page_117.QC.jpg
b654e2698c0e0a2952cde81e98b9166c
fd1a034d13ed444d4939444b9bf85a615c8d26fe
63567 F20110209_AABCQK ravinuthula_v_Page_118.jpg
e4b1e8e2d70e49895f8ceefc46f6a0ce
53b15124e06ce1d6785417f8a44f604b06c7cce9
28232 F20110209_AABCPW ravinuthula_v_Page_111.jpg
cec08d5caf57a4a6ab038aa4f22f51a2
2e7858dd36d00a8ed38e3cc2984c7d57835280d4
19058 F20110209_AABCQL ravinuthula_v_Page_118.QC.jpg
262ac14a80bb4b0458c01e05bcb9f5c7
ff73be9ac3b52028526723113433408029bbadb9
7573 F20110209_AABCPX ravinuthula_v_Page_111.QC.jpg
726f6310b8a14ebb7ccfbd5bcecb4743
0337101b35940da008edce2effa2eaec085321ac
50345 F20110209_AABCRA ravinuthula_v_Page_126.jpg
149c4d2b3ef59f6a2969ebacfdf47a3e
6a6142007041eca0f66675c6f95c02ef72f9013b
44178 F20110209_AABCQM ravinuthula_v_Page_119.jpg
7c8a4ff4eecf19cda727a7f8d7904400
b6bbaddbf09481e5b1dd791d966c55036267c9f3
60736 F20110209_AABCPY ravinuthula_v_Page_112.jpg
0ffa05b1eff3a966b49ae69d332e252f
bb240391ea6bf349184d46d85c35641f5c0a026d
18182 F20110209_AABCRB ravinuthula_v_Page_126.QC.jpg
6f6e34847bccde19ac3ae951a733c49c
c4ed30dd9c02cf001bc7f3d1246c144790164b3e
13161 F20110209_AABCQN ravinuthula_v_Page_119.QC.jpg
1048010b842d061ff7e04659dce0a0fb
c64470e9a8384e8502eaa103a7b2e05ca19b8e72
17855 F20110209_AABCPZ ravinuthula_v_Page_112.QC.jpg
192ec3ab3f6bb7bb2402be8da737456b
fe2392860c85dcaf47c8059703bea3613b6e957f
71379 F20110209_AABCRC ravinuthula_v_Page_127.jpg
d225f78227845e82fc9b1adfa715135c
cd9d624934a270cc3cfed74df40496cc62184489
68506 F20110209_AABCQO ravinuthula_v_Page_120.jpg
5087cf80b1974fc6b38c9101f2d66e3b
b4c6da2c011a0487ec07e98b2fa35c81a5bb45f2
21235 F20110209_AABCRD ravinuthula_v_Page_127.QC.jpg
8f801006eb98b878f3c46935fe1ecd0d
0a6a26c6129fe9182dd5b6457b32cc45e1e7c819
20794 F20110209_AABCQP ravinuthula_v_Page_120.QC.jpg
bdd039760c25b57d9b3235b39077993a
ebabf538728c64190a0faa07965bcddbb94cf387
78451 F20110209_AABCRE ravinuthula_v_Page_128.jpg
b47606fb335545ee157cf4f25aa6c950
063141d16add9af62180dc3b838714488d163ecf
65717 F20110209_AABCQQ ravinuthula_v_Page_121.jpg
02c1281da8df03b2fd6e92389a945c57
c673f27e34d75e363edc58fd1837ddc88cdfb5cf
23366 F20110209_AABCRF ravinuthula_v_Page_128.QC.jpg
d8febb4c0a58995304530580a707e78c
ce0f53e73473d83919316c032c881d3f2e3a1b5d
20301 F20110209_AABCQR ravinuthula_v_Page_121.QC.jpg
c1c6cc67551f0cef89b38d4ef489d919
c5cccd7fd2663cecf2174c66e8fe32dbc8f97568
35378 F20110209_AABCRG ravinuthula_v_Page_129.jpg
bd680b00b8b7fb4562aee85592acd3df
8c4843cda896a43a18f3d6627461883aabfd102a
26921 F20110209_AABCQS ravinuthula_v_Page_122.jpg
31eaacfbe352d38464806a73cd531da3
5be34ad49425e86a78376be5bd80c98a5b1ed6ed
10362 F20110209_AABCRH ravinuthula_v_Page_129.QC.jpg
c478972d13b37a4cb1e9d0e2e4bef940
493a140f8ddad4f53276a18591b7315b49368781
9664 F20110209_AABCQT ravinuthula_v_Page_122.QC.jpg
023fb79e03b516610cebde2e3769d502
ce5ee9737c18ecb7d83efda034c994a38a03b89d
79122 F20110209_AABCRI ravinuthula_v_Page_130.jpg
168dcddf426dfdbb6cec8dc2a6830c01
f707a29266157de4b2757e63c0e18d918071a157
21963 F20110209_AABCQU ravinuthula_v_Page_123.jpg
256a88a2f575f4bbcabcdc5d0ae3b331
19273328fe4cbbedf0360f5d03f4692b2fed2082
21444 F20110209_AABCRJ ravinuthula_v_Page_130.QC.jpg
d820b041a4c19020030a439234249587
9b0688fdc39ace9c0952bd6b1847f3d60ba0d1d5
8263 F20110209_AABCQV ravinuthula_v_Page_123.QC.jpg
fa7bba8b776b54c63a9a36265325a12c
dbbe05c52621f979957f994e7f9b0e579609d4fa
91755 F20110209_AABCRK ravinuthula_v_Page_131.jpg
5591adc8b5cf1511037f1d07ddcaf42b
95d3e77c7b03754282c4aa47a63a209072bed54d
51609 F20110209_AABCQW ravinuthula_v_Page_124.jpg
5559f79de8c69662c6958d7d8bdea1e0
8bd5ad7155e0b3dca848e8696dd1e3164ffcd209
25092 F20110209_AABCRL ravinuthula_v_Page_131.QC.jpg
f2ba982a3e48f3887404673a498bd639
4845b34149a6955180c5400988a8fb14d12f3113
15933 F20110209_AABCQX ravinuthula_v_Page_124.QC.jpg
179a5402d6406ff67855e66a8c2f2659
ae32553cda30c6f809a78852b178a3b0084e2ffb
1041685 F20110209_AABCSA ravinuthula_v_Page_011.jp2
03bb37b313107387b6528d2d1d43e024
2e098477111c8755da30d7d5b82aea6b7bbf3da3
38908 F20110209_AABCRM ravinuthula_v_Page_132.jpg
0ce92ba1960dfee53b52a73792cfccb5
6248ba98b876bb4d622d2db86914aa7952b98716
35506 F20110209_AABCQY ravinuthula_v_Page_125.jpg
a86ebd4d709d2aee65ac0d956a1ab1ae
9313218f12d43533adc4bb2b57020313f613b1b5
10632 F20110209_AABCRN ravinuthula_v_Page_132.QC.jpg
75ff51c3ac31fae21b7c0a4e463bc7dd
71783af0dcf7e52fbbb4e22cba987c6f092fc6d8
11478 F20110209_AABCQZ ravinuthula_v_Page_125.QC.jpg
d2854bae85848b67cb5e348cec42b9f4
a099cd6c579fbd60c541b99f82b1234a440c20ec
932077 F20110209_AABCSB ravinuthula_v_Page_012.jp2
48eab3c644933f6d99de7ac508ba9870
760732ebfd957bc0fd9038e4850b7375c4a8b5a2
43802 F20110209_AABCRO ravinuthula_v_Page_133.jpg
7c2a904c9db09dd37c6e3d77494dd85e
a46fdbd3fce09c43f11e0300100dc75a586ecd51
133668 F20110209_AABCSC ravinuthula_v_Page_013.jp2
ae61b387c6871209c19dc9aef334e93f
2da64b6eea1be36ad929e5fce273bb16ffdb254d
12930 F20110209_AABCRP ravinuthula_v_Page_133.QC.jpg
d275053b0d7945435fb6e63cca7157d4
fdfa96a04987674931e50b96b98dfe48c5a8be8c
937366 F20110209_AABCSD ravinuthula_v_Page_014.jp2
d09e285afdc32eca046c8cfb6ee17b68
d5b5fcbaf56bb76eadc35b501781266b8ffa2073
217198 F20110209_AABCRQ ravinuthula_v_Page_001.jp2
4d35a1da636eb0ad375ab88611c5b894
9b5b48957e40ed13da5ca542c7ebd90690e649c9
1051964 F20110209_AABCSE ravinuthula_v_Page_015.jp2
3906b58f42b3bf25066ebd6b0bc2ca88
0b2c8641c5d258149471d867d3d9ac2294a78e19
29168 F20110209_AABCRR ravinuthula_v_Page_002.jp2
de0b7fecfcef25cc5f3a37a3b3f36e9c
14347ce687bb815d1ce4b9705e1b182aa922635d
701710 F20110209_AABCSF ravinuthula_v_Page_016.jp2
8073dca6a73406e4739fd906a84aafe7
496975f0aa236f49ab8c941afe6b659811467463
95353 F20110209_AABCRS ravinuthula_v_Page_003.jp2
ea600367dd9d6e1654e89647ccfe4acf
f2a04165b20e96f494ecba6114832e277e4db15a
1051959 F20110209_AABCSG ravinuthula_v_Page_017.jp2
622aa6cd17912d3dcaab213872089e71
8b4e201f105340255b3e71dbc9a0b743bec09071
909058 F20110209_AABCRT ravinuthula_v_Page_004.jp2
b5b01a56d1d3cabd60c0ab405fa4aae6
9a0e31b65051f6d83af55f7df73d9b8046a4eb50
1051921 F20110209_AABCSH ravinuthula_v_Page_018.jp2
54a821f26373cc730afe16e4ef1b8b0b
0362974f2c800c0cb2884e60aa2b1b342b8f32b5
89793 F20110209_AABCRU ravinuthula_v_Page_005.jp2
f8bf692d39e14ef24ebad70ea8a51b04
2bb22e9987557feb59f4cd165e78a954077d3bf6
1051974 F20110209_AABCSI ravinuthula_v_Page_019.jp2
030e95e1bb20d9760b8467a20379d2c0
7b00c1329002224003f91ace23688dc9fb34d472
777239 F20110209_AABCRV ravinuthula_v_Page_006.jp2
8cc1946e5a0e15f043be2d1fece3c025
92d21ef250c74843fd4b4c759ad1f8ed7d0249cf
791842 F20110209_AABCSJ ravinuthula_v_Page_020.jp2
86fd47ae86674ed74800a0da63922c23
71cd512c3f1b3fb065b5901d9044ac289c7c4d07
1014974 F20110209_AABCRW ravinuthula_v_Page_007.jp2
d6b70f1383cd9ea21c4e30c3c5d2df6e
a15aa0923a3886b62990dcba4a8ce6a90c7bf597
789345 F20110209_AABCSK ravinuthula_v_Page_021.jp2
d464e8a3652f84c4fbc169b02a9d3e59
e014653b16e7b67c977201799c8a071217829558
375134 F20110209_AABCRX ravinuthula_v_Page_008.jp2
86cebcd78846e1baf890da3efe517b75
ec56173709fd1ca1f380fbd33dda9cee147e75f5
1051929 F20110209_AABCTA ravinuthula_v_Page_037.jp2
ab1230086e4fee9791fd7ab453e57238
8b44ade8015ebe7181996406f526d1208e114928
652448 F20110209_AABCSL ravinuthula_v_Page_022.jp2
f6398f70af613a7a3ed9259532ebf932
0a699e31da60784101a02b2d90b19d5bf40217cd
235761 F20110209_AABCRY ravinuthula_v_Page_009.jp2
4d0e5ba9a532ecca38cd5b52bc8eaf4d
532a38ee1a0648f66f0ba1f8d2b7bde9969d473e
483665 F20110209_AABCTB ravinuthula_v_Page_038.jp2
47f78de1242a0b57a7a4a8848bbaadf2
c03212e396091e4edf2233ceb3f0049419402fe4
738551 F20110209_AABCSM ravinuthula_v_Page_023.jp2
6ea5493f000bdaa43c527167a38f7bcf
19edd0dd1cf5308bc504020398f49824bdbe5c9f
890384 F20110209_AABCRZ ravinuthula_v_Page_010.jp2
73092b5d73eb1fdc0115bdf8f8f82969
35a91c86a15021f244b996c7b56f55840181f8cc
822451 F20110209_AABCSN ravinuthula_v_Page_024.jp2
acda75cf7cab1a1e129e6092cf5d1cc7
d8a43e777e924f544a1ab9199456fd9232b9d679
1051980 F20110209_AABCTC ravinuthula_v_Page_039.jp2
4e173f60f3478185271d1e3982d547f5
bd5db64fafd1e9e22cd0f87417658e949b4c4775
754066 F20110209_AABCSO ravinuthula_v_Page_025.jp2
19a376221594ff8f1d5c9595b644f637
982fa76230be8f1f9b1adfcc55d7ae99c7410b71
744388 F20110209_AABCTD ravinuthula_v_Page_040.jp2
6761b6903a76ee9be6696d73b821c354
7a0f3577d8fa5bec4f97c03006029bcca416b4fa
735179 F20110209_AABCSP ravinuthula_v_Page_026.jp2
f7ba03428998d9459026461de383d02a
89d04793d65fedd87b5a3223ecc1f236e4c7bc0f
815128 F20110209_AABCTE ravinuthula_v_Page_041.jp2
b73552704b3b1204f71753e670b26194
3cf80a0d2437b5268fc0100807680015e3ee8d9e
758230 F20110209_AABCSQ ravinuthula_v_Page_027.jp2
9e61833feb2e9cd1ad1b8efc0956d04b
52b34d2881d819534f14e8a82954185251828bda
645203 F20110209_AABCTF ravinuthula_v_Page_042.jp2
04c9ca2fda91f2543bc95da55c4f18c0
9a8a928b6f7951f7f12247123c2cd4d3e464e5ae
653731 F20110209_AABCSR ravinuthula_v_Page_028.jp2
b4151a1ca263db1a51a2590b6e4f098b
03c8ce427626dcaa9bc9f6ee8a65bfd4be13b931
572301 F20110209_AABCTG ravinuthula_v_Page_043.jp2
0b9d64d2f5cc850b14a886bc1a98152f
713537d385706bea82430582e7dac8d672cbc9e6
761728 F20110209_AABCSS ravinuthula_v_Page_029.jp2
25b38e16fa889ef8dd94189baa839410
2b2042554fa1ca6979e6b44fe29552f9f39bf35d
1051986 F20110209_AABCTH ravinuthula_v_Page_044.jp2
1fc90e0646804cb4f87eea469e370a49
22a0ca8c4e299f4b689ca354a44e717990e2f9db
550075 F20110209_AABCST ravinuthula_v_Page_030.jp2
73f25041e42f53afa89eb53b454d12cb
94de6c37a2192e069abc03bdfad3610383e860c9
1051928 F20110209_AABCTI ravinuthula_v_Page_045.jp2
e8e1e78037ee34f301b8082e7fdd6e17
95c040d41ed1d3a2f43f85af08233be3b38bb240
605304 F20110209_AABCSU ravinuthula_v_Page_031.jp2
3816ce07dab3e2f620b6d68d2b97592a
f8345b22eea79a9ad0430a2c0929e460e537e6c3
1051967 F20110209_AABCTJ ravinuthula_v_Page_046.jp2
d38c6d5cd8d1c5009400df9821e9e2ed
42fe0bd7064151fbbf4116ce51631b2f1e4c6961
635166 F20110209_AABCSV ravinuthula_v_Page_032.jp2
37729518484c3a049c2e869e8d237848
4d93cf7d031a93999ec833dd9266b5b9251231da
868604 F20110209_AABCTK ravinuthula_v_Page_047.jp2
30d655ed848aea2b54b43e2a8a202748
08fbd4324c64e0e4ab7f72e9b381ffe597fb2641
501315 F20110209_AABCSW ravinuthula_v_Page_033.jp2
58a3d5255eb79d8fcaebad8546267a03
551ba23d78a93a82d381044eab93a28f4b84d16c
702204 F20110209_AABCUA ravinuthula_v_Page_063.jp2
6e2b1fc87b1622d5033ef77526d73e10
a9857b46e93ebc2350195b0a1ef89efadd79611a
880438 F20110209_AABCTL ravinuthula_v_Page_048.jp2
fe4f34cde7a74d1a28c6d6af78fcab9c
07b8bf6972c9a07de8f09b007e0a0fb66cc0653d
425253 F20110209_AABCSX ravinuthula_v_Page_034.jp2
82eef68c979a56c6e1b0ee3dfcf6a14e
4c3e81efda8bf1298f1df788029a48dc06c034d9
570342 F20110209_AABCUB ravinuthula_v_Page_064.jp2
b46e4db32ecea29c0b2e40d1b6a35cd1
66d8c30967324e33887a5191674e867ae9cf020b
505699 F20110209_AABCTM ravinuthula_v_Page_049.jp2
a3695bdf8d4516fa780c555577daf04c
c2a22d97b9b937fcca84192c09c0c0284945d58b
903943 F20110209_AABCSY ravinuthula_v_Page_035.jp2
8393fb449585bce4a8617171792ec686
8377aa32705206cc466139e323fab7c438820d0f
613597 F20110209_AABCUC ravinuthula_v_Page_065.jp2
c4b3a5722f2c998c4064ceeb0acad7a5
aa73827d167c1f50788212aa12c8816f6c5391b9
900941 F20110209_AABCTN ravinuthula_v_Page_050.jp2
f6da63ec6eeddfe3c739d83fef9871f2
404835df193ddbf36cd61d0e5e0c73097ffd05ba
1051984 F20110209_AABCSZ ravinuthula_v_Page_036.jp2
f038ef6a48fa6a10637f5b344b71bac1
e081aa9131a450dc7f52cdd3de1de65b04605fcb
866268 F20110209_AABCTO ravinuthula_v_Page_051.jp2
f8ec044cd8836f08b3d78e547806d4f0
6bdadc3c77e7dc7ecd4a5225f78b4a0c4ca5ce63
489599 F20110209_AABCUD ravinuthula_v_Page_066.jp2
f345f0d9ff17dc1cc7b92a9edc192430
6f574ebaa6c30308bb3fb67095697fe90423faa4
963061 F20110209_AABCTP ravinuthula_v_Page_052.jp2
36a0840feb0f99f6178e612197d45b81
23abec2d21166fd4f9a84a198baf553adf1b3d45
771560 F20110209_AABCUE ravinuthula_v_Page_067.jp2
e993d45671e38859ee248103ab272be6
7fa13538e022c5b44e3aa791744b621cfb9f9e4a
959028 F20110209_AABCTQ ravinuthula_v_Page_053.jp2
d67ea982df006d84e2fb809b6945fffd
77090a93f2b4b388d779ce86fbb90204ba224c0b
5481 F20110209_AABDAA ravinuthula_v_Page_089thm.jpg
cc535ce21df7a48f0afca9779aaed8b5
270e642c2780c8eb5e373f66bc4fde4654a682bd
938536 F20110209_AABCUF ravinuthula_v_Page_068.jp2
4a7bf87acd701dd48fdec6a082511168
7aebffa1ff18bfb930c738ffef660e07e3bdcfad
768973 F20110209_AABCTR ravinuthula_v_Page_054.jp2
469eb5eb63e801c3b2758a86a636cc8b
c385c6505c2019f0fa6114a3f6238b4a897e7758
2959 F20110209_AABDAB ravinuthula_v_Page_090thm.jpg
7bff9cf9b110c948968af08b71d76f96
9278108d92324da4d36b342f13426a8a9cc5d98a
789577 F20110209_AABCUG ravinuthula_v_Page_069.jp2
b9b9acaeea324102fb5c3d379347fe5d
c1ab73259e2335c604c9cfab058e7940610b96ec
268849 F20110209_AABCTS ravinuthula_v_Page_055.jp2
6acb1e49b35267b0b9509ec7809145f0
85dd5fb2b18e7fd7f72c52b43597f30f141a9ee6
3605 F20110209_AABDAC ravinuthula_v_Page_091thm.jpg
3df905910e7825c1664505b0b8a91a72
2d36635df02fd5feb1826db0311c27133538cf3c
673062 F20110209_AABCUH ravinuthula_v_Page_070.jp2
8ac2f62a57217ff114fde1eb3e51a104
bd478276cd0cfa3aaa8cd1197ff2fc10b9aa146b
958019 F20110209_AABCTT ravinuthula_v_Page_056.jp2
562a4be7215d9c7cd0cc15b84ec5acf8
f83f0304755bdbbf97a2ec02ef11c8abbc6c964b
4009 F20110209_AABDAD ravinuthula_v_Page_092thm.jpg
9f41fbcc61f2ed8dca288c62259da3d1
f981f8d27a68c157be1fd3848bed8636eb3408d0
923421 F20110209_AABCUI ravinuthula_v_Page_071.jp2
cc175340ce8259d7a1984496370a0854
5956985f81b687d3dad25c21e11f60797cbc53a4
829559 F20110209_AABCTU ravinuthula_v_Page_057.jp2
5f3d9ea3b7403183f4d96e35ac18eb82
ac083a883092d7d6813296a71099cffadf31c966
4718 F20110209_AABDAE ravinuthula_v_Page_093thm.jpg
1c8d68e1441f2a45645b7ba5e2b217f4
3bdd11bd3af22203c7215901e367976018996ac3
511898 F20110209_AABCUJ ravinuthula_v_Page_072.jp2
130598626e0f573ea0418ebe7db2efff
db9759984e11d8faeddf83e5ab8083898cd11e8b
543314 F20110209_AABCTV ravinuthula_v_Page_058.jp2
78f342a804e6b5bab6ffe7598211f393
9735feb404294900654e73dcee8a3d3fa6dee6c1
3115 F20110209_AABDAF ravinuthula_v_Page_094thm.jpg
838d792997e8106b6ace5c53a91bc7e1
45fb053d7ccebd99d6057f5624b97c11cc67cda4
896008 F20110209_AABCUK ravinuthula_v_Page_073.jp2
01682a801e448f626eccfecb3dc6e0a9
d6b491536e5908013fb4a1d6d0b87237c1346f8c
537674 F20110209_AABCTW ravinuthula_v_Page_059.jp2
25d588f596598dbab90e7f7a1d3ace8f
f5c34b0012b1dde8a50c873e3004d025332dcbcc
3426 F20110209_AABDAG ravinuthula_v_Page_095thm.jpg
263459ce3f0e21d38ba4bac54c76d97f
edbdf46e2077a131d179555529c68f0a5da41426
485370 F20110209_AABCUL ravinuthula_v_Page_074.jp2
e34357b8e98e15f30961d53667c48d7b
34f7421d7db7c72dc072d67a071365ca83293640
618684 F20110209_AABCTX ravinuthula_v_Page_060.jp2
96bbb545d0a9917b37f44824ea6329a1
1cb60c9d1ca4b0b1d60858d306f1ea67eeb3aa0b
1051938 F20110209_AABCVA ravinuthula_v_Page_089.jp2
5735285a1857d8406027b211e7bd72fc
a80da069725f7d1cd98befbbd9fefb63b850462a
3541 F20110209_AABDAH ravinuthula_v_Page_096thm.jpg
82e7e8688e8f00e1f10131f5288ea403
eea68c81323ab7d5aecad7ad1c5fed3658326c8a
F20110209_AABCUM ravinuthula_v_Page_075.jp2
0fd99cc389508c446ddc1360660587cc
0b988f80c4391741470eacebf424c2a1dc7451c6
683703 F20110209_AABCTY ravinuthula_v_Page_061.jp2
2b97c3e656c9b47fe15ccb2d6e1a2524
3a41bc6dcf3f220cd5bb8d6da03a6978855484e6
362813 F20110209_AABCVB ravinuthula_v_Page_090.jp2
8b6e295206b3e058e0f124d2686a68ba
3c54ed1b483bc55a8ce93b1b8f43779337cd60a8
3860 F20110209_AABDAI ravinuthula_v_Page_097thm.jpg
827a429c0357f988ec2c0c16f6744648
3136de65d71e2bf2cedee82e20665fcd24850149
702236 F20110209_AABCUN ravinuthula_v_Page_076.jp2
4b4eb6f8b9c1eb1ff8e29d9c100ffc36
b4f3124b303a0908b1b2161b0368248d76918a70
301760 F20110209_AABCTZ ravinuthula_v_Page_062.jp2
e697c3bbac51cc31a733562a491a8e4d
efe8e214fbd905f27110715ebc44c90a34e6b7eb
381429 F20110209_AABBSA ravinuthula_v_Page_111.jp2
50f4dd60e6c64e2059ada9c2c4335925
d8b0473beea53c27977760e32f61f7c5287eb274
484210 F20110209_AABCVC ravinuthula_v_Page_091.jp2
5776faac55cfc7585a13573fa5490fe0
51ceb013c8c05132c72aaf646b85449d339449cf
3498 F20110209_AABDAJ ravinuthula_v_Page_098thm.jpg
ea30aab467d194327f1db3e3b4ff1f09
6fa406e5b704b637d3a5a33ef534cf68a4f30e57
1051846 F20110209_AABCUO ravinuthula_v_Page_077.jp2
9378e1b0a055df38f9fde5ab1020e876
392d62a3fa7ae74921a61e97871ed3a28ac49580
8423998 F20110209_AABBSB ravinuthula_v_Page_037.tif
7a52e5244eaf919c7fa4e508810901bb
55a2d9d62efaa3057f7bcf291bb3e7dd0b3f2ebd
545939 F20110209_AABCVD ravinuthula_v_Page_092.jp2
3e8ecd7f1e0b21cc7e236878940cdb86
0e0f04695080e6188f4a23f8f3fd592f282b5d1f
4378 F20110209_AABDAK ravinuthula_v_Page_099thm.jpg
9bff74b02dce24f049b2a24e89036f1d
ad1678056f34a57e6e8c589253a49a9c5e71a75a
881501 F20110209_AABCUP ravinuthula_v_Page_078.jp2
9e67a5b8ff1316648360ac1d3a9f8ee5
89127159f52fb0b327c22cad531a7d6ccf69438b
2740 F20110209_AABDAL ravinuthula_v_Page_100thm.jpg
f485bbdd6c0675baf70e3a6b33cc694d
b92faeae70e2d213f8e05a33d3d5d33f27fc3d2c
513862 F20110209_AABCUQ ravinuthula_v_Page_079.jp2
b1f45b8762508b21a7c3ec6440a44e1e
2b3886fe168512c33e732be0a9c0fdf072abb86c
63207 F20110209_AABBSC ravinuthula_v_Page_024.jpg
624d212cafb9f8becd028b795b449cbe
bab7a08235f012dff45989db85727be7127bb72c
982484 F20110209_AABCVE ravinuthula_v_Page_093.jp2
83e16e0a525c1a7e6d96ed57a0d11fef
1fb0af9c8ddcdc488ca7ce4bde5c03ecf307c18c
4891 F20110209_AABDBA ravinuthula_v_Page_115thm.jpg
da9c03a2e81e94db5b1267a8d1faa11f
4737734f0da3be1f03dc4f550e341923df2cdcc0
4746 F20110209_AABDAM ravinuthula_v_Page_101thm.jpg
c814522d2fec3a6826aedd4780762484
cced22137bc5a9a333f0d6541709f1f8766e61d5
388463 F20110209_AABCUR ravinuthula_v_Page_080.jp2
71110a5d9beb9f837f9c67e9d7a877ce
276a5dbd3c93cc32b64cab17cf096565b7d9c9b7
F20110209_AABBSD ravinuthula_v_Page_023.tif
5398b2d32dd114934975d17871749290
d6f8034a90b4db85fae925760baf3183a2f96b87
500389 F20110209_AABCVF ravinuthula_v_Page_094.jp2
7fbdc1c0534fec541c95bce6f0341b88
836c0353e02b198602f9273f4c2a04046dedbfde
3715 F20110209_AABDBB ravinuthula_v_Page_116thm.jpg
9c75a393f0fbfcfac8d700c001a6e188
34bdc751ef0bb18f390484f5d7c8adf7d6c3b9db
3108 F20110209_AABDAN ravinuthula_v_Page_102thm.jpg
dccf64f168343fea6d9177b34c193b6a
6c090d4dfafc2b7c8ed61e0e5a2e4a52411be403
276033 F20110209_AABCUS ravinuthula_v_Page_081.jp2
bbc464d0e1ee2a3432d4e83a95e9337b
463418fac7a309e7d9399323f904838d92c57056
28611 F20110209_AABBSE ravinuthula_v_Page_086.pro
e1ec84faa155a0073b164bba2d006feb
b23cae193d732801cd6ea5af50e932b46726643d
547787 F20110209_AABCVG ravinuthula_v_Page_095.jp2
39c2ce3975aa61639c59c92c32bee7d3
91eee25e91263ed930e8888681045c74de13373c
5023 F20110209_AABDBC ravinuthula_v_Page_117thm.jpg
23999ff80f348e4f690bbd5a8976176c
2ef68a84224568e2de91f38a3b5971f77d2a5dd2
F20110209_AABBSF ravinuthula_v_Page_025.tif
54e2600aa8d17b1b52f5a40ec04bff5d
c0a08deefdd326b865e710ac726d496811734128
573479 F20110209_AABCVH ravinuthula_v_Page_096.jp2
359ffc5a353e28a0ea98367c6378bee0
5f68afac645fc0a4654bc3f483ea2170e56cc49b
534356 F20110209_AABCUT ravinuthula_v_Page_082.jp2
3abc8cf6ffc6818747e1da47edbf25c3
6df7a568f2782af42a418bb2bcb6b498fbf77a81
4513 F20110209_AABDBD ravinuthula_v_Page_118thm.jpg
778125d341a2a991bb9ff6678306383c
e1c809e5edd2cc3b87d2f9650bc3b3cdb563c03e
4016 F20110209_AABDAO ravinuthula_v_Page_103thm.jpg
28e6352c12695e708ee2012f3bf45f5b
049f8451d92e49d1868ac6666a0ac685300ee0d8
49879 F20110209_AABBSG ravinuthula_v_Page_086.jpg
12791ae9d9fc46cd0bfb3e7cdf24734b
d71d432aa45191a0e75c71cc52bdb0ca3ed00587
623628 F20110209_AABCVI ravinuthula_v_Page_097.jp2
610baf19e78a51bb23290c2608e37103
926ef73f8dc1fffd00638018a666f2e0145357bc
873266 F20110209_AABCUU ravinuthula_v_Page_083.jp2
f5b0114b1fb9a06ef1b6b37d0dc96088
5cfd42921cd761783a734aa0511b036c14d0046f
3905 F20110209_AABDBE ravinuthula_v_Page_119thm.jpg
ba0ea53746a5c2da312c46c64613ba10
cdec393851e8b2034be35a2f10acdecc08edf302
6320 F20110209_AABDAP ravinuthula_v_Page_104thm.jpg
478f87a3124f0d1350273e9e53937d5a
2df17b5312c8871ed7b307637a82be007b36094f
219250 F20110209_AABBSH UFE0015625_00001.xml FULL
d30769426dfc5d52c5860b1680cae4be
25eda0e81bbd57cbbc08fa04af9f2eed1f92738e
512430 F20110209_AABCVJ ravinuthula_v_Page_098.jp2
e5195156fd4e7568a776ebdf3fcf699b
d6d9057cbf6cfb7f2ca2a480fdb48ff375f50ecd
988992 F20110209_AABCUV ravinuthula_v_Page_084.jp2
dd5f70acbc575cef96ad271f83445b38
dacfae0020b2c41ddd415f741883cf3693181616
4888 F20110209_AABDBF ravinuthula_v_Page_120thm.jpg
53ef87575ed4f2c62616b43d01d1836d
faa3ae23f0dcba7c70deed62d49c0e5c5048facc
4237 F20110209_AABDAQ ravinuthula_v_Page_105thm.jpg
54c9b22930730cdf7bce38027bd61659
3596b6dc3ca1f297033c6baa8ed2a232a1a890bd
803435 F20110209_AABCVK ravinuthula_v_Page_099.jp2
f87525fb535992885b72ec076593f4a9
b4864dc3c6c5ac6c87c51d30761700f3538e401d
246701 F20110209_AABCUW ravinuthula_v_Page_085.jp2
ff72ba835bfaeabb46103c808edf3d30
9254e7750d868bcb62032cc760e99c0437abf780
4899 F20110209_AABDBG ravinuthula_v_Page_121thm.jpg
1825758d0d7735829b7c850d9ddad166
89da6f8f0bf77dcccae2771196aa8a3c97be9ee3
4223 F20110209_AABDAR ravinuthula_v_Page_106thm.jpg
adec18aa31bd5b286db8dc513c0bfa1c
934da6747529f780fc0d0dec1256d974553d2d6b
1007878 F20110209_AABCWA ravinuthula_v_Page_117.jp2
df246a4eea8abf66ee4bd3b84d0206ad
d22fe06b6818282f73eeded2879cc45bd273a32a
395198 F20110209_AABCVL ravinuthula_v_Page_100.jp2
f0a4ea4b1226b3e8357a46d1e4e4ae05
54f975446788f63bb3b2e58ca96beef98f607f5d
51376 F20110209_AABBRV ravinuthula_v_Page_017.pro
8fa8f9b8653f953a8f5a608f875106fa
35cd69b7314318914783ded4c44211b3f36ad18d
632181 F20110209_AABCUX ravinuthula_v_Page_086.jp2
8b2531896dc4d0f0fa15671f945a741a
0577415b6cd296f10f0aeebab548f480e2a4ebe0
3374 F20110209_AABDBH ravinuthula_v_Page_122thm.jpg
6e70d2f137f1f2e9ef546218c9d89ee4
d38489640c909ff1afd1c02af0b9213ebfd748f6
4124 F20110209_AABDAS ravinuthula_v_Page_107thm.jpg
4dd34062a673307e903c011a6131658e
176d86e122226b896e3c59a4fda084dd465a54cc
837896 F20110209_AABCWB ravinuthula_v_Page_118.jp2
afee7ffc5f2d8957fcd6e7344ee4e699
26b743d9418bbdb4586408150f78afa9e7cf61d3
F20110209_AABBSK ravinuthula_v_Page_001.tif
ecafca518687a45da0d369aee798f29d
a1df701a6bddf7bec33f97e28e2532afa26f3708
881121 F20110209_AABCVM ravinuthula_v_Page_101.jp2
61f82cfba62797c5fdfe0a65230f2bf8
48600a40a44def33a91b33b81c961c1da98ca91e
46572 F20110209_AABBRW ravinuthula_v_Page_047.pro
6adb1a1d159a03a3a576384318fe9c9b
8277d9fc6d3b6b1cf468e14e38dbbc713ea27515
908342 F20110209_AABCUY ravinuthula_v_Page_087.jp2
b8c464a2fc80a88a5631a2cea6faf5ec
defcf0e9ffb01d8b630856655b6708d6e5aec677
2825 F20110209_AABDBI ravinuthula_v_Page_123thm.jpg
477c79fd9c359e62c5c5fdedcc2bc7da
29735eb4f0221c79720785a8f9d42bee8a017065
3558 F20110209_AABDAT ravinuthula_v_Page_108thm.jpg
41b0e951f5c8b922cc35f6c1dbe7d16f
9867ab65af3952d59aa323bdd14eacb73af79c1a
589595 F20110209_AABCWC ravinuthula_v_Page_119.jp2
2a056ee6aa9c3f615c574e3a280bfd40
99543df75351ba01dd22178e92913229c37eb7cd
F20110209_AABBTA ravinuthula_v_Page_017.tif
6a8f42b4a0e664588c4be6e245656d25
f8296b7f4a9af11b314344bb8e7fe90ee83f05a9
F20110209_AABBSL ravinuthula_v_Page_002.tif
bf803cc422d5176fc572c6e5021ef616
76b950bb190b5232eee4e899b18dbac4f9b06d40
424614 F20110209_AABCVN ravinuthula_v_Page_102.jp2
ec9ebeba1f8aad88f14bd3c6d1c0c501
0c9e4bcd0da464d44540b6a0fe3bee44164db534
1051979 F20110209_AABBRX ravinuthula_v_Page_128.jp2
8295cc9cc4fc63909b211b1b1bf99906
a0d0852956b7a445438c076b5b9fc4a82a9a2867
948333 F20110209_AABCUZ ravinuthula_v_Page_088.jp2
7ccfd360d890545420a6a072a8f7f5d5
24e67cb70eb58b1b03bae8f1b0e7052ec9e56854
3623 F20110209_AABDBJ ravinuthula_v_Page_124thm.jpg
2fb4fff560d4d88d1df2cacf71a632d8
fae956f544a2a740ed986332947b57776f8b9465
4604 F20110209_AABDAU ravinuthula_v_Page_109thm.jpg
aef3e2a646d53d84b5d8ca08ae228a19
7902ed05d9455d6841d7638031ea32e211da8622
945160 F20110209_AABCWD ravinuthula_v_Page_120.jp2
c70757920057246411637988a3aded8f
d06ef2525211f40ce712eec9782b1e5e87f6c364
F20110209_AABBTB ravinuthula_v_Page_018.tif
4b42c01f3ccd14f8a9289cb417fbc11d
62a70982903b81941549c460230f6dde2d00d1c1
F20110209_AABBSM ravinuthula_v_Page_003.tif
53b37b57ed1279f71e3f70dbef5887e5
4e5005524e364000c4de3dfba6fe6bc8f256eb75
733693 F20110209_AABCVO ravinuthula_v_Page_103.jp2
185a7e6843fafc859199e58cece0546f
7ac9963b8aa3ad6d8529412356446c1644cbb287
738603 F20110209_AABBRY ravinuthula_v_Page_109.jp2
bc71a80947c27cfa3dd688ceeaa14fb4
1f9a75ac3a7cbb48a321be1d6ea1ab586b5d61fa
3362 F20110209_AABDBK ravinuthula_v_Page_125thm.jpg
b1e35fce88b7e3a85bc97d47d2b13906
247c9e1e0d4f6042a712dec544615f053f83d623
5495 F20110209_AABDAV ravinuthula_v_Page_110thm.jpg
795bb7088ab21efdb09625e8e46aac21
c0fc93dd39eb131e6b9d178d1b3fa68f810a41b0
928897 F20110209_AABCWE ravinuthula_v_Page_121.jp2
b2335c7e73fc834a95d6e5bb76c4dda4
db7b80460e928b3bf5c7807e111f624db221505a
F20110209_AABBTC ravinuthula_v_Page_019.tif
21753839831d021ff42ffc4ed83804cf
d363000a8f2255f78d52117414113e79498f9e9b
F20110209_AABBSN ravinuthula_v_Page_004.tif
8ffdbf75beab4e20137b93365ce7259b
10d6be5dee43c8783835ef7461dcc95f989c8347
811017 F20110209_AABCVP ravinuthula_v_Page_104.jp2
d75a231927e6a1d25a189f291659dde1
dd98e88a635790e611e7c0d1ba5f8f855f3ac98b
56213 F20110209_AABBRZ ravinuthula_v_Page_012.pro
d15413ba53d1493349f4f411972f89d5
6ea986ed43b5e6b1ee1b3856d8df941f983f3d04
5392 F20110209_AABDBL ravinuthula_v_Page_126thm.jpg
2c279d54f8ad5f239e2cfe6ecd7d586b
dc4e08077733352467e8e69ee0232cc769877cbd
1831 F20110209_AABDAW ravinuthula_v_Page_111thm.jpg
0b3948bf631d0c3bb0f514ddeae23de2
7a9fb36046a5a7b4b6279df2a6723d39b058d6be
F20110209_AABBSO ravinuthula_v_Page_005.tif
2db7afc8c6bf865f0a4e80e200cdd7d4
6c4d153503d54cd22761cebd2bfb70ddce5982ec
760962 F20110209_AABCVQ ravinuthula_v_Page_105.jp2
43149c39e00a50dcb851b2ea5285416a
7fdec012eed218bde2a7b91ab7e6479cd0753f5a
4673 F20110209_AABDBM ravinuthula_v_Page_127thm.jpg
5044de3f45de3578814b76bb9fe07d30
f74ef4e9ae476edebe20db425d07f3251111cc51
4560 F20110209_AABDAX ravinuthula_v_Page_112thm.jpg
633aa78879b785642df243ab6354e6a4
ac17d66344e78b93ca0dcc19e835d83ba44adc41
258319 F20110209_AABCWF ravinuthula_v_Page_122.jp2
ed4afbabdd9264cd8542cfa067aa676a
ee60cd5962524ee1f76c49ebef6e13905beacb1a
F20110209_AABBTD ravinuthula_v_Page_020.tif
260b73a4d96bddafa9327d930b708cd8
87751bade0281aff25af9e062a8ea091b833b867
F20110209_AABBSP ravinuthula_v_Page_006.tif
3278a0f76bd1a942a18a5557cca9c590
13c118b6aa5efebfdb7e12bc4f2f386863fc9349
676760 F20110209_AABCVR ravinuthula_v_Page_106.jp2
5001c6e3a5225cf0a45be8dc8bc2d6af
795a4bd7654327fcdb6bf1c965138a333f47e922
5238 F20110209_AABDBN ravinuthula_v_Page_128thm.jpg
c47e15cfe6a1d5d672e18b78fa791eeb
3c70ea44d70ec40ee0a401f762ec0769e4195cb7
3392 F20110209_AABDAY ravinuthula_v_Page_113thm.jpg
6681875421958735a1736f98799c48bd
e45943ed4a4f4b7f470f9008b973ac05960b99e7
204970 F20110209_AABCWG ravinuthula_v_Page_123.jp2
9a7cbd55dddc894c0b9829c67822040c
c7c524fdfb25bbbd98ab20edb0d28bb8925dfaf5
F20110209_AABBTE ravinuthula_v_Page_021.tif
e0a99ccb0ff84e5111e1def60f093add
a2333063b7c87f766b7560fdf8086715265edbf7
F20110209_AABBSQ ravinuthula_v_Page_007.tif
14ab01862745574b4a2baf57e14fa0e8
6d085a66b91b8385db1ba02ca0beaa6dc15a7c76
640028 F20110209_AABCVS ravinuthula_v_Page_107.jp2
bd68de873b2e3f74a5538b60ac1859e4
73a136c3e1d8f33a80ee55f16d0866f0bf04f27c
2379 F20110209_AABDBO ravinuthula_v_Page_129thm.jpg
c082fa122ab78cce6ad1065027cfae23
615a85c422c8e620357f45c804ecce79cb8da1da
3248 F20110209_AABDAZ ravinuthula_v_Page_114thm.jpg
e65171db6c7f3f4e1de8f62881faa4f9
fa2c68892588adbd9896ad9d3d907d44eeae5c55
720263 F20110209_AABCWH ravinuthula_v_Page_124.jp2
6bf4aaf9a04c47b3d3be466d60e8613e
2dbbcbba86307fb6528ff09adf0bacc50b55d657
F20110209_AABBTF ravinuthula_v_Page_022.tif
b6958e1ebcbbc914cfc475c7e218c0e1
551e7c37d2665f4308e02cd06c561fc63c1efcf9
F20110209_AABBSR ravinuthula_v_Page_008.tif
ef78bd9582e1a77f32b64a3e37e166c4
5742221e78852974d1647b7fc42e26f4e23d9d2c
548324 F20110209_AABCVT ravinuthula_v_Page_108.jp2
59d404bbf611ef716b0135551a0d4531
db07df6832b9e828d081e96ef5eda48912c6e62c
412168 F20110209_AABCWI ravinuthula_v_Page_125.jp2
eb5141950fa8f24556495f0afbceef49
d74fe213f46c459aff80b181d690fec4e032a607
F20110209_AABBTG ravinuthula_v_Page_024.tif
b7af2c6c2f765f6627e51208d8f816ac
47bdda60f5a64bbf8cf2b6c37cd7f01120ac2706
F20110209_AABBSS ravinuthula_v_Page_009.tif
74478dde6c34376eb3028220793ae288
2385600fc46c198bb39dda94f7a384d1a650027a
1051970 F20110209_AABCVU ravinuthula_v_Page_110.jp2
6cd3ed4c4eca6ec2992610e004a91a54
411433769d39d7e2d050a5b5682f18adb10f76ad
4910 F20110209_AABDBP ravinuthula_v_Page_130thm.jpg
e9d994dd0fe2ecef8f488b7fad78f3b8
3d979101e31732fd573a80f3b58111814353cd86
627930 F20110209_AABCWJ ravinuthula_v_Page_126.jp2
c6ed99865b2d233d3d37d9e580aacd8c
f6df1a88df583b322023fd809790a556f46d250a
F20110209_AABBTH ravinuthula_v_Page_026.tif
fbabb1616c2d9dee58148ef14dfd101c
0f6f63cd481b29ec3e7f710458760d1f9aeb441d
F20110209_AABBST ravinuthula_v_Page_010.tif
c62d90c74f862bcf4cf2816b4b2071f3
d5e780e5011011dfa60e2e6dd36a7a7e6db059f8
809045 F20110209_AABCVV ravinuthula_v_Page_112.jp2
5954cd7aee1819120a3668745e1ffd32
cd0fc4874ea7a02f29f01d36a26084ae8a5bd1dd
5673 F20110209_AABDBQ ravinuthula_v_Page_131thm.jpg
9b606d2bb2445c2cb379b9cd96996d2d
2e6b7bbf0beca9da4dd949ff67b74bafe3b022bb
1011914 F20110209_AABCWK ravinuthula_v_Page_127.jp2
49772e3a3f0587cfdb0ea39088937029
6928f3f7742dfde7fc214c2bda683923fb9a348f
F20110209_AABBTI ravinuthula_v_Page_027.tif
ea0086af8a044ee83cc6d92bb62fb5c8
244f040411c695bcea5a3115f796f692e1ae1921
F20110209_AABBSU ravinuthula_v_Page_011.tif
597e140c070e95bfa20ae605a0415a1c
da8fdbc613e2b157ba2ddf73f01f6cb94e1909f2
467021 F20110209_AABCVW ravinuthula_v_Page_113.jp2
f08c48786b7557c4fcaa30277d9eacfa
927033c7e318c7455e3b1665510dc40800566d10
2523 F20110209_AABDBR ravinuthula_v_Page_132thm.jpg
297da95c6cfc832aa3fdcce666a54f32
f0daeeaf7454915686f4cd4ae74cff2185ac3cf3
4469 F20110209_AABCXA ravinuthula_v_Page_011thm.jpg
c71fd98febf5f08c80e6fb6f3fdd87d6
bf76069df72057bcec7e9304dd4c66a80676c971
458587 F20110209_AABCWL ravinuthula_v_Page_129.jp2
71ae577ccec6027d3f4b0dad5b3400c0
745ffb6eb22b6d09b7f16d7f14955f533c6f7969
F20110209_AABBTJ ravinuthula_v_Page_028.tif
94ac88ddc9025f4ffb340b42206fbe54
5790026683a87ef1e0c47e9de95b04e574efb0e5
F20110209_AABBSV ravinuthula_v_Page_012.tif
05387de0c5a56fe2ba6015163b2e5dd3
6a5ac22828a28893d262c046527a5c82fcea1bd0
478432 F20110209_AABCVX ravinuthula_v_Page_114.jp2
a6e995f71b69d105123ba5402e8bbe3a
58e72dbd710ad2151f0893c461c6c6569a18372b
2874 F20110209_AABDBS ravinuthula_v_Page_133thm.jpg
ed9239161eaae004850d2ef92440df94
1de56b08b4a3ac2c420ac614b7cc175dde0c1905
4336 F20110209_AABCXB ravinuthula_v_Page_012thm.jpg
7552d12af59b37919b58490a61f9e3e0
5c091b563d72315313d5b588fecb79b7e9656c7a
F20110209_AABCWM ravinuthula_v_Page_130.jp2
734a4c9eef4fad24f162acc87200947c
bd7450e4962e8fbcbc5712f9bc0476668e680219
F20110209_AABBTK ravinuthula_v_Page_029.tif
2444e6f86dac122834979c1b37fd1e5d
c6a140d1bc144dda0e64cb74a61e42fc29dd3139
F20110209_AABBSW ravinuthula_v_Page_013.tif
367ef203076193d7feb5f4db25952cf1
33c8e81d4c93f0e340c54561f1c848df2cd72ae7
880540 F20110209_AABCVY ravinuthula_v_Page_115.jp2
98bfe3974763f0418029f4fbbdf1157a
883a3694ba5ec925f984efad0079d41a71eb98a0
1992822 F20110209_AABDBT ravinuthula_v.pdf
ae3aaf5c4efc153c99d07ea17f9bda7d
c315b32b6116583d593d0e65b4c1e29a58e850e2
927 F20110209_AABCXC ravinuthula_v_Page_013thm.jpg
6d4e52ae7ffac38d20f774f89cc03b79
98b4400eacc278dea7e0bf2a4fb17be1d6bf5e46
1051973 F20110209_AABCWN ravinuthula_v_Page_131.jp2
98909d7751fe64ccb75d27f0010a1eef
ce6211130cd30c1afad70486c78563da17d2529f
F20110209_AABBTL ravinuthula_v_Page_030.tif
9941cdf153c132db4d2e63d34e25da80
eadbd0b9fb85f806d66bfaaada84316abbec96d2
F20110209_AABBSX ravinuthula_v_Page_014.tif
d22a462af309b7db8643d4f3dc3d2563
0d92e3ffe5ef50fc0ad6b854891919a734e4255d
605395 F20110209_AABCVZ ravinuthula_v_Page_116.jp2
b86a6cbcf531812c8f725022988d8876
2dcbd1d86cf2a8da5eb698c1411264236b6d7a75
F20110209_AABBUA ravinuthula_v_Page_046.tif
c10fcd78fd3c34f71f5ca0a9b5282251
5f75bca6cd398afeeecac1d6a1eb615b6947a8ce
159975 F20110209_AABDBU UFE0015625_00001.mets
a760b91b1699778c34ec13f8276b487e
5f9448393dca349d08ea8dc7eeca589d583760ec
4383 F20110209_AABCXD ravinuthula_v_Page_014thm.jpg
d3d042e2832e449710616655b05a1ab8
d4a979e2bbb5d6efc88390ad4f647a1b33bcf650
509417 F20110209_AABCWO ravinuthula_v_Page_132.jp2
101dd0bd22848c6f5fe61a77b9b49ca5
5a4bb3174194d251ab9a9433346ccc8d0e996d2b
F20110209_AABBTM ravinuthula_v_Page_031.tif
0dafae2b565b4a114bdc1469a970516f
28bf35764d5733f577dc02f2d726251ccd48c5b9
F20110209_AABBSY ravinuthula_v_Page_015.tif
2cbe5858b567bac7d1bb329b7eb543e5
b00542164bb7735c700cb403d00474e74282bd2c
F20110209_AABBUB ravinuthula_v_Page_047.tif
fbf2957aa978e4632738064857dcecd3
66d9099a75ba2fc876066a2e48ea214c7e43dca7
4695 F20110209_AABCXE ravinuthula_v_Page_015thm.jpg
f02feb4b5d2de468eba98d0a03fc18b7
43aec39964950f119f76e9823506d394219818ad
570124 F20110209_AABCWP ravinuthula_v_Page_133.jp2
99bd355cd09f3554d679fa42b8cfe29d
1b9eb11188561ba011db8643b79468fd064ab45c
F20110209_AABBTN ravinuthula_v_Page_032.tif
f51740b0ae0677a654530eb523ecd096
3b1e18004c49becd4af06053aaf0f312500c4017
F20110209_AABBSZ ravinuthula_v_Page_016.tif
a24585d3a7139cbaf8753634bae5820d
257a528fae4a6d1478eb8c48d268d5ad9b066c80
F20110209_AABBUC ravinuthula_v_Page_048.tif
e05d2bbe151a5bc6a2f9364203ff5fb4
974daeee2179593cffffa2e72c982407c30f5d7f
4056 F20110209_AABCXF ravinuthula_v_Page_016thm.jpg
0df505e8b79ab8adf3db3b68601632a1
02fa7f304aeed018b689b3bacc3779f3843cdf82
1423 F20110209_AABCWQ ravinuthula_v_Page_001thm.jpg
73814ec78e441455d38a56a0b8a7d1a4
c35bfc26ef1786ad65336410fcea7c206f8d8ebe
F20110209_AABBTO ravinuthula_v_Page_033.tif
099e36b4ad6e8d0a421c2e2b9c9ba82f
5e7e73d682c2125b43ceb8bae1e77a998bc73bf7
F20110209_AABBUD ravinuthula_v_Page_049.tif
c97b4ad691f13eb7780e8941b2a42def
eaeda8f353e430e17fc85311c1fd696315788a0c
488 F20110209_AABCWR ravinuthula_v_Page_002thm.jpg
bca5c9e1317a8706dbb4b1ad2d7c62d0
599c4d69505b507ea69a16f1fbcddcf84289f127
F20110209_AABBTP ravinuthula_v_Page_034.tif
3657fd80e8d0fc21ff3ad5255665c351
961fafe9fa5cbd4a2eee9332af0645b35e2c20b5
5251 F20110209_AABCXG ravinuthula_v_Page_017thm.jpg
ef5613d6aabd6590541ee113f3a59261
179bb5e8ae7725ea68956295a91bb87f87edd593
811 F20110209_AABCWS ravinuthula_v_Page_003thm.jpg
c10b76c43b729228579a2b17d7c16143
253798c7e763d6d15116c884090c16607eac0dcd
F20110209_AABBTQ ravinuthula_v_Page_035.tif
4de687b880ced3555a8564add5abf844
ac7ffe740841039345fe9e057663e34d7c3ef9d2
F20110209_AABBUE ravinuthula_v_Page_050.tif
3ae19a96d553d788f3f472048355b705
840902e8b3e078356829aaf2b0bacf5e6f78e033
5249 F20110209_AABCXH ravinuthula_v_Page_018thm.jpg
2b06fb9bc35f5d1f4fb8f5e772203491
a6d03d45870fb20ec8447321158b523d96a4fa11
4612 F20110209_AABCWT ravinuthula_v_Page_004thm.jpg
c00d64d4097e7a1a0357c2ca976eb470
5542e5825eed9ac4d3854b744f051e157e0a0bbc
F20110209_AABBTR ravinuthula_v_Page_036.tif
0e2e72aaef2e069880f4585802ad6cb2
ac1cc14a3d6d00624eaafac684691d0edaa3bc87
1781 F20110209_AABCAA ravinuthula_v_Page_069.txt
d76337c41b8fc04366407129e08b954b
678a1a33b323015893bf50aadc8f84600aad2def
F20110209_AABBUF ravinuthula_v_Page_051.tif
cda58c41fb3ce2806603e3df3d412409
ce00f98d453da611ed414896269b7078a5486d68
5041 F20110209_AABCXI ravinuthula_v_Page_019thm.jpg
d9192a80822ddf647bff3590f905bffd
f85966a836f2571321dce2237e996ab8e8bd3a45
791 F20110209_AABCWU ravinuthula_v_Page_005thm.jpg
66e9e4020e09dbd5ba26bf3ee3b041ac
6c83bb10044119a3c8b36dd099d9c652ee1dcd10
F20110209_AABBTS ravinuthula_v_Page_038.tif
163a37f9cb9a7fbcc8f8d9cf263661e3
8a07353fcad80824df46bb9bb9dac1582dcb42cb
1872 F20110209_AABCAB ravinuthula_v_Page_070.txt
764f22dadcb892e8ab16ff8304362048
d07a3d7d3c9a0c4288193637f6acb0e6a9901ade
F20110209_AABBUG ravinuthula_v_Page_052.tif
277febbc94eaf76c06c4eded8fb2e609
3d1f1a4358907cf5cbcd13930a1eb8a16a16fcec
4243 F20110209_AABCXJ ravinuthula_v_Page_020thm.jpg
c3d85b0206df6f1c2780f93e97a4e2a9
3e6661ebbad0707477cec1f2485d27a08c263db7
3470 F20110209_AABCWV ravinuthula_v_Page_006thm.jpg
6ff3485d197c0facf0c75febd0861bfe
28535b3185e5113726f95004b001fad648d125c0
F20110209_AABBTT ravinuthula_v_Page_039.tif
795de4ed92eaafdf6df5517e974db0ab
c7f9c1f211ee64fe992476179f203559d086a4a8
2068 F20110209_AABCAC ravinuthula_v_Page_071.txt
4fd0fd6c0a52aa2e6353b2afc665088c
2990282b44043dda7ff32a8ad613ba65f8fae833
F20110209_AABBUH ravinuthula_v_Page_053.tif
86d9b741dd7107159238da864cd76f00
ce65e9b35e2cbb7605c01cfb4f8e81729642a7bf
4446 F20110209_AABCXK ravinuthula_v_Page_021thm.jpg
043278d10bab073210315e9abb6f1027
f26b47dc5d0a3f5e57650c4eb7e0f1890dab2756
4011 F20110209_AABCWW ravinuthula_v_Page_007thm.jpg
e8917c9507a8f286866207a36fd0dfcf
6ebb47a96917840deba210c8b3a9e7bb54d86ed3
F20110209_AABBTU ravinuthula_v_Page_040.tif
35cc72a1c2cdcf6bc8443c16654ac33e
a58e925c38e106d76f5a5517f8d806bf39bc29b9
1513 F20110209_AABCAD ravinuthula_v_Page_072.txt
2349978daef4124f3d2510badc051f35
ff8cefbc3c5f8da0068cd89842dbaedf261d66bc
F20110209_AABBUI ravinuthula_v_Page_054.tif
6981cbea7e846ded77b8f44efa70c015
5df1e5e6953da0bcb97fad4fe5ce519c30993ae9
5546 F20110209_AABCYA ravinuthula_v_Page_037thm.jpg
00fcab07df936dbd163db51fceffdb4c
a46e20cc94129ea6a821e982719a566eabc1e361
4131 F20110209_AABCXL ravinuthula_v_Page_022thm.jpg
7e24e45dd63c5a4c1d2aa83c2d5dbd72
159555576bc3707ac36d88074a276999bce14396
1952 F20110209_AABCWX ravinuthula_v_Page_008thm.jpg
9c116acd6386aaeb5a5a3edd03c80984
b300d29856c58bb98d6cfb3bb446a773f3da94d4
F20110209_AABBTV ravinuthula_v_Page_041.tif
8fa5f7d748941c656cf6fdb8815a2896
74ff94652db3b7a313637234234bd86b234ab7e7
1778 F20110209_AABCAE ravinuthula_v_Page_073.txt
2ab8325cf6185f7e0897a18b334008ed
4368cc4fe0c29e7f4c485d56043623e82e0e028a
F20110209_AABBUJ ravinuthula_v_Page_055.tif
1651aea787ec12121fba2cef23393189
03acd026dd08c7ccbb99652764768b6a8bc822ba
3014 F20110209_AABCYB ravinuthula_v_Page_038thm.jpg
111101c47667b8b0bacb8d7b74008556
21d48724b244ccaeb077852c731b11eaa6e8cb68
4177 F20110209_AABCXM ravinuthula_v_Page_023thm.jpg
3342f1d6cc0a216429d85376b7290e8f
085a7cbe05025d5c9dc515ffff1bd958e077454d
1279 F20110209_AABCWY ravinuthula_v_Page_009thm.jpg
eceb0076dd21930956d559f3594e082a
dfc687f6336f2b363233efdf1ab0f259739da087
F20110209_AABBTW ravinuthula_v_Page_042.tif
e42d88be0b49460fb76aa454207222ac
0285d101ea5b8c2ed6b61b86175b2fcf5d7b2365
1135 F20110209_AABCAF ravinuthula_v_Page_074.txt
457d535ab7410012ab7a419b21f19012
133333359e7772ce9a2299fb674304365c496429
F20110209_AABBUK ravinuthula_v_Page_056.tif
8bcebf6c7cd59cb512212fa06ecef66c
ffe0a92550cbacbdbe603bad1352539a8d9578db
5300 F20110209_AABCYC ravinuthula_v_Page_039thm.jpg
145a6754e02a7d5fc3f030b5335e1a84
2bc84511340e3121324a507ba25e8916880328b6
4312 F20110209_AABCXN ravinuthula_v_Page_024thm.jpg
6fc233e6606332e94b88dccf3da20529
ca3d469b3509a1cef60d590615d9dcef7720ddb2
4128 F20110209_AABCWZ ravinuthula_v_Page_010thm.jpg
2588087610193f47a3db7469f6cb69ab
01b4df0929c1204bfebf86186767c4fe1eb8c122
F20110209_AABBTX ravinuthula_v_Page_043.tif
2754d10498a0d3f8e074604c117b5853
6047f31923ccdbea3cd5084138d254c63db8e43d
2293 F20110209_AABCAG ravinuthula_v_Page_075.txt
f3ad1f7dbc0078b0d5d028dfa5d3d573
f7ecf9dfd8b670fbf1c467d6d863ce8f362a687b
F20110209_AABBVA ravinuthula_v_Page_072.tif
7a9b25c09e121fada1edfecc769559c8
84ff60c04268960c2b55ad48c64d500a50998933
F20110209_AABBUL ravinuthula_v_Page_057.tif
60eca0e2c5d2077550094d6668f18215
2a19aeddf80c29ba19e4819d4fb7d422b9bd92bc
3853 F20110209_AABCYD ravinuthula_v_Page_040thm.jpg
b76ca1717a18266804f9b5b4e6b03a88
c3c0a004d19d0ce282fc41775e5cc9e03b2d2805
4068 F20110209_AABCXO ravinuthula_v_Page_025thm.jpg
b3b23ec727f1c13356e42bba2114b6eb
09ab6b8dffbb798579210b608ddc4fe0105a4a2e
F20110209_AABBTY ravinuthula_v_Page_044.tif
4ce81e5f7332d4cecd497ba74dea179f
6927bcd10b1ce710176406498138cb683fb9760a
1051 F20110209_AABCAH ravinuthula_v_Page_076.txt
1e4a0ad52a8b535b91f91c2eb304d3de
cbc4616b9cd9c97650e91eb5333fdfacebb82649
F20110209_AABBVB ravinuthula_v_Page_073.tif
c0ec195224eec90ac0b9d63bc0d58ce0
01fdaa69a97ff675963ff085db6ff34981ec0cdf
F20110209_AABBUM ravinuthula_v_Page_058.tif
d13ce310072d109f546cdf8839798fce
8549730d39e32bc0f8c3d591ceb4c4f985696ab8
4219 F20110209_AABCYE ravinuthula_v_Page_041thm.jpg
357d3e5ceb4c8b6779eb586276f41f12
180c969ef9d46260be83b8c3162fad951001334d
4325 F20110209_AABCXP ravinuthula_v_Page_026thm.jpg
e02d5468926983c8f93d5741dc927410
cd4af9fdca6ad28168ffa792f714232ea0ced914
F20110209_AABBTZ ravinuthula_v_Page_045.tif
fd07a791ab49efc2c7e784dc69d5a92c
b4bb6835668a87aa8032d669daa2e10d929d0f78
2386 F20110209_AABCAI ravinuthula_v_Page_077.txt
476d9ba34cd5a9e138271d5e36998a88
4c97f0aa410e262a78887f01ad585f78cbdf283d
F20110209_AABBVC ravinuthula_v_Page_074.tif
0f8a02f7eb7e619e0c04e0313996b2bb
66251a34c4c9a62d12a40fb4c9fa8318f304bd56
F20110209_AABBUN ravinuthula_v_Page_059.tif
71da76fdea1c45331b288465dcf77848
8e16c95d919b9f09c504edc86f299a7e4cb8cb1a
3314 F20110209_AABCYF ravinuthula_v_Page_042thm.jpg
a62472be3c269979f526480f08b55ac3
f0c2a8b39db4b23acaa71c4db2ff2cbe5c5a0406
4269 F20110209_AABCXQ ravinuthula_v_Page_027thm.jpg
d0c0331df8ba13c9e2d846fbd8eee4c9
9786471d0a722861885cdb03be31bb7b38a01acb
1644 F20110209_AABCAJ ravinuthula_v_Page_078.txt
93771330c2ed8e41bbe31c7ecb03f7e9
46333aa29b7820a205308b606ade26228c4f36eb
F20110209_AABBVD ravinuthula_v_Page_075.tif
1b129cb154408fd07b6e2ab3a005658f
c25e2ecbb43cee0acc38f1e4b704fda0230d689b
F20110209_AABBUO ravinuthula_v_Page_060.tif
4030fbd7a18b9a3e3a1cc7bff9f5f4d7
83008425f870601cc4379350cb0dccebdf00696b
3041 F20110209_AABCYG ravinuthula_v_Page_043thm.jpg
40a0796659c406f5664859cdecbcd963
71f5f5fcb505e7e5415c5990cb770f8a77ad04a1
4288 F20110209_AABCXR ravinuthula_v_Page_028thm.jpg
bc417f32e985b1ba666a449f6084c0c3
67b60c50040b9e2085fcf15eb4f6072872dc30e7
930 F20110209_AABCAK ravinuthula_v_Page_079.txt
760292cdd9c4165843e977dd39de2482
dc75e481284c874a5605a91b8bcc6e490f275c6a
F20110209_AABBVE ravinuthula_v_Page_076.tif
57c45e26e294e0ded0ff3cca9e944ff8
c5566aef2b011b748f26664dc1989cd4b63085c6
F20110209_AABBUP ravinuthula_v_Page_061.tif
4f493b48478bc30a207b8c58a52be6ad
a208ae9b761b62b514220b4689268e7e485c39dd
4271 F20110209_AABCXS ravinuthula_v_Page_029thm.jpg
c393b113f0d66846a02b898379362882
f17b75337bcc7ebee4e5e281b8b52d2facb180fc
318 F20110209_AABCAL ravinuthula_v_Page_080.txt
9aef2e5fcea1f7b085df51bdd3d2312c
4e08db13af131d9aed36b0537ce1718de0aebf33
F20110209_AABBUQ ravinuthula_v_Page_062.tif
6a0cd37d19e72d8bd5cecefb9e581bfb
2d7245e6e036007e02d4066f4a24aae2a7816a6f
5618 F20110209_AABCYH ravinuthula_v_Page_044thm.jpg
95ca6a40b05394e529725e4d4e4286f1
a9157db6d3e11d77b297e09fdc06023a97a3e18b
3264 F20110209_AABCXT ravinuthula_v_Page_030thm.jpg
796c21293bcc042434545f2470ace094
9e03ae74429a567bebe4b564c1726b30156f425b
636 F20110209_AABCAM ravinuthula_v_Page_081.txt
4ad49aeffb39c17ea8a54cd1e30bf497
46e050b2c48d346ea24e41749ae2a83b55990606
F20110209_AABBVF ravinuthula_v_Page_077.tif
5d3238738f6089a3fed324e357bea605
97eb36a361290b6ec721d8df1e9d66513586c2f5
F20110209_AABBUR ravinuthula_v_Page_063.tif
32f82bad73374486afa3eadd3d074acd
b2b22ca831600030aba7c431b57fc81d89e339d8
898 F20110209_AABCBA ravinuthula_v_Page_095.txt
28f7888a2d16b2cb10d5993bee792d30
4e83fbcd7988c316bba449edb0c3c25490c02fb2
5183 F20110209_AABCYI ravinuthula_v_Page_045thm.jpg
53018c0761b503cc528ccd97d3837347
30507b87ecfce11b426ffb1e3a7e476f8ef15506
3868 F20110209_AABCXU ravinuthula_v_Page_031thm.jpg
1666df5e5236c158014231a05d8e4eb7
fc18c1ead5bd3e80a78117d357b68368ce7c45b6
364 F20110209_AABCAN ravinuthula_v_Page_082.txt
cf918c17aec43da050a4089e1122a3fd
2d73d572b3da5f68641ae0ccef747cddc324b91a
F20110209_AABBVG ravinuthula_v_Page_078.tif
32374a5149ac4d0378554add28c20a2d
57f0d0eeee2bcb7a90df85c2fc809f5d41f962f9
F20110209_AABBUS ravinuthula_v_Page_064.tif
0fc65cc7398fe7c07347e3a54c1bd92a
159bdaa59f2cdddbda784e0b2a7e9a2ad87be028
1113 F20110209_AABCBB ravinuthula_v_Page_096.txt
5139466f61e0c3c178436228fa7e7acc
684aeedb6625c1937a3aef3af578cb00d2482274
5434 F20110209_AABCYJ ravinuthula_v_Page_046thm.jpg
b4df31275b5d8980d3466d6eabd284fe
f0c14907c30f5b9167ca5da0daa587fa7d328010
3934 F20110209_AABCXV ravinuthula_v_Page_032thm.jpg
f6ba2732db46e37a3652c9ae9fcdba5f
f80d6f4a46a73e584a37547570a4639601ec37b3
1784 F20110209_AABCAO ravinuthula_v_Page_083.txt
fd827aba85ce6ed2f7bc57b7e16cbc2d
e9c68e5187f067687f1ba9a6e9a28c8a014141fe
F20110209_AABBVH ravinuthula_v_Page_079.tif
76f9cfafcc47c2bea428d90b5fd93d2f
e226b59877b793dd1bd3d3f183604deaef480e4a
F20110209_AABBUT ravinuthula_v_Page_065.tif
f297bef9c6a797f32a2713e966c5ee7c
ad938e0ec9181a5fec955667c11687afe225f1ae
1065 F20110209_AABCBC ravinuthula_v_Page_097.txt
293c8bbf79eb5e544edde475f1598589
1c1adb8571c89febd7697dfa606b1e8e53e5d85c
4437 F20110209_AABCYK ravinuthula_v_Page_047thm.jpg
745f70f0345d079118a2f8dbb6a2a600
987adfd34d5e51e58f74aaf6b6cf1ced468e38ea
3219 F20110209_AABCXW ravinuthula_v_Page_033thm.jpg
7298b08e940341d4e2cb8040bda684bb
72c345f6ce179f7a1486cd77bfb97dc5c68e3948
F20110209_AABBVI ravinuthula_v_Page_080.tif
cf14704b2e6f289e1618b2e0d3361ec6
f7efd9f260a28ad25463dcf2a250941599ca146a
F20110209_AABBUU ravinuthula_v_Page_066.tif
c9ce6832789ca35c1cc419dc8a47e564
56758501ac739db0ec5c59f808ac8fadb939ac7e
575 F20110209_AABCBD ravinuthula_v_Page_098.txt
a019583d99adfd16a0109ff132b137e6
3a9e8a7947cce46138c2eabe4c02cd43b4339cf8
3964 F20110209_AABCZA ravinuthula_v_Page_063thm.jpg
07cdfb1dcfa143c0bdfa6f1c85f6ccb9
71fc9b99f96756227cf39bd202e7ef88337fad78
4529 F20110209_AABCYL ravinuthula_v_Page_048thm.jpg
bc77d6f2b8ff31267c842a32a26142fd
9dd1c5370415650c653c851f479e270ac4ce28ff
2832 F20110209_AABCXX ravinuthula_v_Page_034thm.jpg
45278d51ce3fe34d7d58cd96cb65aa49
00f6e6b6feff3d441078e74585dc20f5ecbfaaba
1832 F20110209_AABCAP ravinuthula_v_Page_084.txt
f398dee7d6f5fbbce4be18970893aa4e
41c4bff48c3a86654c6c664838fb7b7a7e30a56c
F20110209_AABBVJ ravinuthula_v_Page_081.tif
88edef1bca35e0617929d307d5934f97
1d0bfefe0f32ec22e5601bf0df9147f861c1191b
F20110209_AABBUV ravinuthula_v_Page_067.tif
08ba5abb275a08f2c71961f8c669876f
76106d347639000daed72b450ae432fa0f31a8a4
1842 F20110209_AABCBE ravinuthula_v_Page_099.txt
3706b8b5c265a81a4093e6b7effbd8b9
410095ebff2b87a5d9f9954c0405785fc3c8cbaf
3720 F20110209_AABCZB ravinuthula_v_Page_064thm.jpg
37af305e18c54e486211c8644fe13054
d7bcd7146cf0d988fbb5a0fa80763b6f56c5887a
2834 F20110209_AABCYM ravinuthula_v_Page_049thm.jpg
ccfa5a83624256d6a982c63d1b43d794
4f8aceacd325bbf67227dfa36a7fd8766ac33312
4585 F20110209_AABCXY ravinuthula_v_Page_035thm.jpg
fab49f7df563e5536388fe143f85bfce
aaa39714b0ae0bc87c8e8276850d1d1deed2fab1
339 F20110209_AABCAQ ravinuthula_v_Page_085.txt
cb3199a548f3b086ee5ed83939596d46
4526a9db36f2ade5fe44b8e034017d51bd49caea
F20110209_AABBVK ravinuthula_v_Page_082.tif
b5477814d2a3294a6769a00d5fe7e1d4
fd61951f4aa95b752e2ffcbd0d82b7bb6e1b267d
F20110209_AABBUW ravinuthula_v_Page_068.tif
1ea01fa88daa8436a7e3bdd7e6771d98
a03f8ccfad68aa160c4d1cf87d9ac9c930bb1d7f
679 F20110209_AABCBF ravinuthula_v_Page_100.txt
f77115f0a246ad8bae10f430b3bf01f0
cff39abe8b13f7a9858187ed5991fb2cde61b26f
3637 F20110209_AABCZC ravinuthula_v_Page_065thm.jpg
d0f9ca4a83a28d2329815ba6d62d0ec5
50391c1d6a9c5f842af614f60a15cf38b18b1ee9
4800 F20110209_AABCYN ravinuthula_v_Page_050thm.jpg
ad3070f449d875e9cd7f3fc5a7e1d2dd
d48e14eebf20622354b009232d36cbae011f56ac
5093 F20110209_AABCXZ ravinuthula_v_Page_036thm.jpg
cbd6cda31ff73a55f24f51dac48eabb6
1099d4f1a1356ba9cff4051f2d4485d7c3ab00d6
F20110209_AABBWA ravinuthula_v_Page_098.tif
ab535600a3d67c8455f9dd52e8557f1b
18c4f3682f7d738e6444c63b18c32c380002cd93
1515 F20110209_AABCAR ravinuthula_v_Page_086.txt
509b8b7404d25db742fe578f7115b451
6446663d17d125578f7ec320175af421c6bd3cac
F20110209_AABBVL ravinuthula_v_Page_083.tif
2bbb4977a74c70f48b3be82e3167b78a
2af997e067d51504a8a3e7f79f09dc363ea15472
F20110209_AABBUX ravinuthula_v_Page_069.tif
a1cfbfb8972871acf49d9c02684ebcb6
bf671b04e909937e3847a08ed50a8595bf27d54d
1650 F20110209_AABCBG ravinuthula_v_Page_101.txt
b9b60023e0278ecc6bfd0da6d7a24848
130c9bc27186a4d71624d83d237e9a308492fd58
2664 F20110209_AABCZD ravinuthula_v_Page_066thm.jpg
20057b4880e1b703341c15f5beade1b7
7ceb6f8b45887a5ebc3dcff141a1999888f690f0
4578 F20110209_AABCYO ravinuthula_v_Page_051thm.jpg
215e981bc52fb13d26752c5a7f50e0ad
3451a550349430f93960cf5083a939eeeef7c5ac
F20110209_AABBWB ravinuthula_v_Page_099.tif
a81398b1c6138cfe48510f02aa18befd
5b5c60551604602c1aaf2af98a682abe146bb1a1
2248 F20110209_AABCAS ravinuthula_v_Page_087.txt
043d5d5ef7f35f6230abeb1c8ebc4d87
ebe39d3ae35489837d070766d73931ce1e8e6c85
F20110209_AABBVM ravinuthula_v_Page_084.tif
f750248712d99c0dbcb8850a07bfab1d
08cf188989749b6bb9c089214330834f82a8c043
F20110209_AABBUY ravinuthula_v_Page_070.tif
334346f84c191702af017444c3aeb84f
93c6a4a885f0f219395b7d577802d9040c7c1051
568 F20110209_AABCBH ravinuthula_v_Page_102.txt
659d4fc61308bad746412939742d14ff
988fe1205c67ff54a408d7e8cb894d402f225bb0
4439 F20110209_AABCZE ravinuthula_v_Page_067thm.jpg
0b23b6c942a41ecb4659ff3efab9be09
ca9f9cc39735a87341d17edfb422687b2904c6fb
4725 F20110209_AABCYP ravinuthula_v_Page_052thm.jpg
7ea608aa639507b10bf1e72bec2506c7
3bbcfd60a53f5b07f26a4add5ddca5cf33eb83d3
F20110209_AABBWC ravinuthula_v_Page_100.tif
94dea8f0a3ae32c6d7cfffe7df7752e9
94e02d90092faa25384dae6979d278a9ed934a71
2006 F20110209_AABCAT ravinuthula_v_Page_088.txt
01981925078158c63ea8c53856ab5aab
eba892a523fa56d7f25daeeb5d0af453770d8189
F20110209_AABBVN ravinuthula_v_Page_085.tif
b3e33c786522e57f93d8040974f76fa4
ca3f047c13454d5cce60350b59287061e0b0b1c7
F20110209_AABBUZ ravinuthula_v_Page_071.tif
64211a211bcae0d55f295b5aa784f00f
e1367e25225d285b8e435259454d8288b2593242
812 F20110209_AABCBI ravinuthula_v_Page_103.txt
79dac2c0321d2bbe656a808ab34b2a5f
8751ba94816353c6bb889454ae4e5a9e4084971f
4942 F20110209_AABCZF ravinuthula_v_Page_068thm.jpg
7dcc4dcb44dcf7bec83119b4bee7f51f
e63a4db57cd239798fc44fd7fbf0d5762cbb5c23
4705 F20110209_AABCYQ ravinuthula_v_Page_053thm.jpg
05dc926d8669f0d2add89cd65407fa80
5f2d39bbc99b6417b06ef6183fd5a3b355916dbb
F20110209_AABBWD ravinuthula_v_Page_101.tif
58d3928e793559ee99e76ddcb6a95909
1772948829dc702a036765e2c06bd0bfb6b19279
2146 F20110209_AABCAU ravinuthula_v_Page_089.txt
d54a30bf7841e35c4aeb7f8d51bbab29
211592189e315350cb9dff3a239efcd112f2da89
F20110209_AABBVO ravinuthula_v_Page_086.tif
080d562b26e0fbd9525ba7aa4d0e6561
db4e5f44ce3cd0734b705de7d3185dd76ff8d1ad
611 F20110209_AABCBJ ravinuthula_v_Page_104.txt
950553af3fb3e8e15b29079b340f3e18
1036ed04273a5b8ddbceef87de9353e83f37db26
4466 F20110209_AABCZG ravinuthula_v_Page_069thm.jpg
d0c06f32b3b124e87568e2760b136900
3c544b312373610b6ae1acafc0adab5152ec6c74
F20110209_AABCYR ravinuthula_v_Page_054thm.jpg
5d1fd91cba5ac22c2d24ef2ffd14f688
df2529c84a2f9799970bffcc221222d095b36a36
F20110209_AABBWE ravinuthula_v_Page_102.tif
218f7caa252958a81fc218036016c23a
7e79ff2bdf5924b08d9e860b13374bc16bd83b47
1120 F20110209_AABCAV ravinuthula_v_Page_090.txt
f311524494028398cb2ebde184e45128
d574902b06736bf823667e2ec0f9c3bc2749929c
F20110209_AABBVP ravinuthula_v_Page_087.tif
5e30acc2f81638f2fd9a238f7a61ef9c
2a08636164b4b4d7cbc686cf16de0cd63bcc4470
1510 F20110209_AABCBK ravinuthula_v_Page_105.txt
3fefc9172a1cda45de8e9a180074365d
885966e5d7087c0dd2bc0b2e61d563011eda5c6f
4297 F20110209_AABCZH ravinuthula_v_Page_070thm.jpg
0224c6ad9c249fa4a4bc9b978e9623e2
957da2138aa4ca21f79a8009bfe30024ecaef5a6
1621 F20110209_AABCYS ravinuthula_v_Page_055thm.jpg
c8f6e723e9023bec3c9f4fa142bef55d
90c2e4c719d851ff9538cfb89e3ac1d147d19621
F20110209_AABBWF ravinuthula_v_Page_103.tif
c6c4310bd0790533247cb478cf334da3
9bea91e714d9f41d85c59a067d51d5aa0dff13fb
1329 F20110209_AABCAW ravinuthula_v_Page_091.txt
e64bd8f972d8bf2ffb813d9bb6d7c289
098f304a8ac2a2690ddba0346129a109395fa04e
F20110209_AABBVQ ravinuthula_v_Page_088.tif
e171f76d348c84b8c28026a2c5ddca52
83ff0c2ceede810b621cae32fafe98b5ef2c0ee4
2025 F20110209_AABCBL ravinuthula_v_Page_106.txt
3214c0f8391c2b8634a54caf77f1319c
d9fe214c8bb82a38b1a3070c57be26fc977f5021
4661 F20110209_AABCYT ravinuthula_v_Page_056thm.jpg
b1cce810e19be958893c7037292d3b46
0d1ed95593a3fca3070a3cc64ac478b177557216
1647 F20110209_AABCAX ravinuthula_v_Page_092.txt
82187bd2e8eefd7b6c8b7458d391b149
629ddf5f30c2cd4cff9025a89badf436f831b240
F20110209_AABBVR ravinuthula_v_Page_089.tif
8d26c5906198bbfcd6ec63a060e2ca18
46b6fb098fccaa27dd24646941fca426b9328370
2111 F20110209_AABCCA ravinuthula_v_Page_121.txt
705918a3e49b53a0df6b1b74be50e65d
cc4ebc2e3bb07c5b2aaec675b04ca7920ece037a
1525 F20110209_AABCBM ravinuthula_v_Page_107.txt
ea226e5d99576eb9836429fb9cf475ed
66d9f6332de65cd7384e63fe617cf2d099bb7684
5021 F20110209_AABCZI ravinuthula_v_Page_071thm.jpg
83b6861770ba4cd6c29f9e6e493ead97
b2571d32baf33084b4bd71c49c9fd3dcc1f55fbd
4486 F20110209_AABCYU ravinuthula_v_Page_057thm.jpg
49527d8adf312b18d32ffeb1f9c9b14e
1d1232096ff82568157f6d4f6ca780eaa4e92e4a
1921 F20110209_AABCAY ravinuthula_v_Page_093.txt
ed16de9f0205e46d9de6806d49e6a602
b26138111aad02d0d17c6bfd423a04d62c642431
F20110209_AABBVS ravinuthula_v_Page_090.tif
3c3d9cfdb41f50a7efbfa195430f2245
4484ea1dca9d36e1dec255ca13ab1706f147fea3
573 F20110209_AABCCB ravinuthula_v_Page_122.txt
2100c7df2c02fcdab2f09f7a309526c8
6c2d021af4ec97fbfbe3662e99b6e265b475d5de
2352 F20110209_AABCBN ravinuthula_v_Page_108.txt
07f33920f3c82229010ae57caac3f024
c46b651e58f2b5747d14ec43556040fc52ed692d
F20110209_AABBWG ravinuthula_v_Page_104.tif
882496564f7c102603662fd659d564c6
c0e1edd5e541c4d1d93ea665bdd2a887350b9e25
3540 F20110209_AABCZJ ravinuthula_v_Page_072thm.jpg
a698f588896b1a03a61ceceea8d8546f
a94b0ad4f67bede987d38912c5d35dc913d1c298
3418 F20110209_AABCYV ravinuthula_v_Page_058thm.jpg
4e2b1af6eab9517046131f0aa3be54ff
25516a1759683af69f9894662d90c18204b7e926
300 F20110209_AABCAZ ravinuthula_v_Page_094.txt
ec43cfc19b1e8bc3fac72d9023ae4eb6
2bebaf434a9f88e6751d5e04042eaf35ddf000ab
F20110209_AABBVT ravinuthula_v_Page_091.tif
ae2271337be533f297eac2a28e4b9b62
ba65f6c8c79db9566f49ccf80cee310217bf333c
347 F20110209_AABCCC ravinuthula_v_Page_123.txt
698f40c2ffd58956b96bf702dac49f36
f37eece8ce7fa2a23e9de311a6f667c4e88cbd5d
1907 F20110209_AABCBO ravinuthula_v_Page_109.txt
fd999b1fc10ce227c9e7a1e4e3c2e351
4e67fc85c13844fc6ab1f1f0743aef5dcedc155b
F20110209_AABBWH ravinuthula_v_Page_105.tif
15fe90035f160b7a24e06eb8092a2576
5e9ef7a1e6d2e8dd127714ad1e6a595afe9e0f6d
4235 F20110209_AABCZK ravinuthula_v_Page_073thm.jpg
0ba3b2c416c16cf7e97b265916afefe0
b8be2e7d06fca717f63fee43615b330d03525640
3589 F20110209_AABCYW ravinuthula_v_Page_059thm.jpg
ac0a767a729461c49ad39fdf31c2884a
dae652b531c0096e9a80d4109160f867160ad7ba
F20110209_AABBVU ravinuthula_v_Page_092.tif
26b38d2a8016630fd032cf6f0ff88083
7f079bf3c4002cec11eedd44649c16aba53d565a
1316 F20110209_AABCCD ravinuthula_v_Page_124.txt
5585bcd4002c601c7fcaeec6b58269be
077eb405667f9492121a40d4b0469e9b42393373
2371 F20110209_AABCBP ravinuthula_v_Page_110.txt
20fc4678626fa062f9d04768d43132f1
9a01d6505c9b0971b379227ec38330fed49e5455
F20110209_AABBWI ravinuthula_v_Page_106.tif
d152db6c7fafbdc01e43e15d73d5ec33
580761b07c05d2d86a0747b977cf25d8525a6a8a
3260 F20110209_AABCZL ravinuthula_v_Page_074thm.jpg
ae003a56e9d8e1da6e1c8ec1f7ca6285
09f47fc561c9a36d3fdebdbb3a0101323206a9d3
3832 F20110209_AABCYX ravinuthula_v_Page_060thm.jpg
a4600cb1c3841645f8db2b9aa182fd05
183c8496b68197e7451e2f6b73fc0828cc2db549
F20110209_AABBVV ravinuthula_v_Page_093.tif
35452653d2d6b1ba04bd85168e130d8a
a4b2895d8096f4ac05959b621330ec9ab4655650
462 F20110209_AABCCE ravinuthula_v_Page_125.txt
947a1ee328cda422d7730701b154d7f3
cb5998d9af942e2318561aadae4f82d732f7423c
F20110209_AABBWJ ravinuthula_v_Page_107.tif
037a2d050c8b466e8364c9b207445703
da9750dd8fa25a569d3c92915520457df5cd48ff
5637 F20110209_AABCZM ravinuthula_v_Page_075thm.jpg
91bc6c02b84f5cd5c2357107351c64aa
1eaaaad081a6a59fdc3d6e5551cddbd7058b0ad0
3659 F20110209_AABCYY ravinuthula_v_Page_061thm.jpg
de7ee724041687f5cf4adaca3b0f2ffd
e76f57771298b8a1d9b999faf38a1bdd3a0364ce
F20110209_AABBVW ravinuthula_v_Page_094.tif
fbee4de5861eb42e52c5b5f8841bfaa9
ed8cd16eb0681706fbc89b71b0e4d0f97a734afe
478 F20110209_AABCCF ravinuthula_v_Page_126.txt
cbeea0390514cc9967035d633da9f049
173b3c6974480a043a692dbd7fad7d85db8c4562
780 F20110209_AABCBQ ravinuthula_v_Page_111.txt
e71de6a4d0f5a798c7f5e2c500ace342
139a29b17c46845750dd2593054b01d5abae1862
F20110209_AABBWK ravinuthula_v_Page_108.tif
fe98f902b6a5f31fe05b483bc9f8c2e9
6df00cf55127eed4506fb5b84f4df5da44ebf547
4473 F20110209_AABCZN ravinuthula_v_Page_076thm.jpg
97b1e0f50ce28a511e05ce4c5e8a6d95
58f6d4a3d117f6362092b7d317e4fc0930a47201
2782 F20110209_AABCYZ ravinuthula_v_Page_062thm.jpg
df29328664d1a9baedb991cd5a766b2a
107d7d2cc7cd9a0994a133366089cd0eab70a5f3
F20110209_AABBVX ravinuthula_v_Page_095.tif
b64741446c63059f931395bb43fbe453
4b1c7bd864ce96ed7e7df2c738fd8e27a3df6fdc
1886 F20110209_AABCCG ravinuthula_v_Page_127.txt
2351caea040e115420dd3a22e560aaba
13bdb1c0cf7a2fd971795bddf0a1740d7ec2239f
F20110209_AABBXA ravinuthula_v_Page_124.tif
8fc0b6974a45ed15b43ffef5b30effa6
06a29b17d428e1e7f063c39f1bca2e8c58010353
F20110209_AABCBR ravinuthula_v_Page_112.txt
61e0bab7c6883bd2d46c4a4f708df02b
cfe86f93d733d59cc76a7e0231225a5f57b4fcbc
F20110209_AABBWL ravinuthula_v_Page_109.tif
2f353ba26908080ad9bea3aa253562ad
6107a52f8c4b6d98a8502069312de8e97a8f5c39
5391 F20110209_AABCZO ravinuthula_v_Page_077thm.jpg
d689b7f20ce8c3169e55929b3f06fd45
34fcb681b43929a96743f947f864aafe92e012fc
F20110209_AABBVY ravinuthula_v_Page_096.tif
d4e1518d5815ff1f35d1058be9206b51
3b6ff7585c079bbec73cf08fae5e6c2db21a978b
2031 F20110209_AABCCH ravinuthula_v_Page_128.txt
017e6ac86329d635e88d863df5e4ba6b
ce70b55984b70be591bd30827d82a43e74706fa5
F20110209_AABBXB ravinuthula_v_Page_125.tif
55d70a16aa6cea9506c69f516705720c
93bf1517b8bba1b544fcf05ccc0b30129b5a1774
996 F20110209_AABCBS ravinuthula_v_Page_113.txt
bf97d5d5a7b04ae600c3925509400745
11845c5fd0ea155699c0a643a9d7fffefcb9ddcc
F20110209_AABBWM ravinuthula_v_Page_110.tif
605d5292996d43e2df5ddcda7f3bc13d
7178fc5d4d11187d7e3698f6defdf98efb4dfb01
4706 F20110209_AABCZP ravinuthula_v_Page_078thm.jpg
b8e63b22b6779ede7cbdb5958b37dc88
d5a8ebbca4c497b1fb0afffcf00526e65bd6148d
F20110209_AABBVZ ravinuthula_v_Page_097.tif
16bb8b5e41218f8130940c81067ef32b
57330d602af733964e0b597ddbeb13ff8dde3e9b
815 F20110209_AABCCI ravinuthula_v_Page_129.txt
19a637e9b0672a02b97e3beb22fd2e09
7916a21ed1659e8ae34256c3b378ece9250aa5f2
F20110209_AABBXC ravinuthula_v_Page_126.tif
e26636f426a7e24d79dfe4dda99d2993
9eaa07af0d4b7c544442942f39fcbddec87bfdfc
1639 F20110209_AABCBT ravinuthula_v_Page_114.txt
bb4b4a0189ac8026c3de2acef990c76f
3ef249f6570199a0094aad8e54fad326f9d6b554
F20110209_AABBWN ravinuthula_v_Page_111.tif
bcf11f3e98e2077c2496ac1ec9de5b53
5f6b60d542c820c7a218b3b580a9519928901489
2693 F20110209_AABCZQ ravinuthula_v_Page_079thm.jpg
2b06a9f2ab558d594cc63d5f18bedd31
a64ce39cab9e4c4086880401786515fd259b9da8
1986 F20110209_AABCCJ ravinuthula_v_Page_130.txt
e9e4e76415ec87b1df30ed8d3d7cbbdb
da883cf42cdf429eef759fbf72c0bf7c1e2014c6
F20110209_AABBXD ravinuthula_v_Page_127.tif
29a32fe3f7cb5db8ead3a89d4cbb6bd8
547ffdbe9ebc252f4fba42358a45b0d8272cd595
1640 F20110209_AABCBU ravinuthula_v_Page_115.txt
eb7bb30149ee6a6181d7cd23a2897ffb
7221037abef2e3b16c8fd2d4f8b841503eba85d8
F20110209_AABBWO ravinuthula_v_Page_112.tif
53f3ec8a002e266cac72cbaab051ec10
33fef590464a6c256cd3a25b18d97d78c569ae31
2157 F20110209_AABCZR ravinuthula_v_Page_080thm.jpg
5bc216b8e48c1dd6139f316f95ce7d50
d774b41187aa38111b51e1e468056ef14ab6e8be
2298 F20110209_AABCCK ravinuthula_v_Page_131.txt
d3498c1d0d12ffac41213fc412a47769
055332eae95625415cab7fa5cae891ae19fa5a0a
F20110209_AABBXE ravinuthula_v_Page_128.tif
ac33f362ae3d2eb263165fd16e217b79
531aa6cd94c41e9862c7699b2f29668ef7d2ef66
1718 F20110209_AABCBV ravinuthula_v_Page_116.txt
1551411a547e2f0614e447bbad4fdb2f
3f76bf145ef917a94442d18e835c53c6964a6a30
F20110209_AABBWP ravinuthula_v_Page_113.tif
c2e4a597e3b179658c657dbabbf47232
ba9a03f985d0893129469b34d98f6731a7f8f7bd
2183 F20110209_AABCZS ravinuthula_v_Page_081thm.jpg
23f11f5290395bba24e880799c0bc8da
ae5c8beaf742fb4418e43ae311a9df818c2067e3
913 F20110209_AABCCL ravinuthula_v_Page_132.txt
836fb1504015ffb1153507821a6f08b1
2da3dcc53032b20c3e34eb6ca8b7c9cada9b50c1
F20110209_AABBXF ravinuthula_v_Page_129.tif
32158dfb3cc271d9f1a4684a5deb13ae
b93f39cdb81c8402bcb9d2b6de3995e0e817798e
1887 F20110209_AABCBW ravinuthula_v_Page_117.txt
4e46fd541ce7a622750e22d09af1e977
46db49ac681bc87d4b8079ebd5a4cab0779dd90f
F20110209_AABBWQ ravinuthula_v_Page_114.tif
92ec5e55d8e9c0b7a28f5fc9df2b8007
9b182981c6bc843bf734b1c167b097890aa493a0
3138 F20110209_AABCZT ravinuthula_v_Page_082thm.jpg
2aa754bba75bc057ee22893d78288a21
938ce3ba9d1b72869a26102a61293a1b08daf358
50841 F20110209_AABCDA ravinuthula_v_Page_015.pro
8e71851b7efc9e1e5a0e8fbbdb7a088c
11d28552036d212d3a3557099d1f0e0d2bde6ffe
1036 F20110209_AABCCM ravinuthula_v_Page_133.txt
ea730c4c50d3585fc2f0482e95573294
a2c71f1d9b9ebb7e7a7d3d7e2e405da34a84ff34
F20110209_AABBXG ravinuthula_v_Page_130.tif
c537868c7b367297e141ad11abfebb12
03ca76e3b921c6af8acdd88bdca9386324f66a2c
1628 F20110209_AABCBX ravinuthula_v_Page_118.txt
40f62447ba3a802ce803ba6837a83279
47c6453d8d8fd1acdea0e25ee6ee9e31da2b9029
F20110209_AABBWR ravinuthula_v_Page_115.tif
2e5bcbc95a07e9c1fd98a3190f99b5a3
e8656d316a63a6e9e482bb0042fcabe84747d460
4654 F20110209_AABCZU ravinuthula_v_Page_083thm.jpg
680a4f47f8b8c2b093c971653091095c
88de4812774ebfa7f919d366655c27576421bb83
32247 F20110209_AABCDB ravinuthula_v_Page_016.pro
c14d140d89acd15576ca709790bffb81
e8fb036291015326c646d4289f8b40cf56abe022
7387 F20110209_AABCCN ravinuthula_v_Page_001.pro
8177a3ccd99d20d955100f6d1dac9ae6
0f37796114d3a26738cc3f738733e740a88c0248
1495 F20110209_AABCBY ravinuthula_v_Page_119.txt
93b0e736a7dd6bd542af7ca5fc48dc06
86a7d4f7280b76c33744072f1e04435917b8c868
F20110209_AABBWS ravinuthula_v_Page_116.tif
9431e078380dba7ca914d4acd7becdb2
017a27a0f95405f92a9f0b86d564066c71876421
5022 F20110209_AABCZV ravinuthula_v_Page_084thm.jpg
a28ced87b50442046dc54f21024b8e41
10347f3eb12e4a277c03a93d801b1b3fdf6f9a34
53169 F20110209_AABCDC ravinuthula_v_Page_018.pro
bfd29d4f96878920348a82fa3d6ff1cc
d66cc9a41b95fcc35d0214cb21161f1641f9a56e
1258 F20110209_AABCCO ravinuthula_v_Page_002.pro
a499080205fe22a2627ba58c8c228c80
a02ff5ab1002a76d6f6cd9827c34d2f2d9ba2610
F20110209_AABBXH ravinuthula_v_Page_131.tif
1cb3b06a6ae38878a7285512abbba938
b0db62b0873bc549f83d1698bd0d6363d2bf74cc
1924 F20110209_AABCBZ ravinuthula_v_Page_120.txt
bc83637d8e8d18a7ca695558cf7ccc4e
d950a78c8b0fb352d4867acb8540e2da595c655f
F20110209_AABBWT ravinuthula_v_Page_117.tif
0f25b21a7fc5839e9e6264e3f0b54afe
66a7920d06da40885d0cca1cbb8d40f93347c5e4
2632 F20110209_AABCZW ravinuthula_v_Page_085thm.jpg
3b7323920ef18bcbcf345a80aac3167d
b4530172483e5b09d5097ac39106c2b67b665b1b
4233 F20110209_AABCCP ravinuthula_v_Page_003.pro
ef4a58061aa9946333eb5b4e3d85a75d
28f2f409c339edba858d776cf1d83a7e201a3ab8
F20110209_AABBXI ravinuthula_v_Page_132.tif
e1b33640d1ee06a6fcc82fc9e241ae9a
a981f32cc141ed234f612578d2e523092cf898e3
F20110209_AABBWU ravinuthula_v_Page_118.tif
1b7219ee569491e3f0e6f72288bfaee0
9859d93872d1fab0c79733a1db01ec77477f38e3
58990 F20110209_AABCDD ravinuthula_v_Page_019.pro
9b56b58ee3c36e97649ab6b92e594eff
bab88ac78a9d8141d330f76c93b4b5f75085a122
4091 F20110209_AABCZX ravinuthula_v_Page_086thm.jpg
f1abe16035f020e3a313ca119bc0c294
7ae426d9e0bdf860eb91fdb5daecca7de530eb99
40732 F20110209_AABCCQ ravinuthula_v_Page_004.pro
ab7840c6f0302492d122a5276e651913
4a18470c1e3e9ba30cd8d33f36a8c81b9f0b7b22
F20110209_AABBXJ ravinuthula_v_Page_133.tif
21753be8722c4dbb181e5a9cc764af2a
18a2532a30beb2442aec8f9fbbddcd4c9a08dc8b
F20110209_AABBWV ravinuthula_v_Page_119.tif
3c2505baa78d18098cd89a276fa057e7
a291634d70afc9fc725457a9dec1b028fdbb781f
35962 F20110209_AABCDE ravinuthula_v_Page_020.pro
74cff51ee420633857781a748afd85bf
53d41047cdc19ba8ff2b4050936639c4d74fdfe1
4750 F20110209_AABCZY ravinuthula_v_Page_087thm.jpg
8608675ee66e451773c0d904a8337a7c
c8c64295ec3a0a7a9b65ba813c6fd6e157900f7d
400 F20110209_AABBXK ravinuthula_v_Page_001.txt
c4a31c0051668c6178de5da63ec3ffb6
2abe5a365fc68d0e15ae38e79d97549dc69c4f8f
F20110209_AABBWW ravinuthula_v_Page_120.tif
0701e0745a8c24874a75690c8647c40c
90dc799d26d1edc5467c2b48bc13d3fc3e14c94c
38868 F20110209_AABCDF ravinuthula_v_Page_021.pro
a3c45e7e866c982d6a2db9bd253cc6c7
975499bb613da7e17b354658f2e17086ffdfe797
5074 F20110209_AABCZZ ravinuthula_v_Page_088thm.jpg
edb8383d5ad37f14324a1d34fb730dc0
b1e310add1fafb7c5010d3d917b1daf508345bd8
2088 F20110209_AABBYA ravinuthula_v_Page_017.txt
636a831bd4f26d5eda6bb8380da07b11
2f03910ecf45d29cdba7d977fb2fb9c7729486f3
3947 F20110209_AABCCR ravinuthula_v_Page_005.pro
5fa6a8db2660f8a51b3f723ca4d88822
3b1c9711e4be8e9b10bddc448d347a95a442fe0b
117 F20110209_AABBXL ravinuthula_v_Page_002.txt
1c773a2a4cd5aeb0abd2089f97b167e9
24e7972b6ad018e4a8992c57862fe42bc4c5027a
F20110209_AABBWX ravinuthula_v_Page_121.tif
24998bd29795492e8cc2c72e89e77441
89b2afd674e1bfb44962b50d361d7c5335fbfd54
32469 F20110209_AABCDG ravinuthula_v_Page_022.pro
5dfe45515c0bd43fd06b08541376ce7c
954d7b36d552627936f373deda079e0169994662
2095 F20110209_AABBYB ravinuthula_v_Page_018.txt
71e2ba5fac747c3fc7de9afdafb112ea
13afe5da9a7b6773f2157d0bb2e98b35399f9147
52043 F20110209_AABCCS ravinuthula_v_Page_006.pro
7311658d913dd722dc6bbfc1bd5ebb77
0ba3e4cf6172dcef99cc67dee4bd643dee4ad549
219 F20110209_AABBXM ravinuthula_v_Page_003.txt
6ae2312e2955a970014b7295f99dd24f
2b5b253d4a9821e34f6ffd56b3242af2ee52a749
F20110209_AABBWY ravinuthula_v_Page_122.tif
17033cbf52843f49c6037ae8ebd420f5
fc32f63173777a0d3a435b2423eb02fbdc918cd8
33768 F20110209_AABCDH ravinuthula_v_Page_023.pro
5b269642a8500300598db91f60c51b86
6cb7d770cf3f0b1ef7c2e319b6056672454133d9
2468 F20110209_AABBYC ravinuthula_v_Page_019.txt
08e816dbe3020206b55ebe9eb348446b
2a7ea2077d76ba541555719de3238de3b737947e
68054 F20110209_AABCCT ravinuthula_v_Page_007.pro
b028df857963862322e80d4f2905c5cc
e7d549b47643c56a0a1b1aab6a0094dd4d672849
1668 F20110209_AABBXN ravinuthula_v_Page_004.txt
3753196cc89eca37dd483ea67e1c64d5
ad96fa52d41575656977bdc5cb4590b134cc7fa2
F20110209_AABBWZ ravinuthula_v_Page_123.tif
4cb88adb8db7aae9fabd811cdbd7d854
e818a9c698f2dbf51136bce997543521c1cccfce
39986 F20110209_AABCDI ravinuthula_v_Page_024.pro
05b3e446f90c5bb79f8fe7191a8cfb18
6c0ad4ea188206354b77c515127a7384cdf9762f
1743 F20110209_AABBYD ravinuthula_v_Page_020.txt
660c9804da6885f02bf7ce1181127a94
bfc84112a102b92e13e1bb77808d83f2ffdbbd93
23776 F20110209_AABCCU ravinuthula_v_Page_008.pro
921ea4f10e415449921bd733b986ef37
17986e596ca27319c072e8014c95db5bda46d074
160 F20110209_AABBXO ravinuthula_v_Page_005.txt
3dab7106f435c60bf8a1122fcb204746
3e42e8b044928e0fda06445265fcd57e8e486380
35997 F20110209_AABCDJ ravinuthula_v_Page_025.pro
38b68f69882d1e22fd4644b450012f13
a2b69074ca92d14638dd16643824fe5060bc90fd
1912 F20110209_AABBYE ravinuthula_v_Page_021.txt
87473174db5b7a26e8a642818799e239
ee4c159d4773d1e5dace495425d23cfdc54a3dca
13671 F20110209_AABCCV ravinuthula_v_Page_009.pro
ec5bb5902f9abe826b1b14ebd0ed789b
73ca2c32d7bd75347f8dc73193a60da87564fabc
2415 F20110209_AABBXP ravinuthula_v_Page_006.txt
49a4425e7142698289e82007d9d950d9
34fa75de61382cab1a4efae1cc3739cae70ccc69
35743 F20110209_AABCDK ravinuthula_v_Page_026.pro
5d216c712c78960737ce8fb826a07c9b
0c7f3538ca48868a37f6b2dca6d3043c709a2977
1557 F20110209_AABBYF ravinuthula_v_Page_022.txt
611784e973d862ff85d2ddd4b660e4f1
df774bef057831512a768bb1227d26b7525c2ed5
53991 F20110209_AABCCW ravinuthula_v_Page_010.pro
3ed5e56675a4a67dae91c7f39db07aec
0c2b2d70984fbc5f3698947691b32eb28ef7bc66
2924 F20110209_AABBXQ ravinuthula_v_Page_007.txt
935474a469bdba629f195d72632842da
0b89166802d7a5ea9e8f6e480b44661065ac7788
36496 F20110209_AABCDL ravinuthula_v_Page_027.pro
ccb45e5dcf59d525e52e2b77af330a5e
f2a4029f65e16daea08fe6816d9c4d9817c4fe11
1492 F20110209_AABBYG ravinuthula_v_Page_023.txt
3621c12417e2dd223d98edbed97207ea
5170f8489961db826116cf6be24855dd26972b0a
60034 F20110209_AABCCX ravinuthula_v_Page_011.pro
c790a3885aa51ae670f0ef741da3b4d6
0f6501fd1c1d5bcb2a5b965edd4ef7b85bfae2a4
1023 F20110209_AABBXR ravinuthula_v_Page_008.txt
fee00323e304fdabf27e8c70e5b91ca3
5b31f392d3223676f42c5dd97efebd29caf696a3
21282 F20110209_AABCEA ravinuthula_v_Page_042.pro
73657ddc906b4f7559d0c2164267615d
4c6aafa29a049eeb85c35c870693a0b90e9377f2
32898 F20110209_AABCDM ravinuthula_v_Page_028.pro
920da720c6fc33cde89f8a55ce7a717b
1da44639758d018054dd6e3fe101ccaded3fce25
1975 F20110209_AABBYH ravinuthula_v_Page_024.txt
9c7d77d55e4411f36c92d0706e869998
906c12dae9e7f55a630a656e0cadfc226085c80b
8463 F20110209_AABCCY ravinuthula_v_Page_013.pro
6cfe5cf296aa0e6e8a9e568926e83888
6923737ce6a2fa5d44718e55e59657f99d89d05d
640 F20110209_AABBXS ravinuthula_v_Page_009.txt
8d846b94b2852f67aacb16efe6739b4b
fca971ac34b7c44063d71dce2278cbaf2fab901d
19524 F20110209_AABCEB ravinuthula_v_Page_043.pro
4c441bb728efecd12322c0403c0deb7a
af7b9b738c08a39c71142a1558e6dfb58bd6aeb3
37306 F20110209_AABCDN ravinuthula_v_Page_029.pro
c4384e71460629c6adb1f75782de5117
0e7e316f8ab4bfbda7b662844ee89167eee8991e
41975 F20110209_AABCCZ ravinuthula_v_Page_014.pro
eced246461d3fed2ceb167bead99f7c0
70b5983638a120d6811c75491b01e0b0525c2c40
2201 F20110209_AABBXT ravinuthula_v_Page_010.txt
14ea5660d5a0f238c80716861e927cdf
7df31336be6efef9fa4f394cd3aba8326f3ed6af
54658 F20110209_AABCEC ravinuthula_v_Page_044.pro
04f4d90de6b8009ed9d9092ef8588adc
0f745e7fa1c111cf194063de4ac312badb64cdd1
27627 F20110209_AABCDO ravinuthula_v_Page_030.pro
83d77089ebc750097c9b68a58851c24f
4728aa967e55a795050b5269329ffed10488c135
1892 F20110209_AABBYI ravinuthula_v_Page_025.txt
5096e3f7ac4d000c21c0a877f0df4e95
e415ebe01d96af64e3bbfe9bb23d05574edcee5f
2430 F20110209_AABBXU ravinuthula_v_Page_011.txt
48b21104b8ffa17297b95f7af4436495
6eff99e97cf380f9441f4e5bcd5fcc7618152eb6
49713 F20110209_AABCED ravinuthula_v_Page_045.pro
1bdf344e6b280cddbe4681f7db62fb6d
693435957ec753434161530df250845162199024
30484 F20110209_AABCDP ravinuthula_v_Page_031.pro
aadc0632eb10770b8f2ee595c7d807b8
a1267218be93f45831d562725865dced488c0d28
1890 F20110209_AABBYJ ravinuthula_v_Page_026.txt
c448efba98f3f27a4a360625bb9ba404
b4daa33844c5441281f876a13cddee22c87ac009
2237 F20110209_AABBXV ravinuthula_v_Page_012.txt
05f0cf8480df515efffbf36953fbb536
ef73a0505a237d2ea71c76d698bd71000522001b
49190 F20110209_AABCEE ravinuthula_v_Page_046.pro
5f112ef7bf57380cdab673eeaa25b373
243a8d93f7dfe576b6c7ba565c7c4e3c4e14492b
31518 F20110209_AABCDQ ravinuthula_v_Page_032.pro
82d603c056e3aa1aa4672d0e122530a0
bdcedd49626c2de9c23d87e1564c28e71436b999
1971 F20110209_AABBYK ravinuthula_v_Page_027.txt
c36a5de63a9016edc8e8cd16288f5abd
e588aaeaa6a4b007fa152ecab0b8937c31725493
337 F20110209_AABBXW ravinuthula_v_Page_013.txt
26ff3ff41a9dfbd22a697c3db51eeac0
c9ce1079c904be1aa4576c2f721efd7ce93708f9
45546 F20110209_AABCEF ravinuthula_v_Page_048.pro
d01c95bc86a0ef3fbb662b667db38ffe
fd7ebe2a06b33caee3e1cf65b3f11f3eabc510bb
25771 F20110209_AABCDR ravinuthula_v_Page_033.pro
bac82752b75beafa79c0f80b4e36a932
423fcc3cc27b3f31220a27fe8ecdb14c0a673df1
1901 F20110209_AABBYL ravinuthula_v_Page_028.txt
5449bc8ed57efc9b79a46b69c3f176f9
68a7683cbc88b11dae02e6656b414b937e3e0699
1815 F20110209_AABBXX ravinuthula_v_Page_014.txt
dce1120c3d5f7a1bb3b0d38f572f9aa6
0e302bfb39e2e24b81506aad23c15c9a2e6df6df
16561 F20110209_AABCEG ravinuthula_v_Page_049.pro
6a097944c34ff3be987ff158ef0ecfb0
62509996974da74d2389637f60518429699cd3f5
1383 F20110209_AABBZA ravinuthula_v_Page_043.txt
cf48a34796b3e5b1dfdd6fed1856ce7a
287d663e30b8bfe236b4adeaa276eeffc8502f5d
2060 F20110209_AABBYM ravinuthula_v_Page_029.txt
607a2a6ec6d1afeba839de9b1d360c1d
e95ef14792f44bff7bf04acb13099ae5e44b3353
2112 F20110209_AABBXY ravinuthula_v_Page_015.txt
a7874c6b9318827be8e1b5840d40be93
94cbdca61cf9ceb4e52115c072ade25d822b67b6
42695 F20110209_AABCEH ravinuthula_v_Page_050.pro
2f5ba3f0ee56eb54c2d23f127edaa2c4
fa7eee3328b63076bdcf2dc34bf7978101036afd
2181 F20110209_AABBZB ravinuthula_v_Page_044.txt
523377360db54c81ec40654dbdb17a91
a652bc330e27b824694d9efb997af3101bd3efd8
19198 F20110209_AABCDS ravinuthula_v_Page_034.pro
dbceb53341ec5202f15087f282513280
5c9b7daa7f5316b69937f77e7e90d906095b9cb9
1596 F20110209_AABBYN ravinuthula_v_Page_030.txt
f3d4798ba95d8b137342e0265275781b
e7c982cef376649c866f3fca664279ffda34785d
1616 F20110209_AABBXZ ravinuthula_v_Page_016.txt
51be61c819479f191c1c9f63691ebe96
b29e5b1911a003f923bc315168ec21af7a250d7e
38285 F20110209_AABCEI ravinuthula_v_Page_051.pro
302d929470cde004881dc755c731e2b4
f2c0b30e04a574dba4b2c641e7b86a58705fbe06
2046 F20110209_AABBZC ravinuthula_v_Page_045.txt
34cead516d2ce95fd5d2518485464dad
8c523edd62c029668cb429d89a5ad64519b14bdf
40139 F20110209_AABCDT ravinuthula_v_Page_035.pro
a67ab4bbd9a1d73aaf8ca6d0e491efc8
2fecc7118058e86a340f66727c4576af9b7a4f84
1883 F20110209_AABBYO ravinuthula_v_Page_031.txt
60393d91b3ac7be61e744683182c2e91
80e08c494b88ea6d7474df635fb314e2e1e76265
43644 F20110209_AABCEJ ravinuthula_v_Page_052.pro
e34ad5dad9ce4061abef5f7577a9f532
5ab9d7f41dc2be82d34c9113d6200da3b93932d5
1946 F20110209_AABBZD ravinuthula_v_Page_046.txt
81fb8b3e180ac2a93bd8575b1486b3d1
82b67bd174c94ecee58909ed1e7b06a8ebfc192f
49853 F20110209_AABCDU ravinuthula_v_Page_036.pro
c482dfd31b754279584d9ac6aacc3661
18b9d0e25e5e306cf8677d94c628586975fd66d0
1839 F20110209_AABBYP ravinuthula_v_Page_032.txt
2a3f964b428e7b8e2a6d9632857440e8
ff9e0ef620a26d1eb244fc1ddcf3b8561b332d72
44853 F20110209_AABCEK ravinuthula_v_Page_053.pro
711667918481e18c6dacae976af7243d
3fcac020f230f18f9e8f18e913dd22d0586e05a0
F20110209_AABBZE ravinuthula_v_Page_047.txt
36d69c8ec7222e6ab5643303db0a45e7
ca2f6ad32c22cb32c83abd3ec896beb73b00f72a
60125 F20110209_AABCDV ravinuthula_v_Page_037.pro
5fb1752f9bd833d059c0e3a14e6310e6
043b28a6a5980e27cfed33801a442ebce1b5614b
1960 F20110209_AABBYQ ravinuthula_v_Page_033.txt
eceb1e68ad28c6907895bb53ac1cf42f
d041bb6538c09bb900bf2ba354a429a75ad84238
35521 F20110209_AABCEL ravinuthula_v_Page_054.pro
8d26e29175276470441814649896aca4
9c5536ea5b6832ff99bcea645f0be2b794ed9731
2228 F20110209_AABBZF ravinuthula_v_Page_048.txt
ee30a0b921a13996eb6e9c17ee16fc8e
0f805865c00febec0a44bab596b1ff566121dba4
9546 F20110209_AABCDW ravinuthula_v_Page_038.pro
075787fc0af69053add613adf279804f
f3970be6c910f981254c6854b7951305f602fb1a
1123 F20110209_AABBYR ravinuthula_v_Page_034.txt
39e97d86ceda8368e795da12c88a5c92
781422683e9a1a8db3bdb308124d535e3c246702
37679 F20110209_AABCFA ravinuthula_v_Page_069.pro
1c7aeaac7114b8c33b83f04123e61728
cb4b96d1b6e8b70bbdef667e64f4a4fee25d91cf
12230 F20110209_AABCEM ravinuthula_v_Page_055.pro
12a5fd239fe2d744b032aa1f5f4b1b8d
76f2e0badac34e42af6dda1bf81c0e10b3460a49
916 F20110209_AABBZG ravinuthula_v_Page_049.txt
b16001fda895ee67ac11f7c8afb668fa
6bba6b791c979a240ce0841e0a412bafff3f0ba7
63226 F20110209_AABCDX ravinuthula_v_Page_039.pro
5bedcb60e3e16adae630c0ee450a6351
8cb5033cb6e63927473603086392b41301b15f8f
1980 F20110209_AABBYS ravinuthula_v_Page_035.txt
ed4231e3280d4d717b08e9179eb1cf8d
9284671af303d933202fbfa9c8406d8ac4fa40b9
34686 F20110209_AABCFB ravinuthula_v_Page_070.pro
99b3fdc623221c5a7383a6d53545cc7b
868f47f8ab7e7a81b2cd36ce855ad8bea48f06e0
43665 F20110209_AABCEN ravinuthula_v_Page_056.pro
f09fc56073f0bf4f21c582431efb1df2
b987ce8910d6540d7251631e8f9d9fff7e5b7b06
1812 F20110209_AABBZH ravinuthula_v_Page_050.txt
1da563b682c141d36ee917f4c0a718d0
7a2c8a3a1868809db567a0fbefd6d80c1b9fd133
30281 F20110209_AABCDY ravinuthula_v_Page_040.pro
5bfa98dfaf361f26c131aa31e640edf9
6ec4afe054b195e3465fcfe6a7b2b42b8b61a55c
1978 F20110209_AABBYT ravinuthula_v_Page_036.txt
b002cdcbe0e9dab7510fd4feb2c22ed9
5c8629ae190eefacd88ef73bda03ae6e792425f3
43324 F20110209_AABCFC ravinuthula_v_Page_071.pro
d45bdb76ab638faa23f4effc355cd0be
0570dc3f770906ec6b9fe099e43f52389a939b4d
39107 F20110209_AABCEO ravinuthula_v_Page_057.pro
b235d93566570ed8087053344b688557
8d14766e1cdbafc5a6796c956c20192bb3e53edc
1722 F20110209_AABBZI ravinuthula_v_Page_051.txt
c21376b4cd3be88b6ed13dc96084dd33
a798bfbc61a926dbe4258273410e39c4af71252b
36420 F20110209_AABCDZ ravinuthula_v_Page_041.pro
632ea5f19a381935a08419d146ea451d
cb18b0a94ed4ab61f15668f4dd8058eec5e092df
2398 F20110209_AABBYU ravinuthula_v_Page_037.txt
c64ae0fafebc3b492bc8711c34b58c4d
cce7d3034743a230fde662ab50fc0e9ff971ddae
23815 F20110209_AABCFD ravinuthula_v_Page_072.pro
3fbd3f0f846c9ca1ec1292ed304b3c65
918a24fd2c4a5dd1eac9a84cb9b410eb7cd1945a
25436 F20110209_AABCEP ravinuthula_v_Page_058.pro
3a2df35594928c8312f6c1ca9ef8e5dd
fa2194be5d6fa31bca58184d6042c6b860a01f33
503 F20110209_AABBYV ravinuthula_v_Page_038.txt
92fddb34660d3053accaa4909b279732
84366e64ef9e2315c363549ae1841b103a5ed32c
40800 F20110209_AABCFE ravinuthula_v_Page_073.pro
3fe9078875ad0dd4984c1a6a94593243
8da0d1bb85cb977d83259b713148cae1dbebcd69
25989 F20110209_AABCEQ ravinuthula_v_Page_059.pro
0bc3c6d3fe81a1231da9c82f05623455
eb03f06977724818ee595514f7ce0a34e0f120ee
F20110209_AABBZJ ravinuthula_v_Page_052.txt
e49c10e8f0576a9410833daf615c275b
f1c71de10937b1729257272360cc4d800ff52c6f
2603 F20110209_AABBYW ravinuthula_v_Page_039.txt
58545500408276dcf84eb74b3b359800
14b6f3ebdaa52fe9dfb89b115f5b420325fefb0b
21342 F20110209_AABCFF ravinuthula_v_Page_074.pro
2192ec332812551c7d305479a296952f
104898d7e3fca4c41ccd99b78e7907d715048af4
30909 F20110209_AABCER ravinuthula_v_Page_060.pro
e179a2608c0092359b5ff630d4ae0162
a09c3bb04a959d3fe2aea1d5ea0aca7919ea7b70
1968 F20110209_AABBZK ravinuthula_v_Page_053.txt
ad1725dbc875a2f699dfe592f61268e3
db892b1a27da7efd22b27dc4c25fc5ed956ab32a
1426 F20110209_AABBYX ravinuthula_v_Page_040.txt
2247944515e026734e64674b61ca8bcb
7ce68d426339abacfdbff343740f00e8e07ae651
58392 F20110209_AABCFG ravinuthula_v_Page_075.pro
04641d409e7d0a1549ab540a012c2086
bb097ecf6b93db7dfac56543a1bd0773942fd833
32829 F20110209_AABCES ravinuthula_v_Page_061.pro
3d25af955250a6fcebf0d110c4060529
8ef4c5b38d07e539a974379af121bb4ae7cf5fe5
1838 F20110209_AABBZL ravinuthula_v_Page_054.txt
92115d6ef146a3257934a96a43e26369
275d65fd712d58a0641acce152710194cb07ed4a
F20110209_AABBYY ravinuthula_v_Page_041.txt
13c30075378e80711513a7a47b85b059
d8ae5cd4220f99fb5b9b9dbe886775e201696451
26243 F20110209_AABCFH ravinuthula_v_Page_076.pro
0a88a76dcde8de1872238ad9192d55fc
e53bb1ece6e52d15824685de16cc41ee3e80b6a6
530 F20110209_AABBZM ravinuthula_v_Page_055.txt
6a29719f0fa9930b63b0187e2f8dab43
aaffb3d4c6e6487a369bbf6d1c2572fc929dc079
999 F20110209_AABBYZ ravinuthula_v_Page_042.txt
7e917993a0c694d18ba10a6370e7e096
56d5d780619c98bdd845de7bd5e4935eaf351bbb
54270 F20110209_AABCFI ravinuthula_v_Page_077.pro
69563e47e9bd67b15dc2a003779ca935
697852c6d0b28c92afc1bbf9f4669f8f337f8576
9769 F20110209_AABCET ravinuthula_v_Page_062.pro
e3b9502a068c0896253da27659c96b72
b287d90c49a848d7f967da9cef7b507b056d6c22
1904 F20110209_AABBZN ravinuthula_v_Page_056.txt
63cbeaa1eae7bb06b0febebfa4013c6f
9f5a8245446ef9d81ac0d11060961cc20749f88e
39962 F20110209_AABCFJ ravinuthula_v_Page_078.pro
f47045265e4da2699958ab8196f314ef
f2eea1b9fee1bda80fea6488f092b570cdbe2a58
36589 F20110209_AABCEU ravinuthula_v_Page_063.pro
66bd01f953221334393c0d2c4e270795
dc2dbd3faad4fa8fc6dfb147819967eaff27ca21
1829 F20110209_AABBZO ravinuthula_v_Page_057.txt
035869b26b1d26cbaf4b0ee699483483
23fd653e28fb9ad871639d9c8dfac998015ec483
23234 F20110209_AABCFK ravinuthula_v_Page_079.pro
99ded5f44ce0d1988813c8910b05faf2
77e7ed64decda81cada236efdca8be2dbb7a67d2
26367 F20110209_AABCEV ravinuthula_v_Page_064.pro
96fc47bef4e8dfc3836485a61d14fae5
227319702ac6ee0e4c2cd4ab252d28ad72671016
1453 F20110209_AABBZP ravinuthula_v_Page_058.txt
f5501e38131e6fec0547fc3522b99aef
874f463d2e2437f13b8ec6b0b9038afbcbe274e7
4169 F20110209_AABCFL ravinuthula_v_Page_080.pro
676944013a49f667d02ac82554d8d1b6
e77b80590d5a6281f3abfb51f931dd96809c8b24
30670 F20110209_AABCEW ravinuthula_v_Page_065.pro
9a341842d7765d9988ae8e86f34174ba
1059bb5b1f4de1020afba135cb2813bd09456917
1712 F20110209_AABBZQ ravinuthula_v_Page_059.txt
94a7e6741e787b31817e12ec3f1bf315
1b7fc882d357bc9325d71af596f1cfbf38bfea2a
8466 F20110209_AABCFM ravinuthula_v_Page_081.pro
bb20c1a079c37c9fbbc6424c32384d54
bc66cb1179e58483d0e9a1625715075da3803551
18433 F20110209_AABCEX ravinuthula_v_Page_066.pro
4399d7e88d406f2af00b5d48c4dfbb8c
4691379b4364b689ecfd77f8360ebaa909d9cddf
2032 F20110209_AABBZR ravinuthula_v_Page_060.txt
c19d8f9e342ed1ddc8b8fb5d9e726fba
760c7f3e690347922d79247106af946f280663ab
21085 F20110209_AABCGA ravinuthula_v_Page_096.pro
1f3d4a39d10a3dd4ddcf401bb84856c1
8301a248f4d6f0797fac26157778214277a6f91f
4220 F20110209_AABCFN ravinuthula_v_Page_082.pro
fc022e4e80a184942bc6637932dfd359
05d28035247f045c065c8661da3a21265df53b26
36275 F20110209_AABCEY ravinuthula_v_Page_067.pro
325f8746c1753d3dab0c482cca59ee52
d8219a4536fb2e129a0219c296bd18a2c5df2a67
2271 F20110209_AABBZS ravinuthula_v_Page_061.txt
bfb19d7401b73cdc034dddff1ec4c31f
63246f7b1c26e98c1115efb64320143dcaa313e9
20241 F20110209_AABCGB ravinuthula_v_Page_097.pro
10286e477d1caa7d1e27b9871e88bbf8
037c84cbe904541ccbbd2fa3e92820163c9b85aa
40240 F20110209_AABCFO ravinuthula_v_Page_083.pro
741d8b9faabe97fe66569e724585d587
e998223e9cb2e9b331761ee7314fb69a0bd88c5a
46056 F20110209_AABCEZ ravinuthula_v_Page_068.pro
ab2f16bc0a948d1326aad917cda787d6
960118fc0d05d2d8ecb9ab769825b47940633319
743 F20110209_AABBZT ravinuthula_v_Page_062.txt
20e5dda87e4a3d51b8ee36f80295afb2
475f045a88f1a6cb46be8089675994d4b323a9d6
6615 F20110209_AABCGC ravinuthula_v_Page_098.pro
d24f897a212a326d4d9e8804b6397926
c90c02b749448faa294d6df265315b1be91183e1
45203 F20110209_AABCFP ravinuthula_v_Page_084.pro
bc135d463681b916d639a9289b4fd907
6db8ae19733e29dcdbba558dbb2e73d7c8b50731
2131 F20110209_AABBZU ravinuthula_v_Page_063.txt
c43b6145bdab0235e1964473e1eb1a3b
b1d173b2652de81ad493631f8baef44c0362012e
39161 F20110209_AABCGD ravinuthula_v_Page_099.pro
14ac7825f34c80a0bcfbd4418b5c53be
1982cc2429f59535abeb09d0b128298e583321f4
6095 F20110209_AABCFQ ravinuthula_v_Page_085.pro
0b37c146a38be2a8a8b707e099334774
9452e9be446626a02583a58a2840f1b15a24ab5a
1692 F20110209_AABBZV ravinuthula_v_Page_064.txt
64b535b7810eaaab30709bf84ecce0f7
dd5d4296521afd2a99014f53988a42f69250205f
13017 F20110209_AABCGE ravinuthula_v_Page_100.pro
607c059344fe68973021d71f587cfcc3
dd102cb2fbd1efab23fbbc05bca6ef28f90805d0
43965 F20110209_AABCFR ravinuthula_v_Page_087.pro
3318f661175a09e9ba708b609f3502af
e775291210964fe04e9588600ebd3aa31af7985c
2026 F20110209_AABBZW ravinuthula_v_Page_065.txt
e0d6335f3a9df44f50bfe018392e583e
e0f5bc9ca25020d3abcd8223b586ffc135358d40
37547 F20110209_AABCGF ravinuthula_v_Page_101.pro
f52cadd8c488bed3c2174b36be200ca1
220673a2503cf55980747e571bfbf84fa963226b
44839 F20110209_AABCFS ravinuthula_v_Page_088.pro
aff75668d455c302f3c175b0acd85431
9cbf3cbf8cb10ca5ac9aa826623d0d3c0645e9c8
873 F20110209_AABBZX ravinuthula_v_Page_066.txt
c359520b945478092f18e784e1dcf490
d8a537ecabc2d2f784fe415c1f4c5a2f4b49cb67
11233 F20110209_AABCGG ravinuthula_v_Page_102.pro
eb494615bac4e02034b69354754ea3fe
ee4763030e0553d58d1faf04f9b25ec3a9b84966
54047 F20110209_AABCFT ravinuthula_v_Page_089.pro
55f0658ef2f06b72acd509f0ac899b59
cd69f16c0fc914b495b575fbe6d2c7731f99a8a0
1816 F20110209_AABBZY ravinuthula_v_Page_067.txt
abeaf3c88e5ef8af6dc62dac8f5d74ce
431610778b5a407cffc591a28100b3aa65f239ad
20047 F20110209_AABCGH ravinuthula_v_Page_103.pro
7b55f47c0a33bd360e267acfd5fe166a
9fc0e522fdf1d4dca4fe746e965cadd2bae23ea9
2188 F20110209_AABBZZ ravinuthula_v_Page_068.txt
9af80b63fab77666759aa3f7ecd3329f
cac82a848e2abfffb10968744ec6907133678bdf
16589 F20110209_AABCGI ravinuthula_v_Page_104.pro
963362f84dc338e69d63d3143a3569ec
0b18585d47909d88437403b5af80f643f961ff72
21138 F20110209_AABCFU ravinuthula_v_Page_090.pro
fc52ac6bb4f599ee4c1e2a7f1a585511
ff2db049764eeb1b8ce38cafaf2a74c2807accf7
34335 F20110209_AABCGJ ravinuthula_v_Page_105.pro
320ba301158d8286a3741f27825629bb
b8e9f6e4831b5b7a12ef999ad904ecbaccae104a
15950 F20110209_AABCFV ravinuthula_v_Page_091.pro
a8902be280293859ee4288f2fd9c554b
3247d5366a607a4175a87c87eaef77910754a2c3
36184 F20110209_AABCGK ravinuthula_v_Page_106.pro
9e645dfcb62ff4afab46643d3fb01a6f
5a241079ee59661d63d40b406816795e932c0c4b
26250 F20110209_AABCFW ravinuthula_v_Page_092.pro
0c134f894fa6523fe2c14c28267b3bd3
9107a7aa7a50093f31292d562d2b7a19f2f3f0e6
30064 F20110209_AABCGL ravinuthula_v_Page_107.pro
39d481f37e009543f2b596f615ded621
4737778ed02ad542b975f5faedc2f82cfe0b5eea
46554 F20110209_AABCFX ravinuthula_v_Page_093.pro
2ead4531ce4500863436fb10b552f516
3db4c5fb671aa87cfb23c9666bd280d5768aac5e
9162 F20110209_AABCHA ravinuthula_v_Page_122.pro
2574431a3137b50e4cdf1a2d3624b826
6cf3c46034ecabdb54dca804ecb44d413b128723
28541 F20110209_AABCGM ravinuthula_v_Page_108.pro
508c2233ed9e560a3c4f7a30c413bc1d
e5580526ab46a184ca827740969cceedd979c968
4551 F20110209_AABCFY ravinuthula_v_Page_094.pro
90ca9a9cbaf718fdc6d213feda875cf7
d1d68335df0a0d58a1fe0a99144ed68923512d65
6031 F20110209_AABCHB ravinuthula_v_Page_123.pro
fe8cf7ca6fc7aabb2a648a546c32d1f7
bfc4b4f170d00f51678be202688eb149a21097eb
36609 F20110209_AABCGN ravinuthula_v_Page_109.pro
ea3b15335130546a26de3a9d77a3d072
4e1468fb8cf3e7642a0a85742d808647c3bb352e
17497 F20110209_AABCFZ ravinuthula_v_Page_095.pro
3a9fc3cb54480b27853ea60b1bc930f2
bb97aafecd412e8336e2424d7f1fc707cb6f6be6
32954 F20110209_AABCHC ravinuthula_v_Page_124.pro
a9ddd83eec4e532f68e66caa5e176410
17ac27b9736bba651908bf80e9e033ea1ddc0caf
58489 F20110209_AABCGO ravinuthula_v_Page_110.pro
0a760afbb5702e663c93dc9190d597ee
128c88a6f23fd894c455a885bf5d7a24937d49f9
9063 F20110209_AABCHD ravinuthula_v_Page_125.pro
e2b062f49c4c2f132d4dbc997b6ac444
b008e9a1edd50b98b463f37754725dacd282b0dc
18018 F20110209_AABCGP ravinuthula_v_Page_111.pro
506c22a395152f34ef7fe3013c633a6f
f1a858240a0fb20862577166e319c36c65540845
8541 F20110209_AABCHE ravinuthula_v_Page_126.pro
f8844bc476443f6319a060ea16719549
25193ace7d9bda86a1e9e4d93a09c2af2337bd06
37349 F20110209_AABCGQ ravinuthula_v_Page_112.pro
683c70ae2b7ff6ecbd666ce688692537
b30c4492773fdeaf0caea15cd6676d65725aa3a0
45294 F20110209_AABCHF ravinuthula_v_Page_127.pro
3839217b5df98d0908bdacd953afd7a7
4c7459f8d7ed51eca99d039c19d7421959b52d88
22636 F20110209_AABCGR ravinuthula_v_Page_113.pro
be3134b4e7543d4521487dc85faa5a9a
bd10d267eabee9cd6a8906478cbb82080f78263d
50441 F20110209_AABCHG ravinuthula_v_Page_128.pro
2a4af6453486063e93b14674ee0e3446
628dbd84c566a78a981e0efc3d82ff65b017f20d
22787 F20110209_AABCGS ravinuthula_v_Page_114.pro
c96dc56b50ef0d7bd13dc2b362305728
d3fa097566dba2d44619887a6ae456f7b3ce59e5
20370 F20110209_AABCHH ravinuthula_v_Page_129.pro
4a607c1395e372d814ba23f81ee74151
3432d8c8500d20282255938f41bd803a02b3b3b5
36549 F20110209_AABCGT ravinuthula_v_Page_115.pro
820ef2235584b59c0fac2ed6023b5997
58c94c9d844a9a3cd3518c4e8e8807f9e3f888bf
48177 F20110209_AABCHI ravinuthula_v_Page_130.pro
8dcbd0c3aac916bd4df3c45a89bdbaa9
8760ede0fcbaea082ea9f5aea53b97a1e430b7fa
24675 F20110209_AABCGU ravinuthula_v_Page_116.pro
73e1e8e0dd2692987c1f18a72eaddf3b
94c391f4f87eee68eb0692def13bd430915ee567
57133 F20110209_AABCHJ ravinuthula_v_Page_131.pro
46e88557282bf577a8eb157ccc20ad87
f7316c1df1d236dc104a3d9aab2461fbf65608e1
22310 F20110209_AABCHK ravinuthula_v_Page_132.pro
d89e5979e8ba2c64f1a7e06665e9abf2
88f8344ba86ab24677d181ab7b0fe173c7ddb182
46420 F20110209_AABCGV ravinuthula_v_Page_117.pro
f894dc85ff46cc704fd8c49866c08e72
0e60cf93876d33e01ec33c885701f551678c7ca9
24943 F20110209_AABCHL ravinuthula_v_Page_133.pro
67b1e7431255d4c053aa7b6a119c32b1
8185fda903914f656d721b2bb41228a68efccce9
35711 F20110209_AABCGW ravinuthula_v_Page_118.pro
b0167b5a1be1df89f13fc64ba08ccca5
384264a4baae9482db07a444c3c954539f59b934
20412 F20110209_AABCHM ravinuthula_v_Page_001.jpg
26f1567ebb5053bcffd59384fc83502c
76dbf54bc0800e212aa81e977341cddd53a63717
27107 F20110209_AABCGX ravinuthula_v_Page_119.pro
cbffeadfc17222c3899eb99cdaca5c5b
74ab75dc154989e76cd1aebb0ac4ae253159d587
33102 F20110209_AABCIA ravinuthula_v_Page_008.jpg
093dccacbc7ab9c312c43d2faa6bed69
7c7465c6244ce73a181eb0d4195a217b05962845
5341 F20110209_AABCHN ravinuthula_v_Page_001.QC.jpg
057a015ba713330af9f7d7a8374d10b0
dbab8a8010beb537a8b5f7bad829c790449ae96b
44398 F20110209_AABCGY ravinuthula_v_Page_120.pro
3b5816f879843d02406ac80d0a2ddba2
2edd7d1273b2d46604c4fa195a998a115a52145d
9388 F20110209_AABCIB ravinuthula_v_Page_008.QC.jpg
c0510f0f7c4f2594ce5095063106794e
fd4c68e39c2c5ec13838f5297c92a89eb23c8826
4107 F20110209_AABCHO ravinuthula_v_Page_002.jpg
f11b12cd9c4eff81d8df618f0da2f7e7
442a65075920ae6f680130bc40b8a72713a8b700
44978 F20110209_AABCGZ ravinuthula_v_Page_121.pro
7884d099e085d735ff2b0e46061d983b
a294f35174e466a2a85c1542c5096f07544c0dac
19231 F20110209_AABCIC ravinuthula_v_Page_009.jpg
01af4608463bdb4305d63fd6d2d03ef4
d13b6e31db9a2f1e8c3d49e6b42ee9158c879d58
1211 F20110209_AABCHP ravinuthula_v_Page_002.QC.jpg
12133372f61614b9e43c441932f647a0
c09a7d54c5deac254d164814a1f282a04ebf7131
5010 F20110209_AABCID ravinuthula_v_Page_009.QC.jpg
3d9d0442d4f674fc975ce1ec58a79912
bf922e02739bdcf9dc19c14c4763e489fc938b9d
9306 F20110209_AABCHQ ravinuthula_v_Page_003.jpg
9947973391773af7ff25d7934481576f
2a6a916fd8947260c9ea4141582d5899a96f5b6c
70416 F20110209_AABCIE ravinuthula_v_Page_010.jpg
0a9a008eab502c05eb801046fc8f7353
4ff112a856da1f3a6c66053ac8b7ac8b520c697d
2922 F20110209_AABCHR ravinuthula_v_Page_003.QC.jpg
4a54c31702efb0c5aba64d5aa7eccd74
ee9b781e21d1ca0293b1d187f9773d4127895285
19559 F20110209_AABCIF ravinuthula_v_Page_010.QC.jpg
a70922e7c496b1df7bd91e0992abd3c9
0e218f7b6ec5fd2d85a7be5f7339f33a21249a1a
65955 F20110209_AABCHS ravinuthula_v_Page_004.jpg
f93b82e76fbff9aba1c812e3e59276cf
654de1ae42fd601cca80a11e4f6701423df61240
80163 F20110209_AABCIG ravinuthula_v_Page_011.jpg
57a4fadbcb7e6d9199883a0b52a58d51
ee428dd548c32e53f69c33c7bf7a930b1a2d362e
19915 F20110209_AABCHT ravinuthula_v_Page_004.QC.jpg
52fa734299508d37092096894bd5a687
9626e031665da981f99ef8d2855d93a0b2f7807a
21947 F20110209_AABCIH ravinuthula_v_Page_011.QC.jpg
ab4917d9630a4b582789700d66437e12
5cc51a680007a1e004608cf1f8677b7b4b74f553
7640 F20110209_AABCHU ravinuthula_v_Page_005.jpg
9a68713fc69bcdbef9a66c33412d8084
b2614ac99a93a2a4a4f941d2c846c01cbc49df4b
72681 F20110209_AABCII ravinuthula_v_Page_012.jpg
25cecfc9f2085db884e67c05df4974d5
0360831983796fe21bc71ff6b97c9a885395ddd7
2622 F20110209_AABCHV ravinuthula_v_Page_005.QC.jpg
99d15da958b17ab2f539c0bade0df8cb
19309701aecdfbd029c1ae358178cf6b0299c088
21029 F20110209_AABCIJ ravinuthula_v_Page_012.QC.jpg
19eaf6933ccb58809e4e164c4fe61602
39f9a77c5098361b1c904d42131d3cfa1ca7b621
12256 F20110209_AABCIK ravinuthula_v_Page_013.jpg
369eb50e0ac5bd6f1ae12cbbd25686e1
88b93fabf7e452965d9152c27fbd4be89846b7bc
64775 F20110209_AABCHW ravinuthula_v_Page_006.jpg
cbdcca2f31b6f6d57200d4e9c46087ed
c1164718a855dddb8114319beaec703c75a3d25f
3980 F20110209_AABCIL ravinuthula_v_Page_013.QC.jpg
0ab7bf0391e3fc737c16f3c6579a5ad8
39edf37d917af5aec253b262db1cf09dfe05a264
17520 F20110209_AABCHX ravinuthula_v_Page_006.QC.jpg
33042eec09244a2ce320adf3aa62f10f
a7a3bcef0617a22dbc0cdf1871a60311dcd7688b
58832 F20110209_AABCJA ravinuthula_v_Page_021.jpg
e9211bb369e2ac96ad6038c5a9350d11
281676bacca178dd8396d2b4ee1ffde51c8b787d
66710 F20110209_AABCIM ravinuthula_v_Page_014.jpg
abe4ff4e8189901fe6c706d62969368b
d56695eaedbea233580dab61f85a66aae66e7345
83604 F20110209_AABCHY ravinuthula_v_Page_007.jpg
a17312cd9e88197c065b84beba4969f5
50f95fd8904989e891a6c153646c6b3f22129b7e
17465 F20110209_AABCJB ravinuthula_v_Page_021.QC.jpg
63a28da72006e48e114546fcf8c7161b
fff7c0f22e93dfa01069db960eb11bb705f7f53c
19418 F20110209_AABCIN ravinuthula_v_Page_014.QC.jpg
cd0b01d8511d99239787dbb007e69120
ea18418260a6bdecf2a3a0f1971621b6daffb834
21758 F20110209_AABCHZ ravinuthula_v_Page_007.QC.jpg
8e79f67cc40416c52fd535b6bf9891b0
e861b2568e8cdcb78b420f27f3c91f3485c122b5
47645 F20110209_AABCJC ravinuthula_v_Page_022.jpg
c374f458500e5f1bdddec59011ef6b16
f5b6e2b5c651ca8414486fb2f2c63806e8cd170a
74812 F20110209_AABCIO ravinuthula_v_Page_015.jpg
f58be434f403bdaf9e35b53f0ed91aaf
a35e791992b26ffd2842eadeca4604dc7742bf10
14774 F20110209_AABCJD ravinuthula_v_Page_022.QC.jpg
ba8f792aaeabf93c08e4b874b70cb45f
f995476a7df3281dc86f0d7e327e5783212fc73e
20952 F20110209_AABCIP ravinuthula_v_Page_015.QC.jpg
e6ab76160f5a7450261a59653f7871a6
287069f9c7f1b76b649ae60e01d1fbbd56efc4d0
53455 F20110209_AABCJE ravinuthula_v_Page_023.jpg
3e281a6d0d97b3de9a109329b67634d6
71594976d3b759f6ad1df5b3ecf33f086e2a8bcf
53957 F20110209_AABCIQ ravinuthula_v_Page_016.jpg
9c9d739926e17cdda8c2e33388af2ad6
357d47c0c8b97bc3e396bb8bb8a4c201b04ad2ad
16991 F20110209_AABCJF ravinuthula_v_Page_023.QC.jpg
c5a7999c86d7458b94522d13ebbbc8ff
c9b37818c93121505a8ecfa3ae4af7ddbfc5da81
16645 F20110209_AABCIR ravinuthula_v_Page_016.QC.jpg
0a4c9f08594e80e6ca873511eaab8188
5709d0f26373d3b2b9f6f7ff09ebae2960818bc2
18708 F20110209_AABCJG ravinuthula_v_Page_024.QC.jpg
01ae2a19c2e867ab4a0216ce55ca089f
501056155e8f39f629c2c9c748c0621da426a73b
80606 F20110209_AABCIS ravinuthula_v_Page_017.jpg
e9bc0146ab3c1bafaf3a67cbee7a9783
a80a24588cc420e4bc7a42774ae32b2be2875344
55729 F20110209_AABCJH ravinuthula_v_Page_025.jpg
a5778c087f88b13f7151664d57043f43
ec594ea0c7f64e720d2d117e8774d0cbed467b2f
23482 F20110209_AABCIT ravinuthula_v_Page_017.QC.jpg
aac89a1b81b1f5a3d130423966fadbc4
262233242fba7713e6d83a46f21737da74086366
16975 F20110209_AABCJI ravinuthula_v_Page_025.QC.jpg
39a9c2a92898c999d454ba6b3343b9a9
018a71656eb0a02fc90d56fecf3b6be97e7ff706
82255 F20110209_AABCIU ravinuthula_v_Page_018.jpg
3daf5272fec930750dc78e9f5164c8ab
3ee69a038e3dbbd049c34fceea346431f8e582a1
55901 F20110209_AABCJJ ravinuthula_v_Page_026.jpg
8fa274ca7ef0ecb880b4937f5515835b
b61476953576cd24ec8e46fc59007734e03d573c
24174 F20110209_AABCIV ravinuthula_v_Page_018.QC.jpg
eb175adce6a1999880c78ce415e2a489
b440ba59a2832b9a2de69a423e7e3b7fb8625612
17299 F20110209_AABCJK ravinuthula_v_Page_026.QC.jpg
4ffee870b8c0e0b88852cd1af682a288
682e969187c2f069e39d7d6eec3be31c57a371c8
89214 F20110209_AABCIW ravinuthula_v_Page_019.jpg
0a6c4893f69679be629b78632bb1d730
2874e3ac8f79b5fd546d67e2173026f8d4d489ba
56283 F20110209_AABCJL ravinuthula_v_Page_027.jpg
b47195adac645dd245126720479acb2e
e541490f07b9d2ce68d47b765f3feb251ada3a60
10510 F20110209_AABCKA ravinuthula_v_Page_034.QC.jpg
60a56a06a1cdfe42f9d197c3912d823d
8de3fb802f1fa1f9ea05487bc784646c547e7150
17408 F20110209_AABCJM ravinuthula_v_Page_027.QC.jpg
b52a35e51bdf66fad0889de3d899c457
11843c29ce9a876d4ae10bb71ae8b3a1b1b9db91
22975 F20110209_AABCIX ravinuthula_v_Page_019.QC.jpg
4f54edbcbe7fea36465fd92b45b0d04c
0c7e77845c6df4a153d93765b8373d1ce6457619
66427 F20110209_AABCKB ravinuthula_v_Page_035.jpg
a71920333ce585c149d8e3a64840c5e7
c89575682408489f18fa8c19a7709fbe86ae5a5e
48709 F20110209_AABCJN ravinuthula_v_Page_028.jpg
6954e52ca2c9eed313809cf7e32a0c53
bc31e32ab741a2a2dc0df635630f2e6e0c5407bb
59883 F20110209_AABCIY ravinuthula_v_Page_020.jpg
e7fa85643e4dde6e02755f2eab910aa0
543468e27529be8a181ce168d0a7815240c123b4
19905 F20110209_AABCKC ravinuthula_v_Page_035.QC.jpg
e42213dd6cdce56d3c8843787d35c5a1
33da1d0df0f2a134866819622f6627818d475f51
15656 F20110209_AABCJO ravinuthula_v_Page_028.QC.jpg
4e1409f56e4f0c3b7271080bc5824716
f38db2a4f823e9cf89ce9193bdbdfc6ceaa13d97
18009 F20110209_AABCIZ ravinuthula_v_Page_020.QC.jpg
8d3a07aa33c0b5e8017efcaed6005783
4d925034a3e48f88ec84a447172b95ddaf42e301
77882 F20110209_AABCKD ravinuthula_v_Page_036.jpg
b5bacbaf6c961a1cf0f433dc6ccf8ff0
2109f12b4a2cffa75722dfb4a2f7c956e164acd5
58231 F20110209_AABCJP ravinuthula_v_Page_029.jpg
0db7ae1e0b4af60ec9ba1d460a77b17e
0cea18e9a8584b90c5b6a08dd03fe4f6d003cbd6
22664 F20110209_AABCKE ravinuthula_v_Page_036.QC.jpg
e85b0c770827b4d7d6aa534b46708248
8a2f45446abef6bd80c5653e73f2a63fa9eade90
17875 F20110209_AABCJQ ravinuthula_v_Page_029.QC.jpg
50f2e1bd9e51dd135e6cc15edf5b37f9
b851e439dec21312e34bd52b4a4b5cf39c21a44a
91324 F20110209_AABCKF ravinuthula_v_Page_037.jpg
3f7dee16c0be636bd3e6f546647f73df
386417c18d6ff20cbc946a3b6ab8ef6255d36909
41091 F20110209_AABCJR ravinuthula_v_Page_030.jpg
769fd548fde9d5181a294954d3e4862c
27afc740416389f34cb07154c98c4c430c5ee015
25404 F20110209_AABCKG ravinuthula_v_Page_037.QC.jpg
1db044dda03bfb8f2b9c7bd1f4d2d953
46f4f5bf9c1966974f61f9b1de1995016f0b1c59
12668 F20110209_AABCJS ravinuthula_v_Page_030.QC.jpg
afcae369a5702074e76c90db19518208
e792643bfafeac9fb5be18217c85e9124cc19704
32577 F20110209_AABCKH ravinuthula_v_Page_038.jpg
dc013648c67347e4f8fb3364ea4b304e
e3fe5195fb8d4c89094d75daa55673fe845921f5
46942 F20110209_AABCJT ravinuthula_v_Page_031.jpg
381527ba7d579b7efa2ceb92fd547758
5dc961bfc9d792d8734373c1e771725aefc34a02
10277 F20110209_AABCKI ravinuthula_v_Page_038.QC.jpg
db678f946df77f0f0975d05e32832838
d529bb08319a7a405e5308eff6d03b46962ee2c7
14085 F20110209_AABCJU ravinuthula_v_Page_031.QC.jpg
a3e107e8ff59fc3b0913349022ccc2d0
0235635a4b1749d3b7496a43fc15879ba8d4b69d
97020 F20110209_AABCKJ ravinuthula_v_Page_039.jpg
29526626b109f961ef31d04eabfc27b4
c9766a7732287f7204b8984254cb372dea8fa393
47249 F20110209_AABCJV ravinuthula_v_Page_032.jpg
c190fcb316c004f59cadd10dd5c86185
fa99e8868e5e82aea5f9bca028084f38c40cd353
24072 F20110209_AABCKK ravinuthula_v_Page_039.QC.jpg
108e9bbc4a2a06a05497dc4202b12ffb
6a7c3cd656ae43d93fcd6738d97ad8859426d63b
14573 F20110209_AABCJW ravinuthula_v_Page_032.QC.jpg
47998615886f23f606d704d93a5e6068
5e7e90d5f83e3ab0ec74731ddeb7b05a6360a4e8
53738 F20110209_AABCKL ravinuthula_v_Page_040.jpg
dedbce33a40082513b7f13dbec7386e8
053be304a3531a77280566c7fd06762c8093e032
38819 F20110209_AABCJX ravinuthula_v_Page_033.jpg
7058ca690145f46d04bc3c4f3a4ed25e
1c9a14316f1e7feefcc6aeb8afb25cacba1dba6e
15663 F20110209_AABCKM ravinuthula_v_Page_040.QC.jpg
e226011e5472762ac4717f927650115b
1cf5bbdaa8c921888a0cd99c5f70af863eb07123
18539 F20110209_AABCLA ravinuthula_v_Page_047.QC.jpg
49c0f2a826be1cfb91ee2769d48c0842
11632278a90550a3cac2bde9968a71119b089bcc
57273 F20110209_AABCKN ravinuthula_v_Page_041.jpg
d126352969d85236ba12720a11eaaa1d
a279359bd061e51248ed43e0e8e36f996c3bec9f
12146 F20110209_AABCJY ravinuthula_v_Page_033.QC.jpg
6d2a6244e2a334f5e85cf4f20c740a99
578370e045ad6124de6e8e5c3e432352fe94753d
63612 F20110209_AABCLB ravinuthula_v_Page_048.jpg
9ef482caab8d000e44fcab926a94b261
43f2c1f4c471331c36d4b6f8f98276024d9033ce
15902 F20110209_AABCKO ravinuthula_v_Page_041.QC.jpg
7758b315b026161529faec8ca5c3809d
8a47e61808dc546f3dc0c37053320d930b08c692
33679 F20110209_AABCJZ ravinuthula_v_Page_034.jpg
c7bf0df5087774f85d594cfe29778c6d
19082c532b59199213ad83a71a8e46b4ea529118
18697 F20110209_AABCLC ravinuthula_v_Page_048.QC.jpg
99bb6737d9d69009b7bbe19b02d50c91
20075d8dd40b4324ccef4036c04018cc7d5ba9ec
41902 F20110209_AABCKP ravinuthula_v_Page_042.jpg
f728d4ace665ba6cca8682014064b653
3ac2a72a8c6b75b6c4aa4d22b25ab89583fdbba3
39166 F20110209_AABCLD ravinuthula_v_Page_049.jpg
80acbd36ed306e1c69806a88fd40b4d8
3257644acf4bc4f5036ab50cbb892e7c1663f9ca
12825 F20110209_AABCKQ ravinuthula_v_Page_042.QC.jpg
9103b031abcc9ed879c99a93a4934a06
d938a4d9e168789d18013e3d40ac6ca8e0ecb0a7
10260 F20110209_AABCLE ravinuthula_v_Page_049.QC.jpg
a8768c50952c8e9c91fcaeae5f2b4c8b
afa8f866f96aeb5cdb8c7df9bfcc852025fe39ec
35843 F20110209_AABCKR ravinuthula_v_Page_043.jpg
e52999591ab9f04d9bf61fcaaaa05086
25091f14cf001d20f6c5f87b32ac1e00436df271
68903 F20110209_AABCLF ravinuthula_v_Page_050.jpg
9def5cf09cec328e493a338cc5e881b2
d8ed76485ae206fcb30da0a1b85709e7dffc40d7
11283 F20110209_AABCKS ravinuthula_v_Page_043.QC.jpg
724c3538c82cfb897fa39b8572aba111
19f2b5919605fc6bd643ce1c5352a6a114c739af
20470 F20110209_AABCLG ravinuthula_v_Page_050.QC.jpg
25012cd378e86a670d811b5ea212582c
bbe8bf60acd6344fd27bc56928fb06f26d692b68
88867 F20110209_AABCKT ravinuthula_v_Page_044.jpg
73cdd9d7009cb75e8e841437573dda23
fb937227d4b73f8e3aeaa3fcc16c5a823b997dd9
64440 F20110209_AABCLH ravinuthula_v_Page_051.jpg
c30796dab3b3872615634a0b770f05e5
ea50f105327e6e18edc33d0044b331ba44dbecbd
25216 F20110209_AABCKU ravinuthula_v_Page_044.QC.jpg
819b767b543a40a0d7769523ccb2fea6
7208bf14e33ddecc537bddf707dddf4581398230
19506 F20110209_AABCLI ravinuthula_v_Page_051.QC.jpg
674ca34cda49f617987d6edd3bd2a4c7
763535e182cc95d11f5ef14a4bce25e44e0c7def
77812 F20110209_AABCKV ravinuthula_v_Page_045.jpg
b6313fc71955445c3de555851a06cf7a
ed2a4ce58c88f43511f9c4daf299a3078e3f4836
71545 F20110209_AABCLJ ravinuthula_v_Page_052.jpg
444a6a360de034f29261573d72cdf66f
1982e42bc83ffa03a2614989387987f16473f93f
23289 F20110209_AABCKW ravinuthula_v_Page_045.QC.jpg
8eb54bb5938a176c786ad18c309d6f80
991417a2437132bdb9d41bad9c9be549f4bf3305
21266 F20110209_AABCLK ravinuthula_v_Page_052.QC.jpg
a8811ef9ca402baa57228ed6692114ee
549e4208b6656969af4133366c6f43e322b2f59c
77145 F20110209_AABCKX ravinuthula_v_Page_046.jpg
f1908c9accb45f5312bc1261d0dfd51c
ffa8cb55910027ce58d73400b73d359ae52d3e93
73981 F20110209_AABCLL ravinuthula_v_Page_053.jpg
85436f462c28f0c451be73e8f52eb241
dca02d1ce855fc0baf18c78f8efacf5941db808c
23631 F20110209_AABCKY ravinuthula_v_Page_046.QC.jpg
45e37043fe9491a4c19031eea8d52b7f
3b0b2081849ddd0417de75e0809e98c309ce3947
14089 F20110209_AABCMA ravinuthula_v_Page_060.QC.jpg
7fd2de56244ea4160ca97e18ab40eed7
405f56bbd8e35aeae5fedccb44ed85d88cf7ecd1
19933 F20110209_AABCLM ravinuthula_v_Page_053.QC.jpg
f126740a8a5018fc9caa3a6a4d848a1e
613aec4fd38c9728d79bfae186764d9fdbbcaaf2
50743 F20110209_AABCMB ravinuthula_v_Page_061.jpg
ec2ec874f50b1222c4e1f0777d9e1d64
bcbaf89a96d34291de02ae6857c71d9ceb3cc363
56657 F20110209_AABCLN ravinuthula_v_Page_054.jpg
1918a84f8159faefcf5d08ab2af5e029
819dabd6f76d8d07147f7aaea88142279f1d32d0
15742 F20110209_AABCMC ravinuthula_v_Page_061.QC.jpg
8ef8d4316f6fd6c23fc3ae48eab3cb5b
49dad1fc46101a947e1284d9321e2efbd15cc922
17291 F20110209_AABCLO ravinuthula_v_Page_054.QC.jpg
821ca891271921e6fbd25644499c07b6
8ff72e1e12e749df5ae84bb8c6427583d10a89ee
62745 F20110209_AABCKZ ravinuthula_v_Page_047.jpg
742d03df5930ac23564f3a5ea8ffdfd2
c2384381319faf2f71d4ca65d00d468a15be48a0
26129 F20110209_AABCMD ravinuthula_v_Page_062.jpg
d610fa703f922e41548e064226428852
5a96acad5ea00a91a0443d54995e54da535d84f4
20630 F20110209_AABCLP ravinuthula_v_Page_055.jpg
ef5464adde01b5562b434fc2f712a6e0
eb58b2601aeb313983c656dc33526a16316df626
9055 F20110209_AABCME ravinuthula_v_Page_062.QC.jpg
c7396a2845dfc51c1ef06621b362ac52
6b0b15d4b546a69c7b939af5b9765c88d1dd2cf3
6477 F20110209_AABCLQ ravinuthula_v_Page_055.QC.jpg
24ca870f8042f29e300dec49bbe43367
7e002d97c4b10f84d10134dc1c4784ce260f6cad
53113 F20110209_AABCMF ravinuthula_v_Page_063.jpg
4ef207df6f9c62529fe386ceb87fae2e
c02239e84c9f88487684d7a54cfdb61169fe97c3
68526 F20110209_AABCLR ravinuthula_v_Page_056.jpg
1ff2c3137ffcddf7a4569d3d92307638
a18513a4d42c9c94eec6b7e54753e32b6fa58d15
15912 F20110209_AABCMG ravinuthula_v_Page_063.QC.jpg
31cd7accad71f3553b7bb4de228d7137
b404be023f92da34be25acb6b646a8f0bb42cb1f
19891 F20110209_AABCLS ravinuthula_v_Page_056.QC.jpg
69169248075f7cd19e4c3a2ae62cd0d6
a9cfe245adee28ab1428b15c02d6e33ed99ccfa7
42530 F20110209_AABCMH ravinuthula_v_Page_064.jpg
be8e3782cd72932b07903c24d3a230c0
6e5ddcf36123104b511aac59991db4771e9a14f0
60322 F20110209_AABCLT ravinuthula_v_Page_057.jpg
adfa07166512fd58370f6a0a6581a7db
94bef028206ec2040e624d6387d13850dad72ab8
13594 F20110209_AABCMI ravinuthula_v_Page_064.QC.jpg
e544ce38f176c8a7ab908c0753b16369
096813fd3374ac7c9d3e2347eeb8c8252745147b
18045 F20110209_AABCLU ravinuthula_v_Page_057.QC.jpg
db78f0b4a5a753fa0b495d19429dcf4e
ce6ed632e4c9da261d276275670756fd09b3d77d
45448 F20110209_AABCMJ ravinuthula_v_Page_065.jpg
8020562a0ddec18dddf4574892cddd20
6f71528603ecff37cab83c6e6620ce2cf5cc2847
43136 F20110209_AABCLV ravinuthula_v_Page_058.jpg
3d4f2c1a4de77b9afd188ccce46e0220
ad5d630dcd7ee3a1dc4e86ec68cc4b92a9e11232
14079 F20110209_AABCMK ravinuthula_v_Page_065.QC.jpg
ddde2b104fc513c5964b7f3caccddf70
ba5ed37115b64d5aada7ee990aad36b5d31e75fa
12737 F20110209_AABCLW ravinuthula_v_Page_058.QC.jpg
b96854e33029a396395d7bd88e0a9758
209749366b47820fc9be6cacbe49eadbae977267
36517 F20110209_AABCML ravinuthula_v_Page_066.jpg
6b85074a527620e4a28f5a59bd8aed69
b3c147583d1513880ea2c0b64fb8efb1a5e32467
41443 F20110209_AABCLX ravinuthula_v_Page_059.jpg
e40b6281ab4287e165b3c85c79a9e4d5
6b77eb97211e354d3c09092dfc8e5e96e0dbc4a5
10110 F20110209_AABCMM ravinuthula_v_Page_066.QC.jpg
0ff710084044203bb9f32d940bc06ba8
14a2af49d65c1c98ea719f2d66a66022e11f4209
13289 F20110209_AABCLY ravinuthula_v_Page_059.QC.jpg
30689e063018f78fb9ce0883ee0a7072
8cb5642d7b8957fadbe83608673207a5da0a0478
18293 F20110209_AABCNA ravinuthula_v_Page_073.QC.jpg
b664c892f91c16ee5a2f436416678ea6
d11b1cfc0fa3169be411cf4ec97a44b5a2c00cab
59683 F20110209_AABCMN ravinuthula_v_Page_067.jpg
388866f9c95898b85d4a3540db27b6de
d3f7c219c8f02c2909b5e9f442e39f41d229229a
44896 F20110209_AABCLZ ravinuthula_v_Page_060.jpg
a9c34c539c38b2fc8b2d7e1e1d715e83
1b1e9364564cf71f97565fec90641ad7c522abb6
37888 F20110209_AABCNB ravinuthula_v_Page_074.jpg
7d6bac81e460257b8bf8d11379b45c92
04812ae7a7cbd27f7f4ff4f5cf34ec53068709b4
17616 F20110209_AABCMO ravinuthula_v_Page_067.QC.jpg
feb1c61d82c9783cba267648b1146ba3
dd6f51ca335f9b52cd528709b19be6220f542048
11978 F20110209_AABCNC ravinuthula_v_Page_074.QC.jpg
3c66929573ca2dfd54314579e9e21005
b5cd1620ab74ca0e42d1b1b9ef66a734a0cccf6d
67516 F20110209_AABCMP ravinuthula_v_Page_068.jpg
d78fa0d68b05384b73251dba8eeca7b1
358f16fa8a1d42ac5d4743637977183faf7322c5
88582 F20110209_AABCND ravinuthula_v_Page_075.jpg
81198d9e0846fbb0123e1619a3302d99
897a3ba4d05c8e091adc0eb82d86fe620a01973b
21125 F20110209_AABCMQ ravinuthula_v_Page_068.QC.jpg
346c83d966b09719432853083c6c63c1
ed5704086046c4d10787b287a6727ef96dd556e6
26032 F20110209_AABCNE ravinuthula_v_Page_075.QC.jpg
17c7d2b064b878b1ccbe8de53b45af5a
c4d5e596306330df18d735d3c53d1e03e35b3a7a
57721 F20110209_AABCMR ravinuthula_v_Page_069.jpg
c33671afac3ac3ee9a27a0ce4e856d3e
a8c6cf82e28fd5fec02751611e69bd1ff90ac829
55400 F20110209_AABCNF ravinuthula_v_Page_076.jpg
6ec585e8e821ac9c1e385525c3fb5e1f
8ddeab0e20d5216547f09b2f6ea4e0df364a0519
17671 F20110209_AABCMS ravinuthula_v_Page_069.QC.jpg
853192d22116715e5e7627d309920f29
fc5bde687348031a037e78ff4de4cd226248330d
17275 F20110209_AABCNG ravinuthula_v_Page_076.QC.jpg
06a5b9868572ae759d52d52342930587
41d3e41b7d92d84949b5484564d55588e64f1e60
50630 F20110209_AABCMT ravinuthula_v_Page_070.jpg
013b54abdc18c53fd1897cd2519531bd
a30708ae789135331690d659aa46f559b1ee84b3
77455 F20110209_AABCNH ravinuthula_v_Page_077.jpg
28e649febf904ce465cbd826564337e8
bbe87438eb6438cac5f8311225a85f1ee8a4fd1c
16354 F20110209_AABCMU ravinuthula_v_Page_070.QC.jpg
91a58f5b7e979e8a65566e60ace3f75c
a6b5015980ef49db59bf3a5e43ca400005644d88
22261 F20110209_AABCNI ravinuthula_v_Page_077.QC.jpg
0a01a36cc4de5a4c11209423ae869d8c
c7678523457739af54d2c42869dba544c39ca5b3
67761 F20110209_AABCMV ravinuthula_v_Page_071.jpg
0a259ef448f71eb270d4e34a4428e1f6
b610f9ddeb5719a4c41acef85914fdf83fe68bca
64457 F20110209_AABCNJ ravinuthula_v_Page_078.jpg
3d388b777b3e748397ed5833803318e1
2accdf279612c4f6baa5d29f78d96c8eeb0dc7d5
21011 F20110209_AABCMW ravinuthula_v_Page_071.QC.jpg
4d89e5698202d4993f9bead06a48dfa7
e7035e4b85ef07d96c070c75622b1d8cca0abaa0
19516 F20110209_AABCNK ravinuthula_v_Page_078.QC.jpg
c21c5f18282302d47b30278148c76b2c
bcd609869cbec0238b86f1938a272aaeb5239072
40335 F20110209_AABCMX ravinuthula_v_Page_072.jpg
fc82ae30a5620892c7e7c8cca86e2c2e
8810c86a43973b1434b2b4c49f6fea071888d324
39680 F20110209_AABCNL ravinuthula_v_Page_079.jpg
cc544cb67f952803efaa0f2ca4d2cd8d
74c1354f86c660ffaca0f2ef98740a0441311098
12754 F20110209_AABCMY ravinuthula_v_Page_072.QC.jpg
b54741900918fb9bf287718e83597d95
1093ce15bc58de3a91ff11cad28de037027c47bc
65365 F20110209_AABCOA ravinuthula_v_Page_087.jpg
ae5d3c69f4851862602c71e8fd732db1
43641908e5660e3bb0145a69b47b21586d319744
11716 F20110209_AABCNM ravinuthula_v_Page_079.QC.jpg
a83dafec2fd2eea11026d7d059d4613a
be65b0b32bc25e0b571f8e0060c6a8b99aa64f2a
66384 F20110209_AABCMZ ravinuthula_v_Page_073.jpg
2d3a174ff0219f67e6997379780b6472
05bf8b3aa1f98c6829d69c626d9841fa414a4b5c
19813 F20110209_AABCOB ravinuthula_v_Page_087.QC.jpg
2851719cac680f056bc9b23d471f053f
248eeee2a74dd266c842a3154ed7e4ff20579ea1
24325 F20110209_AABCNN ravinuthula_v_Page_080.jpg
75aa9ca4f71369ac9d0e6ef011c47d02
9a56eeffa3e34cfb6095853adcc4d08141bac2c0
67481 F20110209_AABCOC ravinuthula_v_Page_088.jpg
315914d4d8f1dbef25d980959d14be34
c90d541cf17b3cae719c831a1653fba642e06752
7385 F20110209_AABCNO ravinuthula_v_Page_080.QC.jpg
c9666bba6f1664be9ef5374c348aa4f4
068748bdef8c601c50b1c25d5ed9797ae57fe5e7
20807 F20110209_AABCOD ravinuthula_v_Page_088.QC.jpg
8e209e2da545833ed4274e4695bb0324
23be40293f6b497ff0d6e83fa448b14af8689d5b
23265 F20110209_AABCNP ravinuthula_v_Page_081.jpg
96b1c210ccd535e237f1b1ee8f5f8633
ea281bd87efad0de8e5a11a7bd28b3242f2d02a3
79307 F20110209_AABCOE ravinuthula_v_Page_089.jpg
9183b4c3a1de880ed5e19752c33d6977
869432b73f75b69470830a219bc1314204385d9a
7483 F20110209_AABCNQ ravinuthula_v_Page_081.QC.jpg
3977042f245cb544abe136bdaeb1f01b
b30af0a1b51f194b0565a9d95e4def88053ddcf2
24050 F20110209_AABCOF ravinuthula_v_Page_089.QC.jpg
904e408706afcc2904cdbc6ebc1d9267
eda33b1ff18d6aa3e8f72410d5e92db79ae427d5
44444 F20110209_AABCNR ravinuthula_v_Page_082.jpg
38b57bed9f111837746e3b151ae5ca97
081054da75dcb4a6b16f37d2598ee91b1066758b
32714 F20110209_AABCOG ravinuthula_v_Page_090.jpg
6409da038355dbb654deda54cbe843dc
071edc0a3e83db90643bd0c9c1c2ee436f2e83fa
12996 F20110209_AABCNS ravinuthula_v_Page_082.QC.jpg
f0a6a5f11d3b345274a23b5d9e393da3
1420fdc8a17965a35b1d64b5b4fb5a501459a69c
10318 F20110209_AABCOH ravinuthula_v_Page_090.QC.jpg
e50514f920b92cf17fb47bcfb6801fb1
12b31995b93f6075f1b1c0d745a44ab5628e259c
63673 F20110209_AABCNT ravinuthula_v_Page_083.jpg
e086a28286d13cf889027a5ce117ba8f
04566ad60da898b5ca5f9cbd79e119d095114aa5
34401 F20110209_AABCOI ravinuthula_v_Page_091.jpg
759695deb5237103ba54de78e8dec0eb
46d9e62c55a14c3120e5e38f0d07a1e60f9ff2e9
19927 F20110209_AABCNU ravinuthula_v_Page_083.QC.jpg
aec4c6da34acf96a72dde07c916b8f05
cbaca98a209095a98c59b6fc15cde8e7d88a8af9
12139 F20110209_AABCOJ ravinuthula_v_Page_091.QC.jpg
ae3d8b6dfbfcc9df690e0ecfba97ea97
bd859bb6b9855188e93600a8112356acc3885086
71485 F20110209_AABCNV ravinuthula_v_Page_084.jpg
3e931616d3af87ff90abf3263dccfd4a
114c016dc5d8a9264888031b35c51869d5f51883
45472 F20110209_AABCOK ravinuthula_v_Page_092.jpg
2fec0f336d3ca7f449bbf3b48261874f
c417ddd6f33a371456cd701c51605638d880377c
21395 F20110209_AABCNW ravinuthula_v_Page_084.QC.jpg
344fdfbf5b052ed7f52d10b43ec81b96
d9d26fe80283454e5311623344b07262e01010be
15021 F20110209_AABCOL ravinuthula_v_Page_092.QC.jpg
c68fbe5bb9bd36b6a2e8065dae038c23
a430c2dad9269d4e0dba25117a2fdb8c0fe974f3
24528 F20110209_AABCNX ravinuthula_v_Page_085.jpg
6f7950c7987de1324b440e03a45f95d9
ef3a4e908069e1263cae06c4e0f7989da0f96cf6
32433 F20110209_AABCPA ravinuthula_v_Page_100.jpg
a36e0f30f72ed0c0f3499daf1bd60a3b
ddd9ab1994e23e05428adbfb00ecfe5469a55ea6
68118 F20110209_AABCOM ravinuthula_v_Page_093.jpg
fb94c5599b4f445af5e5cd5f28eee885
bd04a951d83ebc839d370ec581ad2d47feff8194
8579 F20110209_AABCNY ravinuthula_v_Page_085.QC.jpg
d368e10ab90ef0757767ba75291c6b44
9dc6f32a8fa6c28854164784b66a726b3cd3cb62
9787 F20110209_AABCPB ravinuthula_v_Page_100.QC.jpg
59cd78be1c6259c5587cda2920f2d5bd
fc06c75838bac9d777ffd7e8e69407fb624aa20a
19734 F20110209_AABCON ravinuthula_v_Page_093.QC.jpg
e20a20b0a2cf5aea337940001176ec09
5e0ad758b948f2d29fbdc417eaa892de8a083b12
15941 F20110209_AABCNZ ravinuthula_v_Page_086.QC.jpg
87034414422ffb57d367b1a9d5146c92
bfd38dbbeb594a474fe728af703ab2ab5be5f74c
64006 F20110209_AABCPC ravinuthula_v_Page_101.jpg
9bb8006e52d8f18ba9ad58fd77f46498
b060a2962e8326d42520bbe2e697a1480ecdaab3
34649 F20110209_AABCOO ravinuthula_v_Page_094.jpg
59b7bfaf38fcb34053f9c58764acc109
fe229afba34fdf4974544bbd663e37395706a930



PAGE 4

IoweaspecialdebtofgratitudetoDr.Harrisforhisexpertguidanceandstimulatingdiscussions.Hisperception,insight,andexperiencehavecontributedimmenselytotheclarityandrigorofmyresearch.Thefaithheshowedwasthemotivatingforcetowardsmycontribution.Myassociationwithhimhasbeenanenlighteningandrefreshingexperience.IamimmenselythankfultoDr.JoseFortesforhishelpwhenIwasinaquagmireanditwasaprivilegeworkingunderhim.IamalsogratefultotheanaloggeniusDr.RobertFox,forhewentoutofthewaytohelpmeevenwhenIwasnotworkingunderhim.HeisoneofthefewprofessorsIfeelproudthatIgottoworkwith.ThisworkwassupportedbyNationalAeronauticsandSpaceAdministration(NASA)underawardno.NCC2-1363andSemiconductorResearchCorporation(SRC)underTaskID:1049-CrosscutResearch.IwouldliketothankDr.M.P.Anantram,Dr.HarryPartridge,andDr.T.R.GovindanatNASAAmesResearchCenter,CA,forthecondencetheyshowedinmeandalltheirsupportduringmyinternshipatNASA.ThanksareduetotheadministrativestaoftheDepartmentofElectricalandComputerEngineering:Ellie,Janet,Linda,andShannonfortheirco-operation.Furthermore,Itakethisopportunitytoexpressmyappreciationtoallthosewhohelpedmeinthecompletionofmywork.Iwouldliketothankmyformerandcurrentlabmates:Pravin,Vaibhav,Rama,Du,Xiaoxiang,Yuan,Harpreet,Mark,Meena,Harsha,andIsmailfor iv

PAGE 5

v

PAGE 6

page ACKNOWLEDGMENTS ............................. iv LISTOFTABLES ................................. ix LISTOFFIGURES ................................ x ABSTRACT .................................... xiv CHAPTER 1INTRODUCTION .............................. 1 1.1BiologicalMotivation .......................... 3 1.2EngineeringMotivation ......................... 3 1.3ChapterSummary ........................... 5 2THEWEIGHTEDAVERAGECIRCUIT ................. 6 2.1Time-ModeWeightedAveragingCircuit ............... 6 2.1.1ResetStage ........................... 9 2.1.2MeasuredResults ........................ 10 2.1.3Discussion ............................ 12 2.2TheoreticalAnalysisofSignal-to-NoiseRatioandDynamicRange 14 2.2.1OutputNoiseduetoTimingJitterattheInputs ....... 14 2.2.2OutputNoiseduetoFundamentalNoiseSourcesintheCircuit 15 2.2.2.1NoiseintOUTduetonoiseincurrentsourceI1 16 2.2.2.2NoiseintOUTduetonoiseincurrentsourceI2 17 2.2.2.3NoiseintOUTduetonoiseinthecomparator ... 18 2.2.3Discussion ............................ 21 2.3ScalingofTime-ModeWeightedAverageCircuitwithTechnology 21 2.3.1SimulationSetup ........................ 22 2.3.2ResultsandInferences ..................... 23 2.3.3Discussion ............................ 26 2.3.4Drawbacks ............................ 27 2.4CarbonNanotubeBasedTime-ModeWeightedAveragingCircuit 30 2.4.1CarbonNanotubeFieldEectTransistors(CNFETs)andTheirSpiceModels ....................... 30 2.4.2PhysicsGoverningtheOperationofCNFET ......... 32 2.4.3SimulationResults ....................... 32 vi

PAGE 7

............................ 33 2.5ReliableTime-ModeWeightedAverageCircuit ............ 34 2.5.1Motivation ............................ 34 2.5.2Time-ModeMedianCircuit ................... 36 2.5.3RedundancyinTime-ModeComputation ........... 37 2.5.4Discussion ............................ 40 3SNRCOMPARISONOFWEIGHTEDAVERAGINGCIRCUITS .... 42 3.1Voltage-ModeAveragingCircuit .................... 43 3.1.1NoiseContributionattheOutputdueto v12 45 3.1.2NoiseContributionattheOutputdueto v22 45 3.1.3NoiseBandwidth ........................ 46 3.2Current-ModeAveragingCircuit ................... 47 3.3Discussion ................................ 52 4OTHERTIME-MODECIRCUITEXAMPLES .............. 53 4.1WeightedSubtractionCircuit ..................... 53 4.2WeightedSumCircuit ......................... 54 4.3ScalarMultiplicationCircuit ...................... 57 4.4Maximum(MAX)/Minimum(MIN)Circuit .............. 58 5APPLICATIONOFTIME-MODECIRCUITS .............. 60 5.1Time-ModeEdgeDetectionCircuit .................. 60 5.1.1BasicFormulation ........................ 60 5.1.2Smoothing ............................ 62 5.1.3ThresholdedDierence ..................... 63 5.1.4Results .............................. 64 5.1.5Discussion ............................ 69 5.23-Tap1-QuadrantTime-ModeFiniteImpulseResponseFilter ... 69 5.2.1FiniteImpulseResponseComputationinTime ........ 70 5.2.23-Tap1-QuadrantTime-ModeFIRFilterArchitecture .... 74 5.2.3Step-by-StepDescriptionoftheFunctionality ......... 79 5.3SimulationResults ........................... 79 5.4Signal-to-NoiseRatio/DynamicRangeAnalysis ........... 91 5.4.1NoiseintOUTduetoNoiseinCurrentSourceI1 91 5.4.2NoiseintOUTduetoNoiseinCurrentSourceI2 92 5.4.3NoiseintOUTduetoNoiseinCurrentSourceI3 92 5.4.4NoiseintOUTduetoNoiseinCurrentSourceI4 93 5.5PerformanceoftheFIRFilterunderInputTimeJitter ....... 95 5.6AdvantagesofTime-ModeFIRFilters ................ 96 5.7LimitationsofTime-ModeFIRFilters ................ 96 vii

PAGE 8

.............. 98 6.1ImplementingNon-LinearArithmeticbyIntroducingNon-LinearityintheExistingLinearComputationalBlocks ............. 98 6.1.1Time-ModeMultiplication ................... 98 6.1.2Time-ModeDivision ...................... 101 6.2ImplementingNon-LinearArithmeticUsingTime-ModeMulti-LayerPerceptron ................................ 103 6.2.1Time-ModeMulti-LayerPerceptron .............. 103 6.2.2HardwareImplementationofTime-ModeMLP ........ 106 7CONCLUSIONANDFUTUREWORK .................. 113 7.1Conclusion ................................ 113 7.2Futurework ............................... 114 REFERENCES ................................... 116 BIOGRAPHICALSKETCH ............................ 119 viii

PAGE 9

Table page 2{1Measuredperformancecharacteristicsoftime-modeweightedaveragingcircuit. ..................................... 13 4{1ClassicationofTime-modecomputationalcircuits.Relativetimereferenceimpliesthattheinputsandoutputsaredenedwithrespecttoareferencetime(startofaframe).Absolutetimereferenceimpliesthatinputsandoutputsarenotdenedwithrespecttoareferencetime. ......... 59 ix

PAGE 10

Figure page 1{1Dierentmodesofcomputation. ....................... 2 2{1Time-modeweightedaveragecircuit.A)Circuitschematic.B)Idealizedgraphshowingthecapacitorvoltageatdierenttimeperiods. ...... 6 2{2Inputst1,t2andoutputtOUTaredenedwithinaframe ......... 9 2{3PlotoftOUTforvaryingI(C=20pF,VTH=2:5V).Theblockwasgivenonestepinput. ............................. 10 2{4PlotoftOUTforvaryingI(C=20pF,I=1:0476A,VTH=2:5V).Theblockwasgivenonestepinput. ....................... 11 2{5PlotoftOUTforvaryingt2(C=20pF,I=1:0476A,VTH=2:5Vwitht1xedat1s,8:5sand32:5s.) ..................... 12 2{6PlotoftOUTforvaryingt2(C=20pF,I1=1:46A,I2=0:29A,VTH=2:5Vwitht1xedat1s,8:5sand32:5s.) ................ 13 2{7Variationofcapacitorchargingcurrentwithscalingtechnology ...... 24 2{8Variationofdynamicpowerwithscalingtechnology ............ 24 2{9Variationofaveragepowerwithscalingtechnology ............ 26 2{10Variationofenergyconsumedperaveragingoperationwithscalingtechnology 27 2{11Comparisonofcalculatedandsimulatedtime-modeaveragingoutputsovertechnologies ............................... 28 2{12Comparisonofcalculatedandsimulatedtime-modeaveragingoutputnoiseovertechnologies ............................ 28 2{13Comparisonofcalculatedandsimulatedtime-modeaveragingSNRvaluesovertechnologies ............................... 29 2{14Variationofdynamicrangewithscalingtechnology ............ 29 2{15PCNFETID-VGSplotsforvaryingVDS 33 2{16NCNFETID-VGSplotsforvaryingVDS 34 2{17Nano-weightedaveragecircuitsimulationoutputs ............. 35 x

PAGE 11

35 2{19Time-modemediancircuitfor3-inputs ................... 36 2{20Time-modemediancircuitforN-inputs ................... 37 2{21VonNeumann'stwo-out-of-threemajoritycircuit ............. 38 2{22Blockdiagramofareliabletime-modeweightedaveragecircuit ...... 39 2{23Plotshowingtheincreaseinreliabilityoftheredundantcircuitascomparedtotheindividualelements .......................... 40 3{1Voltagemodeweightedaveragingcircuit .................. 44 3{2Voltagemodeweightedaveragingcircuitwithnoisesources ........ 45 3{3Currentmodeweightedaveragingcircuit .................. 48 3{4Currentmodeweightedaveragingcircuitwithnoisesources ....... 48 3{5Halfofthenoisecurrentfromeachtransistorowstotheoutput .... 50 3{6CalculatedandsimulatedSNRvaluesofatime-modeweightedaveragingcircuitovertechnology ............................ 52 4{1Weightedsubtractioncircuit.A)Circuitschematic.B)Idealizedgraphshowingthecapacitor'svoltageatdierenttimeperiods. ......... 53 4{2Weightedsumcircuit.A)Circuitschematic.B)Idealizedgraphshowingthecapacitor'svoltageatdierenttimeperiods. .............. 56 4{3Scalarmultiplicationcircuit.A)Circuitschematic.B)Idealizedgraphshowingthecapacitor'svoltageatdierenttimeperiods. ......... 57 4{4CircuitschematicofMAXcircuit ...................... 58 4{5CircuitschematicofMINcircuit ....................... 58 5{1Edgedetectionbyderivativeoperators ................... 60 5{2Dataowintime-modeedgedetection ................... 62 5{3Circuittosmoothpixelintensities ...................... 62 5{4Circuitusedtoobtainthresholdeddierencesonthesmoothedsteps .. 64 5{5MATLABsimulationresultsshowingtheoriginalimage,smoothedimageandthedetectededgesofanimage ..................... 66 5{6Simulationresultsshowingtheoriginalimage,smoothedimageandthedetectededgesofa16pixelimage ...................... 67 xi

PAGE 12

........ 68 5{8ComputationalblocktobeusedintheFIRlter ............. 71 5{9Voltageacrossthecomputationalblock'scapacitoratvarioustimes ... 72 5{103-taptime-modeFIRlterarchitecture .................. 76 5{11Thearchitectureoftheinputconditioningblock .............. 77 5{123-tapFIRlter'sinput,digitalpreconditioningblockanditsoutputs .. 78 5{13StateoftheFIRlterasinputt1enters .................. 80 5{14StateoftheFIRlterasinputt2enters .................. 81 5{15StateoftheFIRlterasinputt3enters .................. 82 5{16StateoftheFIRlterasinputt4entersthesystemandwithframe4dischargingcomputationalblock1 ...................... 83 5{17StateoftheFIRlterbeforeframe5starts ................ 84 5{18Pole-zeroplotsoftheFIRlter ....................... 86 5{19Time-modeFIRlter'smagnituderesponse(samplingfreq=100kHz) 86 5{20Time-modeFIRlter'sphaseresponse ................... 87 5{21Time-modeFIRlter'sgroupdelay ..................... 88 5{22Time-modeFIRlter'sinputandoutputwaveforms(intimedomain) .. 88 5{23EnergyofFIRlter'sinputandoutputsignals ............... 89 5{24Cadencesimulationresultsforthetime-mode3-bitFIRlter ....... 90 6{1Scalarmultiplicationcircuit ......................... 99 6{2Timingdetailsofthe2-inputtime-modemultiplier ............ 100 6{3Schematicofthe2-inputtime-modemultiplier ............... 101 6{4Schematicofthe2-inputtime-modedivider ................ 102 6{5Feedforwardmulti-layerperceptron ..................... 104 6{6Fullyconnected2-inputfeedforwardMLPwithonehiddenlayerandoneoutputlayer .................................. 105 6{7Non-linearmodelofaneuron ........................ 105 6{8Time-modescalarmultiplicationandsummingcircuit ........... 108 xii

PAGE 13

............... 109 6{10Variationofoutputmeansquareerrorwithepochs ............ 111 6{11Time-modeMLPdesiredandactualoutputs ................ 111 6{12Cadencesimulationresults .......................... 112 xiii

PAGE 14

Weintroduceasetofbasiccircuitbuildingblocksforanalogcomputationusingatemporalstepfunctionrepresentationfortheinputsandoutputs.Time-modecircuitsaredescribedthatuseastepfunctionrepresentationforcomputingtheweightedaverage,weighteddierence,weightedsum,scalarproduct,maximum,minimum,multiplication,divisionandthresholdeddierenceoperations.Time-modecircuitsarealternativestowell-knownvoltage-andcurrent-modeapproacheswhichcouldbeusedtoperformthesesamemathematicaloperations. Time-modecircuitsgrowmoreappealingasCMOSprocesstechnologiesscalesincetheyminimizetheamountofanalogcircuitryandusenoiserobustasynchronoustimeeventsasinputsandoutputs.Time-modecircuitsprovideaseamlessinterfacetothegrowingnumberoftime-basedsensorswhichalreadyoutputcompatibletimingevents.Anexampleisgivenwhereatime-modeedgedetectorisdevelopedtodirectlyinterfacetotheoutputofatime-to-rst-spikeimager.Time-modecircuitshavesimplearchitecture,providehighsignal-to-noiseratio,dynamicrange,consumelowpower,andhence,proveadvantageousinarchitecturallycomplexapplicationslikeniteimpulseresponselters. xiv

PAGE 15

Allanalogsignalprocessingcircuitsmustrepresentsignalsusingphysicalquantitiessuchasvoltage,current,charge,frequencyortimeduration.Inanalogliterature,wehaveseenextensiveuseofvoltage-mode,current-modeandcharge-modecircuitsthatgenerallyrepresentinputandoutputsignalsasvoltage,currentandchargerespectively: 1 ]andGmCstylecircuitscommonintoday'sanalogverylargescaleintegration(VLSI)designs[ 2 ]. 3 ].ThesedesignsincludeBarrieGilbert'soriginaltranslinearcircuitsthatrelyontheexponentialvoltagetocurrentrelationshipsofbipolarorcomplementarymetaloxidesemiconductor(CMOS)subthresholdcircuits[ 4 ].Morerecentlogdomainlters[ 5 ]arealsogenerallyconsideredtobecurrent-modecircuits. 6 ]. Thesedierentmodesofsignalrepresentationhaverespectiveadvantagesanddrawbacksandcanthereforebeusedindierentpartsofthesamesystem.Thevoltagerepresentationmakesiteasytodistributeasignalinvariouspartsofacircuit,butimpliesalargestoredenergyCV2 7 ].Thecharge 1

PAGE 16

representationrequirestimesamplingbutcanbenicelyprocessedbymeansofCCDsorswitched-capacitortechniques.Inactualfact,everycircuitusesvoltage,currentandchargeinitsoperationandsometimessemanticsandphilosophyaredebatedwhendenitivelycategorizingtheseclassesofcircuits[ 7 ]. Temporalcodingisusedasthedominantmodeofsignalrepresentationforcommunicationinbiologicalnervoussystems.Signalsrepresentedinthismannerareeasytoregenerateandthisrepresentationmightthereforebepreferredforlong-distancetransfersofinformation.Itisdiscontinuousintime,butthephaseinformationiskeptinasynchronoussystems.Weintroducetime-modecircuitsasanothercategoryofanalogsignalprocessingcircuitsthatrepresentinputandoutputsignalsinthetemporaldomain.Figure 1{1 depictsblockdiagramsforvoltage-,current-,andtime-modecircuits.Time-modecircuitsusetemporalevents,inthiscasevoltagesteps,torepresentsignals. Figure1{1: Dierentmodesofcomputation.

PAGE 17

Sinceweareusingastepfunctionrepresentation,wecannotrepresentinformationintermsofringrates(whereweneedmultiplespikestorepresentananalogvariable).Thisnewapproachissimilartotemporalcodingbysinglespikes[ 8 ]ratherthanonthetraditionalinterpretationofanalogvariablesintermsofringrates. Maass[ 8 ]pointsoutthataspikingneuroninprinciplewillbeabletocomputeintemporalcodingofinputsandoutputalinearfunctionifitspostsynapticpotentialcanbedescribedorapproximatedbyalinearfunctionduringsomeinitialsegment.AswewillseeinChapter2,time-modecircuitsperformlinearcomputationsbylinearlymappingthetemporalinputstoavoltageacrossacapacitor.Also,Maasspointsoutthatnetworksofnoisyspikingneuronsare|universalapproximators|theycanapproximatewithregardtotemporalcodinganygivencontinuousfunctionofseveralvariables.ThisobservationisprovedinChapter6whereweuseanetworkoftime-modecircuitstoimplementanapproximationofthemultiplicationfunction(non-linearfunction).

PAGE 18

fromapurelyengineeringperspective.Throughtheelectronicsrevolutionoverthepastdecades,CMOSprocesstechnologyisshrinkingtheusablevoltageswing,wreakinghavocontraditionalanalogcircuitdesign.However,thefaster\digital"transistorsarebetterabletoprocesstimingsignalsleadingustoconsideranalogcomputationmoresimilartothatofthebrain.Thistrendwilllikelycontinuewithnanotechnologysinceevensmallervoltagerangesandevenfasterdevicesarepromised.Ofcourse,CMOStechnologyisprimarilyscalinginfavoroffasterandfasterdigitaldevices,howeverpowerconsumptionisbeginningtolimithowfarthesedigitalcircuitscanscale. Time-basedsignalrepresentationshavebeeninuseformanyyears,includingsuchtechniquesaspulse-widthmodulationandsigma-deltaconvertersbuttemporalcodesarebecomingevenmorecommonwiththerisingpopularityofsuchtechniquesasclassDampliers,spike-basedsensorsandevenultra-wideband(UWB)signaltransmission.However,thesetemporalcodesaretypicallyusedastemporaryrepresentationsandcomputationisonlyperformedafterreconstructionbacktoatraditionalanalogordigitalform.Thereareinstanceswhereampliersusetemporalsignalsasinputsandoutputs[ 9 ],buttheydonotperformcomputationwiththem. TherearearchitectureslikethePALMO[ 10 ]wheretheinputsandoutputsarerepresentedbytemporalsignals,butusingpulses.Insucharchitectures,theinputtemporalpulsesareimmediatelyconvertedtovoltageandtheylosethecomputationaladvantagesthatthetime-basedrepresentationpromises.Similarly,Murraydiscussestheimplementationofarithmeticfunctionslikeadditionandmultiplicationusingvoltageorcurrentpulses[ 11 ].AnotherapproachbySarpeshkarusespulsesforscalablehybridcomputation[ 12 ].However,alltheabovementionedarchitecturesusepulsesforcomputationwithmorecomplicatedcircuitsthanthetime-modecircuits.

PAGE 19

Inthisthesiswedescribeasetofbasiccircuitbuildingblocksforcomputationusingananalogtemporalstepfunctionrepresentationforbothinputsandoutputs.

PAGE 20

Figure2{1. Time-modeweightedaveragecircuit.A)Circuitschematic.B)Idealizedgraphshowingthecapacitorvoltageatdierenttimeperiods. Figure 2{1 Aillustratesthebasicelementsusedtoperformaweightedsumoftemporalsignals.Ingeneral,thecircuitcanprocessmanyinputstepsbutonlytwoareshownforsimplicity.Thecircuitconsistsofasinglecapacitorandcomparatorplusaninverter,currentsourceandpfetforeachinput 13 ]. 6

PAGE 21

voltageVTH.Oncetheblockoutputsastep,anappropriateresetstage(notshowninthegure)resetsthecapacitorto0V.ThecurrentsourcesI1andI2chargethecapacitorduringdierenttimeperiodsasshowninFigure 2{1 B. Initially,thevoltageacrossthecapacitor(VC)isresettoground.Forsimplicity,lett1
PAGE 22

ThereforeforgeneralvaluesoftOUTabovetheminimumvalue, Eq. 2{5 providestherelationtobemetforEq. 2{2 tobevalid.ForthespecialcasewhereI1=I2=I,thentheoutputsteptimetoutisthemeanoft1andt2plusaprogrammableconstant(CVTH=2I). ForunequalvaluesofI1andI2, whereCVTH Inthiscase,thentheoutputtimestepistheweightedaverageoft1andt2plusaconstant. Wecansummarizetheresultsobtainedaboveinasingleequation: (2{8c) IngeneralforNinputsteps, providedthatVTHislargeenough.Thecircuitcanbefurthergeneralizedtohandlenegativeweightvaluesinseveralways;forinstance,usingcurrentsourcesthatsinkcurrenttogroundaslongastheoutputvoltagestayspositiveandeventuallyreachesVTH.

PAGE 23

Inputst1,t2andoutputtOUToftheweightedaveragecircuitaretime-stepsandthesetime-stepsaredenedwithinaframe(Frame1)asshowninFigure 2{2 .Whenaframe(Frame1)ends,theinputsandtheoutputstepsalsoendandthecircuitisreset.Asthenextframestarts(Frame2inthegure),thecircuitwouldbereadytoprocessthenextsetofinputst1andt2.Eachframeshouldbelongenoughtoallowtheweightedaveragecircuittoproduceitsoutput.Forboundedframelengths,thereisachancethattheoutputwillnotoccur. Figure2{2. Inputst1,t2andoutputtOUTaredenedwithinaframe 2{1 A,wehavenotshownanexplicitresetstage.Settingthecapacitor'svoltagetoitsinitialvoltageVTHthroughatransmissiongateisthefunctionalitydesiredfromtheresetstageandthiscanbeintegratedwiththeapplication'sresetstage. Laterinthisdissertation,wewilldiscusssomeapplicationsofthistime-modeweightedaveragecircuit:anedgedetectioncircuitanda3-tapFIRlter.Theseapplicationshavecustomresetstagesandtheresetforthebasicblockisintegratedinthesecustomresetstages.

PAGE 24

2{3 showsthemeasuredoutputtOUTwhenjustoneinputisprovidedtothecircuit.TheoutputtOUTisplottedforvaryingI.ThevaluesofCandVTHinthecircuitare20pFand2:5Vrespectively.Figure 2{4 alsoshowstheoutputtOUTwhenonlyoneinput(occuringatt1)isprovidedtothecircuit.ThecurrentsourceIisxedat1:05A.Theinputtransitiontimet1wasvariedexternallyandtheoutputtOUTwasmeasuredandplotted.TheoutputexpectedfromtheblocktOUT=t1+CVTH Figure2{3. PlotoftOUTforvaryingI(C=20pF,VTH=2:5V).Theblockwasgivenonestepinput. Figure 2{5 showstheoutputtOUTwhenboththeinputsareprovidedtothecircuitbutthecurrentsourcesI1andI2arexedat1:552A.Therstinputenteringtheblockwasxedas1s,8:5sand32:5sforthreedierentsetsofmeasurements.Theinputtransitiontimet2wasvariedexternallyfordierent

PAGE 25

Figure2{4. PlotoftOUTforvaryingI(C=20pF,I=1:0476A,VTH=2:5V).Theblockwasgivenonestepinput. valuesoft1andtheoutputtOUTwasmeasuredandplotted.TheoutputexpectedfromtheblocktOUT=t1+t2 Figure 2{6 showstheoutputtOUTforthecasewhenbothinputsareprovidedtothecircuitbutthecurrentsourcesI1andI2aredierentandarexedat1:46Aand0:29Arespectively.Similartotheabovecase,therstinputenteringtheblockwasxedas1s,8:5sand32:5sforthreedierentsetsofmeasurements.Theinputtransitiontimet2wasvariedexternallyfordierentvaluesoft1andtheoutputtOUTwasmeasuredandplotted.TheoutputexpectedfromtheblocktOUT=I1t1+I2t2

PAGE 26

Figure2{5. PlotoftOUTforvaryingt2(C=20pF,I=1:0476A,VTH=2:5Vwitht1xedat1s,8:5sand32:5s.) Eachoftheseerrorscanbereducedsomewhatwithcarefullayout,largercircuits,morepowerconsumption,and/orcalibrationprocedures.Thesetradeosmustbetakenbasedonthedemandsofparticularapplications.Particularadvantagesanddisadvantagesoftheweightedaveragecircuitandothertime-modecircuitsmustbecarefullyconsidered.Itislikelythattime-modecircuitswillhavelargerdynamicrangesthanconventionaldesignsbuthighspeedoperationwillbecompromisedsincetimeisusedintherepresentations.Generalclaimsaredicult,especiallyconsideringthatitevendiculttocitegeneraladvantagesof

PAGE 27

Figure2{6. PlotoftOUTforvaryingt2(C=20pF,I1=1:46A,I2=0:29A,VTH=2:5Vwitht1xedat1s,8:5sand32:5s.) current-modecircuitsvs.voltage-modecircuits[ 7 ].Abigadvantageoftime-modecircuitshoweveristhatmoreandmoresensorsarebeingdesignedwithstepoutputs[ 14 ][ 15 ]andthetime-modecircuitscandirectlyinterfacetothesesensors. Table2{1. Measuredperformancecharacteristicsoftime-modeweightedaveragingcircuit. PerformancespecicationValue Powerconsumption0:6WSNR56dBDierential-modedynamicrange62dBCommon-modedynamicrangeEectivelyinnite Byperformingcomputationusingtemporalstepfunctions,theaveragingblockwasabletoachievealmostinnitecommon-modedynamicrange,62dBdierential-modedynamicrangeandSNRof56dBwithverylowpowerconsumptionof0:6W.Thispowerconsumptionwasontheorderofnanowatts,whenthecomparatorwereoperatedinthesub-thresholdregion.But,theoperatingspeedofthecomparatorwasslow.Therefore,wehadtostrikeatrade-obetweenthe

PAGE 28

comparator'soperatingspeedandthepowerconsumption.ThemeasuredcircuitspecicationsaretabulatedinTable 2{1 1.outputnoiseduetotimingjitterattheinputs. 2.outputnoiseduetofundamentalnoisesourcesinthecircuit. 2{1 Ais: Jittert1(acrossdierentinputvaluesithasameanvalueof t1andavarianceof t12)intheinputt1,causesthefollowingoutput ThejitterattheoutputtOUT1isgivenby: tOUT1=tOUT1tOUT=(I1(t1+t1)+I2t2 whichisasimplescalarmultiplicationoft1. Themeanoftheoutputjitterscalesaccordinglyas, tOUT1=I1 Thevarianceofthisnoisecanbeeasilyderivedtobe, tOUT12=I21

PAGE 29

Similarly,thevarianceiftheoutputnoisecausedbytheinputtimejittert2(correspondingtoinputt2), tOUT22=I22 Thetotalvarianceofthenoiseattheoutputisgivenby, tOUT2= tOUT12+ tOUT22=(I21 IfI1=I2,then tOUT2= t12+ t22 Sinceonlyafraction(25%)ofthejitterattheinputsaecttheoutputjitter,wecansaythatthetime-modeweightedaveragecircuiteectivelyreducesthejitterattheinputs. 2{1 Aillustratesthebasicelementsusedtoperformaweightedsumoftemporalsignals.Wealreadyknowthattheoutputfromthisblockis: Wewillnowderiveanexpressionforthesignal-to-noiseratioofthistime-modeweightedaveragingcircuit. Therststeptowardsthederivationistodenethesignal.Assumingadierentialrepresentation,letusrefertheinputsandoutputsoftheaveragingblocktoitsrstinput.Forsimplicity,letusassumet1astherstinput.Thetwoinputstotheaveragingblockaredenedas,^t1=t1t1=0and^t2=t2t1.Theoutputisdenedas^tOUT=tOUTt1.Thisoutputisdenedasthesignal.In

PAGE 30

words,thesignalisdenedastheoutputtOUToftheaveragingblockreferredtotheinputt1. Therefore,^tOUTisgivenby: ^tOUT=tOUTt1=(I1t1+I2t2 Thereare3noisesourcesthatdominatethenoiseperformanceofthiscircuit. 1.NoiseduetothecurrentsourceI1. 2.NoiseduetothecurrentsourceI2. 3.Noiseduetothevoltagecomparator. Thesenoisesourcesareuncorrelatedandthereforewecanconsidertheimpactofeachofthesenoisesourcesindividuallyontheoutputofthecircuit.

PAGE 31

ThenoiseattheoutputtOUTcanbecalculatedasshownbelow: tOUT1=tOUT1^tOUT=I2(t2t1)+CVTH (I1+I1+I2)(I1+I2)(I2t2I2t1+CVTH)(I1) (I1+I2)2 Thevarianceofthisnoiseisgivenby tOUT12(I2t2I2t1+CVTH)2( I12) (I1+I2)4(2{22) ThenoiseattheoutputtOUTcanbecalculatedasshownbelow: tOUT2=tOUT2^tOUT=(I2+I2)(t2t1)+CVTH (I1+I2+I2)(I1+I2)+CVTH(I2 (I1+I2)2+CVTH(I2 (2{24)

PAGE 32

Thevarianceofthisnoiseisgivenby tOUT22(I1(t2t1)CVTH)2( I22) (I1+I2)4(I1(t1t2)+CVTH)2( I22) (I1+I2)4 ThenoiseattheoutputtOUTcanbecalculatedasshownbelow: tOUT3=tOUT3^tOUT=I2(t2t1)+C(VTH+V) Thevarianceofthisnoiseisgivenby tOUT32=(C (I1+I2)4(2{28) Fortypicalvalues,thenoisevariationdenotedbyEq. 2{28 isnegligiblecomparedtothenoisevariancesshowninEqs. 2{22 and 2{25 .Therefore,intheforthcomingcalculationsweneglectthenoisecontributionofthecomparator. Therefore,thetotalnoiseattheoutputoftheaveragingblockisgivenby tOUT2(I2t2I2t1+CVTH)2( I12) (I1+I2)4+(I1t1I1t2+CVTH)2( I22) (I1+I2)4

PAGE 33

ThenoiseinthecurrentsourcesI1andI2isdominatedbyshotnoise.Ingeneral,shotnoiseduetoacurrentsourceIisgivenby[ 16 ], I2=eI (2{30) whereisthetimeduringwhichthecurrentsourceisONandcontributestotheoutputandeisthechargeofanelectron. CurrentsourceI1chargesthecapacitorduringthetimeperiodtOUTt1.Noiseinthecurrentsourcewouldaectthecircuitonlyduringthistimeperiod.Therefore, Therefore, I12=eI1 CurrentsourceI2chargesthecapacitorduringthetimeperiodtOUTt2.Onlyduringthistimeperiod,thenoiseinthecurrentsourcewouldaectthecircuit.Therefore,

PAGE 34

Therefore, I22=eI2 SubstitutingEqs. 2{32 and 2{34 into( 2{29 ),weget tOUT2=(I2t2I2t1+CVTH)2(eI1(I1+I2) (I1+I2)4+(I1t1I1t2+CVTH)2(eI2(I1+I2) (I1+I2)4=eI1(I2(t2t1)+CVTH)+eI2(I1(t1t2)+CVTH) (I1+I2)3=eCVTH(I1+I2) (I1+I2)3=eCVTH Thesignal-to-noiseratioisgivenby: Eq. 2{36 givestheSNRforatime-modeweightedaveragecircuit. Foranaveragingcircuit,I1=I2=I.Therefore, ThemaximumvalueofthisSNRoccurswhen

PAGE 35

SubstitutingEq. 2{38 intoEq. 2{37 ,weget ToquantifythispeakSNRvalue,wesubstitutedC=2pFandVTH=5V(maxvalue)inEq. 2{39 andobtainedavalueof84dB.Thispeakvaluecanbeincreasedbyfurtherincreasingthevalueofthecapacitance.Fora20pFcapacitance,wegetaSNRof88dB. Wechoosethecurrent180nmasthereferencetechnologyand90nm,65nm,45nmand32nmasfuturetechnologiesforoursimulations.PTMHSpicetransistor

PAGE 36

modelsareusedforallthetechnologies-PredictivetechnologymodelsaredevelopedbytheNanoscaleIntegrationandModelingGroupatArizonaStateUniversity[ 17 ]. Tocomparetheperformanceoftheweightedaveragecircuitastechnologyscales,thecapacitanceCandreferencevoltageVTHwerekeptconstantacrossdierentfuturetechnologynodes.ThisensuresthatchargingcurrentsI1andI2aretheonlyvariablecircuitparametersanditallowsanaptcomparisonofthetrendsindynamicrange,powerandSNRoftheweightedaveragecircuitacrosstechnologies.TovaryI1andI2,wehadtochangethesizesofthetransistorsinthelow-voltagecascodecurrentsources.Forsimplication,thetwochargingcurrentsI1andI2werekeptconstant.Thetransistorsintheweightedaveragecircuit(thetransistorsofthelow-voltagecascodecurrentmirrors,comparatorandthedigitalswitches)weresizedfortwopossiblescenarios:

PAGE 37

Itwasarguedpreviouslythattheonlynoisesourcesthatcontributeheavilytothenoiseofthetime-modeweightedaveragingcircuitaretheshotnoisesoftheDCcurrentsourcesI1andI2.Thenoiseofthecomparatorisnegligible.Tocharacterizethenoiseperformanceoftheweightedaveragecircuitacrossvariousfuturetechnologies,noiseanalysisduringtransientsimulationisrequired.SincesuchananalysisisnotreadilyavailableinourCadencesoftwaresetup,toachievethistwonoisecurrentsources(withGuassiandistribution)weregeneratedrandomlyinMATLABandtheirRMSvaluesweresetaccordingtoequationspreviouslyderived.ThesecurrentsourcesmodeltheshotnoiseofthecurrentsourcesI1andI2andareconnectedinparalleltotheirrespectivecurrentsourcesduringthesimulations.ThesenoisecurrentsourceswereswitchedononlyduringtheperiodwhenthetimestepsturnedontheDCcurrentsources. Thetimingoftherststepischosenasthetimereferenceandwaskeptconstantforalltechnologies.Inthiswaytheoutputtimehadthesamereferenceinalltechnologies. 2{7 .Thisisbecauseastechnologyscales,transistorsizesreduceandtherefore,thecurrentconductedbythetransistorsscaledownexponentially(followingthewell-establishedlarge-signallong-channel/short-channelcurrentequations). 2{8 and 2{9

PAGE 38

Figure2{7. Variationofcapacitorchargingcurrentwithscalingtechnology Figure2{8. Variationofdynamicpowerwithscalingtechnology

PAGE 39

byCVTH 2{14 2{10 2{11 comparingthesimulatedandcalculatedvaluesoftheoutputoftheweightedaveragecircuit,weseethatthesimulatedresultsmatchthecalculatedresultswell.Webelievethattheslightdierenceinresultsastechnologyscalesisduetoinaccuracyincircuitmodelsatlowcurrentlevels. 2{12 conrmingtheaccuracyofthederivedexpressionfornoiseofthiscircuit.Also,noiseisinverselyproportionaltocurrentwithallotherfactorsremainingthesame.Hencewithexponentialtypedecreaseincurrentweseeanexponentialtypeincreaseinnoise. 2{13 .Thesignal,whichisthetimetakenbytheweightedaveragecircuittoproduceanoutput,increasesaswescaletechnology.Withthenoisealsoincreasingwithscalingtechnologywenotethattheratioofsignalpowerandnoisepower,theSNR,actuallydecreasesonlyslightlywithscalingtechnology.Thisisinaccordancetowhatwaspredictedbyourequations.Withmoredetailedanalysis,(withallotherfactorsconstant)wecannotethattheSNRisslightlydependentonthecurrent.Soascurrentdecreaseswithtechnology,SNRalsodecreases.However,inEq. 2{37 ,theI(t2t1)termismuchsmallerthantheCVTHtermcausingSNRtobealmostaconstant.Also,slightvariationsinthesimulatedSNRresultsconrmthisanalysis. Foralltheabovementionedperformancemeasures,forboththetransistorsizingscenarios-sizingthetransistorssothatthetransistorsareintheactiveregionandsizingthetransistorsbythetechnologyscalingfactor,weseethesameperformancetrend.

PAGE 40

Figure2{9. Variationofaveragepowerwithscalingtechnology Withscalingtechnology,thoughthenoiseperformanceofthecircuitgetsworsetheSNRstaysaconstant.Therefore,applicationsusingtime-modecircuitscanexpecttheSNRperformanceofthetime-modecircuitstoremainconstantwithnewtechnologies.

PAGE 41

Astechnologyscales,time-modecircuitsbecomemorepowerandenergyecient.Therefore,theycanbechosenforlow-powerapplicationsacrossdierentdevicetechnologies. Figure2{10. Variationofenergyconsumedperaveragingoperationwithscalingtechnology Theresultsfromtheexperimentsareveryencouragingandreinforcethefactthattime-modecircuitswouldscalewellwithtechnologyandshowgoodperformance.

PAGE 42

Figure2{11. Comparisonofcalculatedandsimulatedtime-modeaveragingoutputsovertechnologies Figure2{12. Comparisonofcalculatedandsimulatedtime-modeaveragingoutputnoiseovertechnologies

PAGE 43

Figure2{13. Comparisonofcalculatedandsimulatedtime-modeaveragingSNRvaluesovertechnologies Figure2{14. Variationofdynamicrangewithscalingtechnology

PAGE 44

current.Havinglargerlengthsforthesetransistorsiscriticalforaccurateoperation. 18 ]andsimulateourprototypeweightedaveragecircuit.TransistorsM1,M2,CurrentSourcesI1,I2,andtheinvertersoftheweightedaveragingcircuitarerealizedusingNCNFETandPCNFETmodelsdevelopedbyRoyetalofINAC/Purdue.ThecircuitissimulatedusingHSPICE.TheNCNFETandPCNFETtransistormodelsusedinoursimulationshaveonlyasinglecarbonnanotuberepresentingtheirchannels.Thebiggestadvantageofthissinglecarbonnanotubetechnologyisthatthetransistorshaveextremelysmallgateandchannelcapacitances;thus,promisingveryhighspeedoperation.

PAGE 45

ofafuturenano-electronicera.Thereasonforthisisnotjusttheirsmallsize,buttheirinherentpropertieslikelowpowerdissipation,possibleballistictransport,highcurrentdensities,highmobility,lowresistanceandthefacilitationofmakingtransistorsandinterconnectsusingsemi-conductingandmetalliccarbonnanotubes. Foratypicalnanotubegeometryof100nmlengthand3nmdiameter,Cisoforder4aF.Thechannelresistancecanbeassmallas6:25k.Therefore,theRCfrequencyisequalto6:3THz[ 19 ].LetuscomparethisfrequencywiththefTofaminimumsizeNMOStransistorintheAMI0:5uSiprocess.ThefTofaNMOStransistorcanberoughlyexpressedas, withthemobility,Lthechannellength,VGSthegatetosourcevoltageandVTHthethresholdvoltage.Substitutingtypicalvaluesof=449:98cm2=Vs,L=0:6m,VGSVTH4VforAMI0:5uSiprocess,wegetfT=80GHz.ThisshowsthatthespeedlimitintrinsictoananotubetransistorisseveralordersofmagnitudegreaterthanaSitransistor. TheCNFETmodelusedinoursimulationsisasimplisticmodelthatwasdevelopedtoassesscircuitperformanceofsinglewalledsemiconductingCNFETs.Itisanappropriatemodeltoevaluatedelays,estimatepowerincircuitsandsimulatetheperformancedegradationduetointerconnectanddeviceparasitics.ThemodelingtechniqueusedisgenericinthesensethatitcanfaithfullyrepresentawiderangeofCNFETgeometriesandgatematerialswithreasonableoperatingvoltagesanduserspeciedtemperatureconditions.Themodelhasastrongfoundationontheunderlyingphysicsofoperationalongwithnecessarysimplicationsandassumptions.Thismakesamultiple-transistorcircuitsimulationpossible. TheassumptionsmadetoarriveattheCNFETspicemodelinclude,

PAGE 46

Bulk-typeCNFETs:Intheliterature,twotypesofcarbonnanotubetransistorshavebeenstudiedextensively.Theyarerespectively,theSchottkybarrierCNFETandthebulk-typeCNFET.ThoughtheSchottkybarrierCNFEThasitsownadvantages,themodelassumesabulk-typeCNFETasthisMOSFET-likedevicehasahigheron-currentand,hence,woulddenetheupperlimitofperformance. Ballistictransport:RecentexperimentshavedemonstratedthataCNFETcantypicallybeusedintheMOSFET-likemodeofoperationwithnearballistictransport. 2{17 .Forthesimulationswechoset1=1ns,t2=3ns,C=7fFandVTH=0:5V.SincetheCNFETspicemodelsaresimplisticmodelsandnotidealforanalogsimulationsinsteadofthe5-transistorcomparator,wechoseanidealop-amptoperformthecomparator'sfunctionality.TheexpectedtOUTandthecalculatedtOUTvaluesmatchcloselyandtheyareapproximatelyequalto9ns.ThesmalldierencebetweenthetwotOUTvaluescanbeattributedtotheOFFcurrentoftheCNFETschargingthecapacitor.ThecarbonnanotubetransistorshaveveryhighcurrentdriveascanbeseenfromFigures 2{15 2{16 andfromFigure 2{18 wecanseethattheo-currentofthesecarbonnanotubesisalsohigh(intheorderof30nA).Thesehigho-currentscanproduceanosetthat

PAGE 47

introducessomejitterintheoutput.Inspiteofthelargeocurrents,theaveragepowerconsumedbythecircuitis0:33W. Figure2{15. PCNFETID-VGSplotsforvaryingVDS

PAGE 48

Figure2{16. NCNFETID-VGSplotsforvaryingVDS 2.5.1Motivation 20 ].Astheseprocesstechnologiesbecomemoreandmorecomplex,higherlevelsofintegrationusedintheICswillincreasethechipfailurerate.Thesefailuresunderscoretheimportanceofreliabilityformanufacturingofnano-scalesystems.Itis,therefore,imperativethatcircuitsaredesignedwithreliabilityinmind. ConstructionofreliabledigitalsystemswiththeuseofredundantcomponentswasrstconsideredbyVonNeumannforcertaincasesofintermittentfailuresofelements[ 21 ].Hisground-breakingworkwasextendedbyDickinsonandWalkerforthecaseofpermanentfailuresoflogicelements[ 22 ].ButtheworksofVon

PAGE 49

Figure2{17. Nano-weightedaveragecircuitsimulationoutputs Figure2{18. Capacitorcharging/dischargingcurrentinanano-weightedaveragecircuit

PAGE 50

Neumann,DickinsonandWalkerandmanyotherswerealldedicatedtoimprovingthereliabilityofdigitalcircuits.Inthischapter,wediscussthedesignofreliableanalognanocomputationalcircuitsusingredundancy.Asanexample,wewillexplainthedesignofareliableanalogtime-modeweightedaveragecircuit. 2{19 illustratesthebasicelementsusedtondthemedianofanodd-numberofinputtemporalsignals.Ingeneral,thecircuitcanprocessmanyinputsteps,butonlythreeareshownhereforsimplicity.Thecircuitconsistsofaninverter,acurrentsourceofvalueIandaPMOStransistorforeachinputandacurrentsourceofvalue3I Figure2{19. Time-modemediancircuitfor3-inputs Toaidtheexplanationoftheoperationofthiscircuit,weassumethatt1
PAGE 51

attimet2,anetcurrentofI Thus,weseethattheoutputobtainedinEq. 2{41 isthemedianofthethreeinputst1,t2andt3.Ingeneral,thismediancircuitcanprocessN-inputsteps-providedthatNisodd.ThecircuitisshowninFigure 2{20 .DependingonthevalueofN,thevalueofthecurrentsourcethatpulls-downthecapacitor'svoltageischosentobeNI Figure2{20. Time-modemediancircuitforN-inputs 2{21 andperformanalysistoquantifyitsreliability. VonNeumann's2-out-of-3majoritycircuitshowninFigure 2{21 usesamajoritycircuitfedbythreeindependentdeviceswhichoperatefromthesame

PAGE 52

Figure2{21. VonNeumann'stwo-out-of-threemajoritycircuit sourceofinputinformation[ 21 ].DickinsonandWalkeranalyzedthecircuitindetailandprovedthatthecircuithasaresultantreliabilitygreaterthanthatofitselements[ 22 ].Asmentionedabove,theirworkwasonlyapplicabletodigitalcircuits.Here,weusetheirconcepttoimprovethereliabilityofanalogcircuits.WewillextendtheworkofDickinsonandWalkertodesignareliableanalogtime-modeweightedaveragecircuitasshowninFigure 2{22 .VonNeumann's2-out-of-3majoritycircuitisessentiallyusedpollingbetweeninputsandcanonlybeusedfordigitalapplications.Therefore,itisbeingreplacedbyatime-modemediancircuitasshowninFigure 2{19 .Forourfailureanalysis,weassumethatthemediancircuitneverfails.Thesameassumptionismadeforthedigitalvotingcircuitsdiscussedabove.Theonlyfailurestobeconsideredarethoseofthethreeelements(weightedaverageblocks)whichfeedthemediancircuit. Thetime-modeweightedaverageblockhascomponentslikecurrentsources,digitalswitches,comparatorandacapacitor.Itispossibleforanyofthesecomponentstofailandintroduceerrorsintheoutputofthecircuit.Forexplanationpurposes,lettheoutputoftheweightedaveragecircuitwhentherearenofailuresinitscomponentsbetidealoutandtheoutputwhentherearesomefailuresbetobtainedout. Theweightedaverageblockscanfailintwomodes: 1.tobtainedout
PAGE 53

Figure2{22. Blockdiagramofareliabletime-modeweightedaveragecircuit 2.tobtainedout>tidealout.Thisalsoincludesthecasewhereduetofailure,theweightedaverageblockresanoutputimmediatelyafteritsinternalnodesarereset(theresetstageisnotshowninthegure)-(tobtainedoutisclosetozero). LetusassumethattheprobabilitythatanyweightedaverageblockwillfunctioncorrectlyisR0.TheprobabilitythattheredundantsystemisnotgoingtofailR1isgivenbythesumofthethreecasesmentionedbelow: 1.Allthethreetime-modeweightedaverageblocksfunctioncorrectly.TheprobabilitythattheredundantsystemisnotgoingtofailinthiscaseisgivenbyR30. 2.Oneoftheweightedaverageblocksfailinanyofthetwomodes-(tobtainedout>tidealout)or(tobtainedout
PAGE 54

functioncorrectlyis(1R0)2R0andthiscanhappeninthreedierentways.Therefore,theprobabilityforthiscaseisgivenby3 2(1R0)2R0. Therefore,thetotalprobabilitythattheredundantsystemisnotgoingtofailR1isgivenbythesumoftheprobabilitiesobtainedintheabovementionedthreecases[ 22 ]: 2(1R0)2R0=3 2R01 2R30 Figure2{23. Plotshowingtheincreaseinreliabilityoftheredundantcircuitascomparedtotheindividualelements FromtheresultshowninEq. 2{42 ,weseethattheredundanttime-modeweightedaveragecircuitisalwaysmorereliablethantheindividualelements.ThiscanalsoberealizedfromthereliabilitycurveinFigure 2{23 .Asshowninthatgure,thereisaconsiderableimprovementinthereliabilityoftheredundantcircuitascomparedtothereliabilityoftheindividualelements.

PAGE 55

thatsuchredundancywouldincreasethechiparea.But,mostoftherealtimeapplicationswouldcompromiseonthechipareathanonthereliabilityofthecircuits.Also,thisredundantweightedaveragecircuitcanbeseenasasteppingstonetowardsimprovingthereliabilityofnanocomputationalcircuits. InChapter2,wewillseehowtheperformanceofthetime-modeweightedaveragingcircuitwithitsvoltage-modeandcurrent-modecounterparts.

PAGE 56

Wehavequantiedtheperformanceoftime-modecircuitsintermsofkeymeasuressuchasSNR,DRandpowerconsumption.Theseperformancemetricsarenotclear-cut.Forinstance,dynamicrangeisawell-denedconceptinvoltage-modeandcurrent-modebutmustbecarefullyconsideredforsometime-modecircuitswhoseinputscanbearbitrarilylarge. WeneedtocomparetheperformancemeasuressuchasSNRandDRoftime-modecircuitstocorrespondingvoltage-modeandcurrent-modecircuitsbymakingaceterisparibus(otherthingsbeingequal)comparison.Sinceitisdiculttocompareallpossiblevoltage-mode,current-modeandtime-modecomputationcircuits,wewouldliketostartbyrestrictingourselvestothecomparisonofweightedaveragecircuitsshownintheFigures 3{1 3{3 andthetime-modeweightedaveragingcircuitdiscussedinChapter2.WewillquantizetheirSNRandDR,comparetheirperformances,andcommentonthem.Themaincriteriaforthechoiceofthesevoltageandcurrentmodeweightedaveragecircuitsarelowcomplexityandlowpowerconsumption.Thechoicewouldenableustoperformafaircomparisonwiththebasictwo-inputtime-modeweightedaveragecircuit. Therstcircuitoperatinginvoltage-modecomputes whereg1andg2representthetransconductancesofthetwoOTAsinthecircuit.ThetransconductancesaresetbytheindividualbiasvoltagesappliedtotheOTAs.V1,V2arethetwoinputvoltagesandVOUTistheoutputvoltageofthecircuit. 42

PAGE 57

Thesecondcircuitoperatingincurrent-modecomputes whereI1,I2arethetwoinputcurrentsandVOUTistheoutputcurrentofthecircuit.k1,k2arethevoltagesappliedtothetransistorsinthecircuit.Thesevoltagescontributetotheweightsek1andek2appliedbythecircuittocomputetheweightedaverage. And,aswehaveseeninChapter2,thetime-modeweightedaveragingcircuitcomputes Asmentionedearlier,thoughwecancomeupwithmoreecientcircuits,thevoltage-mode,current-modeandtime-modeaveragingcircuitscomparedinthispaperarechosensuchthattheircircuitarchitectureisextremelysimpleandconsumeverylowpower. ToquantifytheSNRrelationsobtainedforvoltage-mode,current-modeandtime-modeaveragingcircuits,let'smakethefollowingassumptions. 3{1 illustratesthebasicelementsusedtoperformaweightedaverageofvoltage-modesignalsV1andV2.ItconsistsoftwotransconductanceampliersG1andG2connectedinunityfeedbackcongurations.

PAGE 58

Figure3{1. Voltagemodeweightedaveragingcircuit Theoutputofthecircuitisgivenbytheequation: ForSNRcalculations,weneedtodeneareferencefortheinputsandoutputs.LetusdenetheinputV1asthereference. Now,VOUTdenedwithrespecttothereferencewouldbegivenby, ^VOUT=VOUTV1=(g1V1+g2V2 TherearetwonoisessourcesinthiscircuitasshowninFigure 3{2 1. v12-noiseduetooperationaltransconductanceamplierg1referredtoitspositiveinput. 2. v22-noiseduetooperationaltransconductanceamplierg2referredtoitspositiveinput. Sincethesetwonoisesourcesarenotcorrelated,wecanderivetheindividualcontributionofeachofthesenoisesourcesattheoutputandaddupthecontributionsbyapplyingsuperposition.

PAGE 59

Figure3{2. Voltagemodeweightedaveragingcircuitwithnoisesources VOUT1=g2(V2(V1+v1)) (3{6) Thevarianceofthenoiseattheoutputisgivenby, VOUT12=g22 SimilarcalculationsaredoneforthenoisecontributionfromOTA2. VOUT2=g2((V2+v2)V1) (3{8) Thevarianceofthenoiseattheoutputisgivenby, VOUT22=g22

PAGE 60

Therefore,thetotalnoisecontributionattheoutputduetothetwonoisesourcesisgivenby, VOUT22=g22( v12+ v22) (g1+g2)2(3{10) AssumingthattheOTAsarebasic5-transistordierentialinput/singleendedoutputOTAs,wewouldhavenoisecontributionsfromtheinputtransistorsandthemirrortransistors.Neglectingickernoiseofthesetransistors(validforintermediateandhighfrequencies)andtakingonlythermalnoiseintoourcalculations,theinputreferrednoisevariancesaregivenby: VOUT12=4(8kT VOUT22=4(8kT 2ROUTCOUT(3{13) where,COUTisthecapacitanceattheoutputnode,usuallydenedbytheloadcapacitanceCL. Hence, 21 Ifanamplierhasjustonepoleatfc,thenthenoisebandwidthisgivenby f=

PAGE 61

Thesignal-to-noiseratioisgivenby v12+ v22) (g1+g2)2=(V2V1)2 v12+ v22)=(V2V1)2 8kT(V2V1)2g1g2COUT Foranaveragingcircuit,g1=g2andtheSNRrelationbecomes, 32kT(V2V1)2COUT(3{18) ForAMI0:5process,maximumvalueofV2V1thatcouldbeachieved=3:5V(thoughttherail-to-railvoltageis5V,tomaintainthetransistorsoftheOTAinsaturationtheinputvoltageswingwouldbelower).Also,throughhandcalculationswefoundoutthattheoutputnodecapacitanceis0:4pF.SubstitutingallthevaluestoEq. 3{18 ,wegetmaximumSNRof80dB. 3{3 illustratesthecircuitthatperformsweightedaverageofcurrentsI1andI2.Inthiscircuit,transistorsM1-M4operateinthesub-thresholdregionandtheyareinsaturation. Weassumethatinallthesub-thresholdcurrentequationsbelowthat=1.ByusingKCLatnodes1and2inFigure 3{3 ,wecanwrite VT+ISeK1VA VT=ISeVA VT[eK1 (3{19)

PAGE 62

Figure3{3. Currentmodeweightedaveragingcircuit and VT+ISeK1VB VT=ISeVB VT[eK1 (3{20) FromEqs. 3{19 and 3{20 ,weget VT VT(3{21) Theoutputcurrentisgivenby VT+ISeK2VB VT(3{22) Figure3{4. Currentmodeweightedaveragingcircuitwithnoisesources

PAGE 63

SubstitutingEq. 3{21 inEq. 3{22 ,weget VT[eK1 VT[I1eK1 UsingEq. 3{19 inEq. 3{23 ,weget Figure 3{4 showsthecurrentmodeweightedaveragingcircuitwithnoisesources.Asshowninthegure,thereisnoiseassociatedwitheachtransistorinthecircuitandtheequivalentnoisevariancescanberepresentedusingcurrentsourcesconnectedinparalleltothetransistors.ThenoisecurrentsourceI1seesthesourceresistance1 3{5 .SinceK1=K2,gm1=gm2.Therefore,halfofthecurrentI1owsthroughtransistorM2andcontributestonoiseintheoutputcurrentIOUT.SimilarlyonlyhalfofnoisecurrentsI2,I3andI4contributestooutputnoise. Therefore,thetotaloutputnoisecurrentisgivenby IOUT=I1+I2+I3+I4 Thevarianceintheoutputnoisecurrentisgivenby IOUT2= I12+ I22+ I32+ I42 Neglectingickernoise,thenoisecurrentofatransistoroperatinginthesubthresholdregionisgivenby2KTgm.Substitutingthisnoisecurrentexpression

PAGE 64

inEq. 3{26 ,weget IOUT2= I12+ I22+ I32+ I42 (3{27) wherethenoisecurrentsoftransistorsM1andM2wouldhaveanoisebandwidthdeterminedbyR-Ctimeconstantofnode1andnoisecurrentsoftransistorsM3andM4wouldhaveanoisebandwidthdeterminedbyR-Ctimeconstantofnode2. SinceK1=K2,forsubthresholdtransistorsgm1=gm2.Similarly,gm3=gm4.Therefore, IOUT2=(KTgm1)f1+(KTgm3)f2(3{28) Figure3{5. Halfofthenoisecurrentfromeachtransistorowstotheoutput Thepolecontributedbynode1isgivenby: 21 NoisebandwidthfornoisecurrentsoftransistorsM1andM2isgivenby, f1= Thepolecontributedbynode2isgivenby: 21

PAGE 65

NoisebandwidthfornoisecurrentsoftransistorsM3andM4isgivenby, f2= asparasiticcapacitanceCnode1=Cnode2. Thevarianceintheoutputnoisecurrentisgivenby, IOUT2=(KTgm1)gm1 (3{33) Sincethediscussionswouldgettoocomplex,letusjustfocusourdiscussionsheretocurrentmodeaveragingfunctionality.LetsassumethatK1=K2.TheoutputIOUTinthiscaseisgivenbyIOUT=I1+I2 ^IOUT=IOUTI1=(I1+I2 (3{34) Thesignal-to-noiseratioisgivenby (3{35) ToquantifytheSNRequation,wesubstitutedthesenominalvalues:Cnode1=0:4pF(asinthevoltage-modecase),I1=1nA(lowsub-thresholdcurrent)andI2=20nA(highsubthresholdcurrent)inEq. 3{35 .ThemaximumSNRthatcanbeobtainedfromthiscircuitis44dB.

PAGE 66

3{6 Figure3{6. CalculatedandsimulatedSNRvaluesofatime-modeweightedaveragingcircuitovertechnology Sofarwehavejustdiscussedasingletypeoftime-modecircuit-theweightedaveragingcircuit.InChapter4,wewilldescribeothertime-modecomputationalcircuits.

PAGE 67

Inthischapter,wewillintroduceafamilyoftime-modecircuitsthatcanperformlinearcomputationslikeweightedsubtraction,weightedsum,scalarmultiplication,maximumandminimumcomputations. 2{1 A,weobtainacircuitthatcanperformweightedsubtractionofstepsoccurringatt1andt2asshowninFigure 4{1 A. A)B) Figure4{1. Weightedsubtractioncircuit.A)Circuitschematic.B)Idealizedgraphshowingthecapacitor'svoltageatdierenttimeperiods. WewillassumethatthecapacitorisinitiallychargedtoavoltageVTH,t1I1.Assoonastherststepenterstheblockattimet1,thecurrentsourceI1startstochargethecapacitor.Whentheinputstepoccursattimet2,netcurrentI2I1(withI2>I1)startsdischargingthecapacitorasshowninFigure 4{1 B.WhenthecapacitorvoltagereachesVTH,thecomparatoroutputsastepattimetOUT.Theoutputofthecomparatorcontainsanunwantedpulseatthereference 53

PAGE 68

timebecausethepositiveandnegativeterminalsofthecomparatorcarriesthesamevoltageVTH.TheANDgateconnectedtotheoutputofthecomparatorensuresthattheoutputfromtheblockcontainsonlyastepoutputattimetOUT.Oncetheblockoutputsastep,anappropriateresetstage(notshowninthegure)resetsthecapacitorto0V. TheoutputtOUTfromtheblockisgivenbytheequation, Weseefromtheequationabovethat,theblockappliesaweightI2=(I2I1)tot2andaweightI1=(I2I1)tot1.Thisblockhasasingle-endedoutput. Withouttheassumptionsmadeabove,dierentoutputsgivenoutbytheblockcanbesummarizedinasingleequation: Nooutput;otherwise (4{2c) Asintheweightedaveragingcircuit,inputst1,t2andoutputtOUTaretime-stepsandaredenedwithinaframe.Whentheframeends,theinputsandtheoutputstepsalsoendandthecircuitisreset.Asthenextframestarts,thecircuitwouldbereadytoprocessthenextsetofinputst1andt2. 4{2 AisagainaminormodicationofthebasicblockshowninFigure 2{1 A.WewillassumethatthecapacitorisinitiallychargedtoavoltageVTH,t1
PAGE 69

thecapacitorandnetcurrentI2I3chargesthecapacitorC.Whenthesecondsignalenterstheblockattime^t2(where^t2isdenedast2withrespecttoreferencetimetREF),currentsourceI3dischargesthecapacitor.AcomparatorsensesthevoltageacrossthecapacitorandoutputsastepwhenthevoltagereachesthethresholdvoltageVTH.TheoutputofthecomparatorwouldcontainanunwantedpulseatthereferencetimebecausethepositiveandnegativeterminalsofthecomparatorcarrythesamevoltageVTH.TheANDgateconnectedtotheoutputofthecomparatorensuresthattheoutputfromtheblockcontainsonlyastepoutputattime^tOUT=tOUTtREF.Oncetheblockoutputsastepandtheframeends,anappropriateresetstage(notshowninthegure)wouldresetthecapacitorvoltagetoVTHatreferencetimetREF. ^tOUT=(I1 Fromtheaboveequation,weobservethattheblockcomputesaweightedsumofthetwoinputtimestepsoccurringattimes^t1and^t2. Anoutputfromtheblockoccurswhen (I1+I2I3)^t1+(I2I3)(^t2^t1)>0(4{4) SolvingEq. 4{4 ,wewouldget Eq. 4{5 canbeinterpretedas, ^t2>(I1 Sincet1
PAGE 70

Ifweassumethatt2occursbeforet1,wewouldgetanoutputfromtheblock,when (I1+I2I3)^t2+(I1I3)(^t1^t2)>0(4{7) SolvingEq. 4{7 givesI3>I1I2. A)B) Figure4{2. Weightedsumcircuit.A)Circuitschematic.B)Idealizedgraphshowingthecapacitor'svoltageatdierenttimeperiods. Inbothcases,I1=I2=Iresultsin ^tOUT=^t1+^t2(4{8) Thiscasecorrespondstothesumoftwoinputtimestepsoccurringat^t1and^t2.Thus,weseethatbycontrollingthecurrentsources,weachievetwodierentfunctionalitiesfromtheblock-sumandweightedsum. Withouttheassumptionsmadeabove,dierentoutputsgivenoutbytheblockcanbesummarizedinasingleequation: ^tOUT=8>>>><>>>>:(I1 (4{9a) ^t1+^t2;fort1t2;I1=I2=I3 Nooutput;otherwise (4{9c) Thecircuithasasingle-endedoutput;theinputsandoutputsoccurringatt1,t2andtOUTaredenedwithrespecttoatimereferencetREF(startoftheframe).

PAGE 71

2{1 A,weobtainacircuitthatcanbeusedforscalarmultiplicationofatemporalsignalenteringtheblockattimet2asshowninFigure 4{3 A. A)B) Figure4{3. Scalarmultiplicationcircuit.A)Circuitschematic.B)Idealizedgraphshowingthecapacitor'svoltageatdierenttimeperiods. AssumingthatthecapacitorisinitiallychargedtoavoltageVTH,thecurrentsourceI1startstochargethecapacitorassoonastheframestarts(attimetREF).Theinputstepoccursattime^t2where,asabove,^t2isdenedast2withrespecttoreferencetimetREF.ThecurrentsourceI2I1startsdischargingthecapacitorasshowninFigure 4{3 B.WhenthecapacitorvoltagereachesVTH,thecomparatoroutputsastepattimetOUT.TheoutputofthecomparatorwouldalsocontainanunwantedpulseatthereferencetimebecausethepositiveandnegativeterminalsofthecomparatorwouldcarrythesamevoltageVTH.TheANDgateconnectedtotheoutputofthecomparatorensuresthattheoutputfromtheblockcontainsonlyastepoutputattimetOUT.Oncetheblockoutputsastep,anappropriateresetstage(notshowninthegure)wouldresetthecapacitortoVTHatreferencetimetREF.

PAGE 72

TheoutputtOUTfromtheblockisgivenbytheequation, ^tOUT=(I2 Weseefromtheequationabovethat,theblockmultipliestime^t2withascalarI2=(I2I1). Withouttheassumptionsmadeabove,dierentoutputsgivenoutbytheblockcanbesummarizedinasingleequation: ^tOUT=8<:(I2 Nooutput;forI2I1 Thisblockhasasingle-endedoutputandtheinputsandoutputsaredenedwithrespecttoatimereferencetREF(thestartoftheframe). CircuitschematicofMAXcircuit Figure4{5. CircuitschematicofMINcircuit TheMAXandMINcircuitsshowninFigures 4{4 and 4{5 supportinputsandoutputsthathaveabsolutetimeasthereference.TheoutputfromtheMAX

PAGE 73

andMINcircuitsaresingle-ended.Thisblockprocessestwotemporalsignalssay,thetimestepsoccurringatt1andt2asshowninthegure,anddeterminesthemax(t1;t2)ormin(t1;t2)ofthetwosteps.Ifthesignalwastoberepresentedusingvoltages,acomplexcircuitwouldberequiredtocomputemax(V1;V2)ormin(V1;V2).Intime-basedanalogcomputation,thecircuitrytocomputethesefunctionsisstraightforward. Thetime-modelinearcomputationalcircuitswehavediscussedsofarandthethresholdeddierenceblock(tobediscussedinChapter5)canbeclassiedintodierentsubclassesbasedontheiroutputstyle,showninTable 4{1 Table4{1. ClassicationofTime-modecomputationalcircuits.Relativetimereferenceimpliesthattheinputsandoutputsaredenedwithrespecttoareferencetime(startofaframe).Absolutetimereferenceimpliesthatinputsandoutputsarenotdenedwithrespecttoareferencetime. OutputSingle-endedDierential AbsolutetimereferenceWeightedAveragingCircuitThresholdeddierenceWeightedSubtractionCircuitblockofEdgedetectionMAXcircuitMINcircuitRelativetimereferenceSumcircuitScalarMultiplicationCircuit Sofar,wehavediscussedtime-modecomputationalcircuitstoperformcomputationslikeweightedaverage,weightedsubtraction,weightedsum,scalarmultiplication,maximumandminimum.InChapter6,wewilldiscussacoupleofapplications-atime-modeedgedetectioncircuitandatime-mode3-tapFIRlter.

PAGE 74

14 ],[ 15 ].Inthissection,anexampleisgivenwhereatime-modeedgedetectorisdevelopedtodirectlyinterfacetotheoutputofatime-to-rstspikeimager[ 14 ]. Figure5{1. Edgedetectionbyderivativeoperators 23 ].Anedgeistheboundarybetweentworegionswithrelativelydistinctgray-levelproperties.Inallthediscussionsbelow,weassumethatthe 60

PAGE 75

regionsinquestionaresucientlyhomogeneoussothatthetransitionbetweentworegionscanbedeterminedonthebasisofgray-leveldiscontinuitiesalone. Traditionally,theideaunderlyingmostedge-detectiontechniquesisthecomputationofthelocalderivativeoperator.ThisconceptisillustratedinFigure 5{1 .Thegureshowsasyntheticimageofalightobjectonadarkbackground,thegray-levelprolealongahorizontalscanlineoftheimage,andtherstandsecondderivativesoftheprole.Wenotefromtheprolethatanedge(transitionfromdarktolight)ismodeledasaramp,ratherthanasanabruptchangeofgraylevel.Therstderivativeofanedgemodeledinthismanneris0inallregionsofconstantgraylevel,andassumesaconstantvalueduringagray-leveltransition.Thesecondderivative,ontheotherhand,is0inalllocations,exceptattheonsetandterminationofagray-leveltransition.Basedontheseremarks,itisevidentthatthemagnitudeoftherstderivativecanbeusedtodetectthepresenceofanedge,whilethesignofthesecondderivativecanbeusedtodeterminewhetheranedgepixelliesonthedark(background)orlight(object)sideofanedge.ThesignofthesecondderivativeinFigure 5{1 forexample,ispositiveforpixelslyingonthedarksideofboththeleadingandtrailingedgesoftheobject,whilethesignisnegativeforpixelsonthelightsideoftheseedges.Althoughthediscussionthusfarhasbeenlimitedtoaone-dimensionalhorizontalprole,asimilarargumentappliestoanedgeofanyorientationinanimage. Inthischapter,wewilldiscussthedesignofatime-modeedgedetectorthatperformsarstderivativeoperationonthepixeloutputsthroughanoveltime-modethresholdeddierencingblocktodetectboththepresenceandthesignoftheedges.Signicantchangesinsceneilluminancearetypicallydetectedwithaspatialderivativeoperationfollowingaspatialsmoothingprocessthatreduceshighfrequencynoise.Figure 5{2 showsthebasicdataowintheproposedtime-basededgedetectionscheme.Initiallythetimestepscorrespondingtopixelintensities

PAGE 76

aresmoothed.Next,thesmoothedtimestepsarefedtoathresholdeddierencingblockthatndsthedierencebetweentheinputstepsandthresholdstheresult.Theoutputofthethresholdedderivativeblockcaneitherbepositiveornegativeimplyingapositiveornegativeedgebetweenpixels. Figure5{2. Dataowintime-modeedgedetection 24 ],[ 14 ].Thisimagerprovidesoutputstepswhosetimingencodesilluminationinformationateachpixel.Thesespatialinformationmustbesmoothedtoeliminatenoiseintheimageaswellasnoiseintroducedbytheelectronics. Figure5{3. Circuittosmoothpixelintensities Figure 5{3 showsacircuitthatcouldbeusedtoperformsmoothingofthesepixelintensities.Weimplementastandardconvolutionmaskwithweightsof1-2-1

PAGE 77

byappropriatelyscalingthecurrentsourcevalues.SincethecircuitshowninFigure 5{3 isaspecialcaseoftheweightedaveragingcircuitexplainedinChapter2,wecaneasilyderivethesmoothingblock'soutputexpressedbelow: 5{4 .TherearetwocasestobeconsideredassumingthatVCisinitiallyresettoamidrangevoltage: ThethresholdimplementedbythisblockisCVTH=I.ThisthresholdvaluecanbeprogrammedbychoosingdesiredvaluesforVTHandI. Ifthethresholdeddierenceblockresanoutput,wecanknowthepresenceofedgesbetweenadjacentpixels.Also,dependingonwhetherwegetpositiveoutputornegativeoutputwecaninferthesignoftheedges.Thatis,apositiveoutputimpliesthatpixel1isbrighterthanpixel2.Thus,fromtheoutputsofthe

PAGE 78

Figure5{4. Circuitusedtoobtainthresholdeddierencesonthesmoothedsteps thresholddierentiationblock(thatperformsaspatialrstderivativeoperation),wecandetectboththepresenceandthesignoftheedges. 5{5 .Intherstframe,weconvertedthepixelmagnitudeinformation(between0and255)ofeachpixeltotiminginformationusingreversecoding.Abrightpixelwouldreearliercomparedtoadarkpixel,thatis,withrespecttotheframethebrightpixelwouldhaveasmallertemporalamplitudecomparedtoadarkpixel.Inthesecondframe,weremovethespuriousnoiseintheimagebyusingtime-modesmoothingcircuits.Aftersmoothing,weperformthespatialrstderivativeoperationbyrunningthesmoothingblock'soutputsthroughtime-modethresholdeddierenceblocksinthethirdframe. Forbetterunderstanding,letusrestrictouranalysisto16pixels.Theoriginalnoisyimage,smoothedimageandthedetectededgesareshowninFigure 5{6 .Thenoisyoriginalimageandthesmoothedimageareshownindottedlinesandsolid

PAGE 79

linesrespectively.Theedgesdetectedareshownspecialcharactersinthegure.Fromtheresultsshown,wecaninferthatthetime-basededgedetectionmethodisextremelyaccurate. Forthese16pixels,Figure 5{7 showstheCadencesimulationoutputsfromdierentstagesinthetime-basededgedetectionprocess.Thelengthoftheframeandthethresholdwechoseforthethresholdeddierenceblockare30msand15msrespectively.Inthegure,theoriginalimageisshownfollowedbythetemporalsignalsoutputbytheimager.Itisfollowedbytheoutputsofthesmoothingandthresholdeddierenceblocks.Theedgedetectioncircuitsneeds3framestocompletetheiroperations.Thenalresultsindicatethatonlythreeedgesweredetectedtobeabovethethreshold.Thepowerconsumedbytheedgedetectioncircuitsforthese16pixelswasintheorderto35W.

PAGE 80

Figure5{5. MATLABsimulationresultsshowingtheoriginalimage,smoothedimageandthedetectededgesofanimage

PAGE 81

Figure5{6. Simulationresultsshowingtheoriginalimage,smoothedimageandthedetectededgesofa16pixelimage

PAGE 82

Figure5{7. Outputsfromdierentstagesintime-modeedgedetection

PAGE 83

FromEq. 5{2 ,wecaneasilyinferthatbycontrollingC,VTHorIwecanprogramthedesiredthresholdinthethresholdeddierenceblock.But,onceaedgedetectionchipisdesigned,itistoughtovarythevalueofC.Therefore,tovarythethreshold,weshouldeithertuneVTHorIo-chip. Fora3-taplter, FromEq. 5{4 ,weseethattocomputethen-thsampleoftheoutputofa3-tapFIRlter,weneedthecurrentinputx(n)andtwopreviousinputsx(n1)andx(n2).Forexample,theoutputatthe3rdsamplingperiodisgivenby, Iftheinputandoutputatthe3rdsamplingperiodarerepresentedintimebyt3TINandt3TOUTrespectively,thenwecanimplementatime-modeFIRlterifwecan

PAGE 84

implement, FromEq. 5{6 ,weseethatwewouldneedinputst2TINandtTINotherthant3TINtoobtaint3TOUT.Todothis,wecaneither sothattheseinputswouldbeavailableduringthesamplingperiod3TwhenthecomputationshowninEq. 5{6 istobeperformed. Whentheinformationisintime,delayingthatinformation(informationisencodedintherisingedgeofatimestepreferencedtothestartofaframe)wouldinvolveconvertingthetimeinformationtovoltageandthenconvertingthatvoltagebacktotime(informationagainisatimestepbutreferencedtoanewframe)usinganalogcomponents.Sinceweareconsideringtheimplementationofa3-tapFIRlter,wewouldneedtwodelaystages.Sincethedelaystagesinvolveanalogcomponentslikecurrentsourcesandcapacitorsthathavematchingconstraints,wemightendupwithinaccuratedelaysthatmightleadtoerroneousoutputs.Therefore,thebetteroptionwouldbestoretheinformationovervarioussamplingperiods.Since,wehavenotyetcomeupwiththecircuitthatwouldstoretimeinformationdirectlyintime,weconvertthetimeinformationtovoltageandstoreitonacapacitor. 5{8 issimilartotheprototypetime-modeweightedaveragecircuitexceptthatthisgurealsoshowstheresetfunctionality.Threeinputsthatenterthisblockare 1.trainofframes-theseactasreferencefortheinputandoutputsteps. 2.trainofinputsteps.

PAGE 85

Figure5{8. ComputationalblocktobeusedintheFIRlter

PAGE 86

3.chipreset. LetspostponethediscussionoftheinputprocessingthatshouldbedonetothetwoinputtrainstogeneratesignalsIN1,IN2,IN3,NEG INandCOMPUTATIONRESETtothenextsection.ThesesignalsaretheinputstothecomputationalblockshowninFigure 5{8 .Beforeanyoftheinputtrainsenterthesystem,thechipresetsignalwouldresetthecapacitor'svoltagetoVTH.Astherstframestarts,IN1generatedbytheinputprocessingblockturnsontheswitchM1foraperiodt1.Thislet'sthecurrentsourceI1chargethecapacitanceCfortheperiodt1asshowninFigure 5{9 Figure5{9. Voltageacrossthecomputationalblock'scapacitoratvarioustimes Thevoltageacrossthecapacitorisgivenby, Thecapacitorinthisblockperformstwofunctionalitiessimultaneously:

PAGE 87

Afterthesecondframestarts,IN2turnsontheswitchM2causingI2tochargethecapacitanceCforaperiodt2.Thenewvoltageacrossthecapacitorisgivenby, Now,thecapacitorisholdingbothinputst1,t2andhasappliedweightsI1 5{9 Asframe4starts,thesignalNEG INturnsonswitchM4andthecurrentI4startstodischargethecapacitanceC.Withthevoltageacrossthecapacitancebeingcontinuouslymonitoredbythecomparator,voltageacrossthecapacitanceslowlydecreasesasI4dischargesitandwhenthevoltagereachesVTHthecomparatorresastepoutput.TherisingtimeofthisoutputstepreferencedtothefourthframegivesthedesiredoutputtOUT. FromEq. 5{10 ,weseethatthecomputationalblockappliesweightsI1

PAGE 88

computation,thecapacitorvoltageisresettoVTHbythecomputationresetsignalgeneratedbytheinputprocessingblock. Wemadethefollowingbasicassumptionstoarriveattheaboveresult: Since,t1,t2,t3andtOUTaredenedwithframes1,2,3and4asreferencerespectively,wecanwriteEq. 5{10 as, Asmentionedintheassumptionsabove,theONperiodofframe4shouldbelargeenoughatleasttoproduceanoutputattimetOUT.Therefore,tframe4ON=tOUT.AssumingthattheOFFperiodoftheframewherethecapacitorisresettoVTHisextremelysmall,tframetOUT.Therefore,theminimumpossibleframelength=tOUTandthemaximumpossiblesamplingspeed=1 IftheEq. 5{11 canbeinterpretedintermsofsamplesthen, ComparingEq. 5{12 withtheconventional3-tapFIRequationshownbelow, weseethattOUThasanextrasampledelaywhencomparedtotheconventionalFIRoutput.Inotherwords,theFIRlter'scomputationblockhasanextrapoleattheoriginascomparedtotheconventionalFIRlter. 5{8 .Let'ssaythat

PAGE 89

thecomputationalblockprocessesinputstIN(1)referencedtoframe1,tIN(2)referencedtoframe2,tIN(3)referencedtoframe3andproducesanoutputtOUT(4)referencedtoframe4.Thecomputationalblockgetsreadytoprocessthenextsetofinputsonlyattheendofframe4wherethecapacitorisresettoVTH.ThenextoutputthisblockwouldproduceistOUT(8)processingtIN(5),tIN(6)andtIN(7).SincethisblockcannotproducetheintermediateoutputstOUT(5),tOUT(6)andtOUT(7),wewouldneedthreemorecomputationalblockstoproducethoseoutputs.Therefore,the3-tapFIRlterwouldneedintotal,fourcomputationalblockstocontinuouslyprocesstheinputtimesignals.Ingeneral,foraN-tapFIRlter,wewouldneedN+1computationalblockstoconstructtheFIRlter. Thecompletearchitectureofa3-taptime-modeFIRlterisshowninFigure 5{10 .TheFIRlterblockneedsthesame3inputsasthecomputationalblock-achipreset,atrainofframesandatrainoftimestepsasshowninFigure 5{12 .Everyinputstep(example,t1)inthetrainoftimestepsisdenedwithrespecttoaframe(example,frame1)inthetrainofframesasshowninFigure 5{12 .Thetrainsofframesandtimestepsarefedtoainputconditioningblock.ThearchitectureoftheinputconditioningblockisshowninFigure 5{11 Theinputconditioningblockperformsthefollowingfunctions: Eachcomputationalblockneeds3inputsindierentlines-becausewearedesigninga3-tapFIRlter.Also,sincetherearefourcomputationalblocksthatprocessthefollowingdierentsetsofinputs-(t1,t2,t3),(t2,t3,t4),(t3,t4,t5)and

PAGE 90

Figure5{10. 3-taptime-modeFIRlterarchitecture

PAGE 91

Figure5{11. Thearchitectureoftheinputconditioningblock

PAGE 92

(t4,t5,t6)-thatis,ateverysample(frame),wewouldneed6inputsin6dierentlinesforthe4computationalblocks.Tokeepmovingtheseinputsatdierentinputlinesduringeveryframe,wehaveused2counters-a2-bitcounteranda3-bitcounter(thatcountsbetween3and5)-followedbydecoders.Similarly,sinceweneedtheframestodischargethecapacitancesofthecomputationalblocks,wehavea3-bitcounterfollowedbyadecodertodecodetheframetrainonto4dierentlines. Figure5{12. 3-tapFIRlter'sinput,digitalpreconditioningblockanditsoutputs

PAGE 93

Thearchitectureshownisfora1-quadrantFIRlter.Thatis,itcanonlyprocesspositiveinputsandapplypositiveweightstothoseinputs.Byaddingextracircuitry,wecanextendthisarchitecturetoprocessbothpositiveandnegativeinputsandapplybothpositiveandnegativeweightstothoseinputs. 5{13 describesthestateofthecomputationalblocksasinputt1enterstheblocks.AtsamplinginstanttFRAME,wecanseeonlythecapacitanceofthecomputationalblockC1beingchargedbycurrentI1. 2.Asinputt2enterstheblocksatsamplinginstant2tFRAME, asshowninFigure 5{14 3.Asinputt3enterstheblocksatsamplinginstant3tFRAMEasshowninFigure 5{15 4.Atsamplinginstant4tFRAMEasframe4andinputt4enter, 5{16 5.Asframe4isabouttonishasshowninFigure 5{17 5{10 ,wechosethefollowingvaluesforthecurrentsources:I1=302nA,I2=400nA,I3=302nAandI4=1AwithC=5pFandVTH=2:5V(forasupplyvoltageof5V).TheweightsappliedtoinputsbecomeI1

PAGE 94

Figure5{13. StateoftheFIRlterasinputt1enters

PAGE 95

Figure5{14. StateoftheFIRlterasinputt2enters

PAGE 96

Figure5{15. StateoftheFIRlterasinputt3enters

PAGE 97

Figure5{16. StateoftheFIRlterasinputt4entersthesystemandwithframe4dischargingcomputationalblock1

PAGE 98

Figure5{17. StateoftheFIRlterbeforeframe5starts

PAGE 99

Theoutputofthecomputationalblockwaspreviouslyderivedas, Thegeneralexpressionforthisoutputcanbewrittenas, Takingz-transformofthisoutput,wewouldget SubstitutingtheweightsinEq. 5{16 weget, ThepolesandzerosofthisFIRlterareshowninFigure 5{18 .Thesamplingfrequencychosenforthesimulationsis100KHz.TheFIRlter'smagnituderesponseandphaseresponseareshowninFigures 5{19 and 5{20 respectively.Fromtheplots,weseethatthechoiceofcoecientsI1=60:4nA,I2=80nA,I3=60:4nAandI4=100nAhastunedtheFIRltertofunctionasalowpasslterwithacut-ofrequencyof10KHz,stop-bandattenuationof20dBandapassbandattenuationof1dB.Similarly,bychoosingdierentvalues(eitherpositiveornegative)wecancomeupwithhighpass,bandpassandnotchlters.ItisimportanttonotethatthearchitectureshowninFigure 5{10 canhandleonlypositivecurrents.Ifnegativecurrentsaretobehandled,thecircuitarchitecturewouldhavetobealtered.

PAGE 100

Figure5{18. Pole-zeroplotsoftheFIRlter Figure5{19: Time-modeFIRlter'smagnituderesponse(samplingfreq=100kHz)

PAGE 101

Figure5{20. Time-modeFIRlter'sphaseresponse TheFIRlter'sinputandoutputwaveformsinthetimedomainandfrequencydomainareshowninFigures 5{22 and 5{23 .Fromthetimedomainwaveform,weseethattheoutputwaveformisessentiallyadelayedversionoftheinputwaveform(aswouldbeexpectedfromalowpasslter)withthedelaybeingequalto2samples=20s.This2-sampledelayisalsoconrmedbythegroupdelayplotshowninFigure 5{21 wherethegroupdelayoftheFIRlterwasobtainedas2samples.Inthefreqdomain,weseethattheFIRlterattenuatestheinputsignal'senergyforfrequenciesabove10kHzby20dB. Figure 5{24 showstheCadencesimulationresultsfora3-taptime-modeFIRlter.Thevariousplotsshowninthegureare:Inputframetrain,Inputtimesteptrain,outputsofthefourcomputationalblocksandthenaloutputfromtheFIRlter.Wecanseefromthegurethatfort1=10s,t2=40s,t3=70s,fromsimulationswegettOUT=41:1s.Fromhandcalculations,weexpecttOUT=40:2s.Thesmalldierencebetweentheexpectedoutputtimeandtheexpectedoutputtimeshouldbeattributedtothedelayofthedigitalblocksprocessingtheinputs,delayofthecomparatorandtheleakagecurrents

PAGE 102

Figure5{21. Time-modeFIRlter'sgroupdelay Figure5{22. Time-modeFIRlter'sinputandoutputwaveforms(intimedomain)

PAGE 103

Figure5{23. EnergyofFIRlter'sinputandoutputsignals chargingthecapacitance.TheDCpowerconsumedbytheFIRlteris89:45W.Thespeedofoperationofthelteris25kHz.Thereisaninterestingtrade-obetweenspeedandinput/outputdynamicrangeintime-modeFIRlters.Asinformationisrepresentedintime,toaccommodateaveryhighdynamicrangeintheinputswemayhavetoincreasethedurationofaframe.Thisinturnmeansthatthesamplingfrequencyisreduced.Therefore,thespeedofoperationisreduced.This,weseethatthereisadirecttradeobetweenthespeedofoperationoftheFIRlteranditsinput/outputdynamicrange.

PAGE 104

Figure5{24. Cadencesimulationresultsforthetime-mode3-bitFIRlter

PAGE 105

Thereare4noisesourcesthatdominatethenoiseperformanceofthiscircuit. 1.ShotnoiseoftheDCcurrentsourceI1. 2.ShotnoiseoftheDCcurrentsourceI2. 3.ShotnoiseoftheDCcurrentsourceI3. 4.ShotnoiseoftheDCcurrentsourceI4. Thesenoisesourcesareuncorrelatedandthereforewecanconsidertheimpactofeachofthesenoisesourcesontheoutputofthecircuit.Also,aspreviouslydonefortheSNRanalysisoftheprototypeweightedaveragecircuitweneglectthenoisecontributedbythecomparatorandwealsoneglectthenoiseoftheresettransistors(astheircontributionstotheoutputnoisewouldbesmallercomparedtothenoisecontributionsoftheDCcurrentsources). I12).Therefore,thetotalcurrentfromthecurrentsourceisgivenbyI1+I1.SincecurrentsI1+I1,I2,I3arechargingthecapacitorandI4isdischargingthecapacitor,thenewoutputfromtheweightedaveragecircuitisgivenby,

PAGE 106

ThenoiseattheoutputtOUT1canbecalculatedasshownbelow: tOUT1=tOUT1tOUT=((I1+I1 Thevarianceofthisnoiseisgivenby tOUT12=( I12 I22),thetotalcurrentfromthecurrentsourceisgivenbyI2+I2.Thenewoutputfromtheweightedaveragecircuitforthiscaseisgivenby, ThenoiseattheoutputtOUT2canbecalculatedasshownbelow: tOUT2=tOUT2tOUT=((I1 Thevarianceofthisnoiseisgivenby tOUT22=( I22 I32).Therefore,thetotalcurrentfromthecurrentsourceisgivenbyI3+I3.Thevarianceofnoiseattheoutputcanbederivedbyfollowingsimilar

PAGE 107

stepsasintheabovetwocases.Thevarianceofthisnoiseisgivenby tOUT32=( I32 I42).Therefore,thetotalcurrentfromthecurrentsourceisgivenbyI4+I4.SincecurrentsI1,I2,I3chargethecapacitorandI4+I4dischargethecapacitor,thenewoutputfromtheweightedaveragecircuitisgivenby, ThenoiseattheoutputtOUT4canbecalculatedasshownbelow: tOUT4=tOUT4tOUT=(I1t1+I2t2+I3t3 (5{27) Thevarianceofthisnoiseisgivenby tOUT42=( I42 Therefore,thetotalnoiseattheoutputoftheaveragingblockisgivenby tOUT2= tOUT12+ tOUT22+ tOUT32+ tOUT42=( I12 I22 I32 I42

PAGE 108

AspreviouslymentionedinChapter2,theshotnoiseduetoacurrentsourceIisgivenby, I2=eI (5{30) whereisthetimeduringwhichthecurrentsourceisONandcontributestotheoutputandeisthechargeofanelectron. TheshotnoisesofcurrentsourcesI1toI4aregivenby, I12=eI1 I22=eI2 I32=eI3 I42=eI4 5{29 ,weget tOUT2=( I12 I22 I32 I42 Thesignal-to-noiseratioforthecomputationalblockandtheFIRlterisgivenby, (5{32) Theequationcanalsobewrittenas, 2e) (5{33)

PAGE 109

SubstitutingtOUT=40:1s,I4=200nAinEq. 5{31 ,wegettheoutputnoisevarianceas tOUT2=64:16as2andthermsnoiseattheoutputas8ns.FromEq. 5{32 ,wegetSNR64dB. Sincethedynamicrangeisgivenbytheratioofthemaximumoutput(andthemaximumtOUTisequaltothelengthoftheframe)totheminimumoutput(minimumtOUTgivenbythenoiseoor),weget Therefore,theDRoftheFIRlterisalsoequalto64dB. Assumingthatinputt1hasatimejittert1.Withthistimejitter,theoutputofthecomputationalblockwouldbecome, Therefore,thenoiseattheoutputisgivenby tOUT=tOUT1tOUT=((I1 Theoutputnoisevarianceisgivenby, tOUT2=I21 FortheweightchoseninoursimulationsI1 tOUT20:09 t12.Thus,weseethattheeectoftheinputjitterisnotpronouncedattheoutputwhenthe

PAGE 110

weightshaveamagnitudelessthan1.Ifthemagnitudeoftheweightismorethan1,theoutputjitterwouldbemorethantheinputjitter. 33 ]involvetheuseofInputBuers,TrackandHoldCircuits,UnityGainAmpliers,Multiplexers,LevelShiftersandMultipliersorDACs.Thearchitectureofthetime-modeFIRltersisverysimpleandwouldoccupysmallerareawhencomparedtotheseanalogFIRarchitectures.A3-tapFIRlterneedsonly4computationalblocks.Ingeneral,aNtaplterwouldrequireonlyN+1computationalblocks. 5{10 ).

PAGE 112

Wehaveexploredtwowaysofimplementingnon-lineararithmetic: 1.Implementingnon-lineararithmeticusingatime-modemulti-layerperceptron. 2.Implementingnon-lineararithmeticbyintroducinganon-linearityintheexistinglinearcomputationalblocks. 6.1.1Time-ModeMultiplication Theschematic,theinput/outputtimingsandthecapacitorvoltagewaveformofascalarmultiplicationcircuitareshowninFigure 6{1 .Let'sneglecttheoperationofthiscircuitduringframe1.Asshowninthegure,weseethattheinputt2isdenedwithrespecttoframe2(startingattimetF2.Theoutputofthecircuitisgivenby, ThisoutputtOUTisdenedwithrespecttoreferenceframe3(startingattimetF3).Duringframe1(startingattimetF1)ifwecanmakeI1alinearfunctionoft1,sayI1=kt1wherekisaconstant,then I2)t1t2(6{2) Thus,wecanachievethenon-linearmultiplicationfunctionusinglinearcomputationcircuits. 98

PAGE 113

Figure6{1. Scalarmultiplicationcircuit Thecomplete2-inputtime-modemultiplicationcircuitisshowninFigure 6{3 andtheinput/outputtimingdiagramsareshowninFigure 6{2 .AsshowninFigure 6{3 ,initiallythetwosignals-inputt1andreferenceframe1areXORedandthisXORoutputcontrolsthecurrentsourceIXchargingthecapacitorC1.Thus,thetimedierencebetweentF1(referenceframe1)andtheinputt1isconvertedtovoltageacrossthecapacitorC1whereVC1=IXt1

PAGE 114

Figure6{2. Timingdetailsofthe2-inputtime-modemultiplier Oncereferenceframe2starts,thetransmissiongateconnectedtothecapacitorC1isturnedON.Thetransconductanceampliernowproducesacurrentoutput, (6{3) ThisIOUTactsasthecurrentsourceI1inthescalarmultiplicationcircuitshowninFigure 6{1 .Therefore,theoutputfromthe2-inputtime-modemultiplicationcircuitisgivenby, (6{4)

PAGE 115

Eq. 6{4 showshowthe2-inputtime-modemultiplicationcircuitproducesthedesiredoutputt1t2scaledbytheexpressionI2C1 ToarriveattheexpressionshowninEq. 6{4 ,wehavemadethefollowingassumptions. Theaccuracyoftheoutputdependsonthelinearityofthetransconductanceamplier.Sincetheoutputisvalidonlyinthelinearrangeofthetransconductance,thedynamicrangeoftheinputt1supportedbythemultiplierdependsonthelinearityofthetransconductance.Therearemanywaystoimprovethelinearityofthetransconductanceandthosetechniquescanbeemployedinthiscircuittoimprovethedynamicrangeofinputs/outputssupported. Figure6{3. Schematicofthe2-inputtime-modemultiplier IfwecanmakeI2alinearfunctionoft1,sayI2=kt1wherekisaconstantandsubstituteitintheoutputofthescalarmultiplicationcircuittOUT=I1t2

PAGE 116

wouldget, Thus,wecanachievethenon-lineardivisionfunctionusinglinearcomputationcircuits. Figure6{4. Schematicofthe2-inputtime-modedivider Thecomplete2-inputtime-modedivisioncircuitisshowninFigure 6{4 andtheinput/outputtimingdiagramsareshowninFigure 6{2 .Asinthemultipliercircuit,theinputt1isconvertedtovoltageacrossthecapacitorC1whereVC1=IX1t1 (6{6) ThisIOUTactsasthecurrentsourceI2inthescalarmultiplicationcircuitshowninFigure 6{1 .Therefore,theoutputfromthe2-inputtime-modedivisioncircuitisgivenby, (6{7)

PAGE 117

Eq. 6{7 showshowthe2-inputtime-modedivisioncircuitproducesthedesiredoutputt2 Aninterestingcaseariseswhent1tF1isequaltozero.Whent1tF1isequaltozero,therewouldbenocurrentchargingC1.So,VC1doesnotchangeanditstaysatitsinitialvoltageVTH.Therefore,thetransconductanceamplierwouldnotproduceanycurrent,capacitorVC2willnotbedischargedandtherewon'tbeanyoutputfromthedivisioncircuit.Thiseectivelymeansthattheoutputfromthedivisioncircuitisveryhigh(maximumoutputfromthedivisioncircuitisequaltothelengthofaframebecauseweresetthewholecircuitattheendofeachframe). ToarriveattheexpressionshowninEq. 6{7 ,wehavemadethefollowingassumptions. 6{5 .Inthischapter,wewillrstprovideabriefintroductiontotheMLP,animportantclassofneuralnetworks.Wewillthendiscussatechniquetoimplementatime-modefeed-forwardMLP. 30 ].Theinput

PAGE 118

' Figure6{5. Feedforwardmulti-layerperceptron signalpropagatesthroughthenetworkinaforwarddirection,onalayer-to-layerbasis.Eachunitperformesaweightedsumonitsinputsandthenoutputsthesumthroughanon-linearactivationfunction.MLPshavebeenappliedsuccessfullytosolvemanydicultanddiverseproblems.Usuallytheyaretrainedinasupervisedmannerwiththeerrorback-propagationalgorithm.Thisalgorithmisbasedontheerror-correctionlearningrule.Assuch,itmaybeviewedasageneralizationoftheleast-mean-square(LMS)algorithm. Inaneuralnetwork,theneuronsareorganizedintheformoflayers.Figure 6{6 showsthesimplestexampleofamultilayerfeedforwardnetwork.Thisnetworkhasaninputlayerofsourcenodes,ahiddenlayerofneuronsandanoutputlayerofneurons.ThenetworkofFigure 6{6 isstrictlyafeedforwardtypenetworksincethereisnofeedbackofasignalfromtheoutputofanyoftheneuronstoitsinput.This2-inputMLPhas2sourcenodes,2hiddenneuronsand1outputneuron.Wewillimplementthis2-inputMLPusingtime-modecomputationalcircuitsandusethisneuralnetworktoimplementthenon-lineartimeoperation:multiplicationoftwotimesignals.

PAGE 119

Figure6{6. Fullyconnected2-inputfeedforwardMLPwithonehiddenlayerandoneoutputlayer Theneuronisfundamentaltotheoperationoftheneuralnetwork.TheneuronmodelshowninFigure 6{7 formsthebasisfordesigningariticialneuralnetworks.Therearethreebasicelementsoftheneuronalmodel: 1.Asetofsynapses,eachofwhichischaracterizedbyaweightorstrengthofitsown.Specicallyasignalxjattheinputofsynapsejconnectedtoneuronkismultipliedbythesynapticweightwkj. 2.Anadderforsummingtheinputsignals,weightedbytherespectivesynapsesoftheneuron. 3.Anactivationfunctionforlimitingtheamplitudeoftheoutputofaneuron. Figure6{7. Non-linearmodelofaneuron

PAGE 120

Inmathematicalterms,theneuroncanbedescribedbywritingthefollowingpairsofequations: and wherex1,x2,...,xmaretheinputsignals;wk1;wk2;:::;wkmarethesynapticweightsofneuronk;ukisthelinearcombineroutputduetotheinputsignals;bkisthebias;'(:)istheactivationfunction;andykistheoutputsignaloftheneuron.Assumingthatthebiasbkiszero,Eq. 6{9 becomes, 31 ].Forseveralyearspulse-streamtechniquehasbeenusedbyseveralresearchersforthehardwareimplementationofarticialneuralnetworks[ 32 ],whichleadstoverycomplexcircuits.AsshowninChapters2and3,thetime-modecircuitsareextremelysimpleandveryecientevenforcomplexcomputationssuchastheweightedaverage.Therefore,itwouldbeadvantageoustousetime-modecircuitsincomputationallyintensestructuressuchastheMLP. Wehavedevelopedatime-modefeedforwardmulti-layerperceptronwithonehiddenlayertoimplementacomplexnon-lineararithmeticoperation:multiplication.TrainingoftheweightsoftheMLPisdonebyusingrunningaerrorback-propagationalgorithminacomputerandthenapplyingtheresultantweightso-chipandprogrammingtheweightsoftheMLP.ToimplementtheMLPusingtime-modecircuits,wehavetorstimplementthenon-linearmodelofthe

PAGE 121

neuronusingtime-modecircuits.Thatis,wehavetorstimplementtheEqs. 6{8 and 6{9 ThecircuitshowninFigure 6{8 isverysimilarinoperationtothebasiccomputationalblockoftheFIRlterdiscussedpreviously.Thiscircuitperformsthefollowingcomputation: where,weightsI1 Therefore,thecircuitshowninFigure 6{8 canbeusedtoperformthecomputationmentionedinEq. 6{8 Theactivationfunctiondenotedby'(v),denestheoutputofaneuronintermsoftheinducedlocaleldv.Traditionally,threebasictypesofactivationfunctionshavebeenused:thethresholdfunction,thepiecewise-linearfunctionandthesigmoidfunction.Themostcommonlyusedformofnon-linearityisthesigmoidalnon-linearitydenedbythelogisticfunction: 1+exj(6{13) wherexjistheweightedsumofallsynapticinputsplusthebiasandyjistheoutputoftheneuron.Thepresenceofnon-linearitiesensuresthattheinput-outputrelationshipofthenetworkisnotthesameasthesingle-layerperceptron.Sincewehavebeensuccessfulinbuildinglineartime-modecomputationalcircuits,wechooseapiecewise-linearfunctionshowninFigure 6{9 toimplementthesigmoidfunction. Therefore,byconnectingthecircuitsinFigures 6{8 and 6{9 ,wecandesignanon-linearneuronshowninFigure 6{7 .ByconnectingmultipleneuronstogetherasshowninFigure 6{6 ,wecanimplementa2-layermulti-layerperceptron.

PAGE 122

Figure6{8. Time-modescalarmultiplicationandsummingcircuit

PAGE 123

Figure6{9. Time-modepiece-wiselinearactivationcircuit

PAGE 124

Thedesignedperceptronwastrainedusingbackpropagationalgorithmtoimplementthemultiplicationfunctiont1t2 6{9 TheMLPwastestedforawiderangeofinputs(rangingbetween1nsand200s).Thetestresultswereverypromising.WeobtainedalowMSEasshowninFigure 6{10 .Thedesiredoutputsandtheactualoutputsofthetime-modeMLPareshowninFigure 6{11 .Figure 6{12 showscadencesimulationresultsforaparticularcombinationoft1andt2.Wecaninferfromthegurethatthesimulationresultsdierbyapproximately3%fromthedesiredresults.Thisdierencecanbeattributedtomismatchbetweencurrentsourcesandthedelayofthecomparatorsusedinvariousneuroncircuits.

PAGE 125

Figure6{10. Variationofoutputmeansquareerrorwithepochs Figure6{11. Time-modeMLPdesiredandactualoutputs

PAGE 126

Figure6{12. Cadencesimulationresults

PAGE 127

Astechnologyscales,digitaltransistorsbecomefasterandfasterwhilevoltage-modeandcurrent-modeanalogdesignsbecomemorecomplex.However,theperformanceofthetime-modecircuitsactuallyimprovewithscalingtechnologies.Wehaveshownthattime-modecircuitsareexpectedtoperformwellinnewsilicontechnologiesandemergingcarbonnanotubetechnologies. Therearesomesimilaritiesbetweenthesetime-modecircuitsandsingle/dual-slopeADCsconverters.Theseconvertersalsochargeand/ordischargeacapacitorandoutputastepwiththeoutputvoltagereachesathreshold.However,theseconvertershavenotbeenusedforcomputation.AswasalreadypointedoutinChapter2,alargenumberofresearchershavestudiedpulse-basedcomputationbutthesecircuitshavebeenlimitedintheircomputationalpower. Thereisalsoastrikingsimilaritybetweenthestepfunctioncomputationsdescribedhereandsimplemodelsofspikingneurons.Ineachcase,digitaleventsfromotherneuronsareweightedandsummed,increasingtheneuroncellpotential. 113

PAGE 128

Whenthecellpotentialreachesaxedthreshold,adigitaleventoccursattheoutput.Localprocessingisanalogbutglobalcommunicationisasynchronousdigital.Themajordierencebetweenthearchitecturesisthatstepshavebeenusedherewhileneurons(andtheirmodels)usepulses.Thisdierencemaybesmallerthanitmayinitiallyappearsince,asMaasspointedout,ifthesynapticresponsefunctionisapproximatelylinearontheoutset,thenneuronscouldbeimplementingaweightedaveragecomputation[ 25 ]. Fromanengineeringperspective,astepinputcanprovideaguaranteethattheneuronwilleventuallyreduetoasingleinput(atleastfortheall-positive-weightcase).Pulsesarenotasstraightforwardtoprocessandmanytimesengineeringpulsecomputationboilsdowntojustdeterminingwhethersetsofpulsearrivesimultaneouslyornot.However,pulsebasedcomputationdoesn'trequireanexternalresetasdoesthestepbasedcomputationdescribedhere. CurrentlytheFIRlterdesignworksonlyforpositiveweights.Inthefuture,thisFIRlterdesignwillbeslightlymodiedtoworkforbothpositiveandnegativeweights;thatis,ensuretheFIRlterworksinallfourquadrants.Thisway,allpossiblelterscanbeimplementedusingtime-modecircuits.Also,thepowerconsumedbytheFIRlterhastobeoptimizedandcomparedtothepowerconsumedbyexistinglow-powervoltageandcurrentmodealternatives. Thetime-modeMLPisinitsveryearlystage.Moreworkisnecessarytooptimizeitsimplementationandfullycharacterizeitsperformance.

PAGE 129

Overall,time-modecircuitsprovideaveryappealingalternativetotraditionalvoltage-modeandcurrent-modecomputationalcircuits.Sincetime-modecomputationalcircuitshaveadvantageslikelowcomplexity,lowpowerconsumption,highSNRandDR,wewillcomeupwithmorecomputationalapplicationswheretheuseoftime-modecircuitswouldproveveryadvantageous.Furtherworkinscalingthesecircuitstodeepsubmicronsiliconandnanotechnologiesisnecessary.Ifamechanicalthresholdelement(orneuron)replacesthefunctionalityofthecapacitorandthecomparatorinthetime-modeweightedaveragecircuit,thecircuitimplementationwouldbegreatlysimpliedanditwouldopennewdoorstowardsintegratingNEMSandtime-modecomputationalcircuits.

PAGE 130

[1] P.HorowitzandW.Hill,TheArtofElectronics,CambridgeUniversityPress,NewYork,1989,SecondEdition. [2] D.A.JohnsandK.Martin,AnalogIntegratedCircuitDesign,JohnWileyandSons,Inc.,NewYork,1997. [3] C.ToumazouandD.G.HaighandF.J.Lidgey,AnalogueICDesign:TheCurrent-ModeApproach,PeterPeregrinusLtd,London,1993. [4] B.Gilbert,\TranslinearCircuits:AProposedClassication,"ElectronicsLetters,vol.11,no.1,pp.14{16,1975. [5] D.R.Frey,\Log-domainltering:Anapproachtocurrent-modeltering,"Inst.Elec.Eng.Proc.,vol.140,no.6,pp.406{416,Dec1993. [6] A.J.P.Theuwissen,Solid-StateImagingwithCharge-CoupledDevices,KluwerAcademicPublishers,NewYork,1995,FirstEdition. [7] H.Schmid,\WhyCurrentModeDoesNotGuaranteeGoodPerformance,"AnalogIntegratedCircuitsandSignalProcessing,vol.35,pp.79{90,2003. [8] W.Maass,\Fastsigmoidalnetworksviaspikingneurons,"NeuralComputa-tion,9:279{304,1997. [9] M.OulmaneandG.W.Roberts,\ACMOSTimeAmpliferforFemto-SecondResolutionTimingMeasurement,"IEEEInternationalSymposiumonCircuitsandSystemsCD,May2004. [10] K.PapathanasiouandA.Hamilton,\PulsebasedSignalProcessing:VLSIimplementationofaPalmoFilter,"IEEEInternationalSymposiumonCircuitsandSystems,vol.1,pp.270{273,May1996. [11] W.Maass,PulsedNeuralNetworks,Chapter3,MITPress,Cambridge,Massachusetts,1999. [12] R.SarpeshkarandM.O'Halloran,\ScalableHybridComputationwithSpikes,"NeuralComputation,vol.14,pp.2003{2038,Sep2002. [13] G.CauwenberghsandA.Yariv,\Fault-tolerantDynamicMulti-levelStorageinAnalogVLSI,"IEEETransactionsonCircuitsandSystems.PartII,vol.41,pp.827{829,1994. 116

PAGE 131

[14] X.QiandX.GuoandJ.G.Harris,\ATime-to-rstSpikeCMOSImager,"IEEEInternationalSymposiumonCircuitsandSystems,May2004. [15] H.S.NarulaandJ.G.Harris,\ATime-BasedVLSIPotentiostatforIonCurrentMeasurements,"IEEESensorsJournal,vol.6,no.2,pp.239{247,Apr2006. [16] F.N.H.Robinson,NoiseFluctuationsinElectronicDevicesandCircuits,ClarendonPress,Oxford,1974. [17] W.ZhaoandY.Cao,\NewgenerationofPredictiveTechnologyModelforsub-45nmdesignexploration,"7thIEEESymposiumonQualityElectronicDesign,pp.585{590,2006. [18] A.RaychowdhuryandS.MukhopadhyayandK.Roy,\ACircuitCompatibleModelofBallisticCarbonNanotubeFieldEectTransistors,"IEEETransactionsonComputerAidedDesign,vol.23,no.10,pp.1411{1420,Oct2004. [19] P.J.Burke,\ACPerformanceofNanoelectronics:TowardsaBallisticTHzNanotubeTransistor,"SolidStateElectronics,48(10),pp.1981{1986,2004. [20] M.ButtsandA.DeHon,andS.C.Goldstein,\Molecularelectronics:devices,systemsandtoolsforgigagate,gigabitchips,"Proc.IEEE/ACMIntl.ConferenceonComputerAidedDesign,pp.433{440,Nov2002. [21] J.VonNeumann,ProbabilisticLogics,AutomataStudies,PrincetonUniversityPress,Princeton,1956. [22] D.E.DickinsonandR.M.Walker,\ReliabilityImprovementbytheUseofMultiple-ElementSwitchingCircuits,"IBMJ.Res.Develop.,vol.2,no.2,April1958. [23] R.C.GonzalezandP.WintzDigitalImageProcessing,AddisonWesley,Reading,1987,SecondEdition. [24] X.Guo,\ATime-BasedAsynchronousReadoutCMOSImageSensor,"Ph.D.ThesisattheUniversityofFlorida,2002. [25] W.Maass,PulsedNeuralNetworks,Chapter2,Computingwithspikingneuwons,MITPress,Cambridge,Massachusetts,1999. [26] C.T.JinandP.L.RolandiandP.H.W.Leong,\Non-volatileprogrammablepulsecomputationcell,"ElectronicLetters,vol.35,pp.256{267,Issue:17,19,Aug1999. [27] D.Marr,Vision,W.H.FreemanandCompany,SanFrancisco,1982. [28] C.Mead,AnalogVLSIandNeuralSystems,Addison-Wesley,Reading,1989.

PAGE 132

[29] S.NorsworthyandI.PostandS.Fetterman,\A14-bit80-KHzSigma-DeltaA/Dconverter:Modelling,Design,andPerformanceEvaluation,"IEEEJ.ofSolidStateCircuits,vol.24,pp.256{267,1989. [30] S.Haykin,NeuralNetworks:AComprehensiveFoundation,PearsonEducation,UpperSaddleRiver,2ndedition,July1998. [31] G.CairnsandL.Tarassenko,\LearningwithanalogueVLSPMLPs,"MicroelectronicsforNeuralNetworksandFuzzySystems,pp.67{76,Sep1994. [32] J.N.TombsandL.TarassenkoandA.F.Murray,\NovelanalogueVLSIdesignformultilayernetworks,"IEEProceedingsofRadarandSignalProcessingF,vol.139,Issue6,pp.426{430,Dec1992. [33] X.WangandR.R.Spencer,\Alow-power170-MHzdiscrete-timeanalogFIRlter,"IEEEJournalofSolid-StateCircuits,vol.33,no.3,pp.417{426,Mar1998.

PAGE 133

VishnuRavinuthulanishedhisB.E.degreeinelectricalandelectronicsengineeringfromtheCollegeofEngineering,AnnaUniversity,Chennai,India,andhisM.S.degreeinElectricalEngineeringfromtheUniversityofFlorida,Gainesville,U.S.in2000and2003,respectively.HeiscurrentlydoingdoctoralresearchworkonBio-inspiredanalogcircuitsandnano-delaycircuitsattheComputationalNeuroEngineeringLaboratoryofUniversityofFloridaundertheguidanceofDr.JohnG.Harris.HedidasummerinternshipatNASAAmesResearchCenter,CaliforniawherehewasworkingwithDr.M.P.Anantram,Dr.T.R.GovindanandDr.HarryPartridgedoingresearchontheprosandconsofusingcarbonnanotubebasedtransistorsforanaloganddigitalapplications.HewillsoonbeworkinginTexasInstruments,Dallasasananalogdesignengineerdevelopingtheanalogcircuitsforhigh-speedSERDESapplications. 119


Permanent Link: http://ufdc.ufl.edu/UFE0015625/00001

Material Information

Title: Time-Mode Circuits for Analog Computation
Physical Description: Mixed Material
Copyright Date: 2008

Record Information

Source Institution: University of Florida
Holding Location: University of Florida
Rights Management: All rights reserved by the source institution and holding location.
System ID: UFE0015625:00001

Permanent Link: http://ufdc.ufl.edu/UFE0015625/00001

Material Information

Title: Time-Mode Circuits for Analog Computation
Physical Description: Mixed Material
Copyright Date: 2008

Record Information

Source Institution: University of Florida
Holding Location: University of Florida
Rights Management: All rights reserved by the source institution and holding location.
System ID: UFE0015625:00001


This item has the following downloads:


Full Text











TIME-MODE CIRCUITS FOR ANALOG COMPUTATION


By

VISHNU RAVINUTHULA

















A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL
OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT
OF THE REQUIREMENTS FOR THE DEGREE OF
DOCTOR OF PHILOSOPHY

UNIVERSITY OF FLORIDA


2006

































Copyright 2006

by

Vishnu Ravinuthula

































My parents and brother have brought me to where I stand today. This work is

dedicated to them for trusting me and standing by me through all hardships.















ACKNOWLEDGMENTS

I owe a special debt of gratitude to Dr. Harris for his expert guidance and

stimulating discussions. His perception, insight, and experience have contributed

immensely to the clarity and rigor of my research. The faith he showed was the

motivating force towards my contribution. My association with him has been an

enlightening and refreshing experience.

I am immensely thankful to Dr. Jose Fortes for his help when I was in a

quagmire and it was a privilege working under him.

I am also grateful to the analog genius Dr. Robert Fox, for he went out of

the way to help me even when I was not working under him. He is one of the few

professors I feel proud that I got to work with.

This work was supported by National Aeronautics and Space Administration

(NASA) under award no. NCC 2-1363 and Semiconductor Research Corporation

(SRC) under Task ID: 1049 Crosscut Research. I would like to thank Dr. M. P.

Anantram, Dr. Harry Partridge, and Dr. T. R. Govindan at NASA Ames Research

Center, CA, for the confidence they showed in me and all their support during my

internship at NASA.

Thanks are due to the administrative staff of the Department of Electrical and

Computer Engineering: Ellie, Janet, Linda, and Shannon for their co-operation.

Furthermore, I take this opportunity to express my appreciation to all those who

helped me in the completion of my work.

I would like to thank my former and current labmates: Pravin, Vaibhav,

Rama, Du, Xi ,i:;: iw- Yuan, Harpreet, Mark, Meena, Harsha, and Ismail for









their support and encouragement. Lastly, but not the least, I thank my friends,

roommates and colleagues for making my stay at UF memorable.















TABLE OF CONTENTS
page

ACKNOWLEDGMENTS ................... ...... iv

LIST OF TABLES ...................... ......... ix

LIST OF FIGURES ................................ x

ABSTRACT ................... .............. xiv

CHAPTER

1 INTRODUCTION ........................... 1

1.1 Biological Motivation ........... ............... 3
1.2 Engineering Motivation ........... .............. 3
1.3 ('C! pter Summ ary ........................... 5

2 THE WEIGHTED AVERAGE CIRCUIT ........ ......... 6

2.1 Time-Mode Weighted Averaging Circuit ............... 6
2.1.1 Reset Stage . . . . . . 9
2.1.2 Measured Results ......... .............. 10
2.1.3 Discussion ................... ....... 12
2.2 Theoretical Analysis of Signal-to-Noise Ratio and Dynamic Range 14
2.2.1 Output Noise due to Timing Jitter at the Inputs ...... 14
2.2.2 Output Noise due to Fundamental Noise Sources in the Circuit 15
2.2.2.1 Noise in tour due to noise in current source I1 16
2.2.2.2 Noise in tour due to noise in current source 2 .* 17
2.2.2.3 Noise in tour due to noise in the comparator .. 18
2.2.3 Discussion ......... ... ......... 21
2.3 Scaling of Time-Mode Weighted Average Circuit with Technology 21
2.3.1 Simulation Setup .................. .... .. 22
2.3.2 Results and Inferences ................ .. 23
2.3.3 Discussion .................. ......... .. 26
2.3.4 Drawbacks ......... ...... ......... 27
2.4 Carbon Nanotube Based Time-Mode Weighted Averaging Circuit 30
2.4.1 Carbon Nanotube Field Effect Transistors (CNFETs) and
Their Spice Models . . ........ ... 30
2.4.2 Physics Governing the Operation of CNFET . ... 32
2.4.3 Simulation Results .................. .. 32









2.4.4 Discussion .... . . ......... 33
2.5 Reliable Time-Mode Weighted Average Circuit . . .... 34
2.5.1 M otivation .................. ......... .. 34
2.5.2 Time-Mode Median Circuit .................. .. 36
2.5.3 Redundancy in Time-Mode Computation . .... 37
2.5.4 Discussion .................. ......... .. 40

3 SNR COMPARISON OF WEIGHTED AVERAGING CIRCUITS .... 42

3.1 Voltage-Mode Averaging Circuit .. .......... .. .43
3.1.1 Noise Contribution at the Output due to Ai2 . ... 45
3.1.2 Noise Contribution at the Output due to Av22 . ... 45
3.1.3 Noise Bandwidth .................. .... .. 46
3.2 Current-Mode Averaging Circuit. . . ..47
3.3 Discussion ...... .......... . . ..52

4 OTHER TIME-MODE CIRCUIT EXAMPLES . ...... 53

4.1 Weighted Subtraction Circuit .................. .. 53
4.2 Weighted Sum Circuit .................. ..... .. 54
4.3 Scalar Multiplication Circuit..... . . ..57
4.4 Maximum(\!A.X)/l\ iiiiiiiiiii(\1 IN) Circuit . . ...... 58

5 APPLICATION OF TIME-MODE CIRCUITS . . ..... 60

5.1 Time-Mode Edge Detection Circuit ................. .. 60
5.1.1 Basic Formulation .................. .... .. 60
5.1.2 Smoothing .................. ......... .. 62
5.1.3 Thresholded Difference ................ .... 63
5.1.4 Results ...... .................... .. 64
5.1.5 Discussion . . ...... ....... .. 69
5.2 3-Tap 1-Quadrant Time-Mode Finite Impulse Response Filter .. 69
5.2.1 Finite Impulse Response Computation in Time . ... 70
5.2.2 3-Tap 1-Quadrant Time-Mode FIR Filter Architecture .. 74
5.2.3 Step-by-Step Description of the Functionality . ... 79
5.3 Simulation Results ......... . . ... 79
5.4 Signal-to-Noise Ratio/Dynamic Range Analysis . ... 91
5.4.1 Noise in tour due to Noise in Current Source II . 91
5.4.2 Noise in tour due to Noise in Current Source I2 ...... ..92
5.4.3 Noise in tour due to Noise in Current Source . 92
5.4.4 Noise in tour due to Noise in Current Source 4 . 93
5.5 Performance of the FIR Filter under Input Time Jitter ...... ..95
5.6 Advantages of Time-Mode FIR Filters ............ .. 96
5.7 Limitations of Time-Mode FIR Filters ............ .. 96









6 NON-LINEAR TIME-MODE COMPUTATION ....... ..... 98

6.1 Implementing Non-Linear Arithmetic by Introducing Non-Linearity
in the Existing Linear Computational Blocks ............. 98
6.1.1 Time-Mode Multiplication .................. .. 98
6.1.2 Time-Mode Division . . . ... 101
6.2 Implementing Non-Linear Arithmetic Using Time-Mode Multi-LiT r
Perceptron ......... .. ...... ...... 103
6.2.1 Time-Mode Multi-Layer Perceptron . . 103
6.2.2 Hardware Implementation of Time-Mode MLP ........ 106

7 CONCLUSION AND FUTURE WORK ............. .. 113

7.1 Conclusion. ................ .......... .. 113
7.2 Future work ............... .......... .. 114

REFERENCES ................... ... ........ 116

BIOGRAPHICAL SKETCH .................. ......... .. 119















LIST OF TABLES
Table page

2-1 Measured performance characteristics of time-mode weighted averaging
circuit .................. .................. .. 13

4-1 Classification of Time-mode computational circuits. Relative time reference
implies that the inputs and outputs are defined with respect to a reference
time (start of a frame). Absolute time reference implies that inputs and
outputs are not defined with respect to a reference time. . ... 59















LIST OF FIGURES


Figure page

1-1 Different modes of computation ................ ... 2

2-1 Time-mode weighted average circuit. A) Circuit schematic. B) Idealized
graph showing the capacitor voltage at different time periods. . 6

2-2 Inputs tl, t2 and output tour are defined within a frame . . 9

2-3 Plot of tour for varying I (C = 20pF, VTH = 2.5V). The block was
given one step input. ............... ..... .... 10

2-4 Plot of tour for varying I (C = 20pF,I = 1.0476pA, VTH = 2.5V). The
block was given one step input. ............. ... 11

2-5 Plot of tour for varying 2 (C = 20pF,I = 1.0476pA, VTH = 2.5V with
tl fixed at lps, 8.5/s and 32.5/s.) ..... ........... .... 12

2-6 Plot of touT for varying t2 (C 20pF,11 = 1.46pA, I2 = 0.29pA, VTH =
2.5V with tl fixed at 1/s, 8.5ps and 32.5ps.) . . ..... 13

2-7 Variation of capacitor charging current with scaling technology . 24

2-8 Variation of dynamic power with scaling technology . . ... 24

2-9 Variation of average power with scaling technology . . 26

2-10 Variation of energy consumed per averaging operation with scaling technology 27

2-11 Comparison of calculated and simulated time-mode averaging outputs
over technologies ................ . .... .28

2-12 Comparison of calculated and simulated time-mode averaging output
noise over technologies .................. ......... .. 28

2-13 Comparison of calculated and simulated time-mode averaging SNR values
over technologies .................. ............ .. 29

2-14 Variation of dynamic range with scaling technology ........... ..29

2-15 PCNFET ID-VGS plots for varying VDS. ................. 33

2-16 NCNFET ID-VGS plots for varying VDS . . . . 34

2-17 Nano-weighted average circuit simulation outputs . . 35









2-18 Capacitor charging/discharging current in a nano-weighted average circuit 35

2-19 Time-mode median circuit for 3-inputs .................. 36

2-20 Time-mode median circuit for N-inputs .................. 37

2-21 Von Neumann's two-out-of-three ii Pii ii y circuit . . 38

2-22 Block diagram of a reliable time-mode weighted average circuit . 39

2-23 Plot showing the increase in reliability of the redundant circuit as compared
to the individual elements .................. ....... .. 40

3-1 Voltage mode weighted averaging circuit ................. 44

3-2 Voltage mode weighted averaging circuit with noise sources . ... 45

3-3 Current mode weighted averaging circuit ................. ..48

3-4 Current mode weighted averaging circuit with noise sources ...... ..48

3-5 Half of the noise current from each transistor flows to the output .. 50

3-6 Calculated and simulated SNR values of a time-mode weighted averaging
circuit over technology .................. ......... 52

4-1 Weighted subtraction circuit. A) Circuit schematic. B) Idealized graph
showing the capacitor's voltage at different time periods. . ... 53

4-2 Weighted sum circuit. A) Circuit schematic. B) Idealized graph showing
the capacitor's voltage at different time periods. ............ ..56

4-3 Scalar multiplication circuit. A) Circuit schematic. B) Idealized graph
showing the capacitor's voltage at different time periods. . ... 57

4-4 Circuit schematic of MAX circuit...... . . ..58

4-5 Circuit schematic of MIN circuit... . . ..58

5-1 Edge detection by derivative operators .................. 60

5-2 Data flow in time-mode edge detection .................. 62

5-3 Circuit to smooth pixel intensities .................. ..... 62

5-4 Circuit used to obtain thresholded differences on the smoothed steps 64

5-5 MATLAB simulation results showing the original image, smoothed image
and the detected edges of an image .................. .. 66

5-6 Simulation results showing the original image, smoothed image and the
detected edges of a 16 pixel image .................. ..... 67









5-7 Outputs from different stages in time-mode edge detection . ... 68

5-8 Computational block to be used in the FIR filter .......... 71

5-9 Voltage across the computational block's capacitor at various times .. 72

5-10 3-tap time-mode FIR filter architecture ............. .. .. 76

5-11 The architecture of the input conditioning block ........... .77

5-12 3-tap FIR filter's input, digital preconditioning block and its outputs .78

5-13 State of the FIR filter as input tl enters ................. .. 80

5-14 State of the FIR filter as input t2 enters ................. 81

5-15 State of the FIR filter as input t3 enters ................. 82

5-16 State of the FIR filter as input t4 enters the system and with frame 4
discharging computational block 1 .................. ..... 83

5-17 State of the FIR filter before frame 5 starts ............... ..84

5-18 Pole-zero plots of the FIR filter .................. .. 86

5-19 Time-mode FIR filter's magnitude response (sampling freq = 100 kHz) 86

5-20 Time-mode FIR filter's phase response .................. 87

5-21 Time-mode FIR filter's group delay .................. .. 88

5-22 Time-mode FIR filter's input and output waveforms (in time domain) 88

5-23 Energy of FIR filter's input and output signals .............. ..89

5-24 Cadence simulation results for the time-mode 3-bit FIR filter ...... ..90

6-1 Scalar multiplication circuit .................. ..... .. 99

6-2 Timing details of the 2-input time-mode multiplier . ..... 100

6-3 Schematic of the 2-input time-mode multiplier .............. .101

6-4 Schematic of the 2-input time-mode divider ............... ..102

6-5 Feedforward multi-l ir perception .................. .. 104

6-6 Fully connected 2-input feedforward MLP with one hidden l- v r and one
output l-.-r .................... ............. .. ..105

6-7 Non-linear model of a neuron .................. ..... 105

6-8 Time-mode scalar multiplication and summing circuit . . ... 108









6-9 Time-mode piece-wise linear activation circuit . . 109

6-10 Variation of output mean square error with epochs . . .. 111

6-11 Time-mode MLP desired and actual outputs . . 111

6-12 Cadence simulation results ............... .... .. 112















Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy

TIME-MODE CIRCUITS FOR ANALOG COMPUTATION

By

Vishnu Ravinuthula

August 2006

C'!h In': John G. Harris
Major Department: Electrical and Computer Engineering

We introduce a set of basic circuit building blocks for analog computation

using a temporal step function representation for the inputs and outputs.

Time-mode circuits are described that use a step function representation for

computing the weighted average, weighted difference, weighted sum, scalar product,

maximum, minimum, multiplication, division and thresholded difference operations.

Time-mode circuits are alternatives to well-known voltage- and current-mode

approaches which could be used to perform these same mathematical operations.

Time-mode circuits grow more appealing as C'\ IOS process technologies

scale since they minimize the amount of analog circuitry and use noise robust

.i-vnchronous time events as inputs and outputs. Time-mode circuits provide a

seamless interface to the growing number of time-based sensors which already

output compatible timing events. An example is given where a time-mode edge

detector is developed to directly interface to the output of a time-to-first-spike

imager. Time-mode circuits have simple architecture, provide high signal-to-noise

ratio, dynamic range, consume low power, and hence, prove advantageous in

architecturally complex applications like finite impulse response filters.















CHAPTER 1
INTRODUCTION

All analog signal processing circuits must represent signals using physical

quantities such as voltage, current, charge, frequency or time duration. In

analog literature, we have seen extensive use of voltage-mode, current-mode

and charge-mode circuits that generally represent input and output signals as

voltage, current and charge respectively:

* Voltage-mode circuits are the most common example, wherein voltages are
used to represent both input and output signals. These circuits have a long
history including classic opamp based designs [1] and GmC style circuits
common in todw'i's analog very large scale integration (VLSI) designs [2].

* Current-mode circuits are also very popular where currents are used
for both inputs and outputs [3]. These designs include Barrie Gilbert's
original translinear circuits that rely on the exponential voltage to current
relationships of bipolar or complementary metal oxide semiconductor (C' IOS)
subthreshold circuits [4]. More recent log domain filters [5] are also generally
considered to be current-mode circuits.

* Another physical quantity is charge, and charge-mode circuits have been
employ, ,1 in various applications, particularly for charge coupled devices
(CCDs) [6].

These different modes of signal representation have respective advantages and

drawbacks and can therefore be used in different parts of the same system. The

voltage representation makes it easy to distribute a signal in various parts of a

circuit, but implies a large stored energy V2 into the node's parasitic capacitance

C. The current representation facilitates the summing of signals but complicates

their distribution. Replicas must be created which are never exactly equal to

the original signal. It has been observed that it is problematic to clearly define

the distinction between current-mode and voltage mode circuits [7]. The charge










representation requires time sampling but can be nicely processed by means of

CCDs or switched-capacitor techniques. In actual fact, every circuit uses voltage,

current and charge in its operation and sometimes semantics and philosophy are

debated when definitively categorizing these classes of circuits [7].

Temporal coding is used as the dominant mode of signal representation for

communication in biological nervous systems. Signals represented in this manner

are easy to regenerate and this representation might therefore be preferred for

long-distance transfers of information. It is discontinuous in time, but the phase

information is kept in .-vinchronous systems. We introduce time-mode circuits

as another category of analog signal processing circuits that represent input and

output signals in the temporal domain. Figure 1-1 depicts block diagrams for

voltage-, current-, and time-mode circuits. Time-mode circuits use temporal events,

in this case voltage steps, to represent signals.


+
VOLTAGE-MODE VO
V1 COMPUTATION OUT

V2





I CURRENT-MODE IOUT
SS- COMPUTATION

12





t, TIME-MODE tUT
COMPUTATION

t2

Figure 1 1: Different modes of computation.









1.1 Biological Motivation

The idea of performing computation using the timing of events is shared

with the most powerful existing computer: the human brain. The brain is an

analog computer, but it does not transmit continuous analog voltages, likely due

to noise and cross-talk susceptibility. Instead, information is represented and

transmitted using the timing of .i- vchronous digital-like timing pulses. However,

an important difference is that time-mode circuits described in this thesis use a

step function representation because of the resulting circuit simplicity compared to

pulse representations in mathematical computations.

Since we are using a step function representation, we cannot represent

information in terms of firing rates (where we need multiple spikes to represent

an analog variable). This new approach is similar to temporal coding by single

spikes [8] rather than on the traditional interpretation of analog variables in terms

of firing rates.

Maass [8] points out that a spiking neuron in principle will be able to compute

in temporal coding of inputs and output a linear function if its ] ..-I -vi-i itic

potential can be described or approximated by a linear function during some

initial segment. As we will see in C'!i lpter 2, time-mode circuits perform linear

computations by linearly mapping the temporal inputs to a voltage across a

capacitor. Also, Maass points out that networks of noisy spiking neurons are

universal approximators they can approximate with regard to temporal coding

any given continuous function of several variables. This observation is proved

in ('!i lpter 6 where we use a network of time-mode circuits to implement an

approximation of the multiplication function (non-linear function).

1.2 Engineering Motivation

Independent of any biological motivation, it is also making more and more

sense to consider analog computation using the timing of .-i- vchronous events









from a purely engineering perspective. Through the electronics revolution over

the past decades, C'\ OS process technology is shrinking the usable voltage swing,

wreaking havoc on traditional analog circuit design. However, the faster "digital"

transistors are better able to process timing signals leading us to consider analog

computation more similar to that of the brain. This trend will likely continue

with nanotechnology since even smaller voltage ranges and even faster devices are

promised. Of course, C'\ IOS technology is primarily scaling in favor of faster and

faster digital devices, however power consumption is beginning to limit how far

these digital circuits can scale.

Time-based signal representations have been in use for many years, including

such techniques as pulse-width modulation and sigma-delta converters but

temporal codes are becoming even more common with the rising popularity of

such techniques as class D amplifiers, spike-based sensors and even ultra-wideband

(UWB) signal transmission. However, these temporal codes are typically

used as temporary representations and computation is only performed after

reconstruction back to a traditional analog or digital form. There are instances

where amplifiers use temporal signals as inputs and outputs [9], but they do not

perform computation with them.

There are architectures like the PALMO [10] where the inputs and outputs

are represented by temporal signals, but using pulses. In such architectures, the

input temporal pulses are immediately converted to voltage and they lose the

computational advantages that the time-based representation promises. Similarly,

Murray discusses the implementation of arithmetic functions like addition and

multiplication using voltage or current pulses [11]. Another approach by Sarpeshkar

uses pulses for scalable hybrid computation [12]. However, all the above mentioned

architectures use pulses for computation with more complicated circuits than the

time-mode circuits.






5


In this thesis we describe a set of basic circuit building blocks for computation

using an analog temporal step function representation for both inputs and outputs.

1.3 Chapter Summary

The thesis is divided into the following chapters:

* C'! lpter 2: The Weighted Average Circuit. This chapter introduces time-mode
computation by describing the details of the weighted average circuit in
terms of functionality and fabricated chip measurements. We then proceed
to see how new and emerging silicon/carbon-nanotube technologies affect the
performance of this prototype time-mode circuit. Later we introduce a method
to improve the reliability of this time-mode circuit.

* C('! lter 3: SNR Comparison Of Weighted Averaging Circuits. In this
chapter we derive expressions for the Signal-to-noise ratio of voltage-mode,
current-mode and time-mode 2-input weighted average circuits, use these
expressions to compare and contrast the SNR performances of those circuits
and verify the observations with simulations.

* C('! lter 4: Other Time-Mode Circuit Examples. This chapter describes other
time-mode circuit examples including the weighted difference, weighted sum,
scalar product, maximum, minimum and thresholded difference operations.

* C'!i lter 5: Application Of Time-Mode Circuits. In this chapter we talk
two applications of linear time-mode computational circuits: We start
with the design of a time-mode edge detector that interfaces directly to a
time-to-first-spike imager. Later we describe the design of a 3-tap time-mode
FIR filter. We analyze these two applications and describe the advantages of
using time-mode circuits for these applications.

* C'!i lter 6: Non-Linear Time-Mode Computation. In this chapter we discuss
two different methods of performing non-linear computation using time-mode
circuits: The first method implements non-linear arithmetic using a time-mode
multi-li-r perception and the second method implements non-linear
arithmetic by introducing non-linearity in the existing linear computational
blocks.

* ('!i lter 7: Conclusion And Future Work. This chapter concludes the thesis by
recapitulating all the main points of the thesis. We also discuss possible future
research work.















CHAPTER 2
THE WEIGHTED AVERAGE CIRCUIT

2.1 Time-Mode Weighted Averaging Circuit







temp
Vc

M 2TH .




0 t -- t --
St 2 OUT t

A) B)

Figure 2-1. Time-mode weighted average circuit. A) Circuit schematic. B)
Idealized graph showing the capacitor voltage at different time periods.


Figure 2-1A illustrates the basic elements used to perform a weighted sum of

temporal signals. In general, the circuit can process many input steps but only two

are shown for simplicity. The circuit consists of a single capacitor and comparator

plus an inverter, current source and pfet for each input1 The rising edges of the

input steps correspond to the time values tl and t2 representing the two input

values. The PMOS transistors M1 and I[.l act as switches. The two current sources

I, and I2 are connected to the sources of the PMOS transistors to start charging

the capacitor C when the step inputs rise. The comparator senses the voltage

across the capacitor and outputs a step when the voltage reaches the threshold




1 The inverters would not be necessary if nfets were used to sink current or if an
inverted step function was used to represent input and output values. Furthermore,
source signalling should be used to reduce charge injection effects as explained in
[13].









voltage VTH. Once the block outputs a step, an appropriate reset stage (not shown

in the figure) resets the capacitor to OV. The current sources I, and I2 charge the

capacitor during different time periods as shown in Figure 2-1B.

Initially, the voltage across the capacitor (Vc) is reset to ground. For

simplicity, let tl < t2 < tOUT. The capacitor voltage Vc stays at OV until the

first step arrives at time tl. Transistor M1 turns on and the voltage Vc linearly

increases with the current source I1 charging capacitor C. This linear increase

continues until time t2 when the second step arrives. For purposes of the following

discussion, the capacitor voltage at that instant is labeled Vtemp.

The value of Vtmp is computed during the period tl to t2 as

I6
Vtemp (t2 t1) (2-1)
C

Similarly, during the period t2 to touT (the time for the capacitor to charge to

VTH)
II + I2
VTH Vtemp = (tOUT t2) (22)
C

Solving Eqs. 2-1 and 2-2 gives:

Iltl + I2t2 CVTH
tour + (2-3)
Il + 12 Il + 12

where tour is the time when the output step makes its transition from low to high

voltage. Eq. 2-3 is symmetric with Iltl and I2t2 so the assumption that tl < t2 can

be relaxed. However, we still need to assume that tour occurs after t1 and t2 to

ensure the validity of the equations.

The minimum value of tour in Eq. 2-3 occurs if tour = t2 and substituting

into Eq. 2-3, gives


I2t2 Itl = CVTH


(2-4)









Therefore for general values of tour above the minimum value,


I2t2 Iltll < CVTH


(2-5)


Eq. 2-5 provides the relation to be met for Eq. 2-2 to be valid. For the special case

where II = 12 = I, then the output step time tot is the mean of tl and t2 plus a

programmable constant (CVTH/21).

For unequal values of I1 and 12,


Iltl + 12t2 CVTH
toUTr = + 1
li + I 2 I + 12


(2-6)


where CVTH is a constant. The above equation is valid, when


lIlt1 12 l < CVTH


(2-7)


In this case, then the output time step is the weighted average of t1 and t2 plus a

constant.

We can summarize the results obtained above in a single equation:

VTH
tl + ] for Ilitl 2t2l > CVTH and tl < t2 (2-8a)

CVTH
tour = 2 + for I1tl 12| l > CVTH and t2 < t (2-8b)

Iltl + 2t2 CVTH
t + 1t2 otherwise (2-8c)
I1 + 12 I1 + 12
In general for N input steps,

t, Intn CVTH
toUT + (29)


provided that VTH is large enough. The circuit can be further generalized to handle

negative weight values in several v--,v: for instance, using current sources that

sink current to ground as long as the output voltage stays positive and eventually

reaches VTH.









Inputs ti, t2 and output tour of the weighted average circuit are time-steps

and these time-steps are defined within a frame (Frame 1) as shown in Figure 2-2.

When a frame (Frame 1) ends, the inputs and the output steps also end and the

circuit is reset. As the next frame starts (Frame 2 in the figure), the circuit would

be ready to process the next set of inputs t1 and t2. Each frame should be long

enough to allow the weighted average circuit to produce its output. For bounded

frame lengths, there is a chance that the output will not occur.

FRAME 1 FRAME 2

tfl

INPUT 1
ti
INPUT 2


OUTPUT

tour

Figure 2-2. Inputs ti, t2 and output tour are defined within a frame


2.1.1 Reset Stage

In the circuit shown in Figure 2-1A, we have not shown an explicit reset stage.

Setting the capacitor's voltage to its initial voltage VTH through a transmission

gate is the functionality desired from the reset stage and this can be integrated

with the application's reset stage.

Later in this dissertation, we will discuss some applications of this time-mode

weighted average circuit: an edge detection circuit and a 3-tap FIR filter. These

applications have custom reset stages and the reset for the basic block is integrated

in these custom reset stages.











2.1.2 Measured Results

The weighted averaging circuit was fabricated using the AMI 0.6pm C\ !OS

process. Figure 2-3 shows the measured output tour when just one input is

provided to the circuit. The output tour is plotted for varying I. The values of

C and VTH in the circuit are 20pF and 2.5V respectively. Figure 2-4 also shows

the output tour when only one input occurringg at tl) is provided to the circuit.

The current source I is fixed at 1.05pA The input transition time ti was varied

externally and the output tour was measured and plotted. The output expected

from the block touT +CVH was also plotted. The values of C and VTH in

the circuit are 20pF and 2.5V respectively. The root mean squared error (VMSE)

between the expected results and the measured results obtained of the output tour

obtained was 0.26/s.

x 10-4 Output tout for varying current I1 with C=20 pF, Vref=2.5V
4.5

4 Expected results
Measured results
3.5

3





1.5
1

0.5-

0
05 ~ ~~^~~~-- -- ^

0 0.5 1 15 2 2.5 3
Charging Current 11 in Amps 106
x 10

Figure 2-3. Plot of touT for varying I (C = 20pF, VTH = 2.5V). The block was
given one step input.


Figure 2-5 shows the output tour when both the inputs are provided to the

circuit but the current sources I1 and I2 are fixed at 1.552/A. The first input

entering the block was fixed as lis, 8.5ps and 32.5/s for three different sets of

measurements. The input transition time t2 was varied externally for different











1x 10-5 tout with varying tl
I = 1.0476 uA
11 C=2.5pF
Vref=2.5V

10-

9-
U)
c8-

7-

6-

5 -Expected Results
Measured Results

4
0 1 2 3 4 5 6 7
0 t1 in secs
x10

Figure 2-4. Plot of tour for varying I (C = 20pF,I = 1.0476A, VTH =2.5V). The
block was given one step input.


values of tl and the output tour was measured and plotted. The output expected

from the block tour = t2 + CVT was also plotted. The values of C and VTH

in the circuit are 20pF and 2.5V respectively. The vMSE between the expected

results and the measured results obtained of the output tour obtained was 0.3ps.

Figure 2-6 shows the output tour for the case when both inputs are provided

to the circuit but the current sources 11 and 12 are different and are fixed at 1.46/A

and 0.29/A respectively. Similar to the above case, the first input entering the

block was fixed as 1/s, 8.5ps and 32.5/s for three different sets of measurements.

The input transition time t2 was varied externally for different values of tj and

the output tour was measured and plotted. The output expected from the block

tour I=i+ 22 + ( was also plotted. The values of C and VTH in the circuit

are 20pF and 2.5V respectively. The VMSE between the expected results and the

measured results obtained of the output tour obtained was 1.9ps.











x 10-5 tout for varying t2
6.5 x-.....

C = 20 pF
=1.552 uA
Vref = 2.5V
5.5 -
tl = 32.5 us
5-


I / tl = 8.5 us
4-

.5-

3- tl= 1 us

2.5



1.5
0 1 2 3 t. 4 5 6 7
t2 in sees _
x 10

Figure 2-5. Plot of tour for varying t2 (C = 20pF,I = 1.0476pA, VTH =2.5V with
tl fixed at lis, 8.5ps and 32.5ps.)


2.1.3 Discussion

Errors in the weighted average calculation arise from a number of sources

including:


* mismatches in capacitor and current source values.


* fundamental noise sources causing jitter in the timing of the input and output
step functions.


* transistor time d.l i for example through the comparator.

Each of these errors can be reduced somewhat with careful layout, larger

circuits, more power consumption, and/or calibration procedures. These tradeoffs

must be taken based on the demands of particular applications. Particular

advantages and disadvantages of the weighted average circuit and other time-mode

circuits must be carefully considered. It is likely that time-mode circuits will have

larger dynamic ranges than conventional designs but high speed operation will

be compromised since time is used in the representations. General claims are

difficult, especially considering that it even difficult to cite general advantages of










x 10-5 tout with varying t2

11 = 1.46u
6.5 12 = 0.29u
C = 20pF
6- Vref=2.5V tl = 32.5u

5.5 1'-

5-

4.5- tl =8.5u

4-

3.5&
tl =lu
3"-

2.5
S 1 2 3, 4 5 6 7
3t2 in secs 5 6 7
x 10-

Figure 2-6. Plot of tour for varying t2 (C = 20pF,1i = 1.46pA, I2 = 0.29pA,
VTH = 2.5V with tl fixed at 1is, 8.5ps and 32.5/s.)


current-mode circuits vs. voltage-mode circuits [7]. A big advantage of time-mode

circuits however is that more and more sensors are being designed with step

outputs [14] [15] and the time-mode circuits can directly interface to these sensors.

Table 2-1. Measured performance characteristics of time-mode weighted averaging
circuit.

Performance specification Value
Power consumption 0.6pW
SNR 56dB
Differential-mode dynamic range 62dB
Common-mode dynamic range Effectively infinite


By performing computation using temporal step functions, the averaging

block was able to achieve almost infinite common-mode dynamic range, 62dB

differential-mode dynamic range and SNR of 56dB with very low power consumption

of 0.6/pW. This power consumption was on the order of nanowatts, when the

comparator were operated in the sub-threshold region. But, the operating speed

of the comparator was slow. Therefore, we had to strike a trade-off between the









comparator's operating speed and the power consumption. The measured circuit

specifications are tabulated in Table 2-1.

2.2 Theoretical Analysis of Signal-to-Noise Ratio and Dynamic Range

There are two sources of output noise in a time-mode circuit.

1. output noise due to timing jitter at the inputs.

2. output noise due to fundamental noise sources in the circuit.

2.2.1 Output Noise due to Timing Jitter at the Inputs

We know that the output from the block shown in Figure 2-1A is:

1ltl + I2t2 CVTH
toUT = + Z; (2-10)
II + 12 Il + 12

Jitter At1 (across different input values it has a mean value of At1 and a variance

of At12 ) in the input t1, causes the following output

11(tl + At) + 12t2 CVTH
toUT = -+ (2-11)
II + 2 12 + 12

The jitter at the output AtouT1 is given by:


AtouT1 toUT1 tour
(tl + At,) + 12t2 CVTH Iltl 12t2 CVTH
I + 2 I1 + 2) 1 + 2 + +2
IA- (2-12)
II + '2

which is a simple scalar multiplication of Atl.

The mean of the output jitter scales accordingly as,

liAt1
AtouT (2-13)
I + I2

The variance of this noise can be easily derived to be,

I2At12l
AtouIT12 (2 14)
(I, + 12)2









Similarly, the variance if the output noise caused by the input time jitter At2

(corresponding to input t2),


AtOUT22 (2-15)
(I, + 12)2

The total variance of the noise at the output is given by,


AtOUT2 =AtOUT12 + AtOUT2
I2At 12 22 2t2
=( )+( 2At2)
(I + 12)2 (I + 2)2
I2At12 + 'At22
(216)
(I1 + 12)2

If II = 2, then

Atour2 A (2-17)
4
Since only a fraction (" 7 ) of the jitter at the inputs affect the output jitter, we

can v- that the time-mode weighted average circuit effectively reduces the jitter at

the inputs.

2.2.2 Output Noise due to Fundamental Noise Sources in the Circuit

Figure 2 -A illustrates the basic elements used to perform a weighted sum of

temporal signals. We already know that the output from this block is:

Iltl + 2t2 CVTH
tour T + (2 18)
Il + 12 I + 12

We will now derive an expression for the signal-to-noise ratio of this time-mode

weighted averaging circuit.

The first step towards the derivation is to define the signal. Assuming a

differential representation, let us refer the inputs and outputs of the averaging

block to its first input. For simplicity, let us assume ti as the first input. The two

inputs to the averaging block are defined as, t1 = tl tl = 0 and t2 t2 tl.

The output is defined as tour = tour t1. This output is defined as the signal. In









words, the signal is defined as the output tour of the averaging block referred to

the input tl.

Therefore, tour is given by:


tou = tour -tl
Itl + 12t2 CVTH
=( + ) -tl
II + 12 I1 + 12) t
Iltl + I2t2 + CVTH Iltl 2tl
II + 12
2(t2 tl) + CVTH (
(219)
II + '2

There are 3 noise sources that dominate the noise performance of this circuit.

1. Noise due to the current source I1.

2. Noise due to the current source I2.

3. Noise due to the voltage comparator.

These noise sources are uncorrelated and therefore we can consider the impact

of each of these noise sources individually on the output of the circuit.

2.2.2.1 Noise in tour due to noise in current source II

Let us assume that current source I1 is noisy with a noise current of AI1.

Therefore, the total current from the current source is given by I1 + Al1. Since

currents II + All and I2 charge the capacitor, the new output from the weighted

average circuit is given by,

2(t2 t) + CVTH (
toT1 + A ( 20)
II + AI1 + /2








The noise at the output AtouT can be calculated as shown below:

AtouT1 = tUTI iOUT
12(t2 tl) + CVTH 2(t2 tl) + CVTH
11 + AI + 12 1 + 12
(12(2 tl) + CVTH)(-A1)
(Il + A 1 + 12)(I1 12)
(12t2- 12tl + CVTH)(-Al1)
(221)
(I, + 12)2

The variance of this noise is given by
AOUT 2 (12t2 -21 + CVTH)2(AIl2) (2 22)
A ( (22)22)


2.2.2.2 Noise in touT due to noise in current source I2

Let us assume that current source I2 is noisy with a noise current of AI2.
Therefore, the total current from the current source is given by 12 + A12. Since
currents I, and I2 + Al2 charge the capacitor, the new output from the weighted
average circuit is given by,

(12 + A2)(t2 tl) + CVTH (
toUT2 = (2 23)
II + 12 + A12

The noise at the output AtouT can be calculated as shown below:

AtoT2 = tout ^OUT
(12 + A2)(t2 t) + CVTH 2(2 tl) +CVTH
1 +12 + A2 11 + 12
(t2- tl)(IlA12) ( A12
+ CVTH(
(I1 + 2 + A2) (I1 + 2) (I1 + 12 + A12)(1 + 2)
(t2 1)(1A2) A2T
(I 2)2 ++ CVT (1 + 12)2
12(tII2 1) CVTH
( 2)2 ) (2 24)
(II + 72 2









The variance of this noise is given by

At OUT2 2 (12 (t ) CVTH)2(A122)
(1I + 12)4

(11(t1- 2) + CVTH)2(A22) (
(I, + I2)4

2.2.2.3 Noise in tour due to noise in the comparator

Let us assume that current sources IA and I2 are noiseless and noise in the
comparator is given by AV. The output from the weighted average circuit for these

assumptions is given by,

(t2 ti) + C(VTH + AV)
tOUT3 (2 26)
1I + 2

The noise at the output AtOUT can be calculated as shown below:

AtOUT3 tOUT3 toUT
2(t2 tl) + C(VTH + AV) 12(t t) + CVTH
II + 12 I+ 12
CAV (2-27)
(I1 + 12)2

The variance of this noise is given by

S(CAV2)
AtOUT32 (2-28)
(I + 2) 4

For typical values, the noise variation denoted by Eq. 2-28 is negligible
compared to the noise variances shown in Eqs. 2-22 and 2-25. Therefore, in the

forthcoming calculations we neglect the noise contribution of the comparator.

Therefore, the total noise at the output of the averaging block is given by

2 (2t2 2t + CVTH)2(A12) (Ilt It2 + CVTH)2(A2 2
AOUT +-- 29)
(II + I2)4 (Il + :4









The noise in the current sources i1 and I2 is dominated by shot noise. In

general, shot noise due to a current source I is given by [16],


A12 -- (2-30)
5-

where r is the time during which the current source is ON and contributes to the

output and e is the charge of an electron.

Current source I, charges the capacitor during the time period tour tl.

Noise in the current source would affect the circuit only during this time period.

Therefore,


TI = tour tl

= (touT tl) (tl tl)

=toUT tl
I2(t2 t) + CVTH (
(2 31)
I1 + 12

Therefore,

Al ell
12 (t2-tl)+CVTH
11 +12
ell(Il + I2)
(2-32)
I2(t2 tl) + CVTH

Current source 12 charges the capacitor during the time period tour t2. Only

during this time period, the noise in the current source would affect the circuit.

Therefore,


72 o oUT t2

S(toUT tl) (t2 tl)
I2(t2 -tl) + CVTH (
(t2 tl)
l1 + 12
Il(tl t2) + CVTH
I +(2 )
II + 12









Therefore,


lel2
11(tl-t2)+CVTH
11+12
eI2(I1 + 2)
I1(t1 t2) + CVTH

Substituting Eqs. 2-32 and 2-34 into (2-29), we get


2 2t2 -2 12t VTH)2(ttl)+CITH

eli(I2(t2 ti) + CVTH) + e2(I1(t1 -
(I1 + I2)3
eCVTH(Il + 12)
(11 + I2)3
eCVTH
(11 + 12)2

The signal-to-noise ratio is given by:


I + CV H 2( ei2(I1+I2)
(I1tl t2 + CVTH) (il-t+CTH
S(I1 + 2)C
t2) + CVTH)


(2-35)


(2-36)


Eq. 2-36 gives the SNR for a time-mode weighted average circuit.

For an averaging circuit, I1 = I2 = I. Therefore,


SN (I(t2 tl) + CVTH)2
SNR =CV
eC VT H


The maximum value of this SNR occurs when


SCVTH
t2 tl =
I


(2-34)


(12(t2-tl)+CVTH)2
SNR = 11+12-
(11+12)2
(12(t2 ) + VTH)2
eCVTH


(2-37)




(2-38)









Substituting Eq. 2-38 into Eq. 2-37, we get

(I (CVT) + CVTH
SNRMAX CCVTH 7 2

(CVTH + CVTH)2
eCVTH
4(CVTH)2
eCVTH
4(CVTH) (2-39)
(2-39)
e

To quantify this peak SNR value, we substituted C = 2pF and VTH = 5V

(max value) in Eq. 2-39 and obtained a value of 84dB. This peak value can

be increased by further increasing the value of the capacitance. For a 20pF

capacitance, we get a SNR of 88dB.

2.2.3 Discussion

We should note that the SNR value obtained through the hand calculations

shown above is an approximation. We have neglected the effect of jitter at the

inputs and matching errors in the currents II, I2. Since these effects affect our noise

measurements and therefore the measured SNR value, we obtain different values for

calculated and measured SNR values.

2.3 Scaling of Time-Mode Weighted Average Circuit with Technology

As we have seen previously time-mode circuits promise very high dynamic

range and good SNR. An important question is how does the performance of

time-mode circuits scale as technology scales. Since the time-mode weighted

average circuit is the prototype of all the time-mode circuits discussed in this

thesis, we will project how the time-mode weighted circuit performs in terms

of Signal-to-Noise Ratio, Dynamic Range, Power Consumption and Energy

Consumption as technology scales.

We choose the current 180nm as the reference technology and 90nm, 65nm,

45nm and 32nm as future technologies for our simulations. PT:\i HSpice transistor









models are used for all the technologies Predictive technology models are

developed by the N ii..,- i. Integration and Modeling Group at Arizona State

University [17].

2.3.1 Simulation Setup

We used Synopsys HSPICE to simulate the time-mode weighted average

circuit in different current/future technology nodes. Low voltage cascode current

mirrors were used for current sources and a five transistor single-ended differential

amplifier (PMOS input pair, NMOS current mirror load) was used as a comparator.

In the differential amplifier, a higher W/L ratio for the PMOS inputs and smaller

W/L ratio for the loads was chosen to minimize noise and the effects of mismatch.

The comparator's systematic offset would affect only the constant component -

CVTh of the output and can be calibrated out later, if necessary.

To compare the performance of the weighted average circuit as technology

scales, the capacitance C and reference voltage VTH were kept constant across

different future technology nodes. This ensures that charging currents I, and I2

are the only variable circuit parameters and it allows an apt comparison of the

trends in dynamic range, power and SNR of the weighted average circuit across

technologies. To vary li and I2, we had to change the sizes of the transistors in the

low-voltage cascode current sources. For simplification, the two charging currents

I1 and I2 were kept constant. The transistors in the weighted average circuit (the

transistors of the low-voltage cascode current mirrors, comparator and the digital

switches) were sized for two possible scenarios:

* For every technology, the circuit was designed for the lowest possible current
to keep all transistors in active/saturation.

* The transistor sizes were fixed for the 180nm process and the transistor sizes
were scaled down by the factor with which the technology scales down.









It was argued previously that the only noise sources that contribute heavily

to the noise of the time-mode weighted averaging circuit are the shot noises of

the DC current sources I, and I2. The noise of the comparator is negligible.

To characterize the noise performance of the weighted average circuit across

various future technologies, noise analysis during transient simulation is required.

Since such an analysis is not readily available in our Cadence software setup, to

achieve this two noise current sources (with Guassian distribution) were generated

randomly in MATLAB and their RMS values were set according to equations

previously derived. These current sources model the shot noise of the current

sources I, and I2 and are connected in parallel to their respective current sources

during the simulations. These noise current sources were switched on only during

the period when the time steps turned on the DC current sources.

The timing of the first step is chosen as the time reference and was kept

constant for all technologies. In this way the output time had the same reference in

all technologies.

2.3.2 Results and Inferences

* Power Supply: The VDD was decreased from 1.3 V to 0.6 V with scaling of
technologies and the circuit worked well for all values. This shows that the
time mode circuits are not dependent on voltage ranges and hence voltage
supplies can be reduced easily without changing the design.

* C('! iging Current: With scaling of technology, charging currents I1 and
I2 follow a monotonically decreasing trend as shown in Figure 2-7. This
is because as technology scales, transistor sizes reduce and therefore, the
current conducted by the transistors scale down exponentially (following the
well-established large-signal long-channel/short-channel current equations).

* Dynamic Power/Average Power: As dynamic/average current scales down
exponentially with technology, dynamic power/average power scales down
exponentially as well. This trend can be seen in Figures 2-8 and 2 9.

* Dynamic Range: The dynamic range is defined as the maximum allowable
time difference between two time steps. If tl < t2, the maximum allowable
time difference between two time steps of a weighted average circuit is given
















Variation of Current With Scaling of Technology


Figure 2-7.










30



25



20
-


c 15
o-
a


Variation of capacitor charging current with scaling technology


Variation of Dynamic Power With Scaling Technology


- Constant Scaling
---Saturation Scaling


Scaling Technology


Variation of dynamic power with scaling technology


Figure 2-8.









by CVT. With the capacitor C and threshold voltage VTH fixed in our
1 "
simulations, the dynamic range is inversely dependent on current. With
an almost exponential decrease in current we would expect an exponential
increase in dynamic range and the same trend can be noted in Figure 2-14.

* Energy Consumed: As power consumed by the weighted average circuit
scales down exponentially with technology, so does the energy consumed by
the circuit per weighted average operation. This trend can be noted from
Fig. 2-10.

* Weighted Average Outputs: From Figure 2-11 comparing the simulated and
calculated values of the output of the weighted average circuit, we see that the
simulated results match the calculated results well. We believe that the slight
difference in results as technology scales is due to inaccuracy in circuit models
at low current levels.

* Output Noise: The simulated noise and calculated output noise values match
closely as shown in Figure 2-12 confirming the accuracy of the derived
expression for noise of this circuit. Also, noise is inversely proportional to
current with all other factors remaining the same. Hence with exponential
type decrease in current we see an exponential type increase in noise.

* SNR: Observations similar to those made for the output noise can also be
made with the simulated and calculated SNR values as shown in Figure 2-13.
The signal, which is the time taken by the weighted average circuit to produce
an output, increases as we scale technology. With the noise also increasing
with scaling technology we note that the ratio of signal power and noise power,
the SNR, actually decreases only slightly with scaling technology. This is
in accordance to what was predicted by our equations. With more detailed
analysis, (with all other factors constant) we can note that the SNR is slightly
dependent on the current. So as current decreases with technology, SNR also
decreases. However, in Eq. 2-37, the I(t2 tl) term is much smaller than the
CVTH term causing SNR to be almost a constant. Also, slight variations in the
simulated SNR results confirm this analysis.

For all the above mentioned performance measures, for both the transistor

sizing scenarios sizing the transistors so that the transistors are in the active

region and sizing the transistors by the technology scaling factor, we see the same


performance trend.











Variation of Average Power With Scaling Technology
60
--- Constant Scaling
Saturation Scaling
50


40 -


.c 30
a0






---
1 Snm 90nm 65nm 45nm 32nm
Scaling Technology


Figure 2 9. Variation of average power with scaling technology



2.3.3 Discussion

We see that the dynamic range of inputs supported by the time-mode circuits

keeps increasing exponentially with scaling technology. For voltage mode and

current mode circuits as technology scales the input dynamic range supported

reduces (because scaling technology reduces the supply voltage and the maximum

current supported by the devices). But, for time-mode circuits, as technology scales

the input DR supported increases (scaling technology does not affect information

stored in time). This is a very promising aspect of time-mode circuits when

compared to voltage-mode and current-mode circuits.

With scaling technology, though the noise performance of the circuit gets

worse the SNR stays a constant. Therefore, applications using time-mode circuits

can expect the SNR performance of the time-mode circuits to remain constant with

new technologies.











As technology scales, time-mode circuits become more power and energy

efficient. Therefore, they can be chosen for low-power applications across different

device technologies.


X 10 Variation of Energy Consumed Per Averaging Operation With Scaling Technology
\ --- Constant Scaling
\e -e-Saturation Scaling
2.5 -

\
2-


1\.5

i\



0.1-
0.5 s --



1 0nm 90nm 65nm 45nm 32nm
Scaling Technology


Figure 2-10. Variation of energy consumed per averaging operation with scaling
technology



The results from the experiments are very encouraging and reinforce the

fact that time-mode circuits would scale well with technology and show good

performance.

2.3.4 Drawbacks

Time-mode circuits have shown promising results, however certain design

issues can limit their performance.


* Right now the measurement of the output timing was done when the input of
the comparator reached the threshold. The d. 1iv of the comparator would be
another offset but this would be highly dependent on the load. When these
circuits are used with larger fan out, the offset caused due to the capacitive
load at the output would not remain constant.


* While the current sources are charging the capacitor the VDS across the input
switching transistors does not remain constant and causes variations in the
















Comparison of calculated and simulated time-mode averaging outputs over technologies
-- Simulated Constant Scaling
-E-Calculated Constant Scaling
---Simulated Saturation Scaling
-*-Calculated Saturation Scaling


0.35

S0.3
o)
S0.25
E
H 0.2


0 15I


Scaling Technology


Figure 2-11.










0.7


0.6


0.5


= 0.4-


0.3


Comparison of calculated and simulated time-mode averaging

outputs over technologies







Comparison of calculated and simulated time-mode averaging output noise over technologies
-B- Simulated Constant Scaling
-e- Calculated Constant Scaling
-*--Simulated Saturation Scaling
*--Calculated Saturation Scaling


65nm 45nm
Scaling Technology


Figure 2-12. Comparison of calculated and simulated time-mode averaging output

noise over technologies














Comparison of calculated and simulated time-mode averaging SNR values over technologies




--- -- -- -------4------ *-----












-- Simulated Constant Scaling
-a-- Calculated Constant Scaling
-*--Simulated Saturation Scaling
-4--Calculated Saturation Scaling


65nm
Scaling Technology


Figure 2-13.


Comparison of calculated and simulated time-mode averaging SNR
values over technologies






Variation of Dynamic Range With Scaling Technology


-- Constant Sca
- -Saturation Sc


0.7

0.6


ling
aling



/-







^a




.--o--8-------- ^___
/f
Il'l
II~ll **//I /*l} /


0.2 -


----
1 3nm


90nm


65nm
Scaling Technology


Figure 2-14. Variation of dynamic range with scaling technology


45


40


30onm


45nm









current. Having larger lengths for these transistors is critical for accurate
operation.

* Input switching causes coupling between the gate and drain and we see a large
spiking current initially. If the tour to be calculated is small, this can cause
problems in accuracy.

* A limitation to the accuracy of these results is due to limitations of the
simulator as we try to operate at very low currents and measure up to six
significant digits. This is especially true in case of noise current, where we
believe the errors creep in due to numerical methods and round off. However,
these precision issues do not change the trend in the results.

2.4 Carbon Nanotube Based Time-Mode Weighted Averaging Circuit

To see if the time-mode weighted averaging circuit would scale well in the

nano-technology regime, we replace the traditional BSIMv3.1 AMI 0.5pm Si

transistor models by carbon nanotube FET models [18] and simulate our prototype

weighted average circuit. Transistors MI, 1., Current Sources II, I2, and the

inverters of the weighted averaging circuit are realized using NCNFET and

PCNFET models developed by Roy et al of INAC/Purdue. The circuit is simulated

using HSPICE. The NCNFET and PCNFET transistor models used in our

simulations have only a single carbon nanotube representing their channels. The

'I-.-, -I advantage of this single carbon nanotube technology is that the transistors

have extremely small gate and channel capacitances; thus, promising very high

speed operation.

2.4.1 Carbon Nanotube Field Effect Transistors (CNFETs) and Their
Spice Models

Carbon nanotubes are nano-diameter cylinders consisting of a single

graphene sheet wrapped up to form a tube. Since their invention in the early

1990s, researchers have been actively exploring the electrical properties of these

devices and their potential applications in electronics. One of the most promising

applications of carbon nanotubes, the carbon nanotube transistor (CNTFET) -

first reported in 1998, is currently considered as the most promising building block









of a future nano-electronic era. The reason for this is not just their small size, but

their inherent properties like low power dissipation, possible ballistic transport,

high current densities, high mobility, low resistance and the facilitation of making

transistors and interconnects using semi-conducting and metallic carbon nanotubes.

For a typical nanotube geometry of 100nm length and 3nm diameter, C is of

order 4aF. The channel resistance can be as small as 6.25kQ. Therefore, the RC

frequency is equal to 6.3THz [19]. Let us compare this frequency with the fT of

a minimum size NMOS transistor in the AMI 0.5u Si process. The fr of a NMOS

transistor can be roughly expressed as,


fT (VGS VTH) (2-40)
27rL2

with p the mobility, L the channel length, VGS the gate to source voltage and

VTH the threshold voltage. Substituting typical values of p = 449.98cm2/Vs,

L = 0.6pm, VGS VTH 4V for AMI 0.5u Si process, we get fT 80GHz. This

shows that the speed limit intrinsic to a nanotube transistor is several orders of

magnitude greater than a Si transistor.

The CNFET model used in our simulations is a simplistic model that

was developed to assess circuit performance of single walled semiconducting

CNFETs. It is an appropriate model to evaluate d4-i-,, estimate power in

circuits and simulate the performance degradation due to interconnect and device

parasitics. The modeling technique used is generic in the sense that it can faithfully

represent a wide range of CNFET geometries and gate materials with reasonable

operating voltages and user specified temperature conditions. The model has a

strong foundation on the underlying physics of operation along with necessary

simplifications and assumptions. This makes a multiple-transistor circuit simulation

possible.

The assumptions made to arrive at the CNFET spice model include,









Bulk-type CNFETs: In the literature, two types of carbon nanotube

transistors have been studied extensively. They are respectively, the Schottky

barrier CNFET and the bulk-type CNFET. Though the Schottky barrier

CNFET has its own advantages, the model assumes a bulk-type CNFET as

this MOSFET-like device has a higher on-current and, hence, would define the

upper limit of performance.

Ballistic transport: Recent experiments have demonstrated that a CNFET

can typically be used in the MOSFET-like mode of operation with near ballistic

transport.

2.4.2 Physics Governing the Operation of CNFET

It is a well established fact that gate voltage induces charge in the CNFET

channel and also modulates the top of the energy band between the source and the

drain. As the source-drain barrier is lowered, current flows between the source and

the drain. Since we are dealing with ballistic transport, all scattering mechanisms

are neglected.

2.4.3 Simulation Results

The rail-to-rail supply voltage used in our simulations is 0.6V. The simulation

outputs are shown in Figure 2-17. For the simulations we chose t1 = Ins, t2 3ns,

C = 7fF and VTH = 0.5V. Since the CNFET spice models are simplistic models

and not ideal for analog simulations instead of the 5-transistor comparator, we

chose an ideal op-amp to perform the comparator's functionality. The expected

tour and the calculated tour values match closely and they are approximately

equal to 9ns. The small difference between the two tour values can be attributed

to the OFF current of the CNFETs charging the capacitor. The carbon nanotube

transistors have very high current drive as can be seen from Figures 2-15, 2-16

and from Figure 2-18 we can see that the off-current of these carbon nanotubes is

also high (in the order of 30nA). These high off-currents can produce an offset that







33



introduces some jitter in the output. In spite of the large off currents, the average

power consumed by the circuit is 0.33/ W.

100u -
10 0 u --- ,. . . . ..--- -.----------- -- --------- --------------------------.. .
,ydrain=O
90u ....----------- - ------- ----------- --- --- - ----


70u --- ---' ------------ ----------------- -- -------------------------- ---
70u '- '

Vdrain=.3A %

650u ----vd =- l--------------
50u --- ;.-;- :...--------------------------- -------------------------- ---
rain



Vdrain .5
20u ----------*--------------
-, ,.


0 _-Vdrain=g.6__________ ---Vg _--- ---- --.... -----

0 200m 400m 600m
Voltage X (lin) (VOLTS)

Figure 2-15. PCNFET ID-VGS plots for varying VDS



2.4.4 Discussion

We did not plot the performance results of these carbon nanotube transistor

based time-mode circuits with the Si technology scaling curves discussed in the

previous section because these CNFET models are totally different from the PTA\

models used for all the Si processes. But, it would be extremely useful if we can

still compare the performance numbers obtained from the scaling Si simulations

and the CNFET based circuit's simulations. The carbon nanotube transistor based

time-mode circuits have parasitic capacitances in the range of aF (compared to

fF for the silicon based transistors), have high current drive therefore high speed

(because of the high current drive of carbon nanotube transistors) and are very

power efficient (power even lower than the corresponding 32nm process based

averaging circuit's power). Since nano-technology promises very attractive features







34





-10u
o --l -...... ----------. --- --- -- --- -- --- -- --... .. .. .. .. .. .. .. .. .. .. .. .. .. .. ...----- -



0u ....... ..... ....
0u --- ... ......................-- ...- ..............-- -----: -- -a.-, '----
-40u
-70u


40u







-100u
S- ---. .... ... ......... .; .- .. ............ T


20 'm. "400m .m
Voltage X (lin) (VOLTS) ri=.2
-70u - --......... -.-....... .. -......... .. ..... .....i.. .. .-- - -


2.5 Reliable Time-Mode Weighted A Vdrage Circuit










2.5.1 MotivationVate
0 200m 400m 600rn
Voltage X (lin) (VDLTS)

Figure 2 16. NCNFET ID-VGS plots for varying VDS



and performance for time-mode circuits, we can safely -i that time-mode circuits

scale well into the future technologies.

2.5 Reliable Time-Mode Weighted Average Circuit

2.5.1 Motivation

The reliability of integrated circuits is a i i, Pr concern for the electronics

industry and becomes more of a concern as processes scale down to deep

sub-micron C'\ OS and future nanotechnologies [20]. As these process technologies

become more and more complex, higher levels of integration used in the ICs will

increase the chip failure rate. These failures underscore the importance of reliability

for manufacturing of nano-scale systems. It is, therefore, imperative that circuits

are designed with reliability in mind.

Construction of reliable digital systems with the use of redundant components

was first considered by Von Neumann for certain cases of intermittent failures of

elements [21]. His ground-breaking work was extended by Dickinson and Walker

for the case of permanent failures of logic elements [22]. But the works of Von















































0 En 10n 15n 20n
Time (lin) (TIME)


Figure 2-17. Nano-weighted average circuit simulation outputs


0 -

-5n .

-100n

-150n

-200n

-250n

-300n

-350n

-400n

-450n

-500n

-550n


*---------------------- ------





- --- --------------- ------------------- ------------------- ----------------- --





--- ---------- ----- ------------------- *- ------------------- I ----------------- --
















0 5n o1n 15n 20n
Time (lin) (TIME)


Figure 2-18. Capacitor charging/discharging current

circuit


in a nano-weighted average









Neumann, Dickinson and Walker and many others were all dedicated to improving

the reliability of digital circuits. In this chapter, we discuss the design of reliable

analog nanocomputational circuits using redundancy. As an example, we will

explain the design of a reliable analog time-mode weighted average circuit.

2.5.2 Time-Mode Median Circuit

Figure 2-19 illustrates the basic elements used to find the median of an

odd-number of input temporal signals. In general, the circuit can process many

input steps, but only three are shown here for simplicity. The circuit consists of an

inverter, a current source of value I and a PMOS transistor for each input and a

current source of value I connected to the drains of the transistors MI, I and

i The rising edges of the input steps correspond to the time values t1, t2 and t3

which represent three input values. The PMOS transistors MI, I and I act as

switches.





M1 L M2 M



31
2 tOUT


Figure 2-19. Time-mode median circuit for 3-inputs


To aid the explanation of the operation of this circuit, we assume that

tl < t2 < t though such a condition is not necessary for the operation of the

circuit. Since the input step making its low-high transition at time tl enters the

median block first, it switches transistor M1 on. Since the current source of value

3 is discharging the parasitic capacitance Cp, there won't be any charge built up
across the parasitic capacitance. However, when the second step enters the block
across the parasitic capacitance. However, when the second step enters the block









at time t2, a net current of 1 charges the parasitic capacitance and starts adding
charge to the capacitor and we will get an output step at time tour. Since the

parasitic capacitance gets quickly charged after the second step enters the median

block,

tour t2 (2-41)

Thus, we see that the output obtained in Eq. 2-41 is the median of the three
inputs tl, t2 and t3. In general, this median circuit can process N-input steps -

provided that N is odd. The circuit is shown in Figure 2-20. Depending on the

value of N, the value of the current source that pulls-down the capacitor's voltage
is chosen to be N. It is to be noted that using conventional voltage-mode and

current-mode analog circuit designs it is difficult to design such a simple circuit to

perform a median operation among various inputs.




rrr
M M2 nA IZ"l M


NI
2 toUT


Figure 2-20. Time-mode median circuit for N-inputs


2.5.3 Redundancy in Time-Mode Computation

We will explain the concept of improving reliability using redundancy through

the design of a reliable analog time-mode weighted average circuit that has an
architecture similar to Von Neumann's 2-out-of-3 1i lini i ly circuit shown in

Figure 2-21 and perform win 1 ,-i- to quantify its reliability.

Von Neumann's 2-out-of-3 i, lin i ly circuit shown in Figure 2-21 uses a
i, i ii ly circuit fed by three independent devices which operate from the same


















Figure 2-21. Von Neumann's two-out-of-three i li, i ily circuit


source of input information [21]. Dickinson and Walker analyzed the circuit in

detail and proved that the circuit has a resultant reliability greater than that of

its elements [22]. As mentioned above, their work was only applicable to digital

circuits. Here, we use their concept to improve the reliability of analog circuits. We

will extend the work of Dickinson and Walker to design a reliable analog time-mode

weighted average circuit as shown in Figure 2-22. Von Neumann's 2-out-of-3

i I .i ii ly circuit is essentially used polling between inputs and can only be used for

digital applications. Therefore, it is being replaced by a time-mode median circuit

as shown in Figure 2-19. For our failure analysis, we assume that the median

circuit never fails. The same assumption is made for the digital voting circuits

discussed above. The only failures to be considered are those of the three elements

(weighted average blocks) which feed the median circuit.

The time-mode weighted average block has components like current sources,

digital switches, comparator and a capacitor. It is possible for any of these

components to fail and introduce errors in the output of the circuit. For explanation

purposes, let the output of the weighted average circuit when there are no failures

in its components be toidJl and the output when there are some failures be t tned.

The weighted average blocks can fail in two modes:

1. tbtired < tide. This also includes the case where due to failure there is no
output from the weighted average block (tobtained is close to infinity).


















INPUTS Th e AVERAGE tVIY iit ------y- s
CIRCUIT CIRCUIT OUTPUT




WEIGHTED
AVERAGE
CIRCUIT


Figure 2-22. Block diagram of a reliable time-mode weighted average circuit


2. ttied > otail. This also includes the case where due to failure, the weighted
average block fires an output immediately after its internal nodes are reset
(the reset stage is not shown in the figure) (titie"d is close to zero).

Let us assume that the probability that any weighted average block will

function correctly is Ro. The probability that the redundant system is not going to

fail R1 is given by the sum of the three cases mentioned below:

1. All the three time-mode weighted average blocks function correctly. The
probability that the redundant system is not going to fail in this case is given
by R3.

2. One of the weighted average blocks fail in any of the two modes (tbtgined
t ) o (obtaied < ideao) mentioned earlier and the other two function
correctly, in which case the output of the system would still be correct. The
probability for this case is given by (1 Ro)Rl Since this case can happen in
three different v--,v, the total probability for this case is 3(1 Ro)R,.

3. Two of the three weighted average blocks fail in this case but we assume that
the elements have equal probability of failing in either of the modes. That
means that there is a probability of 1 that the two weighted average blocks
will fail in opposite directions (one block firing output early and the other
firing output late), in which case the output of the redundant system would
still be correct. The probability that two elements fail and the others still









function correctly is (1 Ro)2R0 and this can happen in three different v--v.
Therefore, the probability for this case is given by (1 Ro)2Ro.

Therefore, the total probability that the redundant system is not going to fail

R1 is given by the sum of the probabilities obtained in the above mentioned three

cases [22]:


R1 R + 3(1- Ro)R (1 Ro)2p
2
3 1
= o 3 (2-42)
2 2


100







-- Reliability of the redudalt eircfit
2^





S- -Reliability of tie individual elements

10-6
S --Reliability of the redudanit circuit



103 102 101 100
Probability of failure of the individual elements

Figure 2-23. Plot showing the increase in reliability of the redundant circuit as
compared to the individual elements


From the result shown in Eq. 2-42, we see that the redundant time-mode

weighted average circuit is ahv-- -i more reliable than the individual elements.

This can also be realized from the reliability curve in Figure 2-23. As shown in

that figure, there is a considerable improvement in the reliability of the redundant

circuit as compared to the reliability of the individual elements.

2.5.4 Discussion

We see that for the above 2 cases, redundancy provides additional reliability

for the weighted average circuit. 1_ f, circuit designers would be concerned






41


that such redundancy would increase the chip area. But, most of the real time

applications would compromise on the chip area than on the reliability of the

circuits. Also, this redundant weighted average circuit can be seen as a stepping

stone towards improving the reliability of nanocomputational circuits.

In C'! lpter 2, we will see how the performance of the time-mode weighted

averaging circuit with its voltage-mode and current-mode counterparts.















CHAPTER 3
SNR COMPARISON OF WEIGHTED AVERAGING CIRCUITS

We have quantified the performance of time-mode circuits in terms of

key measures such as SNR, DR and power consumption. These performance

metrics are not clear-cut. For instance, dynamic range is a well-defined concept

in voltage-mode and current-mode but must be carefully considered for some

time-mode circuits whose inputs can be arbitrarily large.

We need to compare the performance measures such as SNR and DR of

time-mode circuits to corresponding voltage-mode and current-mode circuits by

making a ceteris paribus (other things being equal) comparison. Since it is difficult

to compare all possible voltage-mode, current-mode and time-mode computation

circuits, we would like to start by restricting ourselves to the comparison of

weighted average circuits shown in the Figures 3-1, 3-3 and the time-mode

weighted averaging circuit discussed in C!i lpter 2. We will quantize their SNR

and DR, compare their performances, and comment on them. The main criteria

for the choice of these voltage and current mode weighted average circuits are low

complexity and low power consumption. The choice would enable us to perform a

fair comparison with the basic two-input time-mode weighted average circuit.

The first circuit operating in voltage-mode computes

SgiVV + g2V2 (3
VOUT = (3-1)
g + 92

where gi and g2 represent the transconductances of the two OTAs in the circuit.

The transconductances are set by the individual bias voltages applied to the OTAs.

V1, V2 are the two input voltages and VOUT is the output voltage of the circuit.









The second circuit operating in current-mode computes

ek1 + ek212
loUT (3-2)
eki + Ck2

where i1, I2 are the two input currents and VOUT is the output current of the

circuit. kl, k2 are the voltages applied to the transistors in the circuit. These

voltages contribute to the weights ek1 and ek2 applied by the circuit to compute the

weighted average.

And, as we have seen in C'i plter 2, the time-mode weighted averaging circuit

computes
1ltl + I2t2 CVTH
toUT + (3 3)
IIl + 12 1I + 12
As mentioned earlier, though we can come up with more efficient circuits,

the voltage-mode, current-mode and time-mode averaging circuits compared in

this paper are chosen such that their circuit architecture is extremely simple and

consume very low power.

To quantify the SNR relations obtained for voltage-mode, current-mode and

time-mode averaging circuits, let's make the following assumptions.

* no load capacitance is connected at the output node.

* for simplicity, we assume that all the transistors involved in the analyses have
the same dimensions: W = 6pm and L = 20/m.

* the transistors operate at room temperature.

* process parameters of AMI 0.5/ process are used.

3.1 Voltage-Mode Averaging Circuit

Figure 3-1 illustrates the basic elements used to perform a weighted average of

voltage-mode signals V1 and V2. It consists of two transconductance amplifiers GC

and G2 connected in unity feedback configurations.


















V,



Figure 3-1. Voltage mode weighted averaging circuit


The output of the circuit is given by the equation:

giVi + g2V2
VOUT = (3-4)
gl +g2

For SNR calculations, we need to define a reference for the inputs and outputs.

Let us define the input V as the reference.

Now, VOUT defined with respect to the reference would be given by,


VOUT VOUT VI
91gi Vi+g2 2V2
gi + g2
glV + g2V2 g1V g2Vi
g9 + g2
g2(V2 V)(3 )
gl + g2

There are two noises sources in this circuit as shown in Figure 3-2.

1. Avi2 noise due to operational transconductance amplifier g, referred to its
positive input.

2. Av22 noise due to operational transconductance amplifier g2 referred to its
positive input.

Since these two noise sources are not correlated, we can derive the individual

contribution of each of these noise sources at the output and add up the contributions

by applying superposition.










V:



VOLJT

AV2VU
V2g2


Figure 3-2. Voltage mode weighted averaging circuit with noise sources


3.1.1 Noise Contribution at the Output due to Av12

At one particular instant in time, if the instantaneous noise of OTA1 is Avl,

then the instantaneous noise at the output is give by,

A U 92(V2 (VI + A)) g2(V2 VI)
Vou -T = -
91g +92 91 + 92
( A) (3-6)
91 +92

The variance of the noise at the output is given by,

Ug2AV12
AVOUT g9 (3 7)
(g + 92)

Similar calculations are done for the noise contribution from OTA2.

3.1.2 Noise Contribution at the Output due to Av22

At one particular instant in time, if the instantaneous noise of OTA2 is Av2,

then the instantaneous noise at the output is give by,

gO 92((V2+A 2) -Vi) 92 (V2 Vi)
A VOUT2
91 +92 91+ 92
S(A ) (3-8)
9g + g2

The variance of the noise at the output is given by,

./2 2
AVOUT22 2 A-2 (3-9)
(g9 + g)92









Therefore, the total noise contribution at the output due to the two noise

sources is given by,
2- g(A +A1+2 A2)
AVOUT22 = 92 + AY-2- (3-10)
(g9 + g2)2
Assuming that the OTAs are basic 5-transistor differential input/single

ended output OTAs, we would have noise contributions from the input transistors

and the mirror transistors. Neglecting flicker noise of these transistors (valid

for intermediate and high frequencies) and taking only thermal noise into our

calculations, the input referred noise variances are given by:


AVouT12 4(k)Af (311)
3gl

8kT
VOUT22 = 4( )Af (3-12)
3g2

3.1.3 Noise Bandwidth

The voltage-mode weighted averaging circuit has a pole at its output that

occurs at
1
fc = (3-13)
27 ROUTCOUT

where, COUT is the capacitance at the output node, usually defined by the load

capacitance CL.
1 1 1
ROUT = 11 | (3-14)
gl g2 1 + 92
Hence,
1 gl + g2
f 1 +2 (3 15)
27 CouT 2i COUT
91+92
If an amplifier has just one pole at fc, then the noise bandwidth is given by


Af 2f 2 = (1 ) = 2 (3 16)
2 f2 2CCoUT 4COUT









The signal-to-noise ratio is given by
2g(V2-Vl)2
SNR (91+92)2
SNR =
g9 (Av12 +Av22)
(91+92)2
(V2 Vl)2
(Av2 + Av22)
(V2 V1)2
4( 8T + 8))Af
39 31 2 /392
(V2 V1)2
48kT + 8kT)( 91+92
329 32 4COUT
(V2 V1)2
S8kT ( 9l+2 ( 91+92
3 9192 4COUT
3 (V V1)2192CouT
(3-17)
8kT (gl + g2)2

For an averaging circuit, g = g2 and the SNR relation becomes,

3
SNR = (V2 V)2COUT (3 18)
32kT

For AMI 0.5p process, maximum value of V2 VI that could be achieved

3.5V (thought the rail-to-rail voltage is 5V, to maintain the transistors of the

OTA in saturation the input voltage swing would be lower). Also, through hand

calculations we found out that the output node capacitance is 0.4pF. Substituting

all the values to Eq. 3-18, we get maximum SNR of 80dB.

3.2 Current-Mode Averaging Circuit

Figure 3-3 illustrates the circuit that performs weighted average of currents I,

and I2. In this circuit, transistors M1-M4 operate in the sub-threshold region and

they are in saturation.

We assume that in all the sub-threshold current equations below that K = 1.

By using KCL at nodes 1 and 2 in Figure 3-3, we can write

K2-VA K1 VA
S= Ise VT +Ise VT
VA K1 K2
= Ise [e + eV] (3-19)




















Figure 3-3.


Current mode weighted averaging circuit


and


K2 VB K1 VB
SIse VT + Ise VT
VB K1 K2
=Ise g [e T + e ]


From Eqs. 3-19 and 3-20, we get

VA
li e VT
12 C VT

The output current is given by

K1-VA K2 VB
ouT = Ise T + Ise VT


Figure 3-4. Current mode weighted averaging circuit with noise sources


(3-20)


(3-21)


(3-22)










Substituting Eq. 3-21 in Eq. 3-22, we get

VA K1 12 K2
IouT Ise VT [eV' + e- ]
K1 K2
VA [I/eVr + I2eC T
Ise VT (323)
I1

Using Eq. 3-19 in Eq. 3-23, we get
K1 K2
ierV + I2 eV
IOUT = 1 K2 (3-24)
eVT + CVT

Figure 3-4 shows the current mode weighted averaging circuit with noise

sources. As shown in the figure, there is noise associated with each transistor in the

circuit and the equivalent noise variances can be represented using current sources

connected in parallel to the transistors. The noise current source All sees the

source resistance 1 of transistor M1 and the source resistance 1 of transistor
9ml 9m2
if[. as shown in Figure 3-5. Since K = K2, g91 g 2. Therefore, half of the

current All flows through transistor 11 and contributes to noise in the output

current louT. Similarly only half of noise currents AI2, A13 and AI4 contributes to

output noise.

Therefore, the total output noise current is given by


A1U + AI2 + A13 + A4)
AlouT = (325)
2

The variance in the output noise current is given by

A T2 A12 + A22 +A32 +2 a (42
Alour (3-26)
4

Neglecting flicker noise, the noise current of a transistor operating in the

subthreshold region is given by 2KTgm. Substituting this noise current expression









in Eq. 3-26, we get

T2 Al12 + A22 AI + A 42
4
(2KTgm + 2KTg9m2)Af + (2KTgm3 + 2KTg4)Af (3
(3-27)
4

where the noise currents of transistors M1 and i [. would have a noise bandwidth

determined by R-C time constant of node 1 and noise currents of transistors i..

and M4 would have a noise bandwidth determined by R-C time constant of node 2.

Since K = K2, for subthreshold transistors gmi = gm2. Similarly, g,3 g9 4.

Therefore,

AIouT2 (KTgmrl)Afl + (KTgm3)Af2 (3-28)






11/g
b M Al2





I
Figure 3-5. Half of the noise current from each transistor flows to the output


The pole contributed by node 1 is given by:

1 gl9m
fnodel
f 2odel w 1 l (3 29)
2 !- 1-i~nodel 7 Cnodel

Noise bandwidth for noise currents of transistors M1 and i [. is given by,

Aflt f 7r ( )gmi gm (3 30)
2 2 TTCnodel 2Cnodel

The pole contributed by node 2 is given by:

1 gm3
fnode2 1 (3 3)
27r "- node2 7node2









Noise bandwidth for noise currents of transistors .1 and M4 is given by,

if -F gm3 gm3
Af node2 ) 9Tf (3 32)
2 2 T Cnode2 2Cnodel

as parasitic capacitance Cnodel = Cnode2-

The variance in the output noise current is given by,

A T 2 / \9mnl \9m3
AIT = (KTgmi) + (KTgmm3) 3
2Cnodel 2Cnode2
kT
= C0 (19g1 + 9gm2
2Cnodel
kT
okT 1 2) (3 33)
2Cnode IVT,

Since the discussions would get too complex, let us just focus our discussions

here to current mode averaging functionality. Lets assume that K = K2. The

output IouT in this case is given by IOUT = 1+2 The output referred to the first

input I1 is given by,


IOUT = IOUT II
II + I2
2
I I2
S12 (3-34)


The signal-to-noise ratio is given by

(12-11)2
SNR = 4
2kT 2 (J21 Ij22)

VT2 Cod (12 1)2 (
2kT(1I2 + 22)

To quantify the SNR equation, we substituted these nominal values: Cnode =

0.4pF (as in the voltage-mode case), I, = InA (low sub-threshold current) and

I2 = 20nA (high subthreshold current) in Eq. 3-35. The maximum SNR that can

be obtained from this circuit is 44dB.






52



3.3 Discussion

Clearly, the SNR achieved by the time-mode weighted average circuit is higher

than the SNR achieved by voltage-mode and current-mode weighted average

circuits. The SNR values obtained from simulations differ only by 1 from the

SNR values obtained through hand-calculations as shown in Figure 3-6.

Comparison of calculated and simulated SNR Values


Simulated
Calculated
32nm


30
130nm


Figure 3-6. Calculated and simulated SNR values of a time-mode weighted
averaging circuit over technology



So far we have just discussed a single type of time-mode circuit the weighted

averaging circuit. In C(i lpter 4, we will describe other time-mode computational

circuits.















CHAPTER 4
OTHER TIME-MODE CIRCUIT EXAMPLES

In this chapter, we will introduce a family of time-mode circuits that can

perform linear computations like weighted subtraction, weighted sum, scalar

multiplication, maximum and minimum computations.

4.1 Weighted Subtraction Circuit

By replacing the PMOS transistor I. by an NMOS transistor and changing

the direction of the I2 of the basic block in Figure 2-1A, we obtain a circuit that

can perform weighted subtraction of steps occurring at t and t2 as shown in

Figure 4-1A.

VC


M CHARGED DISCHARGED
BY I BY I 211


T v V -- --- -- -- -
M2 (with initial TH
t2 1 voltage VTH)
SOUTH

A) B)

Figure 4-1. Weighted subtraction circuit. A) Circuit schematic. B) Idealized graph
showing the capacitor's voltage at different time periods.


We will assume that the capacitor is initially charged to a voltage VTH, tl < t2,

I2 > I1. As soon as the first step enters the block at time tl, the current source I1

starts to charge the capacitor. When the input step occurs at time t2, net current

I2 I1 (with I2 > I1) starts discharging the capacitor as shown in Figure 4-1B.

When the capacitor voltage reaches VTH, the comparator outputs a step at time

touT. The output of the comparator contains an unwanted pulse at the reference









time because the positive and negative terminals of the comparator carries the

same voltage VTH. The AND gate connected to the output of the comparator

ensures that the output from the block contains only a step output at time tour.

Once the block outputs a step, an appropriate reset stage (not shown in the figure)

resets the capacitor to OV.

The output tour from the block is given by the equation,

I t2 1ti
tour 12t2 (4-1)
2 I1

We see from the equation above that, the block applies a weight 12/(12 II) to t2

and a weight 11/(I2 1) to t1. This block has a single-ended output.

Without the assumptions made above, different outputs given out by the block

can be summarized in a single equation:

12t2 1t
'2t2 t for tl < t2, 2 > I (4-2a)
toUT Iltl 12t2
lt II
touT, for ti > t2,2 < II (4-2b)
II 2
No output, otherwise (4-2c)

As in the weighted averaging circuit, inputs tl, t2 and output tour are

time-steps and are defined within a frame. When the frame ends, the inputs and

the output steps also end and the circuit is reset. As the next frame starts, the

circuit would be ready to process the next set of inputs ti and t2.

4.2 Weighted Sum Circuit

The circuit shown in Figure 4-2A is again a minor modification of the basic

block shown in Figure 2-1A. We will assume that the capacitor is initially charged

to a voltage VTH, tl < t2, 12 I < I3. As soon as the frame starts (at time tREF),

net current II + 12 I starts to charge the capacitor as shown in Figure 4-2B.

When the first temporal signal enters the block at time ti (where ti is defined

as t1 with respect to reference time tREF) the current source I1 stops charging









the capacitor and net current I2 3 charges the capacitor C. When the second

signal enters the block at time t2 (where t2 is defined as t2 with respect to reference

time tREF), current source 13 discharges the capacitor. A comparator senses the

voltage across the capacitor and outputs a step when the voltage reaches the

threshold voltage VTH. The output of the comparator would contain an unwanted

pulse at the reference time because the positive and negative terminals of the

comparator carry the same voltage VTH. The AND gate connected to the output of

the comparator ensures that the output from the block contains only a step output

at time tour = tour tREF. Once the block outputs a step and the frame ends, an

appropriate reset stage (not shown in the figure) would reset the capacitor voltage

to VTH at reference time tREF.

tour is the time when the output step of the block, makes its transition from
low to high voltage.

tour = ( )ti + (2)t (4-3)
13 13
From the above equation, we observe that the block computes a weighted sum of

the two input time steps occurring at times ti and t2.

An output from the block occurs when


(I1 + 1 13)t + (12 13)(2 1) > 0 (4-4)

Solving Eq. 4-4, we would get


t11+ 12t2 > 13t2 (4-5)

Eq. 4-5 can be interpreted as,

11
t2 > 1ti (46)
12 13

Since tj < t2 was assumed, it follows that 1 > 1 or 13 > 12 I.










If we assume that t2 occurs before ti, we would get an output from the block,

when

(1 + 1)t2 + (I1- ) )(l i2) > 0 (4-7)

Solving Eq. 4-7 gives 13 > I1 2.

VC
CHARGED
BY 1213
I, ( ( 12 CHARGED DISCHARGED
BY \ BY 13
iM2I


(w ilth initial C 1J 1-I
voltage VTJ) v| I
STtREF t t2 OUT t

A) B)

Figure 4-2. Weighted sum circuit. A) Circuit schematic. B) Idealized graph
showing the capacitor's voltage at different time periods.


In both cases, I1 = 2 = I results in


toUT = l + 2 (4 8)


This case corresponds to the sum of two input time steps occurring at tl and t2.

Thus, we see that by controlling the current sources, we achieve two different

functionalities from the block sum and weighted sum.

Without the assumptions made above, different outputs given out by the block

can be summarized in a single equation:

( 1 + (2 for tl < t2,13 > (12 I1) or tl > t2, 3 > (I -( Ta)
13 13
touT = +t 2, for t < t2 or t1> t2, I1 2 = (4-9b)

No output, otherwise (4-9c)

The circuit has a single-ended output; the inputs and outputs occurring at ti,

t2 and tour are defined with respect to a time reference tREF (start of the frame).










4.3 Scalar Multiplication Circuit

By removing the PMOS transistor M1 that controlled current source I,

charging the capacitor, replacing PMOS transistor i[_. by an NMOS transistor i .

and changing the direction of the I2 of the basic block in Figure 2-1A, we obtain a

circuit that can be used for scalar multiplication of a temporal signal entering the

block at time t2 as shown in Figure 4-3A.

VC

CHARGED /\DISCHARGED
BY I BY 1 211


TH
M2 (with initial VT tH
t1 2 _vLoltage VTH) I I
REF t OUT

A) B)

Figure 4-3. Scalar multiplication circuit. A) Circuit schematic. B) Idealized graph
showing the capacitor's voltage at different time periods.


Assuming that the capacitor is initially charged to a voltage VTH, the current

source I, starts to charge the capacitor as soon as the frame starts (at time tREF).

The input step occurs at time t2 where, as above, t2 is defined as t2 with respect

to reference time tREF. The current source 2 I1 starts discharging the capacitor

as shown in Figure 4-3B. When the capacitor voltage reaches VTH, the comparator

outputs a step at time tour. The output of the comparator would also contain an

unwanted pulse at the reference time because the positive and negative terminals

of the comparator would carry the same voltage VTH. The AND gate connected to

the output of the comparator ensures that the output from the block contains only

a step output at time tour. Once the block outputs a step, an appropriate reset

stage (not shown in the figure) would reset the capacitor to VTH at reference time

tREF-






58


The output tour from the block is given by the equation,


tOUT = ( )t2 (4-10)
2 I1

We see from the equation above that, the block multiplies time 2 with a scalar

12/(12 -).

Without the assumptions made above, different outputs given out by the block

can be summarized in a single equation:

( 12
(12 )t2, for 12> 11 (4 lla)
toUT = 2 I1
No output, for 12 < 1 (4-11b)

This block has a single-ended output and the inputs and outputs are defined

with respect to a time reference tREF(the start of the frame).

4.4 Maximum(MAX)/Minimum(MIN) Circuit


I--
ti
tOUT



t2

Figure 4-4. Circuit schematic of MAX circuit




ti
t1--T -

tOUT



t2

Figure 4-5. Circuit schematic of MIN circuit


The MAX and MIN circuits shown in Figures 4-4 and 4-5 support inputs

and outputs that have absolute time as the reference. The output from the MAX









and MIN circuits are single-ended. This block processes two temporal signals -iv,

the time steps occurring at t1 and t2 as shown in the figure, and determines the

max(ti, t2) or min(tl, t2) of the two steps. If the signal was to be represented

using voltages, a complex circuit would be required to compute max(VI, V2) or

min(VI, V2). In time-based analog computation, the circuitry to compute these

functions is straightforward.

The time-mode linear computational circuits we have discussed so far and the

thresholded difference block (to be discussed in C'!i pter 5) can be classified into

different subclasses based on their output style, shown in Table 4-1.

Table 4 1. Classification of Time-mode computational circuits. Relative time
reference implies that the inputs and outputs are defined with respect to
a reference time (start of a frame). Absolute time reference implies that
inputs and outputs are not defined with respect to a reference time.

Output Single-ended Differential
Absolute time reference Weighted Averaging Circuit Thresholded difference
Weighted Subtraction Circuit block of Edge detection
MAX circuit
MIN circuit
Relative time reference Sum circuit
Scalar Multiplication Circuit


So far, we have discussed time-mode computational circuits to perform

computations like weighted average, weighted subtraction, weighted sum, scalar

multiplication, maximum and minimum. In C! Ilpter 6, we will discuss a couple of

applications a time-mode edge detection circuit and a time-mode 3-tap FIR filter.















CHAPTER 5
APPLICATION OF TIME-MODE CIRCUITS

5.1 Time-Mode Edge Detection Circuit

Time-mode circuits provide a seamless interface to the growing number of

time-based sensors which already output compatible timing events [14], [15]. In

this section, an example is given where a time-mode edge detector is developed to

directly interface to the output of a time-to-first spike imager [14].



Image





Profile of a
horizontal line



First derivative


SSecond derivative



Figure 5-1. Edge detection by derivative operators


5.1.1 Basic Formulation

Edge detection in image processing has been studied for many years and is

well understood [23]. An edge is the boundary between two regions with relatively

distinct grv i-k-v. properties. In all the discussions below, we assume that the









regions in question are sufficiently homogeneous so that the transition between two

regions can be determined on the basis of gray-level discontinuities alone.

Traditionally, the idea underlying most edge-detection techniques is the

computation of the local derivative operator. This concept is illustrated in

Figure 5-1. The figure shows a synthetic image of a light object on a dark

background, the gr iv-k-1 profile along a horizontal scan line of the image,

and the first and second derivatives of the profile. We note from the profile that

an edge (transition from dark to light) is modeled as a ramp, rather than as an

abrupt change of gray level. The first derivative of an edge modeled in this manner

is 0 in all regions of constant gray level, and assumes a constant value during a

gray-level transition. The second derivative, on the other hand, is 0 in all locations,

except at the onset and termination of a gray-level transition. Based on these

remarks, it is evident that the magnitude of the first derivative can be used to

detect the presence of an edge, while the sign of the second derivative can be used

to determine whether an edge pixel lies on the dark (background) or light (object)

side of an edge. The sign of the second derivative in Figure 5-1 for example, is

positive for pixels lying on the dark side of both the leading and trailing edges of

the object, while the sign is negative for pixels on the light side of these edges.

Although the discussion thus far has been limited to a one-dimensional horizontal

profile, a similar argument applies to an edge of any orientation in an image.

In this chapter, we will discuss the design of a time-mode edge detector

that performs a first derivative operation on the pixel outputs through a novel

time-mode thresholded differencing block to detect both the presence and the sign

of the edges. Significant changes in scene illuminance are typically detected with a

spatial derivative operation following a spatial smoothing process that reduces high

frequency noise. Figure 5-2 shows the basic data flow in the proposed time-based

edge detection scheme. Initially the time steps corresponding to pixel intensities










are smoothed. Next, the smoothed time steps are fed to a thresholded differencing

block that finds the difference between the input steps and thresholds the result.

The output of the thresholded derivative block can either be positive or negative

implying a positive or negative edge between pixels.


Figure 5-2. Data flow in time-mode edge detection


5.1.2 Smoothing

We have previously fabricated a time-to-first spike C'\ IOS imager in our lab

[24],[14]. This imager provides output steps whose timing encodes illumination

information at each pixel. These spatial information must be smoothed to eliminate

noise in the image as well as noise introduced by the electronics.


Step (plxel 1)


t3
Step (plxel 3)


SMOOTHED STEP
SMOOTHED STEP


C VTH


Figure 5-3. Circuit to smooth pixel intensities


Figure 5-3 shows a circuit that could be used to perform smoothing of these

pixel intensities. We implement a standard convolution mask with weights of 1-2-1









by appropriately scaling the current source values. Since the circuit shown in

Figure 5-3 is a special case of the weighted averaging circuit explained in ('!i Ilter

2, we can easily derive the smoothing block's output expressed below:

t' + 2t2 + t3 CVTH
touT = + (5-1)
4 41

5.1.3 Thresholded Difference

The threshold difference block performs a spatial first derivative operation on

the smoothing circuit's outputs. By replacing one PMOS transistor by an NMOS

transistor and changing the direction of the corresponding current source in the

time-mode weighted averaging circuit, we obtain a circuit that can be used to

obtain thresholded differences of steps shown in Figure 5-4. There are two cases to

be considered assuming that Vc is initially reset to a midrange voltage:

* One of the smoothed steps enters the thresholded difference block first, starts
to linearly charge (or discharge) the capacitor until it hits the positive (or
negative) threshold VTH (or -VTH) before the second smoothed step enters the
block. Here, we have a step from the positive (or negative) output of the block
at time
toUT = ti + (5-2)
I
The threshold implemented by this block is CVTH/I. This threshold value can
be programmed by choosing desired values for VTH and I.

* The two smoothed step inputs arrive within the threshold time CVTH/I. Since
the positive and negative current sources exactly cancel one other, no step
is generated from either the positive or negative output indicating no edge
between pixels. Mismatches between the two current sources will eventually
cause one of the outputs to fire, but at a time much longer than the frame
time of the system.

If the thresholded difference block fires an output, we can know the presence

of edges between .,li i: ent pixels. Also, depending on whether we get positive

output or negative output we can infer the sign of the edges. That is, a positive

output implies that pixel 1 is brighter than pixel 2. Thus, from the outputs of the











Smoothed Step
(plxel 1)

J-7>


POS I IVE U I PUI FROM
THRESHOLD DERVIATIVE
BLOCK


Smoothed Step
(plxel 2)


BLOCK


-VTH

Figure 5-4. Circuit used to obtain thresholded differences on the smoothed steps


threshold differentiation block (that performs a spatial first derivative operation),

we can detect both the presence and the sign of the edges.

5.1.4 Results

Using the time-mode edge detection concepts explained above, we processed

a noisy JPEG image to detect edges. The whole operation is completed within

3 frames. The frames are defined by the imaging process typically 30ms. The

MATLAB simulation results are shown in Figure 5-5. In the first frame, we

converted the pixel magnitude information (between 0 and 255) of each pixel to

timing information using reverse coding. A bright pixel would fire earlier compared

to a dark pixel, that is, with respect to the frame the bright pixel would have a

smaller temporal amplitude compared to a dark pixel. In the second frame, we

remove the spurious noise in the image by using time-mode smoothing circuits.

After smoothing, we perform the spatial first derivative operation by running the

smoothing block's outputs through time-mode thresholded difference blocks in the

third frame.

For better understanding, let us restrict our analysis to 16 pixels. The original

noisy image, smoothed image and the detected edges are shown in Figure 5-6. The

noisy original image and the smoothed image are shown in dotted lines and solid









lines respectively. The edges detected are shown special characters in the figure.

From the results shown, we can infer that the time-based edge detection method is

extremely accurate.

For these 16 pixels, Figure 5-7 shows the Cadence simulation outputs from

different stages in the time-based edge detection process. The length of the frame

and the threshold we chose for the thresholded difference block are 30ms and 15ms

respectively. In the figure, the original image is shown followed by the temporal

signals output by the imager. It is followed by the outputs of the smoothing

and thresholded difference blocks. The edge detection circuits needs 3 frames to

complete their operations. The final results indicate that only three edges were

detected to be above the threshold. The power consumed by the edge detection

circuits for these 16 pixels was in the order to 35/W.






66





































; : / :







Figure 5-5. MATLAB simulation results showing the original image, smoothed
image and the detected edges of an image























Time-based Edge Detection

Original Imag
Smoothed Imr
Edges obtainE






















-****************** :* **>>********#******* ***********
'. 'I, .. "I.I


e
age
ed


Pixel


Figure 5-6.


Simulation results showing the original image, smoothed image and
the detected edges of a 16 pixel image


200


100


































































A *


/


(Il
a-



IZ
C- C

uL




1



C)




0
I
O



[7F'7HIll1HHF]FThiF]F]F2F~~iz


I :

~rT

ITi






rT


. ..r .r .l ..


,,

,,


I .AL ,,.









5.1.5 Discussion

The length of the frame that governs the operation of the time-mode edge

detection circuit has a very important tradeoff. If we opt for longer frames, the

DR of inputs that can be processed by the edge detection circuits is large. With

short frames, the speed of the entire edge detection operation is increased and the

leakage currents of the transistors in the thresholded difference block won't cause

erroneous outputs.

From Eq. 5-2, we can easily infer that by controlling C, VTH or I we can

program the desired threshold in the thresholded difference block. But, once a edge

detection chip is designed, it is tough to vary the value of C. Therefore, to vary the

threshold, we should either tune VTH or I off-chip.

5.2 3-Tap 1-Quadrant Time-Mode Finite Impulse Response Filter

FIR realization for a N-tap FIR filter follows directly from the convolution sum

relationship written in the form:

N-1
y(n)= w(k)x(n k) (5-3)
k-0

For a 3-tap filter,
2
y(n) = w(k)x(n k) = w(O)x(n) + w(1)x(n 1) + w(2)x(n 2) (5-4)
k-0

From Eq. 5-4, we see that to compute the n-th sample of the output of a 3-tap

FIR filter, we need the current input x(n) and two previous inputs x(n 1) and

x(n 2). For example, the output at the 3rd sampling period is given by,


y(3T) = w(0)x(3T) + w(1)x(2T) + w(2)x(1T) (5-5)


If the input and output at the 3rd sampling period are represented in time by

tfI and OUfT respectively, then we can implement a time-mode FIR filter if we can









implement,

tUT = w(O)t + w(l)t + w(2)tTN (5-6)

From Eq. 5-6, we see that we would need inputs tfT and tTN other than t4T to

obtain tOjT. To do this, we can either

* delay t2T by one sampling period and tN by two sampling periods, or

store t2T for one sampling period and tT for sampling periods,

so that these inputs would be available during the sampling period 3T when

the computation shown in Eq. 5-6 is to be performed.

When the information is in time, delaying that information (information is

encoded in the rising edge of a time step referenced to the start of a frame) would

involve converting the time information to voltage and then converting that voltage

back to time (information again is a time step but referenced to a new frame)

using analog components. Since we are considering the implementation of a 3-tap

FIR filter, we would need two delay stages. Since the delay stages involve analog

components like current sources and capacitors that have matching constraints,

we might end up with inaccurate d4-1i- that might lead to erroneous outputs.

Therefore, the better option would be store the information over various sampling

periods. Since, we have not yet come up with the circuit that would store time

information directly in time, we convert the time information to voltage and store

it on a capacitor.

5.2.1 Finite Impulse Response Computation in Time

The circuit shown in Figure 5-8 is similar to the prototype time-mode

weighted average circuit except that this figure also shows the reset functionality.

Three inputs that enter this block are

1. train of frames these act as reference for the input and output steps.


2. train of input steps.


















CHIP
RESET



FRAME
INPUT

SIGNAL
INPUT


FRAME


IN1I


IN2


NEG IN


COMPUTATION
RESET

OUT








CHIP
RESET
VT


COMPUTATION
RESET


41


OUT

toUT


Figure 5-8. Computational block to be used in the FIR filter










3. chip reset.

Lets postpone the discussion of the input processing that should be done to

the two input trains to generate signals IN1, IN2, IN3, NEG_IN and COMPUTATION

RESET to the next section. These signals are the inputs to the computational

block shown in Figure 5-8. Before any of the input trains enter the system, the

chip reset signal would reset the capacitor's voltage to VTH. As the first frame

starts, IN1 generated by the input processing block turns on the switch M1 for a

period t1. This let's the current source I1 charge the capacitance C for the period

t1 as shown in Figure 5-9.


Charged by I I
current I,2


Charged by
current I
II II
VTH----- ---------------
II I I



ItFRAME I 2tFRAME I 3tFRAME
I II

t I I t

CHIP RESET

Figure 5-9. Voltage across the computational blo



The voltage across the capacitor is given by,


ltl
V = VTH +
c


Discharged by
current Ia


Time


tOUT

ck's capacitor at various times


(5-7)


The capacitor in this block performs two functionalities simultaneously:









* input tl is stored as voltage until the computation ends (at the end of the
fourth frame) to facilitate the FIR type computation (assuming that the
capacitor has minimal or no leakage).

* a weight of 1 is applied to the input t1 (though that weight is not the final
weight applied to the input).

After the second frame starts, IN2 turns on the switch if[. causing I2 to charge

the capacitance C for a period t2. The new voltage across the capacitor is given by,

V2 lt I2t2 8)
Vj VTH + + (58)


Now, the capacitor is holding both inputs ti, t2 and has applied weights 'I and 2

respectively. When the third frame starts, IN3 turns on the switch if. causing I3

to charge the capacitance C for a period t3. Now, the capacitor holds inputs ti,

2, t3 and has applies weights 1, 2 and I respectively as shown by the capacitor

voltage Eq. 5-9.
Vj3 V 1 12t2 1t3 (
Vc = VTH + + + (5-9)
C C C

As frame 4 starts, the signal NEG_IN turns on switch M4 and the current 14 starts

to discharge the capacitance C. With the voltage across the capacitance being

continuously monitored by the comparator, voltage across the capacitance slowly

decreases as 14 discharges it and when the voltage reaches VTH the comparator fires

a step output. The rising time of this output step referenced to the fourth frame

gives the desired output tour.

C(V VTH)
toUT
I4
C( )
14
+ +12t2 13 (5-10)
14 14 4

From Eq. 5-10, we see that the computational block applies weights 1, 1 and

13 to signals tl, t2 and t3 and sums them together. After the block performs this
I4









computation, the capacitor voltage is reset to VTH by the computation reset signal

generated by the input processing block.

We made the following basic assumptions to arrive at the above result:

* The inputs tl, t2 and t3 do not saturate the capacitance C.

* Frame 4's ON period is large enough to discharge the capacitance C (until the
voltage across the capacitance reaches VTH) and produce the output tour.

Since, ti, t2, t3 and tour are defined with frames 1,2,3 and 4 as reference

respectively, we can write Eq. 5-10 as,

4T I1T +12 2T 13 3T
tout ()t +( 2)t +( )t3f (511)
74 1 14 4

As mentioned in the assumptions above, the ON period of frame 4 should be large

enough atleast to produce an output at time tour. Therefore, t'ONe tOUT

Assuming that the OFF period of the frame where the capacitor is reset to VTH

is extremely small, tframe tour. Therefore, the minimum possible frame length

tour and the maximum possible sampling speed =
If the Eq. 5-11 can be interpreted in terms of samples then,

II /2 I3
toUT(4) = )tl(1) + ( )t(2) + ( )tl(3) (5-12)
14 14 14

Comparing Eq. 5-12 with the conventional 3-tap FIR equation shown below,


y(3) = w(2)x(1) + w(1)x(2) + w(0)x(3) (5-13)

we see that tour has an extra sample delay when compared to the conventional

FIR output. In other words, the FIR filter's computation block has an extra pole

at the origin as compared to the conventional FIR filter.

5.2.2 3-Tap 1-Quadrant Time-Mode FIR Filter Architecture

The main functional block of the 3-tap 1-quadrant time-mode FIR filter

architecture is the computational block shown in Figure 5-8. Let's -i- that









the computational block processes inputs tIN(1) referenced to frame 1, tIN(2)

referenced to frame 2, tIN(3) referenced to frame 3 and produces an output toUT(4)

referenced to frame 4. The computational block gets ready to process the next set

of inputs only at the end of frame 4 where the capacitor is reset to VTH. The next

output this block would produce is touT(8) processing tIN(5), tIN(6) and tIN(7).

Since this block cannot produce the intermediate outputs touT(5), touT(6) and

toUT(7), we would need three more computational blocks to produce those outputs.
Therefore, the 3-tap FIR filter would need in total, four computational blocks to

continuously process the input time signals. In general, for a N-tap FIR filter, we

would need N+1 computational blocks to construct the FIR filter.

The complete architecture of a 3-tap time-mode FIR filter is shown in

Figure 5-10. The FIR filter block needs the same 3 inputs as the computational

block a chip reset, a train of frames and a train of time steps as shown in

Figure 5-12. Every input step (example, tl) in the train of time steps is defined

with respect to a frame (example, frame 1) in the train of frames as shown in

Figure 5-12. The trains of frames and time steps are fed to a input conditioning

block. The architecture of the input conditioning block is shown in Figure 5-11.

The input conditioning block performs the following functions:

* the train of frames and input steps that enter the filter are decoded onto
different lines so that they can be fed to the various computational blocks'
inputs.

* generates the necessary charging/discharging pulses for the computational
blocks.

* generates the reset pulses necessary to reset the capacitors of the computational
blocks to their initial voltage VTH.

Each computational block needs 3 inputs in different lines because we are

designing a 3-tap FIR filter. Also, since there are four computational blocks that

process the following different sets of inputs (t1,2,t3), (t2,t3,t4), (3,t4,t) and
























SIG_IN1 -
SIG IN2 -
SIG IN3 -
NEGIN1 -
CHIP RESET
RESET IN1


SIGIN3 -


SIG IN4-
SIG IN2 -
SIG IN3 -
SIG IN5 SIG IN4-
NEGIN2-
SIG IN6 CHIP RESET-
RESET IN -


NEG IN1


NEG IN2


RESET IN1


RESET IN2


INPUT CONDITIONING
BLOCK


SIG IN3 -
SIG_IN4
SIG IN5 -
NEG IN3 -
CHIP_RESET-
RESET IN3 -






SIG IN4 -
SIG IN5 -
SIG IN6 -
NEG IN4 -
CHIP RESET -
RESET IN4 -


COMPUTATION BLOCK 1

tl

t4
4 tour
CHIP RESET
COMPUTATION
RESET


COMPUTATION BLOCK 2


t,
t2


CHIP RESET
COMPUTATION
RESET


COMPUTATION BLOCK 3


t,
t2


CHIP RESET
COMPUTATION
RESET


COMPUTATION BLOCK 4

tl
t2
ts tOUT


CHIP RESET
COMPUTATION
RESET


Figure 5-10. 3-tap time-mode FIR filter architecture


FRAME
INPUT












SIGNAL
INPUT


FIR OUTPUT


4 INPUT
-OR- GATE


CHIP RESET














FRAME SIGIN1
INPUT 2-bit QO 24 SIGIN2
SIGNAL CLK Counter Q1 Decoder SIG_IN3
INPUT
IN


Q- SIGIN4
3-bit 1 3-8 SIG_IN5
CLK Counter Decoder SIG_IN6
Q2

(counts only
3, 4, 5)

Q- NEG IN1
FRAME 3-bit QI -- NEG IN2
INPUT NEG IN3
INPUT Counter Decoder NEG IN4

(counts only
3,4, 5, 6)


NEGIN1 RESET ]NI


NEGN2 ---RESETIN2


NEG_IN3 _
EG IN3 RESET_IN3


NEGCIN4 L RESETIN4


Figure 5-11. The architecture of the input conditioning block







78




(t4,t5,t6) that is, at every sample (frame), we would need 6 inputs in 6 different

lines for the 4 computational blocks. To keep moving these inputs at different

input lines during every frame, we have used 2 counters a 2-bit counter and a

3-bit counter (that counts between 3 and 5) followed by decoders. Similarly, since

we need the frames to discharge the capacitances of the computational blocks,

we have a 3-bit counter followed by a decoder to decode the frame train onto 4

different lines.

FRAME Frame 1 Frame 2 Frame 3 Frame 4 rame 5 Frame 6 Frame 7
INPUT

SIGNAL
INPUT

tl t2 tt3 ( to

SIG_IN1
tl ts -



SIG IN3

SIG IN4


FRAME SIG IN5

SIG INB t
Frame 4
NEG_IN1


FramFramee 5


SIGNAL Frame
INPUT NEG IN4


RESET IN1

RESETIN2

RESET IN3

RESETIN4 _

INPUT CONDITIONING
BLOCK

Figure 5-12. 3-tap FIR filter's input, digital preconditioning block and its outputs









The architecture shown is for a 1-quadrant FIR filter. That is, it can only

process positive inputs and apply positive weights to those inputs. By adding extra

circuitry, we can extend this architecture to process both positive and negative

inputs and apply both positive and negative weights to those inputs.

5.2.3 Step-by-Step Description of the Functionality

1. Figure 5-13 describes the state of the computational blocks as input tl enters
the blocks. At sampling instant tFRAME, we can see only the capacitance of
the computational block C1 being charged by current II.

2. As input ta enters the blocks at sampling instant 2tFRAME ,
I2 charges capacitor C1, and,
1i charges capacitor C2 of computational block 2,
as shown in Figure 5-14.

3. As input ts enters the blocks at sampling instant 3tFRAME as shown in
Figure 5-15,
Is charges capacitor C1 of computational block 1,
I2 charges capacitor C2 of computational block 2, and
II charges capacitor C3 of computational block 3,

4. At sampling instant 4tFRAME as frame 4 and input t4 enter,
frame 4 charges capacitor C1,
I3 charges capacitor C2, and,
I2 charges capacitor C3
as shown in Figure 5-16.

5. As frame 4 is about to finish as shown in Figure 5-17,
capacitor C1 is reset to VTH and it is ready for frame 5 and input ts,
voltage of capacitor C2 stays a constant, and,
voltage of capacitor C3 stays a constant,

5.3 Simulation Results

To test the filter functionality of the circuit shown in Figure 5-10, we chose the

following values for the current sources: II = 302nA, I2 = 400nA, 3 = 302nA and

14 = lpA with C=5pF and VTH = 2.5V (for a supply voltage of 5V). The weights


applied to inputs become I'
14


.302, 2- .4, = .302.
14 14


























touT


Vcl



OtCarged by
I current I1
FRAME
I I Time

SIG IN1


tow















tOUT
















tout


RESET


Figure 5-13. State of the FIR filter as input tl enters


















JL J L 1 2 I' Vc1 Charged by
SIGIN -> ->Acurrent 12
M sIGN2 SIG_IN3
RESET

c ,E M'-trRAM A A'-ME B
VTHTi








S SIG IN3 SIG IN4
CHIP / __-

R ES T V arged by
IEG I current I,
RESETN / J- Time
VT SISIGINN2








IGIN M S>G_

SIG IN4 SIG IN5

CHIP
RESET --
RN3 V 17-arged by












VTH lEG IN3
3j M44 RESET IN
VTH


11( 12





SIG_ N I >2 3 M,
SIG IN5 SG IN6




RESET IN


Figure 5-14. State of the FIR filter as input t2 enters



















n I n nCharged by



H I
VIi cu rret I


CIHI 1 I Iime
SSIIG N3


RT Z I ~ I. 93 -jv Charged by
SIG IN2 SIG IN3



4 tFAME FRAME tIF
RESETIN






VTHTime






SII _IN





CHIP
SV, Charged by








SIG I current 1U
ESIGIN3 SIG IN4



V H FRAME 3 FRAME






RESET I Time

VH S S IGIN3
S- IN SIGl IN5

RESET E IVTarged by
V7H ^ 1EG IN3 ~-(1 1hrrent 1,
-T VTM4 13t 4

RESETIN I Time
VTH LeJ SIGJIN3



Al ) I, A 12 J l1 a
SIG JNI>.l M,
SIG IN5 SISJN6
CHIP
RESET JEG-IN4 VTH


RESET IN4 T C


Figure 5-15. State of the FIR filter as input ts enters




















b ,1,, lX- I, Ve
SIGIN M I







ICharged by
RESET current I \




H IP IN 4 |_I
VT_ NEGIN1

EtFRAME FRAME tFRAM
SGI NXM, _>L vC2

RESETI -I -

R I EG V3tFRAME FRAME FRi



















1 R I cuIrrent I1
RESETI 1I Time
SJSIG> MN4
SIG IN4 \ SIG IN5
RESET









Figure 5 State of the FIR filter s input er the system and with frame 4



dish in computational block 1
RESET CHarged by
u t-- ^ current I

RESETIN TL 1 Time



Figure 5-16. State of the FIR filter as input t4 enters the system and with frame 4
discharging computational block 1































































tnUT







tour







>OlT


RESET


tf E IRAME 4tFAME 4tFRME Tme






Vc2






2tFRAME FRAME 4tFRAME

Time


Vc3






3tFRAME 4tFRAME
Time






V04






4tFRAME

Time


Figure 5-17. State of the FIR filter before frame 5 starts


RESETII









CF
RE;



RESET


IuT









The output of the computational block was previously derived as,


touT(4) ( 7)tN(1) + (2)t(2)+ (3)tN(3) (5-14)

The general expression for this output can be written as,

II 12 3
touT(n) = (-)tIN(n 3) + ()tr(n 2) + (N)tlN(n 1) (5-15)
14 14 14

Taking z-transform of this output, we would get

II I2
touT(z) = ()tiNN(z)z-3 + ItN( -2 + )NtiN(z2-1
tourT() II -3 2 2 13 1
O Z) ( )z-3 + (2) + ()z-
ti N (z) 14 4 4
H(z) = ()z-3 (2)-2 +()Z-1 (516)
14 14 14

Substituting the weights in Eq. 5-16 we get,

H(z) = 0.302z-3 + 0.4z-2 + 0.302z-1 (5-17)


The poles and zeros of this FIR filter are shown in Figure 5-18. The sampling

frequency chosen for the simulations is 100KHz. The FIR filter's magnitude

response and phase response are shown in Figures 5-19 and 5-20 respectively.

From the plots, we see that the choice of coefficients II = 60.4nA, 2 = 80nA,

I3 = 60.4nA and 14 = 100nA has tuned the FIR filter to function as a low pass

filter with a cut-off frequency of t 10KHz, stop-band attenuation of a 20dB and

a passband attenuation of t ldB. Similarly, by choosing different values (either

positive or negative) we can come up with high pass, band pass and notch filters.

It is important to note that the architecture shown in Figure 5-10 can handle only

positive currents. If negative currents are to be handled, the circuit architecture

would have to be altered.












Pole/Zero Plot
Real Part: -0.6607202
Imaginary Part: 0.7506323
.. ..... ..


-q


C0


-1 -0.5


0
Real Part


1 1.5


Figure 5-18.


Pole-zero plots of the FIR filter


Magnitude Response (dB)


-20

-40

-60


-80

-100
0 10


Figure 5-19: Time-mode FIR
kHz)


20 30 40
Frequency (kHz)


filter's magnitude response (sampling freq = 100


0.5


-r


a


-C 5


-1


-1.5





''''''''


. .. . .


. . .