• TABLE OF CONTENTS
HIDE
 Front Cover
 Acknowledgement
 Abstract
 Introduction
 A nonlinear indefinite admittance...
 Equivalent-circuit model for the...
 Steady-state MOSFET theory merging...
 Functional dependencies for the...
 Scope and future work
 Appendices
 References
 Biographical sketch
 Back Cover














Title: Equivalent-circuit modeling of the large-signal transient response of four-terminal MOS field effect transistors /
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 Material Information
Title: Equivalent-circuit modeling of the large-signal transient response of four-terminal MOS field effect transistors /
Physical Description: vii, 132 leaves : ill. ; 28 cm.
Language: English
Creator: Arreola, José Ignacio, 1950-
Publication Date: 1978
Copyright Date: 1978
 Subjects
Subject: Field-effect transistors   ( lcsh )
Electrical Engineering thesis Ph. D
Dissertations, Academic -- Electrical Engineering -- UF
Genre: bibliography   ( marcgt )
non-fiction   ( marcgt )
 Notes
Thesis: Thesis--University of Florida.
Bibliography: Bibliography: leaves 128-131.
Statement of Responsibility: by José Ignacio Arreola.
General Note: Typescript.
General Note: Vita.
 Record Information
Bibliographic ID: UF00098282
Volume ID: VID00001
Source Institution: University of Florida
Holding Location: University of Florida
Rights Management: All rights reserved by the source institution and holding location.
Resource Identifier: alephbibnum - 000207602
oclc - 04075260
notis - AAX4400

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Table of Contents
    Front Cover
        Page i
        Page ii
    Acknowledgement
        Page iii
        Page iv
        Page v
        Page vi
    Abstract
        Page vii
    Introduction
        Page 1
        Page 2
        Page 3
    A nonlinear indefinite admittance matrix for modeling electronic devices
        Page 4
        Page 5
        Page 6
        Page 7
        Page 8
        Page 9
        Page 10
        Page 11
        Page 12
        Page 13
        Page 14
        Page 15
    Equivalent-circuit model for the four-terminal MOSFET
        Page 16
        Page 17
        Page 18
        Page 19
        Page 20
        Page 21
        Page 22
        Page 23
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        Page 25
        Page 26
        Page 27
        Page 28
        Page 29
        Page 30
        Page 31
        Page 32
        Page 33
        Page 34
        Page 35
        Page 36
        Page 37
    Steady-state MOSFET theory merging weak, moderate and strong inversion
        Page 38
        Page 39
        Page 40
        Page 41
        Page 42
        Page 43
        Page 44
        Page 45
        Page 46
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        Page 69
        Page 70
        Page 71
        Page 72
        Page 73
        Page 74
        Page 75
    Functional dependencies for the elements in the four-terminal equivalent-circuit
        Page 76
        Page 77
        Page 78
        Page 79
        Page 80
        Page 81
        Page 82
        Page 83
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        Page 91
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        Page 103
        Page 104
        Page 105
        Page 106
        Page 107
        Page 108
        Page 109
        Page 110
    Scope and future work
        Page 111
        Page 112
        Page 113
        Page 114
    Appendices
        Page 115
        Page 116
        Page 117
        Page 118
        Page 119
        Page 120
        Page 121
        Page 122
        Page 123
        Page 124
        Page 125
        Page 126
        Page 127
    References
        Page 128
        Page 129
        Page 130
        Page 131
    Biographical sketch
        Page 132
        Page 133
        Page 134
    Back Cover
        Page 135
Full Text
















EQUIVALENT-CIRCUIT MODELING OF THE
LARGE-SIGNAL TRANSIENT RESPONSE
OF FOUR-TERMINAL MOS FIELD EFFECT TRANSISTORS










By

JOSE IGNACIO ARREOLA


A DISSERTATION PRESENTED TO THE GRADUATE COUNCIL OF
THE UNIVERSITY OF FLORIDA
IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE
DEGREE OF DOCTOR OF PHILOSOPHY










UNIVERSITY OF FLORIDA


1978



































-to
IGNACIO
and
CELIA,
my pva-ent















ACKNOWLEDGMENTS


I am deeply indebted to Prof. Fredrik A. Lindholm

for his contribution to this work and for his continued

guidance, support and encouragement. I also wish to

thank Dr. D. R. MacQuigg for his help in doing experimental

measurements and for many interesting discussions. I would

like to express my appreciation to Prof. A. D. Sutherland

for allowing me to study the results of his two-dimen-

sional calculations which broadened my understanding of the

MOSFET.

The financial support of Consejo Nacional de Ciencia

y Tecnologia (Mexico) throughout this work is gratefully

acknowledged. I must also thank Mrs. Vita Zamorano for her

careful typing of the manuscript. Finally, I owe a special

debt of gratidude to my wife, Patricia, for her forbearance

and encouragement.


iii
















TABLE OF CONTENTS

Page

ACKNOWLEDGMENTS . . . . . . . . . . iii

ABSTRACT . . .. . . . . . . . . vii

CHAPTER

I INTRODUCTION . . . . . . . . 1

II A NONLINEAR INDEFINITE ADMITTANCE MATRIX FOR
MODELING ELECTRONIC DEVICES . . . . 4

2.1 Introduction . . . . . . 4
2.2 Indefinite Admittance Matrix . . . 5
2.3 Extension for Nonlinear Electronic Devices 7
2.4 Conclusions . . .. . . . 13

III EQUIVALENT-CIRCUIT MODEL FOR THE FOUR-TERMINAL
MOSFET . . . . . . . . . 16

3.1 Examples of Engineering Needs for a Model
for the Large-Signal Transient Response 16
3.1.1 Reasons for the Poor Modeling of
the Transient Substrate Current by
Existing MOSFET Models . . .. 17
3.2 Problems Involved in Modeling of Four
Terminals Devices . . . . .... 19
3.3 Equivalent-Circuit for the Intrinsic
MOSFET .. . . . . . . . 23
3.3.1 Transport Current . .. ... 23
3.3.2 Charging Currents . . . .. 24
3.4 Special Considerations . . .. . 29
3.5 Modeling of the Extrinsic Components .34
3.6 Relation to Existing Models . . ... .35

IV STEADY-STATE MOSFET THEORY MERGING WEAK,
MODERATE AND STRONG INVERSION . .. . 38

4.1 Introduction . .. . . . . 38
4.2 Fundamentals . . . . . . .. 40

4.2.1 Drain Current . . . . . 40
4.2.2 Charge Components . . . .. 42
4.2.3 Surface Potential . . . . 47









CHAPTER


IV (continued)


4.3 Drain Current and Charge Components in a
Model Merging Weak, Moderate and Strong
Inversion . . . . . . . . 51

4.3.1 Drain Current . . . 51
4.3.2 Charge Components . . . .. 57
4.3.3 Limits for the Strong, Weak, and
Moderately Inverted Portions of
the Channel . . . .. .. . 59

4.4 Results and Evaluation of the Model . 62
4.5 Conclusions . . . . . . . 74

V FUNCTIONAL DEPENDENCIES FOR THE ELEMENTS IN THE
FOUR-TERIINAL EQUIVALENT-CIRCUIT . . .. 76


5.1
5.2
5.3


Introduction . . . . . . .
Source-Drain Current Source . . . .
Capacitances . . . . . . .
5.3.1 Expression for the Capacitances
5.3.2 Physical Interpretation of the
Results for the Capacitances .
5.3.3 An Engineering Approximation for
the Functional Dependencies of the
Intrinsic Substrate Capacitances
C and CDB
SB. DB
5.3.4 Engineering Importance of the In-
trinsic Substrate Capacitances CS
and CDB . . . . .


5.4 Transcapacitors . . . . .
5.4.1 Expressions for the Trans-


capacitors . . . . .
5.4.2 Engineering Importance of the
Transcapacitance Elements .
5.4.3 Transcapacitances in a Three-
Terminal Equivalent-Circuit
5.5 Conclusions . . . . . . .

VI SCOPE AND FUTURE WORK . . . . .

APPENDIX

A PROPERTIES OF QUASI-FERMI POTENTIALS . .

B APPROXIMATED EXPRESSION FOR THE DIFFUSION/
DRIFT RATIO IN THE MOSFET . . . .

C COMPUTER SUBPROGRAM TO CALCULATE THE VALUE
THE ELEMENTS IN THE EQUIVALENT-CIRCUIT .


97


. . 98


S 98

S 00

S 106
S. 109

. 111


S. 115


S. 119

OF
. 123


Page










Page


LIST OF REFERENCES . . . .

BIOGRAPHICAL SKETCH . . .


. 128

. 132









Abstract of Dissertation Presented to the Graduate Council
of the University of Florida
in Partial Fulfillment of the Requirements
for the Degree of Doctor of Philosophy



EQUIVALENT-CIRCUIT MODELING OF THE
LARGE-SIGNAL TRANSIENT RESPONSE
OF FOUR-TERMINAL MOS FIELD EFFECT TRANSISTORS

By

Jose Ignacio Arreola

March 1978

Chairman: Fredrik A. Lindholm
Major Department: Electrical Engineering

An approach is proposed that yields equivalent-circuit

models for the large-signal transient response for all

electronic devices described by charge-control. The ap-

proach is applied to derive an improved equivalent-circuit

model for the four-terminal MOSFET. It is suggested that

the model proposed gives a better description of the physics

internal to the device than was previously available.

A static characterization of current and charges in

the MOSFET is also proposed that unifies the descriptions

of the weak, moderate and strong inversion modes of opera-

tion. Predictions of this characterization agree better with

experimental results than previous work of similar complexity.

The static characterization of current and charges is used

to derive functional dependencies for the equivalent-circuit

components in terms of applied voltages and physical make-up

of the MOSFET.


vii















CHAPTER I

INTRODUCTION



Computer simulations of MOSFET digital circuits can

disagree severely with measured performance. A particular

case of such a disagreement, which results in suboptimal

circuit design, is the poor simulation of transient cur-

rents flowing in a substrate terminal of MOS field effect

transistors [1]. The sources of such disagreements are

either in the computer programs in use or in the inadequacies

of existing large-signal equivalent-circuit models for the

four-terminal MOSFET.

The purpose of this dissertation is to derive an im-

proved equivalent-circuit model for the four-terminal MOSFET.

Improvements are made in the following aspects of the

equivalent-circuit model:

(a) the representation of capacitive effects in a four-

terminal device;

(b) the characterization of the dc steady-state

currents and charges;

(c) the inclusion, in principle, of two- and three-

dimensional effects present, for example, in

short-channel MOSFETs.









As will be seen, all of these improvements are inter-

related and result from basing the derivation of the

equivalent-circuit model on the internal physics that deter-

mines the operation of the MOSFET.

We begin in Chapter III by proposing an approach that

yields equivalent-circuit models for the large-signal

transient response of all electronic devices described by

charge control [2-4]. The relation of this approach to

the indefinite admittance matrix of circuit theory offers

advantages in the modeling of devices having more than three

terminals.

Chapter III starts by discussing the problems arising

from the four-terminal nature of the MOSFET. Such problems

were apparently not previously recognized. For the in-

trinsic part of the device (see Fig. 3.1), we apply the

systematic approach developed in Chapter II. This approach,

whose power is emphasized because of the four terminals of

the MOSFET, yields a general description of the device that

offers improvements (a) and (c) listed earlier.

To define fully the equivalent-circuit model of Chapter

III, one needs a suitable description of the dc steady-state

behavior. Extensive work has been done in the past to

characterize operation in the dc steady-state; however, none

of this work is completely suitable for the purposes of

equivalent-circuit modeling. In Chapter IV, a new model for

the dc steady-state behavior is derived that unifies the

description of the full range of operation of the device -









from weak to strong inversion and from cut-off to saturation.

The model avoids discontinuities in the characteristics

present in all previous characterizations of similar com-

plexity, and shows good agreement with experimental results.

The new model also improves the characterization of the

charges in the device.

In Chapter V we derive, using the results of Chapter IV,

the functional dependence of each circuit element in the

equivalent-circuit developed in Chapter III. In Chapter V

we also assess the engineering importance of the improvements

introduced in the equivalent-circuit model for the MOSFET and

propose possible simplifications of the model.

Chapter VI treats possibilities for future research.
















CHAPTER II

A NONLINEAR INDEFINITE ADMITTANCE MATRIX
FOR MODELING ELECTRONIC DEVICES



2.1 Introduction


This chapter describes a new approach for developing

equivalent-circuit models of electronic devices. The

models developed by this approach represent the large-

signal (hence nonlinear) response to transient excitation.

The approach applies to all devices whose operation is

described by the principles of charge control [2-z], in-

cluding, therefore, field effect transistors of various

kinds, bipolar transistors, and certain electron tubes.

The models yielded by the approach are compact, com-

posed of few circuit elements. As a result of their com-

pactness, the models are meant to be useful in the computer-

aided analysis of electronic circuits. This intended use

contrasts with that intended for equivalent-circuit models

[5] containing many circuit elements, which pertain chiefly

to detailed studies of the physics underlying electronic-

device behavior.

The approach to be described applies independently of

the number of device terminals. Indeed, the greater that

number, the more the power of the approach is disclosed.








The approach applies also independently of multidimensional

spatial dependence that may be present in the boundary-

value problem describing the device. This generality is

needed, for example, in modeling the MOS field effect tran-

sistor (MOSFET), because the substrate terminal constitutes

a fourth terminal through which sizable transient currents

flow in some circuit applications, and because short-channel

devices give rise to multidimensional effects.

Models of four-terminal devices [6,7] and models that

include multidimensional effects [8] have been proposed

earlier. But this previous work has not focused on laying

down systematic procedures for developing models, which is

the aim of this chapter.

Systematic procedures exist for modeling the linear

response of multiterminal circuits subjected to small-signal

excitation. These procedures are linked to the indefinite

admittance matrix (IAM), which we first shall review and

then exploit to model the nonlinear response of multi-

terminal electronic devices to large-signal excitation.



2.2 Indefinite Admittance Matrix


Consider a lumped electrical network which has n ter-

minals. Let an additional external node be the common

reference. From the standpoint of its behavior at the ter-

minals, the network, if linear, may be described by a set

of equations as follows:








I = yV (2.1)


The required linearity is assured for any network operating

under small-signal conditions. The matrix elements of y are


I.
yjk V (2.2)
k vi=0, i k


where I and V correspond to the current and voltage at the

terminals.

The matrix y defined in (2.1) and (2.2) is called the

indefinite admittance matrix [9,10], and its elements satisfy

the following property imposed by Kirchhoff's laws


I Yjk = Yjk = 0 (2.3)
j k


that is, the elements in any row or any column sum to zero.

As will be seen, our development of large-signal models

for electronic devices will make use of two special cases

of the IAM. In the first case, the matrix y is symmetric

and has one of the following forms:


d
y = a = b y = c/dt (2.4)
dt


Here a, b, and c are real symmetric matrices, and each matrix

element corresponds to a single lumped resistor or capacitor

or inductor connected between each pair of the n terminals.

In the second case, the matrix y is nonsymmetric, but is

the sum of two indefinite admittance matrices: a symmetric









matrix, like (2.4), and a residual nonsymmetric matrix, each

element of which corresponds to a controlled current source

placed between each pair of terminals. In this second case,

then, the circuit representation of the IAM results from

connecting the network corresponding to the symmetric matrix

in parallel with that corresponding to the nonsymmetric

matrix. In general, summing of indefinite admittance

matrices corresponds to connecting their circuit representa-

tions in parallel.



2.3 Extension for Nonlinear Electronic Devices


Consider an electronic device having n terminals. The

modeling begins by specifying the physical mechanisms

relevant to the operation of the device. For many devices,

only three such mechanisms, at most, are relevant: the

transport of charged carriers between terminals; the net

recombination of charged carriers within the device; the

accumulation of these carriers within the device. Thus the

current i flowing at any terminal J is the sum of three

components: a transport current (i ) T a recombination cur-

rent (i )R, and a charging current (i )C. That is


i = (i )T + (i )R + (iJ)C (2.5)


We now characterize these components.

The transport mechanism consists of the injection of a

charged carrier in one terminal, followed by its transport









across the device until it reaches any of the other terminals,

where it recombines at a surface with a carrier of opposite

charge. The recombination mechanism differs from the

transport mechanism only in that the carriers recombine

within the bulk of the device instead of at the terminals.

Therefore, both mechanisms can be characterized by the same

form

(i )T, = (i K)T R (2.6)
K J


Here iJK represents the current due to the charged carriers

injected from terminal J, which recombine, at a surface or

in the bulk, with opposite-charged carriers injected from

terminal K. From this characterization, it follows that

(iJK)T,R satisfies the following properties:


JK = JJ = 0 (2.7)


These properties allow transport and net recombination to be

represented by controlled current sources connected between

pairs of terminals. The value of the current source between

terminals J and K is iJK.

The last mechanism to be considered is the accumulation

of mobile carriers within the device, which requires the

charging current

dqj
(ij)c = T- (2.8)


As Fig. 2.1 illustrates, dqJ is the part of the total charge

accumulated within the device in time dt that is supplied





















i = (iJ) T,R + (i)C




(ij)c




dqj


dt








Fig. 2.1 The charging current (i ) at terminal J
produces the accumulated charge dq .









from terminal J. The charge accumulation expressed in (2.8)

is a mechanism basic to any electronic device that operates

by charge control [2-4].

Now, using (2.6) and (2.8), we may rewrite (2.5) as


dqj
ij = (i K) + (2 9)
K~ J JK T,R dt


Although (2.9) is valid, it does not correspond to a con-

venient network. To get a convenient network representation,

we apply one additional constraint which costs small loss in

generality in that it holds for all charge-control devices

[2-4]. We apply the constraint that the overall device

under study is charge neutral. Or, more exactly and less

demanding, we assume the device accumulates no net overall

charge as time passes. This constraint of overall charge

neutrality requires a communication of the flux lines among

the terminals to occur that maintains charge neutrality by

coulomb forces and by drift and diffusion currents. The

requisite overall neutrality may result either from

neutrality occurring at each macroscopic point, as in a

transistor base, or from a balancing of charges that are

separated, as on the gate and in the channel of a MOSFET.

As a result of overall neutrality, the current at any

terminal J becomes the sum of the currents flowing out of all

of the other terminals


iJ = i (2.10)
KJK








This global counterpart of the Kirchhoff current-node law

implies for the charging currents of (2.8) that


(i )c (iK)C (2.11)
KXJ


which means that a charging current entering one terminal

flows, in its entirity, out of all of the other terminals.

Hence, as is true also for the transport and recombination

mechanisms, charge accumulation can be represented by a

controlled current source connected between each pair of

terminals.

For a model to be useful in circuit analysis, the

elements of the model must all be specified as functions of

the terminal currents and voltages. To do this, we now make

use of the principles of charge control [2-4] and of the

closely allied quasi-static approximation [6,7,11].

For the transport and recombination mechanisms, charge

control gives directly


(iJK) T,R = JK /tK. (2.12)


Here qJK is the charge of the carriers that contribute to

the current flowing between terminals J and K. The recombina-

tion time tJK is the time constant associated with that cur-

rent: a transit time if the mechanism being described is

transport, a lifetime if it is recombination. Then, to

produce the desired functional dependence, a quasi-static

approximation [6,7,11] is used that specifies each









(iJK)T,R as a function of the instantaneous voltages at

the device terminals.

This characterization of (iJK)T,R, combined with the

properties expressed in (2.7), can be manipulated to de-

scribe transport and recombination by an IAM, like a in

(2.4). Because iK = -iKJ the matrix is symmetric.

There are two network representations of transport and

recombination described by this matrix. As noted before,

just below (2.7), one of these consists of controlled

current sources connected between pairs of terminals.

Another network representation consists entirely of non-

linear resistors, RJK = (V -VK)/iJK.

Similar procedures are applied to model charge ac-

cumulation. To the charging current defined in (2.8) a

quasi-static approximation is applied [6,7,11],

specifying the functional dependence of qJ on the terminal

voltages and enabling thereby the employment of the chain

rule of differentiation. The resulting characterization of

(i )C describes charge accumulation by a matrix that has

the form of b in (2.4), a matrix whose elements are

aqj
bJK = V (2.13)
bJK V K dVO=0, IK



Matrix b also satisfies the key properties of the indefinite

admittance matrix that are given in (2.3). For a general

n-terminal electronic device, this matrix describing charge

accumulation is nonsymmetric, and is therefore the sum of a









symmetric and a residual nonsymmetric part. The symmetric

part corresponds to an all-capacitor network; the network

representation of the residual nonsymmetric matrix consists

of controlled current sources.



2.4 Conclusions


From the properties of the IAM it follows that the

three-branch circuit of Fig. 2.2 serves as a building block

for model generation. Connecting a circuit of this form

between each terminal pair yields the general network

representation for an n-terminal electronic device. For

any particular device of interest, certain of the circuit

elements may vanish. In a MOSFET, for instance, no trans-

port or recombination currents flow to the gate, and the

corresponding circuit elements will be absent.

Any equivalent-circuit model generated by this approach

can be regarded in two ways: either as a product of the

building block of Fig. 2.2 or as a circuit described by a

matrix which obeys the key properties of the IAM. Descrip-

tion by the IAM treats all terminals equally in that none is

singled out as the reference node; the advantages of this will

show up plainly in the modeling of a four-terminal device,

such as the MOSFET.

From Fig. 2.2 notice that the mobile charge accumulation

within a general n-terminal electronic device is not rep-

resented by the flow of displacement currents in an all-

capacitor model. The residual nonsymmetric matrix, and


















'q J= J/t K


dv
3- qK/ ) dtK
(8q /vK- qK/VJ) dt


Fig. 2.2 General equivalent-circuit between each pair
of terminals of an n-terminal electronic device.








the corresponding transcapacitance current source of Fig.

2.2, provides the needed correction. This correction has

practical engineering consequences in certain MOSFET cir-

cuits although a discussion of that is postponed for a

later chapter.

To use the approach set forth here in modeling any

particular device requires that the static dependence on

the terminal voltages be specified for the currents and

charges defined in (2.12) and (2.13). This requires that

a physical model for the device be chosen to describe the

dc steady state. For the MOSFET this has been done, and

the corresponding equivalent-circuit model is derived in

the following chapters.















CHAPTER III

EQUIVALENT-CIRCUIT MODEL FOR
THE FOUR-TERMINAL MOSFET



The main contribution of this chapter is the deriva-

tion of an equivalent-circuit model for the four-terminal

MOSFET by use of the method described in Chapter II.

The resulting model is intended to represent with good

accuracy the large-signal transient currents flowing through

each of the four terminals of the device, including the

substrate terminal.



3.1 Examples of Engineering Needs for a Model
for the Large-Signal Transient Response


In many digital integrated-circuit applications of the

MOSFET, the substrate terminal of each device is connected

to a power supply. This connection serves at least two pur-

poses: it provides a means to control the threshold voltage

of the device, and it enables a good lay-out of the circuit

[12,13]. In a large-scale integrated circuit, the large

transient current flowing through a power supply can result

in poor voltage regulation and poor circuit performance un-

less both the circuit and the power supply are properly de-

signed. An optimum design of a circuit will provide the

maximum density of components on the chip consistent with









the requirement that the voltage regulation of each power

supply remains acceptable.

To design circuits using computer aids therefore requires

that one has available a set of equivalent-circuit models

for the MOSFET that adequately represent the transient

currents flowing through the terminals in response to large-

signal excitation of the devices. According to engineers

involved in such designs, such models are not now available

[1]. This absence of accurate models forces the engineer

to suboptimal designs, by which we mean less densely packed

circuits than those that could be designed if accurate enough

device models were available.


3.1.1 Reasons for the Poor Modeling of the Transient Sub-
strate Current by Existing MOSFET Models

The substrate current during transients arises from

capacitive effects in two regions of the device (Fig. 3.1):

the depletion region around the source and drain islands

(extrinsic substrate capacitances); and the depletion region

underneath the inversion channel (intrinsic substrate

capacitance). In general, however, the substrate current

is modeled as arising only from the p-n junction (extrinsic)

capacitances around the source and drain islands. These

capacitances have the form [13]:


C.
S= o (3.1)
j [ VB n






18








GATE


SOURCE






N+
x


DRAIN

__


N+


intrinsic region
I--


extrinsic region


SUBSTRATE









Fig. 3.1 An n-channel enhancement MOSFET divided into
intrinsic and extrinsic parts.


IK_ ........... |I









where V is the applied junction voltage, dB is the built-

in potential and n is an exponential factor. The maximum

value of these capacitances, given by Cjo, is estimated

for typical doping concentrations to be in the order of

10-8 F/cm2 [13]. As we shall see in Chapter V this is also

the order of magnitude of the intrinsic substrate

capacitances. Because the area of the channel and the

area of the source and drain islands are in many circuits

comparable, the inclusion of the intrinsic capacitive

effects to model the substrate current is essential. More-

over, in new fabrication technologies such as silicon on

saphire [14] considerable reduction of the substrate ex-

trinsic capacitances can be achieved. These reductions

can also be achieved by employing special circuit techniques

in the conventional technology [15]. In both these cases,

the intrinsic effects are dominant and must be included in

the modeling.



3.2 Problems Involved in Modeling
of Four-Terminal Devices


The modeling of the intrinsic effects of the four-

terminal MOSFET presents special problems not previously

considered. To lead into these problems, consider first a

two-terminal device. As is shown in Fig. 3.2(a), we apply

a small voltage dV. The figure illustrates that there is

only a single path of communication between the terminals.

That is, there is only one way the flux lines can link be-


























(a)









3

dQ





11 2






dQ 4
dQ1 / I do2
--- I\--7--~---














Fig. 3.2 Illustration of the paths of communication
between terminals in a two-and four-terminal
device.
device.








tween the terminals and thus there is no uniqueness in

the charge that flows at the terminals. The charge that

flows at each terminal is dQ. A nonuniqueness does occur,

however, in devices with more terminals. Consider now a

four-terminal device. From Fig. 3.2(b) one sees that there

are six paths of communication of the flux lines among the

terminals in a general four-terminal device. Thus, suppose

one applies a small voltage between any two terminals while

appropriately terminating the other terminals so that

charge can flow through them. Then one must account properly

for the apportionment of the charges amongst the terminals.

Of the total charge dQ that flows, what will be the charges

dQ1, dQ2, dQ3 and dQ4 flowing at each of the four terminals?

There is a second related problem. One way of seeing

this problem is to suppose that within the box of Fig. 3.1(b),

for the time being, is an all-capacitor network. Then apply

a small voltage between terminals 1 and 3,having shorted the

other terminals to an arbitrary reference. In response, a

certain amount of charge flows at terminal 4. Now inter-

change the roles of terminals 3 and 4. That is, apply the

small voltage at terminal 4 and measure the amount of charge

flowing past terminal 3. The result of this experiment is

that one finds exactly the same amount of charge as before.

That is a property of a reciprocal network, of which an all-

capacitor configuration is an example [16].

Now if one does the same experiment with a MOSFET one

finds that this reciprocity does not apply, as we shall prove









in Section 5.4. The reason is that terminal 3 represents

the gate and terminal 4 represents the substrate; and the

gate and substrate are highly different physical struc-

tures. This asymmetry in physical structure introduces

a nonreciprocity in the network properties not present in

an all-capacitor network. To account for this asymmetry,

therefore, one should expect that the network representa-

tion for a MOSFET must contain elements describing mobile

charge accumulations in addition to capacitors.

To manage these problems one requires a systematic

approach. In Chapter II we have developed a methodology

that permits one to obtain a lumped network representation

of multiterminal electronic devices obeying the principles

of charge control whose large-signal transient behavior

depends on three physical mechanisms: mobile charge trans-

port, net recombination within the device and mobile charge

accumulation. The result is the equivalent-circuit of

Fig. 2.2, which applies between any pair of terminals and

is the basic building block from which an equivalent-circuit

can be constructed for the overall multiterminal device.

The currents representing transport and net recombination

flow in the current source iJK. The charging current re-

presenting mobile charge accumulation flow through the

capacitor CJK = -qK /9Vj and through the controlled current

source characterized by dJK = 9qj/ vK qK/D3Vj'

To apply this methodology to the MOSFET, one needs

only to describe the components of charge accumulation dqJ
J









in each region and the transport and recombination flow in

terms of the physics underlying the device behavior. We

will now apply this methodology to the MOSFET.



3.3 Equivalent-Circuit for the Intrinsic MOSFET


For concreteness, consider the enhancement-mode n-

channel MOSFET illustrated in Fig. 3.1. A central idea in

the equivalent-circuit modeling is to resolve the electronic

device under study into two parts [11]: an intrinsic part

where the basic mechanisms responsible for the operation of

the device occur, and an extrinsic part which depends on

the details of the device structure. For the particular

MOSFET under consideration this is done in Fig. 3.1.

The behavior of the intrinsic region in the MOSFET is

described by charge control [2-4], and thus an equivalent

circuit of its operation can be obtained by applying the

methodology described in Chapter II.


3.3.1 Transport Current

At normal operating voltages and temperatures the

leakage current in the insulated gate is negligible and the

recombination/generation rate in the channel and in the sub-

strate can be neglected. Charge transport occurs, there-

fore, only along the highly conductive inversion channel

induced at the semiconductor surface. This transport

mechanism is represented in the equivalent circuit as a con-

trolled current source iSD connected between source and

drain. Its explicit functional dependence in terms of the









physical make-up and the terminal voltages is obtained by

using a quasi-static approximation to extrapolate the

steady-state functional dependence of the drain current

ID. This will be considered in Chapter V.


3.3.2 Charging Currents

If we neglect recombination and generation, the cur-

rent flowing in the substrate terminal iB is solely a

charging current, that is, current that changes the number

of holes and electrons stored in the intrinsic device.

Thus, if during time dt a change dqB occurs in the hole

charge stored in the substrate, then


dqB
i dt (3.2)
B dt


Similarly, neglecting any leakage current in the

insulator, the current flowing in the gate iG is only a

charging current. If this current changes the charge of

the metal gate by dqG in time dt, then


dqG
i (3.3)
G dt


The current flowing at the source terminal consists of

two components. The first component changes the electron

charge stored in the channel by an amount dqS in time dt.

The second component arises from electrons that, flowing in

from the source, pass through the channel and then out of

the drain terminal. Thus,








dqS
S dt + SD


Similarly, on the drain side,


dq
D d
D dt


ISD


(3.4)


(3.5)


The total change of charge in the inversion channel dqN is

then
dqS dqD dqN
S + iD = + dt dt (3.6)


If we apply a quasi-static approximation [6,11] and

then use the chain rule of differentiation, equations (3.2)

through (3.5) can be expressed in the following matrix form:


aqs
DvS

DqD
DV

DvS



aqB
vS


Dqs
VD


D

aVD
q G
avD

DqB
DvD


q9S
VG

qD
DVG


qG
DvG

DqB
DVG


aVB
DqG
DvB


DqB
DvB


SD



-SD


0



0
o



o)


(3.7)


Here the dot notation designates time derivatives.

By applying the constraint that the overall intrinsic

device is charge neutral, one can prove as is done in

Chapter II [17,18] that the first matrix in (3.7) satisfies

the properties of the indefinite admittance matrix of net-

work theory [9]. That is, the sum of all the elements in

any row or column is equal to zero.









The matrix description of (3.7) together with the

building block of Fig. 2.2 yields, therefore, the general

large-signal equivalent-circuit for the intrinsic four-

terminal MOSFET. This network representation is shown in

Fig. 3.3 and its elements are defined in Table 1.

Elements in addition to capacitors that represent

charging currents appear in the circuit of Fig. 3.3. These

transcapacitors would be zero only if the matrix in (3.7)

were symmetric. That is, if dqJ/3vK = qK /3vJ forall J

and K. The physical structure of the MOSFET, however, is

nonsymmetric and hence one should expect that the elements

dJK are in general nonzero. This is the case, indeed, as

it will be shown in Chapter IV where we calculate the func-

tional dependencies of these elements in terms of the ap-

plied voltages and the device make-up.

The transcapacitive elements in the network representa-

tion can be also seen as related to error terms yielded by

an ideal all-capacitor model. In this sense, we will study

and assess their importance in Chapter V.

In the circuit of Fig. 3.3, the capacitive effects be-

tween source and drain are represented by a capacitor CSD

and a controlled current source characterized by dSD In

the theory of operation of the MOSFET based on the gradual

case [19], it has been shown [20] that there are no capaci-

tive effects between source and drain. In this work, we

will consider this to be the case and therefore we will

assume 3qS/3vD = 3qD/vS = 0, implying







27













Iz m




















4-1
> 4
-4 -I,









C H

roo
-P
(9 0





c~ co




co
U) U)o
-H -P c
m I c~ Cd
u(


u I a d

3 0
(4 a Cd
rCd
U) (5I
(5 IIc
U) U)









Definitions for the elements of the general
equivalent-circuit for the MOSFET.


CAPACITANCES


S 9G
avS


D9B
C -
SB vS


3qD
SDD
CSD =v-
S


DqG
C -
DG DvD



cqB
DB DvD


8qB
CGB G
G


TRANSCAPACITANCES


d -
SG D G


SqS
SB vB



q9S
SD D


SqD
DG v
G


qG
vvS






B
8vS



^D


dD
d -
DB aVB



SqG
dGB B
B


Table 1


aqG
vD



qB
3vD



avG
^G


CSG









CSD = dSD = (3.8)


In more detailed characterizations of the device -

for example, the ones including channel length modulation

[21] and two-dimensional effects in short channel devices

[8] the drain voltage directly influences the charging

of the channel and capacitive effects between source and

drain as modeled by Fig. 3.3 may need to be included.



3.4 Special Considerations


For the equivalent circuit model in Fig. 3.3 to be

useful in circuit analysis we require that all the elements,

current sources and capacitors, must be specified as func-

tions of the terminal current and voltages. In doing this,

as indicated in Chapter II, we will use the quasi-static

approximation [6,111, which is based on the steady state

operation of the MOSFET. A particular detailed model for

steady-state operation is considered in Chapter IV and the

functional dependencies for the elements of Table 1 will

be derived in Chapter V from this model. However, before

approaching these problems, we must give special considera-

tion to two charge components that are not described in the

conventional steady-state characterization of the device:

the contributions from the source and the drain, dqS and dqD,

to the total charging of the channel. To gain physical in-

sight as to how dqS and dqD contribute to the charging of

the channel, consider the following.









If we apply a change in the gate voltage, a change

of the charge in the channel dqN will occur. The electrons

necessary to supply this additional charge are injected

into the channel by charging currents flowing in from the

source and drain, that is


SdqS dqD dqN
is + i + dt d (3.9)
S D dt dt dt


The contributions of dqs and dqD to dqN are, in general,

unequal and depend, as we shall see, on the operating con-

ditions of the device.

Figure 3.4 shows a simplified energy band diagram at

the surface of an N-channel MOSFET under various operating

conditions determined by the magnitude of VD. Consider

first the case when VD = 0 and AVG is applied. Because the

barrier height that the electrons have to overcome in both

sides of the channel is equal (Fig. 3.1(b)), we expect that

charging currents flowing into the source and drain ends will

be equal,

[dq dqD
dt dt (3. 10


Now apply a small VD>0 and change the voltage by AVG. As in

the previous case, electrons are injected from both sides of

the channel. The electric field produced by the application

of VD, however, will present an additional barrier height

for the electrons injected from the drain side (Fig. 3.4(c)).

Thus we expect the charging current in the source to be larger




















EFn


(a) Equilibrium


(b) V = 0, VG 0


(c) VD small, VG 0
(c) VD small, VG f 0


VD large, VG 7 0


Fig. 3.4 Energy band diagram at the surface of a MOSFET
under the effect of applied drain and gate voltage.


I









than the charging current in the drain. That is,


[dqS dq D
> dt (3.11)
SVVD >0 VD>0


For larger values of VD the device will be eventually driven

into saturation. The high electric field produced near the

drain will impede charging of the channel from that end

(Fig. 3.4(d)). Hence, the additional electrons required

when AVG is applied will be supplied mainly from the source

end. That is,


dq
dqD] 0 (3.12)
dt SATURATION


A similar argument can be employed to explain the contribu-

tions of dqS and dqD to the charging of the channel due to

changes in the substrate voltage.

From the above discussion we can define an apportionment

function X such that the source and drain charging currents

can be expressed as



[= dqS] N (3.13)
d t = D d t V / D
dJVs,VD V ,V
S SD S D

and

dq dq
SVSV- t fl (3.14)
VSVD VSVD


The apportioning function A takes values from 1/2 to 1 be-

tween the conditions of V DS = 0 and saturation.








A convenient expression for X results from combining

its definition in (3.13) with the indefinite admittance

matrix that characterize the charging currents in (3.7).

Using chain rule differentiation in (3.13),


qS q S FN G N
G + v B =B B (3.15)
G B L -GB


This equation must remain valid for any value of vG and vB.

Thus

aqS/ VG + aqS/aVB
= /v + /(3.16)
qN /3VG + qN/B


By using the properties of the indefinite admittance matrix,

the numerator and denominator of (3.16) can be rewritten as:


qS 3qS 3q qS 3S
+ = + --j
G 3B S avD

aqG aqB rvD Sqv
q-- + + (3.17)
9VS vS S Dv DJ

and


+ + I
vG vB vS vD)


_qG B qG B
+ + + (3.18)
vS vS D vD


Substituting (3.17) and (3.18) into (3.16) and, using the

definitions in Table 1, we obtain,









1
C + C
SDG DB
1 SG
CSG + CSB


(3.19)


Here, we have used the assumption that no direct capacitive

effects exist between source and drain (aqS/avD = SqD/vs = 0).

Equation (3.19) can now be used to obtain the functional

dependencies of equivalent-circuit elements involving dq and

dqD directly from an extrapolation of the steady-state be-

havior of the device. From Table 1, these elements are,


d q = q
SG vG vS


aqD aqG
d D q G
DG BvG V D
G D


dSB


N



qN + C
DG
vG


= dSG


dDB = -dSB


dGB = dSG + dDG (3.24)


Equations (3.22)-(3.24) have been simplified by direct

application of the properties of the indefinite admittance

matrix.



3.5 Modeling of the Extrinsic Components


The extrinsic components depend on details of the

fabrication of a specific type of MOSFET. In many cases,


(3.20)




(3.21)



(3.22)


(3.23)









the extrinsic part can be modeled by inspection of the

geometry of the device. Elements commonly found are:

overlapping capacitances due to the overlap of the gate

oxide over the source and drain islands; bonding

capacitances resulting from metalization over areas where

the oxide is relatively thick; P-N junction capacitances

arising from source-substrate and drain-substrate dif-

fusions; and resistance components due to finite resis-

tivity at the source, drain and substrate. In general,

these elements are distributed capacitances and resistors

but can be transformed to lumped elements by applying a

quasi-static approximation. Lindholm [11] gives the de-

tails of the general approach for modeling extrinsic ef-

fects in a four-terminal MOSFET. For particular devices,

the details of the extrinsic modeling have been worked

out in the literature [7,22].



3.6 Relation to Existing Models


A wide variety of equivalent-circuit models of dif-

ferent complexity and accuracy have been advanced for the

MOSFET [7,11,20,22,23]. The general development of these

models follows a partially heuristic and partially sys-

tematic approach that consists in interpreting in circuit

form the different terms of the equations describing the

device physics. The definitions of the elements in these

circuit models depend on the particular approximations of

the physical model involved.









In contrast, the equivalent-circuit of Fig. 3.3 and

the definitions of its elements in Table 1, having been

developed from a methodology based on fundamentals, are

quite general. For example, the new network representa-

tion can take into account two and three-dimensional ef-

fects such as those in the short-channel MOSFET. To use

the model one needs only compact analytical descriptions

of these effects in physical models for the dc steady-

state. Such descriptions, we anticipate, will appear in

the future. Indeed, as new physical models for dc be-

havior appear, such as the one presented in the next chap-

ter, the equivalent-circuit developed here is designed to

make immediate use of them to yield new and better network

representations of the large-signal transient response of

the MOSFET.

Most of the past work in equivalent-circuit modeling

of the intrinsic MOSFET neglects the effect of charging

currents flowing into the substrate terminal. Among the

models that consider these effects, the treatment of Cob-

bold [6] is the most detailed. His model, derived for

small-signal applications, involves an equivalent-circuit

in which the charging effects are represented by four

capacitors (source-gate, source-substrate, drain-gate and

drain-substrate) and a controlled current source (gate-

substrate). As can be observed in the general equivalent-

circuit between any two terminals shown in Fig. 2.2, the

representation by a capacitor alone of charging currents









between two terminals requires certain specific conditions

related to symmetry and apportionment of charge in the

device to be satisfied. For example, if the terminals are

the source and the gate a single-capacitor representation

between these terminals would require 9qS/ G = 9qG/9vS'

Because of the physical asymmetry of the MOSFET, these

requirements are, in general, not satisfied. This problem

was apparently not recognized by any of the previous workers

in the field.
















CHAPTER IV

STEADY-STATE MOSFET THEORY MERGING
WEAK, MODERATE AND STRONG INVERSION



4.1 Introduction


In Chapter III we have developed a circuit representa-

tion for the transient behavior of the intrinsic four-

terminal enhancement-mode MOSFET. Each circuit element in

this representation depends on the constants of physical

make-up of the MOSFET and on the voltages at the terminals

of the intrinsic device in a way that is determined by the

static model chosen to represent the current and the in-

version, substrate and gate charges. To complete the

modeling, therefore, one must choose a static model for

this current and these charges that is general enough to be

suited to whatever circuit application is under considera-

tion. None of the static models previously developed are

suitable for this purpose, for reasons that will be soon

discussed. Thus the purpose of this chapter is to develop

a model that has the properties required.

One necessary property of the static model is that it

represents the entire range of operation to be encountered

in various circuit applications, including the cut-off,

triode, and saturation, including operation in weak, moderate

and strong inversion, and including four-terminal operation.









The model of Pao and Sah [24] comes nearestto this ideal.

It covers in a continuous form the entire range of opera-

tion. However, its mathematical detail makes it inconvenient

for computer-aided circuit analysis, and it does not include

the substrate charge and the influence of the substrate

terminal.

The Pao and Sah model has provided the basis for other

modeling treatments. Swanson and Meindl [25], and Masuhara

et al. [26] have presented simplified versions covering

the entire range of operation. Their approach consists in

a piecewise combination of models for the limits of weak and

strong inversion. This approach introduces discontinuities

in the slopes of the characteristics for moderate inversions,

which are computationally undesirable. These models, fur-

thermore, do not include charge components and the influence

of the substrate terminal.

Following a different line of reasoning El-Mansey and

Boothroyd [27] have derived an alternative to the Pao and

Sah model. Their work includes charge components and four-

terminal operation. However it also is mathematically more

complicated than is desirable for computer-aided circuit

design.

The goal of this chapter is to develop a model that

includes:

(a) four-terminal operation;

(b) cut-off, triode and saturation regions;

(c) weak, moderate and strong inversion;

(d) current and total charges.









The model, furthermore, should avoid the discontinuities

of a piecewise description while maintaining enough

mathematical simplicity for computer-aided circuit analysis.

In Section 4.2 a review of the general fundamental of

MOSFET operation are presented. A discussion, in Section

4.2.3, of the relation between the surface potential and

the quasi-Fermi level for electrons sets the basis of our

approach. In Section 4.3 expressions for the drain current

and the total charge components are derived. To assess the

validity of our approach, the predictions of our model for

the drain current are compared against experimental data in

Section 4.4. In the last section we include a discussion of

the limitations of the model.



4.2 Fundamentals


4.2.1 Drain Current

In an n-channel MOSFET, illustrated by Fig. 3.1, the

steady-state drain current density JD(x,y) is essentially

the electron current density in the inversion channel [24]:


dN
J (xy) = J (x,y) = qp NE + q D
D n n y n dy

dV
= -qn N (4.1)


where V = VN-VP is defined as the difference between the

quasi-Fermi potential for electrons V and the quasi-Fermi

potential for holes Vp. Because there is no significant

hole current flowing in the device [28] Vp is nearly constant






41


and coincides with the bulk Fermi potential,

(F = kT/q ,n NAA/ni. The voltage V is referred to as
the "channel voltage" [20], and at the boundaries of the

channel, y=0 and y=L, it has the values V(0) = V and

V(L) = VD. These and other properties of V will be derived

in Appendix A.

The total drain current is obtained by using the

gradual channel approximation [19]:

dV
= -Z JD(x,y)dx = -Zyn Q (4.2)



Here Z is the channel width, n is an effective mobility,

and Qn is the electron charge per unit area in the inversion

channel defined by


Qn = -q N dx (4.3)
0


The differential equation in (4.2) is solved by integrating

along the channel


Z Co D Qn
I= L V S C 0dV (4.4)



where L is the effective channel length and C is the oxide

capacitance per unit area.

The effects due to mobility reduction and channel

length modulation have been studied in detail by different

authors [21,29,30]. They could be included in this work by

appropriately modifying pn and L.









4.2.2 Charge Components

For the purposes of equivalent-circuit modeling it is

convenient to divide the charge distribution within the in-

trinsic device in three components: charge associated with

the gate, charge in the bulk and charge in the inversion

channel.

In the charge associated with the gate we include:

the actual charge in the metallic gate (CoV o), the fixed

charge in the oxide Q and the charge due to surface

states at the oxide-semiconductor interface Q ss Inspec-

tion of the energy band diagram of Fig. 4.1 shows that this

effective gate charge Q per unit area can be expressed as


Q Q Q
Qg ox+ ss (4. 5)
C G 4MS S + C C
0 0 0


where MS (= (m-Xs-q(EC-EI) (F) is by definition the metal-

semiconductor work function, S is is the surface potential

and VG is the applied gate voltage. In this work we will

assume that the charge in the surface states Q is in-
ss
dependent of voltage. It has been demonstrated, however,

that when the device is operating under low voltage condi-

tions [31] the voltage dependence of Qss becomes important
ss
in determining the relation between surface potential and

external applied voltages. A typical characterization of

Qss is given by [32]:


Qss = -CSS (S-V)


(4.6)





43













XS
VE /q




^N -I
EE /q
.. Epp/q OpF

Er-Fn /EV/q






EF/q -





Sx

Oxide Semiconductor








Fig. 4.1 Energy band diagram under nonequilibrium condi-
tions. All voltages are referred to the substrate.
Note that -qVn = EFn, -qVp = EFp, and -qVI = EI.









where NSS, representing the surface state density per unit

area, is used as a parameter to obtain improved fit with

experiment. Typical values for NSS are on the order of
10 -2 -1
1x10 cm eV [25,31,32]. The work presented here can be

modified to include this effect.

The charge in the bulk consists mainly of ionized

atoms and mobile majority carriers. In a p-substrate devic

the bulk charge Qb per unit area can be approximated by


Qb = o q(PAA)dx
0


(4.7)


To solve this integral equation, one can change the variable

of integration to the potential V (x) by using the solution

to Poisson's equation for the electric field. This proce-

dure requires numerical integration of (4.7). In the present

analysis we will obtain an analytic solution by assuming

that, because of its "spike-like" distribution [33], the

mobile electron charge in the channel has a negligible ef-

fect on the potential distribution. Although this approxima-

tion is only strictly valid under depletion or weak inversion

conditions, it serves also as a good approximation under

strong inversion conditions because the major contribution

to Qb in strong inversion comes from the uncompensated and

ionized impurities in the depletion layer [34].

Using the approach described above, we obtain


e








Qb kTf sV IS 2
C- -K -VB + (- e 1



-K -V kT (4.8)

Here,

K 2qESNAA 1/2
= -- AA(4.9)
02


is a constant that depends on fabrication parameters. The

exponential term in (4.8) results from integrating the

contribution to the charge density of the mobile holes in

the substrate P/NAA = exp[-B(S-VB)]. This yields

PS/NAA = exp[-B(S-VB)] where PS is the density of holes

at the surface. For the regions of interest, depletion to

strong inversion, this exponential term can be neglected.

The charge in the inversion channel, defined by (4.3),

the charge in the gate, and the bulk charge are all related

through a one-dimensional Gauss' law, which requires


Q + Q + Qb = 0 (4.10)


The total charge components are obtained by integrating

Q g Qb and Q along the channel:


Total gate charge,

L
QG = Z Q 9 dy (4.11)






46


Total substrate charge,

L
QB = Z Qb dy (4.12)



Total inversion charge,


QN = -(QG+Q) (4.13)


Or, alternatively, we may change the variable of integration

to the channel voltage V by using (4.2),


VD

G -ZL QgQn dV



V
-ZL
QB -L QbQn dv (4.14)
D VS


VD
-ZL 2
Q V Q dV
N I* n
D fV S
S
where
I
I* = (4.15)
D Zn C
n o
L

is a normalized drain current. The dimensions of I* are:

(volts)2. Similar expressions have been obtained by Cobbold

[7 ] by assuming drift only. In contrast, (4.14) includes

the effect of drift and diffusion which, as we shall see,

is necessary in obtaining a model for the complete operating

range of the MOSFET.








4.2.3 Surface Potential

The complete characterization of the charge components

per unit area Q and Qb requires the functional relation

between the surface potential S and the applied voltages.

This relation is established by applying Gauss Law,

ignoring the y-component of electric field, which requires

that the effective charge in the gate be the source of the

x-directed electric field in the semiconductor. That is,


Qg = SEx x=0 = KCo F(,'V'VB'F) (4.16)


The function F(SV,VB, F) is the normalized electric field

at the surface obtained from the solution to Poisson's equa-

tion. This solution has been worked out by several authors

for the case when VB = 0 [24]. If extended now to the case

when a bias voltage VB is applied, we find that


pF v^ fkT 1/2 -(S-VB) B 1
F(SVVB'F) = e + kT/q-


8 ( S-V-2(F) s^-VB -B2mF -8 (V-VB+2(F)] 1/2
e e e (4.17)
kT/q

For the usual substrate doping, V-VB+2 F is always much larger

than kT/q. Furthermore, if we neglect the majority carrier

concentration at the surface (PS<
approximation in both the depletion and inversion modes, one

can show from (4.17) that (4.16) reduces to

V = V kT + -(+S-V- 2 F) 1 1 2 (4.18)
VG S = K IS VB q e 1 (4.18)









where

Q Q
= VG MS + + C (4.19)
0 0


The solution of the integral equations defining the current

(4.4) and the charge components (4.14), in which the variable

of integration is the channel voltage V, requires the func-

tional relation between S and V. This relationship, how-

ever, has not been found in closed form and hence the pos-

sibility of direct integration of (4.4) and (4.5) is excluded.

A numerical integration can be performed [24] but, because

of the large computer times involved, we will look for an

approximation that will yield an analytic solution.

Let us consider some important characteristics of the

functional relation between -S and V that will set the basis

for our approach. Figure 4.2 shows the solution for S ob-

tained from (4.18) for a specific device having x0 = 2000A
15 -3
and NAA = lx10 cm Figure 4.2 shows that, for values of

VG for which CS(O) is below 2F', S is nearly independent of V.

For VG such that S(0) > 2 F' S increases almost linearly

with V provided as it is shown below, that drift dominates

in determining the channel current. For V greater than a

certain critical voltage, however, diffusion begins to dominate

and dip/dV 0. This characteristic behavior can be explained

by studying the relative importance of the drift and diffu-

sion components along the channel [24]:





49








I I






3








/ i^ ,


-P
o 2

















2 F







I I
1 2

V (volts)


Fig. 4.2 Surface potential 4s as function of channel voltage V.
S









Dn dN/dy 1 d4S/dV NA P NAA
(4.20)
pn NE dEs /dV N N
n y S S S


which is derived in Appendix B. For V' such that OS(0) < 2 F,

the channel is weakly inverted (<
and (4.20) implies that d s/dV 0. When V is such that

0S(0) > 2 F the channel near the source is strongly inverted

(NS(0) >> NAA); then near the source, (4.20) implies that

drift dominates and thus dip/dV - 1. As we move toward the

drain, the electron concentration decreases, the channel be-

comes weakly inverted and there again diffusion dominates

and dOS/dV -- 0. The channel voltage for which the channel

becomes weakly inverted corresponds approximately in the

strong inversion theory [7 ] to the pinch-off voltage. At

higher gate voltages, the channel remains strongly inverted

in its entire length and drift is the main mechanism. In

the strong inversion theory this corresponds to nonsaturated

operation.

The behavior of cS as described above has been used to

establish two approximations often used in characterizing

MOSFET behavior: the strong inversion and the weak inversion

approximations. In the strong inversion approximation, which

is applied when N (0)>> NAA, the surface potential is assumed

to be related to the channel voltage by S = V+2 F [ 7 .

Because then diS/dV = 1, this assumption is equivalent to

neglecting contributions due to diffusion mechanisms near the

drain. In the weak inversion approximation, which is applied

when NS(0) < NAA the surface potential is assumed to be in-








dependent of voltage iS = iS(0) [31]. Then diS/dV = 0,

and, therefore, drift mechanisms near the source are neglected.

Although these two approximations produce satisfactory agree-

ment with experiment in the strong and weak inversion limits,

they fail for moderate inversion (NS=NAA) where neither of

the criteria used in strong or weak inversion can be applied.

In the following section we will relax the strong and

weak inversion approximations by using the basic properties

of dS/dV. As shown in the previous discussion, these pro-

perties relate to the degree of inversion in the channel.

As we shall see, the resulting model not only will merge the

operation in the strong and weak inversion modes, but also

will provide a first-order approximation for moderate in-

version.



4.3 Drain Current and Charge Components in
a Model Merging Weak, Moderate, and
Strong Inversion


4.3.1 Drain Current

In Section 4.2 we found that the drain current could be

expressed as



I VD
I* =- Q' dV (4.21)
Z C VC

I L

Here, and in the rest of the chapter, the notation Q' is used

to designate a charge component divided by the oxide capacitance









per unit area C The dimensions of 0' are volts. By

using the condition of charge neutrality Qn = -(Q +Q)'

(4.21) can be rewritten as


V VD
I Qg dV + Qb dV (4.22)
S S


In equation (4.22) a very convenient change of variables

can be introduced by noting from (4.5) and (4.8) that


dQ' dlpd
dg d d S dV
dy dy (V-) dV dy

(4.23)

dQ' a L ,vuB 1/2 2 d. dv
b d kT ] K S dV
dy dy s-VB q 2Qb dV dy


Thus,

-dQ' 20'/K
dV = 9 = b(4.24)
(dp /dV) (d S/dV)


Substituting (4.24) in the expression for the current, we ob-

tain

Q (VD) Qb(VD) 2 2
S-Qg dQg 2Qb2/K2 dQO
I* = d + 2 /K db (4.25)
D (dS/dV) + (d/dV)
Qg(VS) b(Vs)


Figure 4.3 shows the elements constituting the integrands

in (4.25) for a specified device operating in the pinch-off

mode. This represents the most general case because the

channel is strongly inverted at the source and becomes










strong
inversion


moderate weak
inversion inversion


0



Qb
vI vC
-Qn
















____sM
-0









1.5.

/ F




1-






1 V (volts) 2

Fig. 4.3 Components of charge per unit area and surface
potential as functions of the channel voltage V.









weakly inverted toward the drain. As discussed in Section

4.2.3, d S/dV has almost constant values along the channel;

in the strongly inverted portion d S/dV = 1 while in the

weakly inverted portion dPs/dV = 0. In the transition

between strongly and weakly inverted regions, where the

channel is moderately inverted, d S/dV is not constant.

However, because this represents a small portion of the

characteristic (PS vs. V), we will assume in a first-order

approximation that S is there linearly related to V with

the value for the slope dpS/dV lying between 0 and 1.

Our approach will consist then in dividing the channel

into three regions by defining appropriate limits V1 and V2

as shown in Figure 4.3. Below V1 the channel will be assumed

to be strongly inverted with d S/dV = SS, a constant.

Above V2 we will consider the channel to be weakly inverted

with d s/dV = S a constant. In the transition region the

channel will be assumed to be moderately inverted with

d~s/dV = SM, also a constant. These approximations allow us

to write the expression for the current as the sum of the

contributions in each region. Furthermore, because dis/dV

is assumed constant in each case, it can be taken out of the

integrals which can then be directly evaluated. If we define

a function, F related to ID by








Q (Vb) Q (Vb)

FI(V,Vb) = O' dQ' + J 20 /K2d Q




',2b 3- Vb
g +2 2 b
2 3 2 (4.26)
JV V
a a


then the expression for the drain current becomes


F (VsV ) F (V1,V2) F (V2 VD)
I* = + + (4.27)
D SS SM SW


The three components of (4.27) result from carrying out the

details of the integration indicated in (4.21). Here, if

we let V1 = VD and SS = 1, (4.27) reduces to the conventional

expression (obtained by using the strong inversion approx-

imation) for the drain current of a device operating in the

triode mode.

In computing the drain current from (4.27), a numerical

problem could occur in evaluating the term corresponding to

the weakly inverted channel because SW is very small. To

avoid this problem an alternate form for this term can be

obtained as follows. The channel charge Qn was defined in

(4.3) as


Q = -q N(x,y)dx (4.3)

Taking derivatives on both sides with respect to y yields
Taking derivatives on both sides with respect to y yields










do
-n dN
y = -q (x,y)dx (4.28)
S0


but, because N = n. exp[B(V -VN)] = n. exp[B(V -V-Vp)], it

follows from the gradual approximation [19] that


dN = N i-
dy kT/q


dSs dV
dV j dy


(4.29)


Substituting (4.29) in (4.28), using the definition of

Q and reordering the terms, we obtain


dQ'
dV kT/q n 43
Qn (l-d/dV) (4.30)


From (4.30) the contribution to the drain current from the

weakly inverted channel can then be alternatively written as


D
I* = -
DW2


O' dV
-n


kT D)
q (
Q' (V )


dQ'
( n
(1-dis/dV)


But since we are assuming that dis/dV has a constant value

SW in this region, we finally obtain:


(4.32)


kT
DW q


(4.31)









Here, if we let SW = 0 and V2 = VS, (4.32) reduces to the

conventional expression for the drain current of a device

operating in weak inversion [31].


4.3.2 Charge Components

The procedure to calculate the total charge components

is entirely analogous to the one presented for the drain

current. Combining (4.10) and (4.14) and using the change

of variable indicated in (4.24), we obtain for the total

charge components


V
ZL D
G I*~
D DVS
S


ZL
I*
D


2
(Qg +QgQ b)dV


Q' (VD)

Q (VD

QgVs)


-O'2 do'
-g -g +
(1-di /dV)


Qb(VD) 2 2/2 2d
( -b dv (4.33)
(1-d /dV)s
b(VS)


ZL
B I*VS
D V
S


ZL
I*
*D


(02 + Q'OQ)dV
-- g-b


D) 2Q3/K2dQ

+ S
S (1-dS/dV)
Qb(VS)


b(VD) 2 2
Q(VD) 2Q'Q /K2 dQ'
gb b
I (1-dis/dV)
Q (VS)


Again, if the channel is divided in three regions and we

assume that dis/dV is constant in each region, the charges

can be obtained by direct integration. Let us define func-

tions FOG and FQB such that,
QG- QBo


and


(4.34)









0' (Vb) Q2 (Vb)
F (Va 2 dO' + 2Q' b2/K2 dQb
QG a b fg gb
O' (Va) QO(Va)



g 3 2 f 2 b l ^
= + 2 QQ' + 2 (4.35)
3 2-gbg 5
3K K
L- a

and

Qb(Vb) Q(Vb)
FQB (VaVb) = 2Qb3/K2 dQ' + 2Q'Q'2/K2 dQ
QB af b bgb
Qb(Va) Qb(Va)



Q 4 + 27 O'O2 + j (4.36)
22 b 32 b K5 Va
2K 3K f
a

where the second integral in (4.35) and (4.36) was evaluated
using integration by parts with u = Q' and dv = Q'2doa .

Then the total charges can be expressed as


FZL FQG(V ,V ) FQG (V ,V2) FOG (V2 VD
Q = |- Gs1 + "+ (4.37)
G I* S + s S
D S M W


_ZL FQB(VSV) FQB(VlV2) QB(V2VD (4.38)
B I* S S S
D S M + W

As in the case of the drain current, to avoid numerical

problems due to the smallness of SW, an alternative expression
can be obtained for the contribution of the weakly inverted

portions of the channel. Using (4.30) directly in (4.14),
we obtain









Q' (V )
Q, = ZL kT -g dO'
GW ID ) q (1-ds /dV) -n
Q (V2)


2 3 D
ZL kT/q -g 2 b V
I* (1-S 3 K2 (4.39)
SV2


Here we have used integration by parts with u = O' and
"-g
dv = dQb. A similar expression results for the bulk charge

in weak inversion,


Q' (VD)
-nD
SZL kT b
B I q (l-dis/dV) Qn
n 2
Q(V,)


03 02 "VD
ZL kT/q 2 (b -b
S- (4 40)
I (1-S U) 3 K2 2
D JK
V2


4.3.3 Limits for the Strong, Weak, and Moderately Inverted
Portions of the Channel

The three-region piecewise-linear approximation employed

in Sections 4.3.1 and 4.3.2 to obtain expressions for the

current and charges uses two parameters: (1) the limits V1

and V2 that divide the strong, moderate, and weakly inverted

portions of the channel; and (2) the approximate values at

the slope disg/dV (S S S ) in each of the three regions.

These parameters will be now defined in terms of the applied

external voltages.









In Section 4.2.3 we concluded that dIs/dV could be

considered as a measure of the level of inversion along

the channel. Here we will show that it is also the ratio

of the contribution of the drift current to the total

current. In (4.20) we indicated that


I 1 d Sp/dV
= (4.20)
DRIFT diS/dV


Thus, rearranging terms we obtain


DRIFT dS (4 4
= (4.41)
DRIFT DIFF


We will use this property of diS/dV to define quantitatively

the voltages V1 and V2 as follows.

In the strongly inverted regions we previously observed

that diS/dV is close to unity and drift dominates while in

the weakly inverted regions diffusion dominates with dis/dV

being close to zero. Thus we will define the transition

region corresponding to moderate inversion as the region in

which both drift and diffusion are comparable. More

specifically, we will define V1 as the channel voltage at

which the drift current constitutes 80% of the total current

and V2 as the channel voltage for which the drift component

is 20% of the total current. This specification of V1 and

V2 provides, approximately, the best least-squares fit

between the piecewise linear approximation and the si versus

V characteristic. Based on these definitions we can now

obtain expressions for V1 and V2 by solving









dis
dV A
dV


(4.42)


where A has the value A = 0.80 when solving for V1 and A = 0.20

when solving for V2. Differentiation of both sides of (4.18)

yields


dS
dV


e (iS-V-24F)
e


20'
+ 1 + e
K2
K"


= A


Combining (4.43) and (4.18) and using the definition of Q ,

we find that

2V 2
kT x K2
V1V2 = V' 2 n + V
G1 22F q 2 2 x
A'K


where


k2 + T 1 /2
Vx =K G-VB 4 q 2-
(A' K)


(4.43)


(4.44)


kT/q
+ A


Here, A' = (1-A)/A. Hence, A' = 1/4 when calculating V1 and

A' = 4 when calculating V2. Equation (4.44) applies only

when VS < VI, V2 < VD. The complete functional dependencies

for V1 and V2 are given by


Vl

V1 = Vs

SVD


v2D

V2 = VS

VD


from (4.44) if V < V1 < VD

if V1 < VS

if V1 > VD


from (4.44) if VS < V2 < VD

if V2 < VS

if V2 > VD


(4.45)


B (S-V-2F)p









Using the functional dependencies for V1 and V2 given

by (4.45), we now can solve (4.18) to obtain 4s at the

limits V1 and V2. The surface potential at those points

can be used to define the approximate slopes dis/dV in each

region, which constitute the second parameter at our three-

region piecewise linear approximation. They are,


s=(V ) S(Vs)
sS V VS



(S(V2) IS(V1)
SM = V2 (4.46)
SV 2- -V
2 1


SS(VD) s(V2
W V V


Here, to calculate is(VS), ls(Vl)' ls(V2) and S(VD)'

one needs to solve (4.18) numerically. This process does not

require much computer time. We used the Newton-Raphson

method [35] to calculate the solution and found that less

than five iterations were necessary to achieve convergence.



4.4 Results and Evaluation of the Model


Table 2 summarizes the results of the model merging

weak, moderate and strong inversion. In Figures 4.4 through

4.7 we illustrate the characteristics for the drain current

and the total charge components obtained from the proposed

model. Notice that the curves in these characteristics and

their slopes are continuous throughout the entire range of





63




Table 2 Drain Current and Total Charge Components


DRAIN CURRENT


ID FI(VS,V ) FI(V1,V2)
= I* = + + I*
AnCoZ/L D SS M DW





TOTAL CHARGE COMPONENTS


1 FQG(Vs,Vl)

1 o S


1 FOB (VSV 1
I* S
DL S


FOB(VIV2)
S.M



FOB (VlV2)
S -
M


QN + QG + QB = 0


QG
ZLCo



QB
ZLC
o


+ GW
ZLCo



+ "BW
ZLC
o


__









(Continued)


FOR THE CURRENT:


FI (Va ,Vb)





I* = kT/q
DW 1-SW
W


g2 2Q vb
2 3 K2
a


V
D
[(nl


FOR THE CHARGES:


F G(Va ,Vb)


Q= ;
3


FB(VaVb) =





QGW 1
ZLC I*
o D


21<2


-v b
+ 2 ( 'Q3 + 25/K5)
V
a

S-V
v

K2 g3 + 2Qb /K )
3Ka
-a


kT/q
1-SW


o_2 o3v D
+ Q + 2
S2 g b 3 K2 V?


QBW 1 kT/q
ZLC I* 1-SW
0 D WV


V
2 '3 Q2' D
2 bb
3 K2 2
V,


Table 2






















0.2 B


4-1
0






/
0.1 -


/



extrapolated
/ threshold

1 2
Vt (volts)




Fig. 4.4 Calculated square-root dependence of the drain
current on gate voltage.



















10-2


" 1-5
IH 10


1 1.5 2


V' (volts)


Fig. 4.5 Calculated drain current as function of gate
voltage for three doping concentrations
(x = 2000A).
o










































(N
1)
i-l
0


H


0.1


0.3 0.4
VD (volts)


Fig. 4.6 Calculated drain current
and moderate inversion.


characteristics in weak


0.2


0.5





















































1 2 3 4 5


V' (volts)





Fig. 4.7 Calculated charge components as function of
gate voltage.









operation. This feature results from including the

transition region for moderate inversion, which is not

included in previous work treating weak [31] and strong [7

inversion.

Figure 4.4 shows that for strong inversion the func-

tional relation between the drain current and the gate voltage

follows a square law [20], while in weak inversion this rela-

tion is exponential, as shown in Figure 4.5. This behavior

agrees qualitatively with previous models for the extremes

of strong and weak inversions.

In Figure 4.6 the drain current is shown as a function

of the drain voltage for weak and moderate inversion. The

inclusion of drift and diffusion in our model has produced

a smooth transition into saturation. The necessity of in-

cluding diffusion to produce this smooth transition was first

recognized by Pao and Sah [24].

The total charge components are shown in Figure 4.7 as

functions of the gate voltage. Notice that the inversion

charge increases exponentially at low gate voltages. The

relationship between the charge components and the terminal

voltages has apparently not been established previously for

weak and moderate inversion. As is demonstrated in the next

chapter, these relationships provide a basis for characteriza-

tion of the device capacitances and the displacement currents.

In assessing the validity of our modeling approach and

the accuracy of the expressions developed for the current

and charges, we compare the results of our model against









results from previous theoretical treatments. Figure 4.8

shows experimental data for the square root of the drain

current against gate voltage obtained in a commercial
15 -3 0
device (4007) having NAA = 3x10 cm and x = 1000A.
AA o
In this figure we also show the calculated characteristics

obtained from the model just derived. Since QSS and other

fabrication parameters are not accurately known for this

device, the calculated and the observed characteristics were

matched using the value of the voltage and current at the extra-

polated threshold voltage. Good agreement between experiment

and theory is observed. We also show in Figure 4.8 theo-

retical characteristics obtained from a model using the

strong inversion approximation [7 ]. The discrepancy at

low gate voltages between this model and the experimental

data arise because the strong inversion approximation

assumes that an abrupt transition between depletion and in-

version occurs when the surface potential at the source is

equal to 2pF. This results in a discontinuity in the slope

of the characteristics at the boundary between cut-off and

saturation. A discrepancy also exists at high gate voltages.

This arises because the surface potential, which in the strong

inversion approximation is assumed independent of gate voltage,

is in fact a logarithmic function of VG. As one can show from

equation (4.18) for VG > VT, this function can be approximated

by
Vb2 2 Vy K(2
kT G VG F B(24F-V
S(O) = 2F KT log G 2 --B) (4.47)
SqIK kT/q





71







/i





30

Cc /
'/



15 -3
| N A= 3xl0 cm-

x = 1000 /
20 -
V = 2v

V = Ov
/







10
/



S Experiment
/ Our model
I -- Strong inversion
I! model [ 7 ]


Extrapolated
S*/ threshold

1 1.5 2 2.5

VG (volts)


Fig. 4.8 Experimental values for the drain current compared
with values calculated using our model and using
a model for strong inversion.






















14 -3 /
N =7x10 cm /-
10-5 AA / /
x = 1470A
o /

VD = 2v /
-6
V = Ov
cn B


1 -7- /I x



S Experiment [26]
10-8 Our model
S-- Strong inversion
model [7 ]
I -- Weak inversion
-9
10 model [31]


-i I / I

10
-0.5 0 0.5

VG (volts)





Fig. 4.9 Experimental values for the drain current
compared with values calculated using our
model, using a model for strong inversion
and using a model for weak inversion.





73











VG = Iv

10-4

VG = 0.3v
G o

F -5 VG = 0.lv a
S10 >

VG = Ov "


10-6 G = -0.1
0
10-7


10-7
V, = -0.2v


-8
10 -
V, = -0.3v


-9
10 -
I I I I I
0.1 0.2 0.3 0.4 0.5

VD (volts)





Fig. 4.10 Experimental values for the drain current
compared with values calculated using our
model and using a previous model
(NA = 7x1014, x = 1470A).
AA o
Experiment [26]
Our model
-- Previous model [26]









The proposed new model includes implicitly this dependence

of S in VG.

Figures 4.9 and 4.10, which compare the predictions of

our model with experimental data from the literature [26],

show excellent agreement. Because information was available

only for the doping concentration NAA and oxide thickness x

in this device, the calculated and the experimental charac-

teristics were matched using the value of the gate voltage

and drain current at the extrapolated threshold. In Figure

4.9 we show for comparison previous models obtained for weak

inversion [31] and for strong inversion [7]. In Figure 4.10

we compare our model against a recently developed model for

the entire range of operation [26]. Although this model shows

good agreement with experiment in the weak and strong inver-

sion limits, it fails for gate voltages near the transition

region (VG ~ -0.lv). Furthermore notice the discontinuities

in the slope of the characteristics which our model avoids.



4.5 Conclusions


The major achievement of this chapter is the analytical

description given in Table 2 that unifies weak, moderate and

strong inversion and covers the cut-off, triode and saturation

modes of operation. This description has the following

properties:

(1) It includes the effects of substrate bias

which enables the representation of four-

terminal properties of the MOSFET.









(2) It includes the charges in the gate, channel

and substrate regions as well as the drain

current. These charges provide the basis for

modeling capacitive effects.

(3) It consists of simple expressions having

continuous derivatives with respect to the

terminal voltages. This helps make the

description useful for computer-aided

circuit analysis.

The model developed here is subject to the limitations

of the one-dimensional gradual channel approximation which

become severe in MOSFET structures with short channel lengths.

Other limitations arise from the idealizations used in Sec-

tion 4.2: effective channel length, field independent

mobility and effective charge in surface states. A number

of publications in the technical literature deal with more

detailed descriptions of these parameters and also with

short-channel effects. As explained in Section 4.2, our

model has enough flexibility to incorporate these descrip-

tions.
















CHAPTER V

FUNCTIONAL DEPENDENCIES FOR THE ELEMENTS IN
THE LARGE-SIGNAL FOUR-TERMINAL EQUIVALENT-CIRCUIT



5.1 Introduction


In Chapter III we developed an equivalent-circuit

representation for the transient response of the MOSFET.

By employing the results of Chapter IV, the functional

dependencies of each element in this equivalent-circuit

will be now derived in terms of the applied voltages and

the fabrication parameters of the device. The main ap-

proximation used in deriving such dependencies is a quasi-

static approximation through which, as discussed in Chap-

terms II and III, one extends the knowledge of the dc

steady-state behavior of the device to describe its large-

signal transient response.

The equivalent-circuit for the intrinsic MOSFET

derived in Chapter III is shown in Fig. 3.3. The definition

for each element in the circuit is given in Table 1.

Three types of elements are present: a current source be-

tween drain and source representing charge transport, and

capacitors and transcapacitors connected between each node

representing charge accumulation within the device. In Sec-

tions 5.2 through 5.4, the functional dependence of each of









these elements is derived. The resulting mathematical

expressions are valid for the entire range of operation

of the MOSFET, and include the effect of the substrate

terminal. Such expressions are new.

This chapter also provides the first detailed dis-

cussion of the intrinsic capacitive effects of the sub-

strate and the transcapacitive effects due to the non-

symmetry of the four-terminal MOSFET. In Sections 5.3.4

and 5.4.2 we discuss the engineering importance of these

two effects. Under certain conditions determined by the

particular circuit environment in which the device is used

the equivalent network representation can be simplified.

An example is discussed in Section 5.4.3.



5.2 Source-Drain Current Source


Through the use of a quasi-static approximation, as

discussed in Chapter III, the functional dependence of the

nonlinear source-drain current source can be determined by

extrapolating the static characteristics of the drain cur-

rent found in Section 4.3.1. Thus,


iSD = -ID(VS,'DG',B) (5.1)


which has the same functional dependencies on the terminal

voltage as those describing the dc steady-state.









5.3 Capacitances


5.3.1 Expressions for the Capacitances

The capacitors in the equivalent-circuit are defined

in Table 1 as the partial derivatives with respect to

voltage of the time varying total charge components qG, qB'

q As in the case of the transport current iSD a quasi-

static approximation allows us to write


qG = QG(vSvD' G'B


qB = QN(VS'D'VG'VB) (5.2)

qN = -(qG + )


One can anticipate that a partial differentiation of (5.2)

with respect to the voltages would lead to very complicated

expressions. But we will now show that because of the sys-

tematic approach used in Chapter III to define the circuit

elements, one can find simple expressions for the functional

dependencies of the capacitors.

From Table 1 the capacitors connected to the source

are
SQG
C = (5.3)
SG av

and
aQ
C B (5.4)
SB av


We can use (4.14) to rewrite CSG
SG





79


C vD
CSG _VD
C osG l i 1 (
C Ss Vs Q' Q' dv (5.5)
ZLC I0*Dv g -n
S


where Q' denotes a charge per unit area normalized by the

oxide capacitance C (the dimensions of Q' are volts).

Using chain rule differentiation and the fundamental theorem

of integral calculus,


C Q I*
SG 1 G D
SLC I Dv- Qg(V) Qn (Vs) (5.6)
o D S


But since

DI* VD
avD Qn dv = Q(vs) (5.7)
S vs vS


we finally obtain


C Q'(0) O
SG n Gj- Q;(O)(
ZLCo I Z Qg(0) (5.8)
0 D


where Qn(0) and Q (0) are the normalized and gate charge

per unit area, given by (4.5) and (4.8), evaluated at the

source end (y=0). Similarly


C Q'() QO
-SB Q0 (0) (5.9)
ZLC I* cZL b


For the capacitances connected to the drain, the ap-


proach is the same except that









qI* D D
D D
aD. Q' dv = -Q'(L) (5.10)
Qy n n
vD vD v


Thus, we obtain



CDG (L) [ Q (L)] (5.11)
ZLC I*

and

CDB Q( QQ(L) (5.12)
ZLC ID
o D


where Q'(L), Q'(L) and Q'(L) are the normalized channel,

gate and substrate charge evaluated at the drain end (y=L).

The gate-substrate capacitance is defined in Table 1

as
qB QB
CB 3 vG (5.13)
GB 3vG av


Substituting (4.14), which gives the functional relation

for QB' and applying the chain rule for differentiation

yields

C 3I1* D
GB- 1 D I V ]
ZLCB I QB vG + Q dv d) (5.14)
ZLC0- I B DvG VG )v b n



The expression for CGB is more complicated than those for

CSG, CDG, CSB, and CDB. To find this expression we take
v
the partial derivatives, aI*/3vG and 9/9vG (D QbQ dv),

using (4.27) and (4.36). The procedure is straightforward,

and the results follow:





81


CGB 1 DFI (v DF (vl' 2) DFI(v2'D)
C + + +
ZLC I* SS S+ S
o D L S M W


DFQB (S' 1 DFQB(V1'V2) DFQB(2',VD)
DFQB (s'-V- + + -- (5.15)
S S Sw (5


Here we have defined the functions DF and DFQB as:

I Q V

Q
DFn (v -vb Q + (5.16)
I ag K2 B (:s-V-24F)
1 + e v





1 + 2Q + e va
DFQ(vl vb) 1-2 n (5.17)

L 2Q' a


An alternative form for the contributions of the weakly in-

verted portions of the channel results from taking partial

derivatives with respect to vG in (4.32) and (4.40). This

yields,


I* DF (v v )1 + K2 /Q D
DW I 2 kT/q K2/ VD(5
vG SW 1-Sw 1 + K2/2Q'


and

DFQB (v2'D)_ kT/ + K /Q (5.19)
SW 1-S W 1 + K /2Q1



The results for the capacitances are summarized in Table 3.

Figure 5.1 illustrates the functional dependencies of the









Functional dependencies for the capacitors.


Q (0)
-I* (QG/ZL Q (0))
D



-Q'(L)
I* (Q/ZL Q'(L))
D g



Qn(0)
I* (Q'/ZL Qb(0))
D


CSG

o



CDG
ZLCo




CSB
ZLC
o



CDB
ZLC
o


1
Ir IQ


(Q;/ZL Q(0))


VG DVG


v(L) (

Iv(O) b dv


(*) given by (5.15) through (5.17).


-Q'(L)
n
I*
D


CGB
ZLCo


_


Table 3































0

*C
o / /
C) >
0 > >
C J r-i oC

II II II / \ I m e

< 0 QM\
> >


C(



rrq





S u
0_
m



a) u
IC
o Cd















o n u
Cd d















0
S O
0ce "L
^^Z ? s^Tu UT ous^-oedB






-r-l









capacitances in a specific device. In contrast with results

obtained from models using the strong inversion approxima-

tion [7,36], these curves present smooth transitions between

the different regions of operation: cut-off, saturation and

nonsaturation. A physically based discussion about the main

features of these characteristics is given in the next section.


5.3.2 Physical Interpretation of the Results for the
Capacitances

Consider first the capacitances connected to the source

and drain nodes in the equivalent-circuit. These capacitances

are directly related to the apportionment between the currents

charging the channel from the source island and from the drain

island. To observe how this apportionment occurs, let us

consider the total capacitance at the source CSS given by


3QN
C = C + C =- -v (5.20)
SS SG SB Dv


and the total capacitance at the drain CDD given by


aQ
CDD = CDG + CDB (5.21)



As we shall see, the functional dependence of these capacit-

ances shown in Fig. 5.2 has the form to be expected from the

discussion of the charge apportionment in Section 3.3. In

cut-off there is no charging of the channel and both CSS and

CDD are equal to zero. As the gate voltage is increased,

the channel is turned on in an exponential form (see Fig. 4.5)

causing an abrupt change in CSS. At higher gate voltages,
























(1)
u






4-)

+ I H


C0

u O










4U)






U U)
U U





















o \ -
U 0m










(In
C) 7
U \

S\04












-H ^
+ ^^ V









while the device is in the saturation region, QN increases

almost linearly with gate voltage and hence CSS is nearly

constant. In the saturation region, because there is no

charging of the channel from the drain end, CDD = 0.

Further increase of the gate voltage drives the device into

nonsaturation. Here the channel opens gradually into the

drain allowing thereafter an increasing contribution of

the drain end to the charging of the channel while the con-

tribution from the source decreases. Thus in this region,

as shown in Fig. 5.2, CSS decreases while CDD increases.

For very large gate voltages the charging of the channel

will tend to occur equally from the drain than from the

source. When this happens the values of CSS and CDD tend

to one another as shown in Fig. 5.2.

A measure of the apportionment of the contributions

of the drain and source islands to the charging of the

channel is given by the apportionment function \ defined

in Chapter III as


1 1
C + CC (5.22)
+ DG DB DD
1+ 1+
SG + CSB SS


This function is used in the next section to obtain expres-

sions for the transcapacitances. Its functional dependence

for a particular device is shown in Fig. 5.3. In saturation,

CDD = 0 and X = 1, while in nonsaturation the values of CDD

and CSS approach one another and X tends to 1/2.

























1


0.9

0.8

0.7

0.6


0.5


2 4 6

V (volts)










Fig. 5.3 Apportionment function X for the device described
in Fig. 5.1.









Note from Fig. 5.1 the similarity between the charac-

teristics of the substrate capacitances CSB and CDB and the

characteristics of the gate capacitances CSG and CDG. This

similarity, which also can be observed in the expressions

defining these capacitances, will be used in the next sec-

tion to obtain an engineering approximation for CSB and CDB'

Consider now the gate substrate capacitance

CGB = QB/3VG. This capacitance is related to the control
of the gate over the substrate charge. In cut-off, where

VG is not large enough to turn on the channel, this capacit-

ance is equal to the capacitance of a (two-terminal) MOS

capacitance [37]. As VG increases, an inversion channel

starts forming at the surface of the semiconductor and more

field lines emanating from the gate will terminate in the

inversion channel. Thus, CGB will decrease as shown in

Fig. 5.1. For larger gate voltages, where a strong inverted

channel is formed over the entire length of the intrinsic

device, the gate will exert even less control over the sub-

strate charge and CGB decreases at a faster rate reaching

eventually a zero value as illustrated in Fig. 5.1.

Figures 5.4 and 5.5 show the total gate capacitance CGG

and the total substrate capacitance CBB together with their

components,

C GG- GN + (5.23)
CBB VB ___- + -- 5.4
G G CG



C 3Q - '= 1 + + (5.24)
BB BvB 3vB B






89












U
c)












C-)
-H

(1)








4J




0



















-P
u)
C4

0





o
oU dH






I0(0 rd

O>p
00



> 0

o ard
-rp












> *




urt





0
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tn

rnr jo s;Tun uT cnu2;T dd2
1-
0 > 1/ ro-P 1

>o(Q \\/4 -

















0*
DqZ 9 Sq~n UT OU~qopdp





















0
In
4-,
C)

0
a4


E
0
D o



(1)
U)
4-,


H- $--
oo





& >
-o


> (



41










0 \
DZ o Tuno uT u;TDd
u >
\0 in
\ EV s
\^<
^/^ ^s, ^
/ ^ rl
u sQ)









In the cut-off region there is no inversion channel and

CGG and CBB are equal. Their functional dependency is

that of an MOS capacitance [37]. In the saturation region,

the gate charge depends almost linearly on the gate voltage

(Fig. 4.7), and CGG shows a constant value of about 2/3 ZLC

as predicted by strong inversion theory [20]. In this re-

gion, as VG is increased, the surface potential increases

producing a widening of the depletion layer; consequently

CBB decreases as shown in Fig. 5.5. At the onset of the

nonsaturation region CGG abruptly rises due to the increase

of electron concentration over the entire channel length.

For even larger gate voltages CGG approaches the value of

the total oxide capacitance. In this region, CBB attains

a constant value because the substrate charge becomes in-

dependent of gate voltage. This constant value cannot be

clearly determined from the expressions of the substrate

capacitances just found. In the next section, however,

we discuss an approximation for the substrate capacitance

that permits a good estimation of their values for engineering

purposes.

The main features of the functional dependencies for

the gate capacitances in the MOSFET have been predicted by

previous authors [7,20] using simplified models. Our results

agree qualitatively with these predictions, giving additionally

a detailed and continuous description for these capacitances

and also for the substrate capacitances.









5.3.3 An Engineering Approximation for the Functional
Dependencies of the Intrinsic Substrate Capacitances
C and C
-SB DB
The functional dependencies for the substrate capacit-

ances CSB and CDB were derived in Section 5.3.1. Figure 5.1

shows these functional dependencies together with the func-

tional dependencies for the gate capacitances and the gate-

bulk capacitance. We pointed out previously the similarity

between the functional dependencies of the gate and substrate

capacitances appearing in this figure. From an engineering

point of view, this similarity is advantageous because it

suggests the existence of relations of the form:


CSB = S CSG

(5.25)
CDB = CD CDG


where aS and cD may be simple functions of the voltages.

Such relations would allow considerable simplification in

the computation of the substrate capacitances. In recent

engineering applications [1], CSB and CDB are modeled to a

first order approximation as


CSB = a CSG
(5.26)
CDB = CDG


with a being a constant. Because expressions for CSB and

CDB were not previously available this approximation has not

been verified. With the functional dependencies for CSB and

CDB made available in the previous section we can now study








this engineering approximation. Figure 5.6 shows aS and

aD, defined in (5.25), as functions of the applied voltages.
Notice that although in the nonsaturation region aS and aD

are practically independent of the gate voltage they are

in general not constant.

Using the functional dependencies for CSB and CDB given

in Table 3 we will now derive an improved approximation

for aS and aD that shows a better functional dependence on

the applied voltages while remaining a simple function of

the voltages.

Consider first


CSB Q /ZL Qb(0)
SB _B (5.27)
S CSG QG/ZL Q (0) 5 )


Substituting the expression for Q;, QC and ID given in (4.4)

and (4.14) aS can be rewritten as


fD
Q i(v) (Q (v) Q vs)) dv



vS
aS = VD (5.28)

Qn(v) (Qa(v) Q'(vs)) dv



The integrals in (5.28) can be approximated by a series solu-

tion using the trapezoidal rule for the integration. A

numerical comparison between the exact solution and the

series solution shows that by taking only the first term in

this series we can obtain an approximation that is both sim-

ple and accurate:




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