• TABLE OF CONTENTS
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 Title Page
 Acknowledgement
 Table of Contents
 Abstract
 Introduction
 Previous works
 Packet switch design for ATM...
 An integrated ATM traffic control...
 Space priority buffer management...
 Comparatives study of ATM flow...
 Conclusion
 References
 Biographical sketch






Title: Integrated traffic control mechanisms for ATM networks
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Permanent Link: http://ufdc.ufl.edu/UF00097378/00001
 Material Information
Title: Integrated traffic control mechanisms for ATM networks
Physical Description: vi, 156 leaves : ill. ; 29 cm.
Language: English
Creator: Lu, Shang-Yi, 1964-
Publisher: University of Florida
Place of Publication: Gainesville, Fla.
Publication Date: 1994
Copyright Date: 1994
 Subjects
Subject: Asynchronous transfer mode   ( lcsh )
Telecommunication -- Traffic   ( lcsh )
Electrical Engineering thesis, Ph. D
Dissertations, Academic -- Electrical Engineering -- UF
Genre: bibliography   ( marcgt )
non-fiction   ( marcgt )
 Notes
Thesis: Thesis (Ph. D.)--University of Florida, 1994.
Bibliography: Includes bibliographical references (leaves 146-155).
Additional Physical Form: Also available on World Wide Web
General Note: Typescript.
General Note: Vita.
Statement of Responsibility: by Shang-Yi Lu.
 Record Information
Bibliographic ID: UF00097378
Volume ID: VID00001
Source Institution: University of Florida
Holding Location: University of Florida
Rights Management: All rights reserved by the source institution and holding location.
Resource Identifier: alephbibnum - 002045665
oclc - 33394049
notis - AKN3594

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Table of Contents
    Title Page
        Page i
        Page i-a
    Acknowledgement
        Page ii
    Table of Contents
        Page iii
        Page iv
    Abstract
        Page v
        Page vi
    Introduction
        Page 1
        Page 2
        Page 3
        Page 4
        Page 5
        Page 6
        Page 7
        Page 8
        Page 9
        Page 10
        Page 11
    Previous works
        Page 12
        Page 13
        Page 14
        Page 15
        Page 16
        Page 17
        Page 18
        Page 19
        Page 20
        Page 21
    Packet switch design for ATM networks
        Page 22
        Page 23
        Page 24
        Page 25
        Page 26
        Page 27
        Page 28
        Page 29
        Page 30
        Page 31
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        Page 33
        Page 34
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        Page 39
        Page 40
        Page 41
        Page 42
        Page 43
        Page 44
        Page 45
        Page 46
    An integrated ATM traffic control framework
        Page 47
        Page 48
        Page 49
        Page 50
        Page 51
        Page 52
        Page 53
        Page 54
        Page 55
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        Page 57
        Page 58
        Page 59
        Page 60
        Page 61
        Page 62
        Page 63
        Page 64
        Page 65
        Page 66
    Space priority buffer management for ATM overload control
        Page 67
        Page 68
        Page 69
        Page 70
        Page 71
        Page 72
        Page 73
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        Page 94
        Page 95
        Page 96
        Page 97
        Page 98
        Page 99
        Page 100
        Page 101
    Comparatives study of ATM flow control mechanisms
        Page 102
        Page 103
        Page 104
        Page 105
        Page 106
        Page 107
        Page 108
        Page 109
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        Page 133
        Page 134
        Page 135
        Page 136
        Page 137
        Page 138
        Page 139
    Conclusion
        Page 140
        Page 141
        Page 142
        Page 143
        Page 144
        Page 145
    References
        Page 146
        Page 147
        Page 148
        Page 149
        Page 150
        Page 151
        Page 152
        Page 153
        Page 154
        Page 155
    Biographical sketch
        Page 156
        Page 157
        Page 158
Full Text

UNIVERSITY OF FLORIDA


INTEGRATED TRAFFIC CONTROL MIECHA N ISMS
FOR
ATM NETWORKS











By

SIIANG-YI LU











RTAT PRESENTED TO THE GRADUATE SCHOOL
SYOF FLORIDA IN PARTIAL FULFILLMENT
OF QUIREMENTS FOR THE DEGREE OF
DOCTOR OF PHILOSOPHY ii












ACKNOW LEDG EM ENTS


I would like to express my sincere appreciation to the members of my super-

visory committee for their kind help and guidance throughout this work. I would

like to express special thanks to my committee chairman, Dr. Ilaniph A. Latchman,

for his invaluable suggestions and sincere instruction though this research. I would

also like to thank especially Dr. Scott Miller, Dr. Randy Chow, Dr. Leon \. Couch

II, Dr. Donald G. Childers and Dr. Yang-Hang Lee for discussions, corrections, and

encouragement during all these years. Special thanks should be given to Mr. Bill

\aggener and Mr. Nimish Shah from Loral Data Systems for their kind support for

the whole project and invaluable suggestions and discussions throughout the research

period.

I would like to express my appreciation to Ms. Pam Mydock for her excellent

work in proofreading this dissertation. I would like to give special thanks to my

colleagues and friends who encouraged me to go on for my graduate career: Wenyen

Fu, Attique Ahmad, Diane Warfield, Kwang Rip Hyun, Azhar Khan, John Miller,

Ron Smith and Abdul Nlajid Khan. Finally I would like to thank my husband for

accompanying me through the years without any complaint and my parents, brothers

and sisters for their full support, both spiritually and financially.









TABLE OF CONTENTS




ACKNOWLEDGEMENTS ............................. ii

ABSTRACT . . . . . . . .. . . . . . . .... . v

CHAPTERS

1 INTRODUCTION ..................... ........ 1

1.1 Background ....................... ....... 1
1.1.1 Fast Packet Switching .................... 2
1.1.2 Need for Advanced Traffic Control Mechanisms ...... :3
1.2 Problem Statement .......... ................ 6
1.3 Dissertat.ion O outline ... .. .. .. . ... .. . ....... 8

2 PREVIOUS \VORKS ........................... 12

2.1 Bandwidth Management in Broadband Network . . . ... 12
2.1.1 Equivalent Bandwidth . . . . . . . . . 12
2.1.2 Leaky-Bucket Control Scheme . . ..... . . . 13
2.1.3 Distributed Source Control Scheme. . .. . . . . 1-1
2.1.4 Fram ing Strategy . .. .. .. ... .. .. .. .. ... 15
2.1.5 Virtual-Clock Traffic Control Scheme . . . . . 15
2.1.6 Fast Buffer Reservation Control Scheme ......... 16
2.1.7 Congestion Control Schemes for Best-Effort traffic . . 17
2.2 Switching Technology and Control Strategies . . . . ... IS

3 PACKET SWITCH DESIGN FOR ATM NET\VORKiS ....... 22

3.1 General ATM Switching Mechanism . ....... ). .
3.1.1 Sw itching Fabric . . . . . . . . . .. . 2:3
3.1.2 Buffering ................... ...... 25
3.2 Performnance Study ................... ..... . 26
3.3 A Shaired Nledium/Output Buffering ATM Packet Switch Design 2S
3.3.1 CPS-100 Switch Design Characteristics . . .. . . 2S
3.3.2 Interface Modules ...................... 30
3.3.3 Simulation Approach ...... .............. .35
3.3.4 Simulation Results ..................... 36
3.4 Advantages and Limitations of CPS-100 Switch . . . ... 40






4 AN INTEGRATED ATM TRAFFIC CONTROL FRAMEWORK


4.1 ATM
4.2 ATM
4.2.1
4.2.2
4.2.3
4.3 Traffic
4.4 Traffic
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
4.4.6
4.4.7


Traffic Control Requirements ... .............
Service Characteristics .. .. .. ... .. .. .. .. ...
Constant Bit Rate (CBR) Service . . . . . . .
Variable Bit Rate (\BR) Service . . . . . . .
Available Bit Rate (ABR) Service . . . . . . .
M odeling . . . . . . . . . . . . . .
Management Mechanisms . . . . . . . . .
Network Resource Engineering . . . . . . .
Connection Admission Control . . . . . . . .
Explicit Congestion Notification . . . . . . .
Credit-based Flow Control . . . . . . . .
Burst Admission Control . . . . . . . . .
Usage Parameter Control . . . . . . . . .
Priority Control . . . . . . . . . . . .


5 SPACE PRIORITY BUFFER MANAGEMENT FOR
C O N T RO L . . . . . . . . . . . . . .


47
51
51
52
52
54
57
58
58
59
60
61
61
62


AI'M OVERLOAD
. . . . . 67


5.1 Buffer Management Schemes for ATM Switches . . . ... 67
5.2 Partial Buffer Sharing Scheme and Problem Statement ..... ..70
5.3 A Queneing Model of Partial Buffer Sharing Mechanism . . 72
5.3.1 Calculation of Loss Probabilities . . . . . .... 77
5.3.2 Numerical Results . . . . . . . ..... . 80
5.4 Optimization of Loss Thresholds . . . . . . ..... 82
5.4.1 Numerical Examples: A Three-Class System ...... ..89
5.4.2 Numerical Examples: A Four-Class System . . . ..94
5.5 C conclusion . . . . . . . . . . . .. . . 96

6 COMPARATIVE STUDY OF ATM FLOW CONTROL MECHANISMS102


6.1 Congestion Control Mechanisms for Best-Effort Service . . .
6.2 The TCP Adaptive Window Algorithm . . . . . . .
6.3 Credit-Based Link-by-Link Flow Control: The N23 Scheme . .
6.4 Rate-Based Flow Control: The BECN Scheme . .......
6.4.1 The Effect of Buffer Threshold . . . . . . . .
6.4.2 The Effect of Source Recovery Period . . . . . .
6.4.3 The Effects of Buffer Size and Propagation Delay . . .
6.5 Network Performance Comparison and Discussion . . . .
6.5.1 Sim ulation Scenario A .... ............. ...
6.5.2 Simulation Scenario 13 ....................

7 CO NC LUSIO N . . . . . . . . .. . . . . . .

7.1 ATM Traffic Requirements . . . . . . . . . . .
7.2 Contributions of the Research . . . . . . . . . .
7.3 Future Research . . . . . . . . . . . . . .

R EFER EN C ES . . . . . . . . . . . . . . . . . .

BIOGRAPHICAL SKETCH ............................


102
108
112
117
121
123
123
127
127
132

140


140
141
144









Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy




INTEGRATED TRAFFIC CONTROL MECHANISMS
FOR
ATM NET'\VORKS

By

Shang-Yi Lu

December 1994


Chairman: Dr. Haniph A. Latchman
Major Department: Electrical Engineering

Asynchronous Transfer Mode (ATM), a new cell-based transport technology,

provides a flexible means to multiplex and switch variable rate information with

diverse traffic characteristics and service demands on a single unified network. How-

ever, the need to accommodate the large spectrum of potential applications creates

new challenges in the design of ATM switches and elective traffic control mecha-

nisms. The most critical issue for a successful deployment of the ATM technology is

to design packet switches capable of switching relatively small packets at extremely

high rates while supporting traffic management functions to provide adequate service

guarantees.

In this research an integrated traffic control framework foi vaI ious ATM service

categories and performance objectives is proposed. A switch model which accurately

reflects the hardware design of an ATM fast packet switch has been developed as an






experimental platform for evaluating the feasibility and performance improvement

with different traffic control mechanisms. Several effective traffic control schemes

have been presented and optimized with respect to critical network resources within

a complete network environment as well as on a single switching node. \Ve propose

a generalized Partial Buffer Sharing (PBS) scheme to manage effectively the finite

buffer at a switching node. A queueing model has been developed to characterize

analytically the multiple-threshold system and the optimization procedures that di-

mension the system efficiently to achieve an optimal performance have been presented

and verified. In addition, we conduct a thorough investigation on two effective flow

control mechanisms. the Backward Explicit Congestion Notification (BECN) and the

credit-based schemes, for ATM best-effort traffic. While the credit-based scheme

gives a superior performance, its complexity for practical implementation is often

prohibitive. On the other hand, our results show that a modified slow-start BECN

scheme can be designed to attain asymptotically the same level of performance as

the credit-based scheme, with a significant reduction in complexity. This research

work contributes to the ATM networking technology with higher resource efficiency,

improved network performance, and better resource protection.









CHAPTER 1
INTRODUCTION

1.1 Background

The development of high-speed integrated communication networks has reached

a point heree switching systems rather than transmission systems are the bottleneck

for growing traffic rate and widely ranged applications. In an effort to develop new

switching technologies for Broadband Integrated Services Digital Network I BISDN),

the Asynchronous Transfer Mode (ATM) has been chosen by International Telegraph

and Telephone Consultative Committee (CCITT) as the transport mechanism for a

variety of classes of digital data. ATM is a statistical multiplexing and switching

technique which is based on fast packet switching concepts. The information flow

within ATM networks is organized into fixed-size packets called cells. Thus the ATM

technology allows different traffic types to be multiplexed in a flexible manner and

offers a potential efficiency improvement over synchronous transfer mode through the

statistical sharing of network resources by multiple ATM connections.

BISDN will support a wide variety of network traffic and services with diverse

characteristics and performance objectives. In particular voice, video and data traf-

fic will be carried by the broadband network in an integrated fashion. Examples of

potential application areas include high-speed interconnection of existing data net-

works, distributed file and procedure access, video telephony, coniputer imaging, and

multimedia broadband services such as interactive high-resolution image communi-

cations. Indeed, it has been noted that besides the increasing demand for high-speed

data communications, tie emerging market for digital image services has become

a significant factor driving the evolution of high-speed transport services [1, 2, 3].






Another area of major importance is the deployment of ATM technology and stan-

dards in campus, backbone networks and local area networking (LAN) environments,

the so-called ATM LANs [4, 5]. It is envisaged that the new ATM LAN technology

will overcome the deficiencies of older LAN technologies such as Ethernet and Fiber

Distributed Data Interface (FDDI), which generally cannot provide the necessary

bandwidth and performance guarantees to applications and individual hosts and also

cannot support the increasing user population. The important advantages that ATM

LANs offer over competing technologies include high-capacity networking, the abil-

ity to handle multiple traffic types, the flexibility to cater for different link speeds,

and standardized access to broadband public network services when BISDN becomes

available.

The design of an ATM switch is of fundamental importance to provide the

connectivity which will support all these diverse applications. These potential ser-

vices require bandwidths ranging from a few kilobits per second to several hundred

megabits per second and qualities of service ranging from strict network performance

guarantees to best-effort service class with little or no performance guarantee. More-

over, many of the traffic sources are highly burst, and may generate cells at their

peak rates for short periods and then become inactive. The heterogeneity in the

requirements and traffic characteristics of these different services have important in-

fluences on the ATM switching technology. The key objective is to design and build

packet switches capable of switching relatively small packets at extremely high rates

while supporting traffic management functions to provide the necessary performance

guarantees.

1.1.1 Fast Packet Switching

Packet switches were originally restricted to pure data communication applica-

tions, due to the speed limitation and the complexity of the required control protocols.

However, with the introduction of high-speed and low-error-rate digital transmission







systems, the communication protocols used in conventional packet switches were

substantially simplified. These simplifications made feasible the construction of high

speed hardware-based processing and switching modules, thus increasing the range

of potential applications of packet switches. Fast packet switching has emerged as a

promising switching technique to support the wide range of communication services

envisaged for BISDN. Considerable effort has been devoted to the development and

analysis of fast packet switches in recent years. In fast packet switching technol-

ogy, the transmission facility is used as a "digital pipe" to carry short packets of

information one after another. Information in the header of each packet identifies to

which of many logical connections the packet belongs. Fast packet switching utilizes

the statistical multiplexing technique to provide flexibility for handling variable rate

connections and achieving high utilization of network resources. With this multiplex-

ing scheme, connections of arbitrary bandwidth are accommodated in a simple and

natural way.

1.1.2 Need for Advanced Traffic Control lNechanislns

With communication networks operating at a much higher speed than tradi-

tional data networks, the design of an effective traffic management and congestion

control scheme becomes one of the fundamental issues. Most conventional packet

switched networks carry only nonreal-time data traffic which can be flow-controlled

reactively in case of network congestion; such traffic control schemes are generally

acknowledgment-based. They react to network congestion by instructing t ie traf-

fic sources to throttle their excessive traffic hlow (e.g., reduce their flow window).

However, due to the increased ratio of propagation delay to cell transmission time,

these reactive controls which depend on simple feedback signals fiom the receiver

may be very inefficient for ATM networks. A large amount of information can be

in transit within the pipeline by the time that feedback leaches the traffic source.







Applying purely reactive controls can result in a vast loss of information during net-

work congestion and induce data retransmissions which will fIuther deteriorate the

situation.

Another challenge arises from the need to handle a wide variety of network

traffic with diverse characteristics and performance objectives via a common high

speed switching architecture. In particular ATM switches are expected to support

very burst and highly unpredictable data sources along with predictable and smooth

Constant Bit Rate (CBR) sources and with other relatively smooth traffic. In the

past those different applications were typically transported and switched on separate

networks and thus networks could be optimized individually to meet the different

performance objective for each application.

The integration of a wide diversity of traffic and Quality Of Service (QOS) con-

straints in ATM networks calls for new switching architectures and control schemes.

Real-time traffic, such as voice and video, is mainly delay-sensitive and cannot be

recovered through retransmission; these traffic sources have stringent performance

requirements in terms of delay, delay jitter and cell loss. On the other hand, con-

ventional data sources, depending on their applications, have diverse network per-

formance requirements. For instance, file transfers are not usually delay sensitive

but are loss sensitive, while remote login and telnet data applications are sensitive

to absolute delay. The network will not be able to guarantee the promised QOS

unless adequate control is exercised on critical network resources (i.e., switching and

communication bandwidth, buffer space and processing capacity). The role of re-

source management and congestion control is obviously more involved in an ATM

environment than in a conventional data network. In particular, the control schemes

implemented in an ATM network need to be effective in yielding predictable and

reliable network performance and must also be flexible in accommodating different

traffic and service demands.







call holding time

CALL LEVEL

call inter-arrival time
burst inter-arrival time silence period

BURST LEVEL

burst duration
cell length

CELL LEV pLUEL

cell inter-arrival time

Figure 1.1: Multilevel traffic processes

Recently, traffic and congestion control in ATM networks has received a tremen-
dous amount of attention. A variety of traffic control strategies ha\e been proposed
over the past years. Among them, multilevel control frameworks hate been proposed

by several researchers and considered to be an effective and efficient approach to

prevent network congestion and to handle different service demands [6 7, 8]. The
multilevel traffic and congestion control is motivated by the fact that traffic sources

usually have traffic states characterized by different levels, namely, call level, burst

level and cell level. As shown in Figure 1.1, calls are composed of buists which are, in
turn, composed of cells. Therefore, congestion plienomienoni should be evaluated and

controlled at different levels and time scales. Hierarchical layering of controls were
proposed to prevent congestion through proper call management at network access

nodes and through resource allocation within network elements. Additionally, traffic

shaping mechanisms are performed at the network access nodes to smooth out traffic

burstiness. The distributed source control scheme proposed il [G] and the congestion

control framework described in [7] are examples of multilevel traffic control strategies.







Generally speaking, traffic control mechanisms used in virtual circuit based

packet networks (such as ATMNs) can be divided into three major components [9]:

(1) call/session admission controls to ensure a small probability of congestion; (2) so-

phisticated network resource management schemes to provide different QOS as well

as efficient use of network resources; and (3) reactive controls which are able to be

invoked in real time to minimize adverse impacts of congestion and to guarantee

fairness between competing users. The first two belong to avoidance controls and

are aimed at preventing networks from reaching an unacceptable level of congestion

by conservative admission policies and preventive resource controls. Although these

control strategies cause more processing overhead and thus reduce utilization of net-

work bandwidth, they provide a robust means to support diverse applications and to

guarantee QOS for critical traffic in broadband integrated networks. Incorporating

congestion avoidance controls along with reactive control mechanisms as backups is

considered to be the optimal approach to solve the network congestion problem.


1.2 Problem Statement

The multilevel traffic and congestion controls provide a framework that allows

effective management of congestion occurring in different time scales. Many research

efforts have been directed toward the development of various traffic admission control

algorithms, applied at network access nodes to manage traffic loading. However, the

issue of network resource management and maintenance, which is equally essential

for the multilevel traffic controls to be successful, has not yet been well addressed.

The capability of a network element to engineer critical resources adequately

in both normal and overload conditions is necessary and crucial for ATM networks.

Our interest in this research is motivated by the following reasons: (1) Many data

sources are very bursty and highly unpredictable and they are very difficult to be

accurately characterized in advance of transmission. Strict access controls result in







low efficiency and are not well-suited for this type of traffic. More dynamic controls

functioning at network elements as well as traffic access nodes are needed to achieve

high resource efficiency and ensure adequate protection. In addition, some of traffic

sources are not flow-controllable, for instance, voice and video tiaflic sources cannot

stop generating cells even when the network is congested. Real time controls at

network elements are important to prevent severe performance degradation during

network overload; (2) Due to the interaction between different traffic streams within

a packet network, packet flow can cluster together and create local congestion, even

when the arriving traffic streams are well-regulated at their access nodes. Study has

shown that the worst case loss and delay performance of a packet network may not be

sufficiently controllable from the edges of the network [10]; and (3) As has frequently

been observed in operational networks, network users may sometimes misbehave.

A user may transmit data at a high rate without listening to the network control

information. Moreover, such misbehavior can also be caused by software or hardware

failures or by protocol implementation errors. Some access control schemes, such as

virtual leaky bucket, would let the excessive cells get through at risk, that is, by

tagging excessive traffic cells so that they can be discarded in case of congestion.

It is the responsibility of the network control to prevent misbehaving users from

interrupting normal service to others.

In addition, over the past years, the research works in the areas of ANTM switch

design and traffic management have progressed essentially independently [II1. Few of

the previous studies of ATIM tallic control really take into account the feasibility and

complexity of implementing their control strategies on a realistic switch structure.

In a realistic switch, the limited processing speed, finite buffer capacity and system

architecture may become a bottleneck for implementing a complicated traffic control

mechanism. The issue of the operational details of \ATNI traffic control schemes

needs to be addressed carefully since it will not only directly affect the complexity of






network system hardware but also determine if ATM applications can be supported

economically.

This research is intended to investigate effective integrated control mecha-

nisms, as well as proper architectures, for switching nodes within an ATM environ-

ment. The integrated controls, when incorporated with a well-suited access control

scheme, can be applied to ATM switches to enhance overall network performance and

to deal with different service demands. The main objective of the proposed control

mechanism is to provide adequate network resource management to support various

QOS requirements and allow high resource efficiency.


1.3 Dissertation Outline

This dissertation is organized as follows. An introduction of the development

and current status of ATM technology is first presented and addressed in this chapter.

The critical issues for the successful deployment of ATM technology are also discussed.

In Chapter 2, an overview of previous literature in this area of research is

given. This overview covers many research works that have been conducted in earlier

stage and their pros and cons are discussed.

In Chapter 3, we motivate our considerations in this dissertation of a shared

medium/output buffering ATM switch. This study is part of the research project sup-

ported by Loral Data Systems. It contributes to the development of the Loral fast

packet switch and, in addition, provides a close insight into the ATM switch design.

This research has considered three major approaches to ATM switch design: shared

medium, shared memory and space division. A complete analysis was performed of

the ATM switching technology. The performance characteristics, the limitations and

the potential application areas of different switch architectures were investigated thor-

oughly. We developed a simulator which reflects accurately the hardware design of

the Loral CPS-100 ATM-based switch and conducted an exhaustive simulation study







to analyze the switch characteristics. \Ve show that critical network performance can

be controlled effectively with the implementation of appropriate traffic control mech-

anisms. The study provides a realistic ATM switch model, which is fully acceptable

for supporting all types of ATM services at the preliminary stage of ATM networks,

as an experimental test-bed to evaluate the feasibility and performance improvement

with different traffic control strategies.

An integrated traffic control framework for ATM networks is presented in

Chapter -1. A study is conducted of the traffic characteristics, QOS requirements,

modeling methods and applicable traffic management schemes of potential ATM ap-

plications. Specifically, ATM networks are expected to support three basic types of

services: Constant Bit Rate (CBR), Variable Bit Rate (VBR) and Available Bit Rate

(ABR). To accommodate the wide variety of ATM applications with diverse traffic

characteristics and performance objectives, dynamic controls need to be enforced on

critical network resources to achieve high resource utilization and ensure adequate

protection. Appropriate traffic management schemes should be applied to differ-

ent service types based on their traffic characteristics and QOS and, moreover, they

should be effective on different time scale levels to provide a robust and complete con-

trol. An ATM traffic control architecture that integrates various traffic management

schemes with effective control functions is proposed.

In Chapter 5, the issue of mIanaging optimally the finite output buffers of

an ATM switch is investigated. This research considers a generalized space priority

queueing strategy, the Partial Buffer Sharing (PBS) scheme, which provides preferen-

tial treatment to the traffic with sensitive loss requirements. A qreueing model that

characterizes analytically a multiple-priority shared buffer system controlled by the

PBS scheme is presented. The queuleing system is modeled as a discrete time Markov

chain with finite buffer capacity B and N classes of arrivals. With the assumption

of a imultinomial traffic distribution, a queueing model that predicts accurately the






steady-state loss probabilities of a multiple-class system under a set of given loss

thresholds is developed. In addition, numerical procedures are introduced to opti-

mize the threshold level selection to yield the maximal system admissible load. By

employing the optimization procedures, the design space can be explored efficiently

to find the best thresholds without making an exhaustive search over the entire range

of possibilities. Numerical examples are provided to show the verification and effec-

tiveness of the optimization procedures. The objective of the study is to dimension

the finite buffer space properly to guarantee acceptable loss probabilities for different

service classes. Making use of the priority control, the system is able to support

different grades of loss quality with a minimum hardware cost and also provide a

better control on the delay introduced during the buffering. It is shown that system

performance can be improved substantially by dimensioning the buffer capacity to a

moderate size and imposing appropriate threshold levels.

While Chapter 5 investigates the priority control scheme that manages critical

resource on a single switch node, in Chapter 6 the issue of controlling traffic flows

within a communication network is discussed. Although priority control provides an

effective method to manipulate finite network resource as congestion occurs, priority

control doesn't have the ability to release networks from congestion status since it

cannot reduce incoming traffic. This research considers the feedback flow control

schemes that apply to the ATM best-effort service class to minimize adverse impacts

of congestion as well as guarantee fairness between competing users. The study is mo-

tivated by the fact that the traffic characteristic of this type of service is very difficult

to predict in advance of transmission and, therefore, strict admission controls are not

well-suited for this traffic type. What is needed for these applications is a dynamic

control that can be evoked in real time to regulate the traffic flow along a virtual cir-

cuit as necessary. Two classes of flow control which have been proposed to the ATM

Forum are investigated: the credit-based and the rate-based flow control schemes.







This research gives an exhaustive comparative study of these two control schemes

and addresses in detail tleir relative advantages and disadvantages. It is shown that

with carefully designed system parameters, the control schemes can prevent network

throughput from being severely affected by packet retransmissions and provide sub-

stantial performance improvement. We conduct a complete analysis on the issues

of connection transient behaviors and fairness of resource shaking by performing the

simulation on different network configurations. The credit-based scheme provides a

superior performance but requires a significant amount of specialized hardware at

the ATMI layer. While with the rate-based scheme the users may suffer performance

degradation under extreme variations of traffic load, the rate-based approach only

imposes very moderate requirements on the switch hardware. \e demonstrate that

the performance of the rate-based scheme can be improved to achieve asymptoti-

cally the same level of performance as the credit-based scheme by making use of a

slow-start procedure and a larger buffer.

Finally, in Chapter 7 a conclusion of the research work is drawn and some

future research is proposed.












CHAPTER 2
PREVIOUS WORKS S

2.1 Bandwidth Management in Broadband Network

There are a lot of research works being undertaken in developing the best

approach to manage network resource and deal with congestion problem. Some im-

portant works that proposed to control congestion in a preventive way include admis-

sion control and bandwidth enforcement (e.g., equivalent bandwidth, leaky-bucket,

distributed source control, framing strategy and fast buffer reservation), link-by-link

flow control, priority control and traffic shaping. Some other woiks proposing reac-

tive congestion control schemes include forward and backward congestion indication,

adaptive window sizing, throttle controls and selective cell discarding. In this section,

a review of the important previous research and a comparison of their features are

presented.

2.1.1 Equivalent Bandwidth

When a call request is received, the network needs to determine whether to

accept or reject, the new connection, based on the traffic characteristics and the

current network load. Each accepted connection is then policed during the data

transfer phase to ensure that the admitted traffic conforms with that specified at call

establishment. To make the decision, the network lhas to compute the amount of

effective bandwidth that needs to be reserved for the new connection and evaluate

the impact on the current network condition. Because of the potentially dramatic

differences in the statistical behavior of connections, the problem of characterizing the

equivalent bandwidth of a new connection creates a critical challenge and has drawn







lots of research attention. Various approaches have been proposed to determine the

equivalent bandwidth of connections: some use sets of preconiputed curves obtained

by analysis or simulation [12, 13, 14, 15] while some address computational procedures

based on suitable traffic descriptors and the desired QOS [16, 17]. The important

considerations in choosing such an approach are if the traffic model can accurately

reflect the dynamic nature of network traffic conditions and connection characteristics

and if the computation is simple enough to be consistent with real-time requirements.

2.1.2 Leaky-Bucket Control Scheme

The leaky-bucket scheme proposed originally by Turner [19] is a bandwidth en-

forcement algorithm for controlling the average cell rate and the burstiness of a logical

connection. Various versions of the algorithm have been proposed. The fundamental

principle of the leaky-bucket scheme is that an arriving cell can be transmitted only

if the corresponding connection has a token in its bucket. A token is consumed from

the bucket when the user transmits a cell. If there are no tokens available, the cell

can be discarded or be stamped for preferential discarding in the event it encounters

congestion. Tokens for each connection are generated at ail expected average cell

rate and a certain number of tokens (up to the bucket size) can be saved so that the

maximum burst size is controlled.

The leaky-bucket approach enforces traffic control at the network access node

and no further control over the order of service is used once cells are accepted. There-

fore priority control needs to be enforced on network elements to provide satisfactory

network performance for different classes of traffic. It has been shown that the max-

imum delay in a packet network can be guaranteed by making use of fair queueing

service discipline at traffic multiplexing points, in conjunction with the leaky-bucket

admission policy [20]. The leaky-bucket control scheme allows performance guar-

antees to be traded off against resource efficiency and traffic birstiness. However,

one of the drawbacks of this approach is that there are currently no computationally







effective ways to decide when a new connection can be safely multiplexed with other

existing connections [21]. In addition, the network resource can be under-utilized if

the policing policy specified by user is too conservative.

2.1.3 Distributed Source Contiol Scheme

Ramamurthy and Dighe presented a Distributed Source Control (DSC) al-

gorithm for controlling the rate of traffic entry into a broadband network based on

pre-negotiated control parameters [22]. DSC is basically a congestion avoidance con-

trol strategy that regulates traffic sources to conform to traffic metrics that can be

supported by the network. The underlying philosophy behind DSC is that the func-

tion of congestion control in the network should be done with respect to the network

time constant (NTC). NTC defines the interval over which network traffic must be

averaged and is determined by the link bandwidth, the amount of memory at each

node, and the delay requirements of different traffic types that are being integrated in

the network. DSC involves the negotiation of two control parameters, 1V' (the win-

dow size) and T, (the smoothing interval), between the source and the network access

node. The ratio, I1',/T, is chosen to be equal to the average throughput expected

by the source when active. It has been shown that the network delay and cell loss

performance are improved by reducing the smoothing interval T,. A multilevel con-

gestion control strategy was proposed later on [6] based on this approach. Depending

on the time constants of events that are being controlled, a different level of control

is evoked to prevent network congestion. The approach involves complicated traffic

control and parameter negotiation procedures, which may cause significant control

overhead on the network. Moreover, since the traffic conLrol scheme is performed

only at the network access node, there is no evidence showing that the worst-case

delay and cell loss probability are bounded.







2.1.4 Framing Strategy

Golestani proposed a time-framing congestion control strategy, based on a

packet admission policy at the edges of the network, and a service discipline called

Stop-and-Go queueing at tle switching nodes [10, 241. The underlying idea of the

framing strategy is to confine packets within certain logical containers traveling in the

network, called time frames, and, therefore, the original smoothness of the admitted

traffic can be preserved throughout the network. The framing strategy ensures that

the burstiness of the traffic anywhere inside the network corresponds only to the

burstiness of the admitted traffic at the edge of the network and that it is not altered

as a result of complex interactions between traffic streams inside tle network. Thus

bounded delay and delay-jitter of each packet can be guaranteed. This approach

provides an attractive feature for traffic which is delay or delay-jitter sensitive, such

as video traffic.

However, the benefits of congestion-free and bounded-delay transmission are

basically accomplished at the cost of a strict admission policy to enforce the smooth-

ness property on packet arrivals. In order to achieve a reasonable bound on the

end-to-end delay and delay-jitter of each packet, we usually have to choose a small

frame size which is typically only a small fraction of a second. Since sucl a small av-

eraging period is often insufficient to smooth out the statistical fluctuations of traffic

sources, this admission policy requires in practice that capacity be allocated based

on the peak rate of the connections. Consequently, this approach potentially leads

to low utilization of the network resource.

2.1.5 Virtual-Clock Traffic Control Scheme

The virtual-clock traffic control algorithm proposed by Zhang [23] is a rate-

based approach to control congestion. In the virtual-clock strategy, a virtual-clock,

which ticks at every cell arrival from a data flow, is assigned to each logical connection.






Initially, the virtual-clock is set to the real clock time. The tick step is set to the

expected average inter-cell arrival time. Thus the value of the virtual-clock will denote

the expected arrival time of the arrived cell. The multiplexing node stamps the cell

from each connection with its virtual-clock time and orders cell transmission based

on the stamp values. If a user transmits according to the specified average rate, the

virtual-clock control assures that the user's request throughput is guaranteed, that

is, the minimum throughput will not be affected by misbehaving users. The users

who violate their reservation will receive the worst service since their virtual-clock

advances so far that their cells will be placed at the end of the service queues. Note

that. the excess traffic would still get service if the resource is free. Consequently,

the resource utilization is maximized while the interference among different users is

prevented.

The virtual-clock strategy may be viewed as a generalization and abstraction

of the round-robin service discipline. Its major advantage is the provision of fairness

and minimum throughput guarantees in the services offered to competing connections

in the network. A drawback of this approach is that no bound has been obtained

currently for the delay and jitter performance associated with it. This approach may

not provide a satisfactory performance guarantee for the traffic which has stringent

requirementson the worst-case delay and delay-jitter. Another problem that has to be

considered for the virtual-clock control is the complexity and cost of implementation

on a traffic multiplexing node. Since a cell that ai rives late may be stamped with

an earlier virtual-clock, the processor may need to sort the cell positions in a service

queue every time it receives a cell. This may result in significant processing overhead

when the queue is large.

2.1.6 Fast Buffer Reservation Control Scheme

The end-to-end protocols of virtual connections typically will operate on the

basis of larger data units consisting of many ATM cells. If cell discarding is done







on a cell basis rather than on a burst basis, each discarded cell is likely to belong

to a different virtual connection. Therefore it would be desirable for a congested

network to react by discarding cells on the basis of connection bursts so that the

cell losses will affect as few connections as possible. Turner proposed a fast buffer

reservation scheme [21] that allocates network resources to traffic bursts of variable

rate connections in order to preserve the integrity of the bursts. For each connection

passing through a given link buffer, the network keeps track of the activity on the

connection by associating a state machine with two states: idle and active. Upon

reception of the start cell of a burst, a prespecified number of buffer slots in the link

buffer will be allocated to the connection if they are available and the state machine

enters the active state. The connection is guaranteed access to those buffer slots

until it becomes inactive, which is signaled by a transition to the idle state, and then

the bulfer slots will be released. If the unused slots in the link buffer are less than

the prespecifed number, the whole burst will be discarded. The virtual connection

admission control makes acceptance decisions based on the estimated probability of

the instantaneous demand for buffer slots exceeding the buffer's capacity, called the

excess buffer demand probability, so that the burst discarding rate can be controlled

to an acceptable level.

2.1.7 Congestion Control Schemes for Best-Effort traffic

With the admission control and bandwidth enforcement schemes that have

been described above and a priority control mechanism functioning at the network

element to support differential QOS, thle traffic with predictable and relatively smooth

characteristics such as Constant Bit Rate (CBI) and Variable Bit Rate (\BR) traffic

can be handled efficiently and effectively. However, a large number of existing data

networking applications such as LAN interconnection produce very burst and highly

unpredictable traffic and they are not suitable for strict admission control. In the

past, window-based flow control mechanisms have been widely used for traffic control






in networks and have served well for reliable data transfer applications in low-speed

network environments. With the realization of high-speed channels and the need to

support diverse service requirements of new data applications, it llas been found that

the traditional sliding window control schemes tend to function slowly under such an

environment and thus are incapable of providing effective control functions.

Several researchers have investigated new bandwidth management schemes

that provide adequate performance improvement for high-speed data applications.

One promising approach is to allocate some minimal resources to the class of traffic

but allow additional traffic transmission on a best-effort basis with no performance

guarantees. Two classes of closed-loop feedback control mechanisms have been pro-

posed to regulate the traffic entry: rate-based (82] and credit-based [81] schemes. It

has been shown that both schemes can be engineered to provide high resource effi-

ciency in ATM environment. In addition to these works, an adaptive scheme where

both flow window size and buffer size of a connection can be dynamically allocated

during a call duration was proposed by Doshi and Heffes (IS) for large file transfer

applications.


2.2 Switching Technology and Control Strategies

Fast packet switches have been extensively studied in the literature because

of the wide range of environments where they can be applied. An overview of the

ATM switch architectures and products will be presented in Section 3.1. A good

survey on commonly used switch architectures and discussion of issues pertaining to

implementation and performance can also be found in [25].

Due to the unscheduled nature of arrivals to a packet switch, inevitable block-

ing may arise if two or more inputs attempt to transmit packets simultaneously to

the same output. An essential issue in realizing the fast packet switching is how to

smooth the statistical fluctuations in packet arrivals to the switch. llluchyj and Karol







[26] have proposed four different approaches for providing the necessary buffering in

the switch: these are input queueing, input smoothing, output queueing and com-

pletely shared buffering. Their study has shown that the system can achieve optimal

throughput and delay performance if all the queuing is done at the output.

A detailed analysis and performance study of an output-buffering packet

switch based on exponentially distributed packet length assumption were presented

in [27]. Iliadis has demonstrated that under imbalance traffic the shared output

buffering arrangement performs better than the dedicated output buffering arrange-

ment (2S]. However, a potential problem with the shared output buffering is that

one heavily loaded output might monopolize use of the shared buffer, thereby ad-

versely affecting the performance of other outputs. There are many studies devoted

to finding the best approach to allocate a limited buffer space among outgoing links.

A detailed comparative performance analysis of various buffer management schemes

can be found in [29]. A major drawback that limits the application of these early

works is the simplifying assumption of nonvarying traffic loads made in developing

these schemes. Recently, Tipper and Sundareshan have presented an adaptive algo-

rithm to dynamically allocate buffers under varying load conditions [30].

The service scheduling problem at a multiplexing or switching node has also

drawn lots of attention. It is well recognized that priority queueing schemes can

be used as an effective scheduling method to satisfy different delay requirements of

mixed ATM traffic [31]. Several dynamic priority schemes have been proposed and

studied for optimally controlling the performance tradeolff among multiple service

classes [32, 33, 34, 35, 36]. Two dynamic priority schemes, Miniimum Laxity Threshold

(MLT) and Queue Length Threshold (QLT), were presented in [3-1]. With the priority

controls, the priority queues are served in a dynamic manner so that the performance

degradation for the low priority traffic can be reduced as the high priority traffic is

overloaded. Their performance on scheduling two classes of traffic (realtime and






non-realtime traffic) was compared to the performance of two other conventional

scheduling disciplines, first-come-first-serve and strict priority scheme. It has been

shown that by employing the dynamic priority scheme. desired performance levels

can be achieved for both the traffic classes if an appropriate threshold is chosen.

Lim and Kobza have proposed a Head-of-the-Line with Priority-Jumps (HOL-

PJ) priority scheme to explicitly control the delay performance of different, classes

of delay-sensitive traffic [37]. Although the HOL-PJ control scheme provides delay

guarantees for traffic with different service requirements, a potential drawback of this

scheme is the significant processing overhead required for monitoring cells for time-out

and moving cells to the next level priority queue. Lately, Oh, et al. have presented

a dynamic priority method (36], in which the priority assignments are carried out

based on the number of cells queued in each service class buffer and their waiting

time.

There are some research efforts devoted to the analysis of applying priority

discarding schemes as a local congestion control to satisfy diverse loss requirements

of different traffic classes [38, 39, 40]. Some of the ATM applications such as voice

communications can tolerate limited loss of information without significantly degrad-

ing service quality. The priority discarding strategies recognize the different cell loss

requirements of traffic classes and discard information with bias. It has been shown

that such a prioritized system is capable of achieving better performance than non-

prioritized systems [38]. Furthermore, a priority discarding scheme can be used in

conjunction with a special encoding technique so that the impact of cell discarding

can be reduced to a minimum. Goodman [41] has proposed an embedded coding

method to segregate the coded bits for a segment of speech into separate packets ac-

cording to their importance to the decoding process. Priority is given to cells carrying

more important information when network congestion occurs.





21

The cell loss probabilities of different loss priority classes subject to various

space priority strategies for a finite buffering system were analyzed and compared

in several research works. Kroner 173], Hebuterne and Gravey [75] and Doshi and

Heffes [76] analyzed a push oul scheme with different queueing models. In the control

scheme, an arriving low priority cell is lost if the buffer is full, while an arriving

high priority cell is allowed to push out a low priority cell in the queue in order

to make room for itself if the buffer is full. Another space priority strategy that

also has drawn lots of attention is the partial buffer sharing scheme, where a low

priority cell is admitted to the system only if the current queue length is less than
a pre-defined threshold; otherwise it is lost. Lin and Silvester [70], Kroner [73] and

Meyer, et al. [74] have studied the cell loss probabilities of a binary-class queueing

system employing the partial buffer sharing scheme. Petr and Frost [G9] deal with the

problem of choosing the optimal set of nested thresholds for a ,multiple-class system.

A searching procedure is proposed in their study for the selection of optimal loss

thresholds based on a simplified queueing model.












CHAPTER 3
PACKET SWITCH DESIGN FOR ATM NETWORKS

3.1 General ATM Switching Mechanism

Asynchronous Transfer Mode (ATM) which was initially proposed as a stan-

dard for the emerging BISDN is clearly the most appropriate transport technique

to use for communication services with diverse traffic characteristics and service de-

mands. However, while ATM certainly offers great flexibility in handling the wide

diversity of bandwidth and latency requirements resulting from the integration of

broadband and narrowband services, the timely implementation of ATM creates new

challenges in switching technology. Over the past several years enormous efforts have

been devoted to the research and development of ATM switching systems. In this

chapter, a survey is given of the design and implementation of ATM packet switches

and the relative advantages and disadvantages are discussed. This research has con-

sidered three major approaches to ATM switch design: Shared Medium, Shared

Memory and Space Division. In addition, the Loral CPS-100 ATM-based switch is

presented as an example of the fast packet switches based on shared medium/output

buffering schemes. The rest of this section gives an overview of the ATM switching

technology and products. Section 3.2 discusses the performance characteristics of

different switch architectures. Section 3.3 describes the CPS-100 switch architecture

and functional blocks in detail and Section 3.- discusses the performance character-

istics of the CPS-100 packet switch.

The number of manufacturers working on ATM switching technology has

increased dramatically over recent years. Some of them are building small ATM








Control System





Fabric
Interface Switch Fabric






Figure 3.1: General ATM Switch Architecture

switches for LAN markets, and others focus on larger switches for MAN or \\'AN ap-

plications. An ATM switch may generally be divided into three major components:

{(1 systemm control, (2)fabric inlerface_ and (3).swilching ]fabric [3, 5) (see Figure 3.1).

System control is responsible for high level control functions such as virtual connec-

tion management, maintenance and administration, which are mainly performed by

software. Fabric interfaces provide connections to the external facilities. The func-

tions of a fabric interface may include speed and format conversion, synchronization,

Virtual Connection Identifier (VC1) translation, signaling and routing information

identification, load monitoring, congestion control and so on. The switching fabric

performs the basic switching function based on the routing information added by

the fabric interface to every incoming cell. Of these thIree components the switching

fabric is the most significant pait of an ATM switch since it decides the performance,

complexity and cost of the system design [5].

3.1.1 Switching Fabric

The switching fabric may fall into one of the t \.o forms: time division or space

division, depending on its switching scheme [25]. The key distinction between these

two kinds of switching fabric is the sequential versus parallel routing of cells. In time







division, all the input cells are multiplexed into a single common stream before being

routed to their output destinations. The core of the time division switching fabric

may be either a high-speed shared medium or a shared memory. Since every cell

flows across the shared medium/memory, the medium/memory bandwidth should be

sufficiently large to accommodate simultaneously all incoming traffic. The bandwidth

thus places an upper limit on the total capacity that can be supported by the switch

architecture. A number of time division switch designs with a total capacity up to a

few Gbps have been developed and implemented, for example, Prelude [42], Hitachi

[43] and Paris [44]. Although using today's state-of-the-art VLSI technology, it is

possible to implement a time division switching fabric with a large switching band-

width of more than a few Gbps, the switch design is still limited by other electrical

and physical factors which could affect the information transfer, for instance, the

reflections on the multiple stubs of the shared medium [45].

Some manufacturers [44, 46, 47, 48] have also developed shared medium/memory

based switching elements as a chipset or a single chip so that large switches can be

constructed in a modular way by interconnecting smaller building blocks. For exam-

ple, the CMOS VLSI of the ATOM switch from NEC [47] was realized by using the

Bit-slice technique for organizing the data and control portion of the switch elements

and topology frame technology, which eliminates the need for backplane connections

by allowing boards to be mounted edge-to-edge. In [46], a shared memory switching

element which was realized by a single CMOS chip is described. It has been shown

that, under the assumption of a combination of Bernoulli input traffic patterns and

probabilistic routing, the cell loss probability can be less than 10-"2 at 85% load per

output of the switching element. The shared memory design has been proven able

to improve significantly the cell loss probability of the switch, since all the input and

the output queues can allocate the memory buffer dynamically on demand [5].







In space division, there exist parallel physical paths between tile input ports

and the output ports so that multiple cells may be transmitted through the switch

concurrently. This makes the capacity of the space division switching fabric theo-

retically unlimited although, in practice, it is still restricted by other factors such as

power consumption or the physical size of the switch. The concurrent transmission of

multiple cells through the switching fabric also introduces the possibility of conflict

in setting all required paths simultaneously. Tllis phenomenon is usually referred

to as internal blocking and is a significant factor which limits the throughput of

the switch. The maximum throughput that can be achieved for a particular switch

architecture and a given hardware complexity, in terms of the number of required

stages and switching elements, are the central issues underlying space division switch

design. Space division switches may be further classified according to a variety of

aspects, for instance, single versus multiple path, (internally) buffered versus un-

buffered, and blocking versus nonblocking. The Crossbar network [25], the Banyan

network [49] and its variations, the Benes network [50] and the Clos network [47] are

some well-known examples in the general family of space division switches.

3.1.2 Buffering

Buffering strategy is another important issue affecting the performance of all

ATM switches. Due to the statistical nature of arrivals at a switch, a number of

cells from different input ports may simultaneously be addressed to the same output

port. At most one of these contending cells is allowed to pass through the switch

immediately while the remaining ones must be queued for later transmission. This

kind of contention, commonly referred to as output contention, is unavoidable and

must be accommodated by some form of buffering. There are a number of options for

buffering strategy [51]: internal buffering, input buffering, output buffering, as well

as combinations of the above. The throughput of the switch is largely dictated by the

type of buffering selected. For input buffering, the cell arriving at input k is stored







in a buffer corresponding to input k, while for output buffering, the cell destined for

output k is stored in a buffer corresponding to output k. On the other hand, internal

buffering provides buffers inside the switching fabric where contentions occur. It has

been shown that. a switch with output buffering can achieve optimal (unity) through-

put performance while a simple input-buffering switch, due to head-of-line (HOL)

blocking, is always restricted to a maximum possible throughput of less than unity

[52]. It has been proven that, under the assumption of uniformly distributed traffic

load, the maximum possible throughput of an input-buffering switch is 0.5S6 when

N (the number of incoming/outgoing links) is very large. The throughput perfor-

mance of input-buffering switches can be improved by the use of more sophisticated

control mechanisms. A parallel "ATOM" (ATM Output-buffering Modular) switch

architecture was proposed in [5-1]. With this architecture, a 32 by 32 ATM switch

with a capacity of 9.6 Gpbs was realized using 70 Nlbps BiCIOS technology and a

simple resequencing technique was used to keep the sequence integrity for cells sent

out from the parallel switching planes.


3.2 Performance Study

A particular switch architecture may be evaluated from the viewpoint of a

combination of important performance characteristics and architecture parameters,

such as switch capacity, growth potential, hardware complexity, reliability, function-

ality, modularity, controllability and so on. It is difficult practically to single out any

one among the architectures as the best. In this section the advantages and limi-

tations of time division and space division switch architectures are discussed from

several important aspects.

Capacity: The time division approach is a feasible and flexible technique to

implement small-size switches with a capacity up to a few Gbps. This class of

architecture provides an efficient and flexible way to multiplex port interfaces







with widely differing access rates and protocols. \VWili p esenit levels of hardware

and software sophistication, time division switches are less complex to build and

aie highly reliable. However, the basic time division switching architecture is

not suitable for large switch designs. The entire switch capacity. is limited by the

bandwidth of the shared medium/memory, which restricts the number of ports

that can be supported to a relatively small number. Thus for the construction

of large switches such as ones for broadband central offices, a multistage or

space division switch architecture must be adopted to achieve a larger capacity.

Figure 3.2 indicates some examples of the potential application areas for time

division and space division switch architectures.

* Growth polential: Excellent scalability is one of the attractive features of space

division switches. Space division switches are generally constructed by inter-

connecting a number of fundamental switching blocks. Their capacities may be

increased significantly by simply providing additional paths that can operate

concurrently for transmitting cells. Thus this class of architecture can readily

be scaled to large switch designs. On the other hand, the growth potential

of time division switches is relatively poor since their capacities cannot grow

beyond an upper limit.

* Complexity: Most of the space division switch designs have the important fea-

tures of self-routing and distributed control, which allow each fundamental

switching block in the switching fabric to make a very fast routing decision.

However, they are generally more complex to construct and it is more diffi-

cult to analyze the performance characteristics than for time division switches.

Space division switch designs require sophisticated faullt detection and isolation

procedures to enhance their reliability. Moreover, as the switch size increases,






the synchronization for data and control signals, VLSI integration, and inter-

connection structures become significantly more complicated.

SFunctionality: Priority control and multicast operations are two functions that

may be desirable in many applications, such as video conferencing and distribu-

tion services. In time division switches, these functions can be easily supported

by modifying the buffer or memory read/write control circuit. These operations

can also be achieved in space division type switches although it may require

much more design effort and hardware implementation.


3.3 A Shared Medium/Output Buffering ATM Packet Switch Design

3.3.1 CPS-100 Switch Design Characteristics

The CPS-100 switch developed by Loral is an ATM-based switching system

that supports ATM and various data services such as Switched Multi-megabit Data

Service (SMDS) and Frame Relay for public networks. In the fast packet switching

terminology described above, CPS-100 switch architecture can be viewed as a time di-

vision, shared medium switch fabric with interconnecting time division, shared mem-

ory switching elements. The switch structure is generally composed of the following

four major components:

1. The switching fabric performs the basic switching function of transferring pack-

ets from input to output. The switching fabric in the CPS-100 switch is com-

posed of a high-speed Virtual ATM (VATM) backplane bus, which is shared

between all interface modules.

2. The access interface module provides an interface for customers to access the

services supported by a network. The Customer Premises Equipment (CPE)

attaches to an access interface module for transmitting and receiving data via

a dedicated link.


























Application






Broadband central
office
(50.O[- I 00.000
customers)


Public broadband
networks
(ratio of video
subscribers over 1 %.


ATM LANs


Interconnection of
existing LANs/MANs
(SM DS, FR service
and so on)



Narrowband ISDN


Space division or multstage swiches


10) Su itch capacity (Gbpsi


Figure 3.2: Potential application areas for time division and space
architectures


division switch


I lu







3. The trunk interface module provides an interface for interconnecting switching

systems to support inter-switch communications.

4. The CPU module communicates with all the interface modules in the switch

and performs the high-level control functions such as connection establishment

and release, memory administration, bandwidth allocation and maintenance.

3.3.2 Interface Modules

Figure 3.3 illustrates the functional model of a simplified ATM network im-

plemented with CPS-100 switches. Note that an access/trunk interface module can

support multiple bidirectional links. External trunks or CPE links are all connected

to the VATM via the access/trunk interface module, which consists principally of

two controllers, namely the ingress adaptor and the egrcss adaptor. The ingress

adaptor receives cells from the incoming link, buffers them as necessary and sends

them through the switching fabric. Similarly the cgress adaptor accepts cells from

the switching fabric, provides any necessary buffering, and transmits the cells over

the outgoing link. These adaptors also perform all the cell-by-ccll processing func-

tions such as Virtual Connection Identifier (VCI) translation, priority assignment

and routing. Since the VCI is generally only local to each switch port, the VCI of

each cell needs to be translated to the value assigned for the succeeding links. This

operation is performed by a VCI translation table.

The ingress adaptor appends routing overhead on an incoming cell to specify

the output link associated with the virtual connection to which the cell belongs.

The ingress adaptor also looks up other connection type information such as the loss

priority and the service priority of the cell to assist the egress adaptor in making its

buffering and service scheduling decisions. Since all the cells of a virtual connection

will follow the same route in traversing a switch, the sequence of cells is preserved,

without the need for explicit sequence numbers.




























customer.

customer.


Success
iniernace


customer.


CPS-100 swnich


31






















accessr customerr
< interlace

k eduk VpAT l customer
Interl ace interlace bu

buscusi


module module cusetome






eraceinerface
CPS-100 sw\\i[cLh


trunk
inltertface
module


V ATM
bus


access access
cusiomcr
interface interface
module module customer

CPS-I(H) switch


Figure 3.3: Functional model of a simplified ATMI network







The most important function of the egress adaptor is to buffer temporarily

those cells which cannot be immediately sent out. A finite buffer memory is imple-

mented in the egress adaptor to resolve output contention. If congestion causes the

buffers to be filled up, the controller has no choice but to discard cells. The buffer

thus forms a critical resource that needs to be adequately controlled. A modified

Partial Buffer Sharing scheme is implemented in the egress adaptor to ensure satis-

factory loss rates for different loss priority classes and fairness in sharing the resource

among competing users. Moreover, a priority-dependent service scheduling scheme is

implemented to control the order in which cells are sent from the buffer to the output

link. The service scheduling control is necessary for meeting the different switching

delay requirements for different service priority classes. Service and loss priorities are

assigned to each virtual connection during connection establishment based on the

delay and loss requirements specified for the particular connection.

Figure 3.4 shows the schematic of the ingress and egress adaptors for a two-

link interface module. The functions of the components indicated in the figure are

summarized as follows.

The FIFOs are small First-In-First-Out queues which store cells to accommo-

date short data bursts which exceed the processing speed.

The Ingress Message Processor is responsible for looking up the routing and

service information for incoming cells. It searches a routing table to find out

the output, port address to which a cell needs to be switched and attaches the

routing overhead to the cell, which is then sent to a FIFO queue. The Ingress

Message Processor also support multicast operation by duplicating the incoming

multicast cells and appending appropriate output port address to each of the

copies.







The \'ATI bus performs the switching operation of transporting cells from

an ingress adaptor to an egress adaptor according to the routing information.

The high-speed bus operates synchronously so that one cell can be transmitted

across the bus during each transmission cycle.

The function of the one-cell buffer in the egress direction is to provide timing

independence between components. The FIFO connected to it. is sensitive to

the backpressure from the one-cell buffer, that is, the FIFO will only send a

cell to the associated one-cell buffer as the previous cell has left the bulfer and

served by the Egress Message Processor.

The Egress Message Processor controls the egress buffer space usage. A modi-

fied Partial Buffer Sharing scheme is activated upon receiving a cell to determine

if the cell can be accepted to the Buffer NMemory allocated for its output port

address.

The Egress Buffer Memory stores cells while they are waiting to be serviced

by the Egress Protocol Processor. The buffer memory of each port in an in

terface module can remain dedicated or they can be merged to achieve a lower

probability of memory overflow.


The Egress Protocol Processor extracts cells sequentially from thle bulfer mem-

ory by referring to their service priorities and then removes the routing overhead

and assigns new parameters for the outgoing cell according to the communica-

tion protocol.

The throughput of each individual component is dependent on thle link speed

of the external link. The throughput of the Ingress Message Processor is designed to

be marginally faster than the link speed (e.g. 1.1 x Link Speed). A relatively small

buffer in the ingress adaptor is also provided. Moreover, the Egress Message Processor




34










Ingress Adaptor Egress Adaptor

from Link A from Link B to Link A to Link B



FIFO FIFO FIFO FIFO



Ingress Ingress Egress Egress






Egress Egress
Buffer Buffer
Memory Memory



Egress Egress
Message Messageo
Processor Processor
A I











1-cell Buffer I-cell Buffer
FIFO | FIFO FIFO-




VATM bus


Figure 3.4: Schematic of a two-link access/trunk interface module







in the egress direction is capable of functioning at a comparable speed as the VATNI

bus so that the high-speed cell stream from the VATNI bus can be accommodated.

Upon receipt of an incoming cell, the ingress adaptor will seek access to the

VATM bus. Only one ingress adaptor can have access to the high-speed bus at any

time. A bus arbitration scheme is implemented for resolving contention for access

among different ingress adaptors. However, since the shared medium operates at a

substantially higher speed (approximately 5 Gbps) than the link interface modules do,

the CPS-100 can be seen as a non-blocking switch, having no internal buffering and

with no contention visible from outside the switching fabric. The high speed of the

switching fabric reduces input contention and results in major quelcing taking place

at the egress adaptor. Thus the switch architecture is expected to give performance

similar to an output-buffering switch and, therefore, takes advantage of the optimal

delay/throughput performance that can be provided by an output-buffering switch

[52].

3.3.3 Simulation Approach

The simulators which accurately reflects the hardware design of Loral's CPS-

100 switch have been developed using two different simulation packages, the OPti-

mized Network Engineering Tools (OPNET)' and the General Purpose Simulation

System (GPSS)2. However, we found that the CPSS is incapable of supporting com-

pletely the simulation works due to memory constraint and flexibility of the software.

Thus the majority of our simulation studies were pei formed by using the OPNET

package.

The OPNET tool is an event-driven simulation package designed specifically

for the development and analysis of communication networks. It offers a hierarchical

modeling approach and graphical interfaces for users to model network and system
'The tool OPNET was developed by MIL 3, Inc.
2The CPSS was developed by Minuteman Software







specifications. The OPNET package provides a detailed and flexible modeling envi-

ronment with a significant reduction in the extensive software development process

which is typically associated with complex system modeling.

Each hardware functional block in the switch is simulated with a parame-

terized module, and modules communicate through packet flow and control signal

connections. Each module is associated with a process model which contains the

logic of model operations. The processing delay of functional blocks, traffic control

process and switch architecture can be modified with the assignment of different

parameters, process models or interconnection structures. An arbitrary network con-

figuration can be constructed easily by interconnecting a number of switch simulators

and traffic sources that model the specified traffic patterns.

The switch simulator and its output have been verified by Loral's and they

contribute to the development of the traffic control schemes as well as the switch

design. The simulator also serves as an experimental platform for the feasibility and

performance evaluation of the traffic control mechanisms that are considered in this

dissertation.

3.3.4 Simulation Results

During the research period, we have performed numerous simulations and

analyses to identify the switch characteristics with different traffic models and eval-

uate implementation complexity as well as effectiveness of various traffic control

schemes. In this section, part of the results of our simulation study are presented

to demonstrate the basic CPS-100 switch characteristics. We show that the network

delay performance can be controlled effectively by implementing different scheduling

schemes in the switch.

The simulation was performed based on a network configuration as shown in

Figure 3.5. In the network configuration, two CPS-100 switches are interconnected

to each other via a trunk link. On each side of the network, there are a number of







CBR


CBR traffic


sink 2


CBR traffic source ATM network CBR alic sink 3
c Cess k aw '>&ss link
CBR traffic source
CCBR sink 4
'CPS-lO0 switch I
.^^ trunkk link ,(..---


CPS-100C sitch 2"
TCPIP traffic source TCP/IP uraflic sink I

TCP/IP trafi source /IP trallic sink 2

TCP/IP ual'ic source ) TCP/IP raflic sink 3
Network queueing delay I
TCP/IP traffic source 4 TCP/IP traffic sink 4

Figure 3.5: The network configuration for simulation

customer premises equipment (CPE) connected to the switch. It is assumed that

each CPE on the left side makes a connection to the CPE on the right side and

simultaneously transmits data through the trunk link. Since all the traffic aggregates

on the outgoing trunk port of switch 1, the egress buffer memory and the outgoing

link bandwidth of the port become performance bottlenecks, where congestion may

occur when too many traffic bursts arrive in a short period.

The assumptions made for tlie input traffic loading are summarized as follows.

Suppose there are a total of eight virtual connections in tile network sending traffic

to the CPEs on the other side. The traffic sources of virtual connections #1 to #-I

are Constant Bit Rate (C'BR) sources which generate constant-rate cell streams. The

CBR traffic is sensitive to the (queteing delay in tihe network and needs to handle in

a higher priority than other traffic. On tihe other hand, the traffic pattern of virtual

connections #5 to #8 represent burst data sources which occasionally produce long







cell bursts at the peak link rate. A TCP/IP connection with a 64-kbyte adaptive

flow window and a S-kbyte packet segment is simulated for each data source.

Assume that each virtual connection is sequentially assigned with a different

scheduling priority: virtual connection #1 has the highest scheduling priority, say

1, and virtual connection #8 has the lowest scheduling priority, say S. The CBR

traffic (i.e., cells with scheduling priority 1 to 4) is served by the scheduling server of

the outgoing trunk port in an absolute priority method, by which cells with higher

priority are always processed in advance, as long as there is one queued in the buffer.

On the other hand, the data traffic is treated in a relative priority method which

is similar to the weighted fair queueing scheme studied in [20]. The available link

bandwidth left after serving the CBR traffic is allocated between different scheduling

priorities in a weighted manner. The higher the scheduling priority, the larger its

weight. For instance, if the scheduling priority 5, 6, 7, and S has a weight of 4,

3, 2, and 1, respectively, the scheduling server will divide its bandwidth in serving

the different queues proportionally to the weighting (assume that each scheduling

priority queue is never empty). The unused bandwidth of higher priority traffic will

be utilized by the incoming cells with lower priority.

For simplicity it is assumed that the outgoing trunk port has sufficient buffer

space to accommodate all incoming traffic. For burst data sources, the duration

of the idle time between traffic bursts is assumed to be exponentially distributed.

The traffic distribution between traffic sources is uniform, that is, each traffic source

contributes about 12.5% to the total trunk load. The link speed of all the links in

the network is T3 (45 Mbits/s) and the propagation delay on the links is assumed to

be negligible. The weights for scheduling priority 5, 6, 7, and S are assumed to be 4,

3, 2, and 1, respectively. Twenty seconds of network time is simulated.

The mean and maximum network queueing delays for each scheduling priority

are studied. The network queueing delay is defined as the time inter'l between a







cell arriving at an ingress adaptor of the first switch to the cell leaving the egress

adaptor connected to its destination of the second switch (see Figure 3.5). It is

observed that the queueing delay within the egress buffer at the outgoing trunk port

dominates the network queueing delay experienced by a cell because the port is a

congested point in the network configuration. Figures 3.6, 3.7 and 3.8 show the mean,

maximum and variance of the network queueing delay for each scheduling priority as

a function of the trunk link utilization. It is seen that the statistics of the network

queueing delay of CBR traffic remain nearly a constant as traffic load increases.

This is mainly because the cell interarrival time of a CBR connection is a constant.

Since the cells arrive at the buffer periodically and the scheduling server will try

to process these cells as soon as they come in, these cells will always have a very

small queueing delay even when the traffic load is high. This result also irnplies that

with an appropriate traffic shaping function exercised at the network entrance point

to smooth the traffic pattern and the selection of an adequate service discipline, a

maximal network queueing delay and cell delay variation can be guaranteed. On the

other hand, the network queueing delay of the data traffic increases exponentially as

the trunk link utilization increased. The lower the weight of the scheduling priority,

the larger the increment of the queueing delay. \ith the assignment of appropriate

weighting numbers. the mean queueing delay of the scheduling priority classes can

be controlled within a range.

In addition, we study the time average and maximum egress buffer utiliza-

tions of the outgoing trunk port for eacl scheduling priority (see Figures 3.9 and

3.10). Again the trunk link utilization has very little effect on the egress buffer uti-

lizations of the CBR traffic. In general, the time average egress buffer utilizations are

proportional to the mean queueing delay for every scheduling priority. Figure 3.10

shows the maximum instantaneous egress buffer utilizations for each scheduling pri-

ority. These numbers are the maximum buffer capacity required so that no cell were







dropped over the simulation interval. Note that the maximum buffer utilizations of

the data traffic, which are randomly distributed within a range, can go much higher

than the corresponding time average buffer utilizations. The results shows that the

instantaneous buffer utilization is closely related to the burstiness of the incoming

traffic and the service discipline. For CBR or other relatively smooth traffic, a small

buffer is sufficient to cope with the traffic variation. On the other hand, for the highly

burst data traffic, the occurrence of buffer overflows is almost inevitable for a finite

buffer system unless additional flow control schemes (such as the schemes that are

discussed in Chapter 6) are applied to the network.


3.4 Advantages and Limitations of CPS-100 Switch

A principal advantage of the CPS-100 ATM switch structure is its flexibility

to support multiple kinds of port interfaces. It has been widely recognized that

ATM technology is targeted to support a rich mixture of broadband and narrowband

services, as well as the high-capacity interconnection of existing data networking

applications. Thus it is important for a switching node to provide different kinds

of interfaces for the diverse applications in a highly flexible and expandable way.

In the CPS-100 switch, this is achieved through a modular design that places the

ports on separate interface modules. Various combinations of port interfaces, link

access speeds and physical media can be supported easily by implementing different

interface modules on the switch. A CPS-100 switch can be configured to support up

to 16 of these interface modules.

Another advantage of the CPS-100 switch is that with this architecture dy-

namic priority functions and multicast operations can be supported flexibly with no

additional hardware complexity. This function is preferable since some applications

such as ATM LANs require the ability to support multiple guaranteed classes of ser-

vices and full-bandwidth multicasting. Each interface module can implement suitable





41









(ZI
o mean network queueing delay (seci: scheduling priority 1 (x0.001)
0 mean network queueing delay (sec): scheduling priority 2 (x0.001
O mean network queueing delay (sec): scheduling priority 3 xO.O01
mean network queueing delay (sec): scheduling priority 4 (xO 001)
mean network queueing delay (sec)- scheduling priority 5 (x0.001)
[> mean network queueing delay (sec): scheduling priority 6 (xO.001)
<] mean network queueing delay (secl: scheduling priority 7 (x0.001)
mean network queueing delay (sec): scheduling priority 8 (xO.001)



















3
0
3. . /
/ / /







/
o f C / ---c

2....................... ........... /








0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
trunk link utili:ation




Figure :3.G: Mean network queueing delay of differentt scheduling priorities


















O maximum

O maximum

O maximum

L maximum

Maximum

[> maximum

<] maximum

* maximum


network queueing delay

network queueing delay

network queueing delay

network queueing delay

network queueing delay

network queueing delay

network queueing delay

network queueing delay


(sec):

(sec):

(sec):

(sec):

(sec):

(sec)

(sec):

(sec):


scheduling priority

scheduling priority

scheduling priority

scheduling priority

scheduling priority

scheduling priority

scheduling priority

scheduling priority


0.04
S!



0.035 ------....... .. ...---............ ... ..




0.03
I i



0.03 ..




0.025 -- - -. -







i !


0.015 I -










0.005 -- .... .. .... ..




0 -I a
0.1 0. 0.3 0.4 0.5 0.6
0.1 0.2 0.3 0.4 0.5 0.6


0.7 0.8 0.9

trunk link utilization


Figure 3.7: Maximum network queueing delay of different scheduling priorities





43










C network queueing delay variance: scheduling priority 1 ixle-05)

network queueing delay variance: scheduling priority 2 (xle-05)

O network quueueing delay variance: scheduling priority 3 (xle-05)

1 network queueing delay variance: scheduling priority 4 txle-05)

J network queueing delay variance: scheduling priority 5 (xle-05)

L> network queueing delay variance: scheduling priority 6 txle-051

<] network queueing delay variance: scheduling priority 7 (xle-05)

network queueing delay variance: scheduling priority 8 txle-051

2.5














1. ------------ -.-.-..-
























0.1 0 2 0.3 0.4 0.5 0.6 0. 0.8 0.9

trunk link utilizat ion





Figure .S: Network quecing delay %ariance of different scheduling priorities
trn lin / tlzto




44










0 time average buffer utilization (cells) : scheduling priority 1

0 time average buffer utilization (cells): scheduling priority 2
C1 time average buffer utilization (cells): scheduling priority 3

A time average buffer utilization (cells): scheduling priority 4

Time average buffer utilization (cells): scheduling priority 5

0>time average buffer utilization (cells): scheduling priority 6

<3 time average buffer utilization (cells): scheduling priority 7
0 time average buffer utilization (cells): scheduling priority 8




60































1 0 - -- - - - -- - -- - -- -- - - ------- ... .. .. .. .. .. .. .



0.1 0,2 0.3 0.4 0.5 0.6 0.7 E.8 0.9

trunk link utilization




Figure 3.9: Time average egress buffer utilization of different scheduling priorit]es




















0 maximum buffer

0 maximum buffer

O maximum buffer

maximum buEfer

7 maximum buffer

Q' maximum buffer

.]rr maximum buffer

* maximum buffer


utilization

utilization

utilization

utilization

utilization

utilization

utilization

utilization


(cells):
(cells):
(cells) :

(cells):

(cells):

(cells)

(cells)

(cells)*

(cells) :


scheduling

scheduling

scheduling

scheduling

scheduling

scheduling

scheduling

scheduling


priority

priority

priority

prior ty

priority

priority

priority

priority


)xl0CJ0)
(x1000)

(x1000)

(xlO00)

(x1000)
1x1000)

(x10001

Ix100)

(x10001


1.25








1








0.75







0.5








0.25








0


Figure 3.10: Mlaximum egress bulfer utilization of diflcret sclhedulinig priorities


0.7 0.8 0.9

trunx link utilization








buffer management and scheduling policies based on tile traffic characteristic as well

as loading conditions to best serve the delay and loss requirements of different traffic

classes. In addition, since the major queueing takes place at the output buffer, each

interface module can perform load monitoring on the buffer usages of different traffic

classes to support congestion control operation. Additionally the buffer space within

an interface module can be allocated dynamically to each port, so as to achieve a

lower probability of memory overflow.

On the other hand, as with other shared medium/output buffering ATM

switches, the CPS-100 switch architecture has the typical limitation of requiring the

high speed switching fabric to accommodate simultaneous arrivals fiom different in-

put ports. The switching fabric and output buffer must effectively operate at a much

higher speed than that of each interface port. The implementation of the high-speed

bus and buffer memory could be complex if the required memory access speed is very

high, thus limiting the capability of the switch to support very high speed interface

ports.










CHAPTER 4
AN INTEGRATED ATM TRAFFIC CONTROL FRAMEWORK

4.1 ATM Traffic Control Requirements

The accommodation of the large spectrum of applications implies that ATM

services must. be differentiated based on QOS offered to the users [1]. The traffic

characteristics and QOS requirements of different applications of ATM networks are

likely to be very diverse. A successful deployment of ATM technologies will require

a robust and flexible traffic management strategy to engineer network resource effi-

ciently and support diverse service requirements. The traffic management schemes

which are adopted by standard bodies will not only affect directly the complexity of

network system hardware but also determine if ATM applications can be supported

economically.

In this chapter, the initial service categories that will be offered on an ATM

network are addressed and the necessary traffic management functions are studied

in detail. \\e propose an integration of these traffic management schemes to provide

a complete control framework to manage network congestion preventively as well as

reactively and allow cooperative control actions at distributed network systems.

As mentioned in Chapter 1, traffic sources usually have traffic states that

can be characterized in call level, burst level, and cell level. Therefore network

congestion should be evaluated and controlled at different levels and time scales.

Congestion can happen at call level when logical channels request resources (link and

switching bandwidth, buffer space, etc.) that cannot be supported, when too many

connections, which are admitted by the network to achieve high statistical gain, are

active concurrently, or when a certain call exceeds its reserved bandwidth limits. It







can occur at burst level when too many long bursts of cells arrive and queue at some

buffer causing buffer overflow. Congestion can also occur at cell level due to poor

buffer management or as a result of upper layer operations such as retransmitting a

complete data frame every time a cell loss occurs.

From a general point of view, the network should be engineered with sufficient

resources to provide an acceptable level of connection blocking performance and allow

some degree of future traffic growth [1]. Network resource engineering is one of the

important traffic management functions which provides a long term control over the

total amount of available bandwidth for all types of ATM services. Its major control

function is to allocate sufficient resources for different service categories based on

some understanding of predicted subscriber loads and usage characteristics.

\Vhen a call request is received by a network, the network control will deter-

mine if the required resources are available. If there are not sufficient resources for the

connection, the network control will block the request or negotiate with the user for

a less stringent service requirement. Connection missionn Controloperating at the

call level evaluates the impact of a new connection and allocates network resources

to an accepted call on the basis of the bandwidth requested by the source [55]. Once

the connection is established, the network has the responsibility to maintain the nec-

essary resources for an acceptable QOS and monitor the source traffic to ensure that

it complies with its declared parameters.

One way to alleviate burst level congestion is to implement large buffers in

nodes to cope with traffic bursts [56]. With large buffers to store excess data during

periods of burst level congestion, the achievable link utilization can also be improved.

However, this approach will introduce added cell delay due to suffering of the excess

traffic and increase the complexity of resource allocation.

Some applications, such as large file or image retrieval, produce single long

bursts that can be treated as a single connection with individual establishment and








release phases. The Fast Rcscrvation Protocol [56] operating at the burst level is

a burst admission control method that allows in-call bandwidth negotiation when

the traffic source needs to transmit a burst. Before a burst is transmitted, a traffic

source sends a reservation request to each node on the connection path to reserve the

required bandwidth. If there is not sufficient bandwidth available, a negative response

will be returned immediately and the transmission of the burst will be blocked or

delayed.

Due to the unpredictable nature of data applications, such as LAN intercon-

nection, it is difficult to characterize the variability of traffic rate at connection setup

time [57]. Allocating bandwidth at their peak cell rates results in low resource uti-

lization and thus is inefficient for the burst-type data traffic. Most data applications

can tolerate some delays but cell loss in the network will trigger retransmission to

recover from information loss. A complete data frame has to be retransmitted each

time cell loss occurs, regardless of severity of the cell loss. This traffic behavior is

likely to cause sustained cell level congestion and lead to low packet goodpul (the

throughput of successfully transmitted packets). For these applications, a feedback

control mechanism which can be invoked quickly to reduce the probability of packet

retransmission should be provided.

Credit-based and rate-based flow control are two classes of control schemes that

can regulate the volume of traffic admitted to the network according to the status of

network load [56, 5S]. Both kinds of the control schemes have been proposed to the

ATM Forum for best-effort service and are currently under discussion. These control

schemes provide a closed loop control to prevent or reduce the effects of network

congestion and to optimize network resources. Such control approaches are attractive

to the applications which may generate unpredictable traffic bursts, since the users

need not specify their average or sustainable cell rates in advance of transmission.

Moreover, with the flow control, tralfic sources contributing to congestion can be







Fill in unused bandwidth with best-effort traffic

100% /


Network
Resource
ULilization

Bandwidth occupied by guaranteed traffic


Time

Figure 4.1: Network resource provisioned for guaranteed traffic and best-effort traffic

forced to reduce the speed at which they are sending. Thus if a connection admission

control is used to support QOS requirements of guaranteed services, the bandwidth

left over can be utilized efficiently by filling in with the best-effort traffic, as shown

in Figure 4.1.

Once a new connection is admitted by network control, a monitoring mecha-

nism is required to ensure that, during the information transfer phase, traffic submit-

ted to the network does not exceed the traffic agreement established at the connection

setup. This control function is performed by the Usage Parameter Control. The traf-

fic policing is necessary to guarantee that violations by some users will not cause

performance degradation for other well-behaved users.

Another important control mechanism that provides an effective cell level

control and supports different QOS is Priority Control. \hen a new connection

is established, a connection priority should be assigned to it based on the service

requirement. The cells belonging to connections that need guaranteed service will be

handled with higher priority by network nodes. In addition to the connection level

priority, a cell loss priority (CLP) may be assigned to cells of the same connection

to identify their significance or to mark the traffic that violates declared parameters.







Cells with lower cell loss priority (i.e., CLP bit set to 1) will be discarded first in case

of resource congestion.


4.2 ATM Service Characteristics

To support different QOS requirements of users, three basic ATM service

categories are identified corresponding to distinct user demands. In this section, the

three basic ATM service categories that will be offered on an ATM network at the

initial phase and their traffic characteristics are discussed.

4.2.1 Constant Bit Rate (CBR) Service

The Constant Bit Rate (CBR) type of service is intended for applications

that will generate a constant or nearly constant cell stream. such as voice trunk

and traditional video channels. This class of traffic has the most demanding service

requirements. It is sensitive to delay and cell delay variation and typically cell loss in

the network cannot be recovered by packet retransmission. This service type requires

bandwidth allocation at connection's peak rate and service agreement sustained on

a per-connection basis. Transmission of the traffic should be handled with highest

priority in network nodes to ensure the specified QOS is guaranteed.

\Vith the required network resources negotiated and allocated prior to trans-

mission and maintained on a per-connection basis during the information transfer

phase, ATM networks are able to provide strict QOS control for connections. As

long as users conform to their traffic contracts and adequate resource protection is

provided, cell level congestion will no longer be an issue. For this type of traffic, only

a small buffer at switching nodes or multiplexing points is required to accommodate

the effects of cell delay variation.







4.2.2 Variable Bit Rate (VBR) Service

The Variable Bit Rate (VBR) service offers a committed cell loss rate and

delay for the users that require guaranteed service. This service is suitable for users

or applications that generate traffic at a variable rate but have predictable statistical

characteristics, such as video conference applications and distribution video. This

type of traffic is typically delay-sensitive and with less stringent loss requirement.

Recovery from cell error or loss is by concealment or cell substitution or by forward

error correction, not by packet retransmission.

A gain in resource efficiency is achieved by performing statistical multiplexing

of VBR sources, that is, by overbooking link capacity to allow bandwidth sharing

between VBR connections. Link bandwidth will be allocated to the connections

by taking account of their peak rates and some other traffic parameters defined for

the service. \Vith well-described statistical characteristics of traffic, it is possible to

control congestion and cell loss below some probability by applying only admission

control at connection setup. However, a larger buffer (about 1000 cells) at multiplex-

ing points will be required to cope with burst level congestion and give better link

utilization [58].

4.2.3 Available Bit Rate (ABR) Service

Currently, the increasing need for high-capacity data communications is driv-

ing the development and implementation of ATM [56]. There is no doubt that data

communications applications will be initially dominant in ATM networks and, more-

over, will be the first test of ATM acceptance. Examples of the applications that

could require ABR service include LAN interconnection, image/document retriemval,

interactive data transfer, and so on. ATM networks provide connection-oriented sa-

vices where data transport occurs on the virtual circuit established before transmis-

sion. However, a vast majority of existing networks and data services are inherently







connectionless which require no connection setup before transmission. In addition,

the traffic generated by these applications is typically very burst and hard to pre-

dict. The sources are likely\ to generate on/off traffic streams with short bursts at a

speed close to maximum link rate and separated by relatively long silences. Although

several studies are available describing some of their statistical characteristics, a com-

plete description of the statistical behavior and the associated traffic models is still

lacking.

The traffic is unpredictable at connection setup and thus it is unrealistic to

expect the users to declare their bandwidth requirements accurately in advance of

transmission. Foi those applications, tile network is unable to provide an explicit

guarantee of service since insufficient information of their traffic characteristics is

known. What is needed for the data applications is a service that serves all active

sources on a best-eflort basis. The available bandwidth foi this service should be

dynamically allocated between the users. This kind of set vice is referred by the ATM

Forum as the Available Bit Rate (ABR) service [56].

The burstiness of ABR traffic type covers a wide range of time scales and the

peak bit rates are typically several orders of magnitude larger than the average rates.

The unpredictable traffic characteristics and large buistiness make this kind of traffic

ideal for statistical multiplexing where many connections cooperate to share a finite

amount of bandwidth.

The traffic behavior of the various existing and foreseeable data applications

depends strongly on the usage patterns of the applications and can thus hardly be

characterized by means of a manageable set of parameters. Their target service

requirements also rely on applications, high layer protocols and source characteristics.

For instance, animation graphics may produce long trllic Ibur.sts with peak rates

larger than 10 MNbps and will need QOS requirements similar to that required for real

time video. Electronic mail generates individual messages with sizes from less than I







kbyte up to several Mbytes but can tolerate delay for up to minutes. Target cell loss

probabilities for these applications also cover a wide range and their impact usually

depends on upper layer protocols. These protocols generally rely on retransmission

to recover from information loss.

For the applications of critical data transfer such as image retrieval or very

high speed data services, it is necessary to perform burst admission control. The

Fast Reservation Protocol can be used to ensure that the data bursts will not be

transmitted unless sufficient resources are available.

Many data applications are relatively tolerant to delay but sensitive to cell

loss. If there is no flow control mechanism that allows the network to control the cell

emission process at traffic sources, we will require a very large buffer at ATM switches

to absorb the cells of simultaneously arriving bursts so that a reasonable cell loss rate

can be achieved. It has been proposed to use closed-loop feedback control schemes

for ABR service to modulate traffic streams based on current network status.

Table -1.1 summarizes the important traffic characteristics, requirements and

applicable control functions for the three basic ATM service categories.


4.3 Traffic Modeling

A key element in simulating or analyzing communication networks is traffic

modeling. Traffic models are used in modeling technology either as part of an an-

alytical model or to drive a discrete-event simulation. Inappropriate traffic models

could lead to poor prediction of network performance and may misdirect design and

management decisions. In order to obtain a successful performance evaluation, a

clear understanding of the nature of the traffic in the target system and selection

of a suitable random traffic model are crucial. This section presents a review of the

commonly used traffic models for different types of traffic.






















Table 4.1: Traffic characteristics and applicable control functions for ATM service
categories
AThI Service
Categories Constant Bit Rate Variable Bit Rate Availatble Bit Rate
Characteristic (CBR) (\HR) (ABR)
& Contil Function- .

LAN interconnection.
Voice trunk and Video conference and Image/document retrieval
Applications Traditional video Distribuuion video Interactive data transfer
channels and X window. applicatons
Connection
Admission Peak bandAidh Staustical bandvidth None
Control allocation allocation (possibly burst admission
control)

QOS Vert low\ cell loss Committed cell loss
.N0o specified
Requirements and cell delay variation and dela)


In-Call
Congestion None None Yes
Control

f fearing Large (> 1000 cells.
Small (- 100 cells) Small to medium (< 1000 cells) depending on Round Trip
Requirements
Time and link band\width)

Periodic arrival process. AR (video traffic). loisson/Henmoulli.

SaiSa IPP' (single voice source). Markov process (video traffic). Self-similar models.
SLtaistical
NINMPP (aggregated traffic., Fluid traffic models. Packel train models
Models I'oisson/lernoulli TES models.
I.aggregated traffic) Poisson/lernoulli
(aggregatcd traffic)







Many traffic models that are capable of capturing the autocorrelated nature

of voice or video sources have been proposed and studied [31, 59]. The Interrupted

Poisson Process (IPP) [102, 60], which is also known as on-off model and is essentially

a two-state lfarkov-Mlodulaled Poisson Process (NINIPP) with zero arrival rate in one

state, has been widely used to describe a single voice source. The arrival process of

an IPP is characterized by two alternating states; the on state corresponds to a

talk spurt, and the off state corresponds to a silence. The process stays in a state

for an exponentially distributed holding time and then transits to the other state.

The general lMMPP is a doubly stochastic Poisson process where the rate process

is controlled (modulated) b, its current state and in a given state, arrivals occur

according to a Poisson process with a non-negative rate. The aggregated cell arrival

process of independent voice sources can be modeled by a birth-death process [31],

where the aggregated arrival rate is determined by the number of voice sources in the

on state, or by a two-state MMPP model [102], where each state is associated with

a positive Poisson rate.

The statistical nature of a compressed video source displays a significant diver-

sity from a voice source. For VBR-coded video sources, since the signal is compressed

by encoding only the differences between successive frames, the frame bit rate within

a video scene varies very little. Only a change of scene or background of the picture

can cause the frame bit rate to vary abruptly. The cell generation process within a

video scene can be modeled by an auloregressive (AR) process [61], or by a discrete-

slate continuous-lime Markov process [62). The AR process is commonly used to

drive a simulation model while the Markov process is usually employed in queueing

analysis because it is more analytically tractable than the AR model. On the other

hand, the scene changes can be modeled by some modulating mechanism, such as a

discrete-state continuous-time Markov process with batch arrivals [63].







Other common approaches for modeling variable rate traffic sources include

fluid traffic models [64] and Transform- Expand-Samrple (TES) models [65]. The fluid

traffic model, instead of counting traffic units individually, views traffic as a stream

of fluid characterized by a flow rate. The approach provides important advantages

such as comparable accuracy and enormous savings in computing. The TES models,

which can be used to generate synthetic streams of realistic traffic to drive simu-

lations, attempts to capture both marginals and autocorrelations of empirical data

simultaneously.

Poison processes have a long history in characterizing data traffic in computer

networks, because of their relative mathematical simplicity and elegant analytical

properties. In addition, it is well known that in traffic applications that physically

comprise a large number of independent traffic streams, the superposition process can

be approximated by a Poisson process (or a Bernoulli process for discrete-time cases)

[66]. In order to capture the strong autocorrelations of burst traffic that is expected

to dominate broadband networks, several new traffic models, which are based on

high-quality high-resolution traffic measurements in real network environments, are

currently under study. Some well-known examples of the traffic models include the

self-similar models [67] and packet Irain models [103], and they can be employed to

generate long traces of synthetic traffic for simulations. A summary of the commonly

used traffic models for different ATM traffic classes is also presented in Table 4 1.


4.4 Traffic Management Mechanisms

The main objective of ATM traffic management is to achieve resource efficiency

improvement while supporting the QOS requirements of users in both normal and

overload conditions. As was described in Section 2, the ATM sei vice categories have

distinct service demands and require a set of control functions to prevent performance







degradation during congestion. This section discusses in further detail the roles of

these traffic management mechanisms for the support of each service category.

4.4.1 Network Resource Engineering

The major function of Network Resource Engineering is to allocate the finite

network resource among different ATM services so as to achieve an acceptable level

of connection blocking performance. To perform this control function successfully,

we will require knowledge of the connection characteristics, such as predicted arrival

rates, expected connection blocking probability, call durations, usage characteristics

and bandwidth requirements. The finite link bandwidth is then logically divided

between service categories based on these estimates to provide satisfactory resource

provision and determine acceptable loading levels. The available bandwidth capacity

and utilization for a service type will be used by the connection admission control as

the basis for admitting or rejecting a new connection.

For users of CBR or \'BR services that require QOS agreement sustained on

a per-connection basis, the size of available network bandwidth affects directly the

connection blocking performance of the service type. For ABR applications where

bandwidth is not reserved explicitly on a per connection basis, all connections will

share the unused portion of network bandwidth. However, a minimum amount of

bandwidth should be provisioned for the service category to ensure a very low prob-

ability of congestion. In addition, the division of network bandwidth capacity should

be dynamically adjusted to optimize resource efficiency as traffic mix changes.

4.4.2 Connection Admission Control

Connection admission control determines if a new request will be admitted to

the network and reserves network resources at the connection establishment, so that

consistent performance can be received during the lifetime of the connection. Thus

the central issue of the connection admission control is to decide if a new connection







can be safely multiplexed with the existing traffic loading without leading the network

into an unacceptable level of congestion. The decision to accept or deny a connection

request will be based primarily on the bandwidth and QOS requested by the source

and the available bandwidth for a given service category.

Allocating bandwidth at connection peak rate is the simplest control approach

and is particularly suitable for the applications of CBR service. A new connection

is accepted only if the required peak bandwidth is available at each link along the

connection's selected path. This approach offers a very strong performance guarantee

and is relatively easy to implement. However, it makes poor use of the network

resource when the connection's peak rate is much higher than its average rate.

Connections of VBR service can be multiplexed statistically to take advantage

of the variable rate nature of individual applications and achieve some gain in resource

efficiency. By considering the traffic characteristics of connections and estimating

the probability of consequential congestion, the network may accept a number of

connections the sum of whose peak rates exceeds the link capacity. In general, an

effective bandwidth is computed and allocated based on a set of traffic descriptors

specifying the variability of the bit rate, which may include peak cell rate, sustainable

cell rate and burst tolerance.

For ABR service in which it might not be possible to estimate the average rate

in advance, under normal conditions the connection admission control may admit the

request without allocating any bandwidth. All the connections dynamically adapt

themselves to current network status by sharing the mi nimu m provisioned bandwidth

for this service type and the unused bandwidth left from other service categories.

4.4.3 Explicit Congestion Notification

Explicit Congestion Notification (ECN) is a reactive feedback control mech-

anism that controls the rate at which each source emits cells into the network on







every virtual connection by using congestion indicators [57]. The congestion indi-

cators are generated at the congested node and they can be sent in the forward

direction (FECN) or in backward direction of the path (BCEN). In FECN when

a path through a switching node becomes congested, the congestion information is

transferred to the destination node by setting the explicit forward congestion indi-

cator bit with the header of ATM cells to 1. After receiving the information, the

destination end system sends congestion notification cells back to the traffic source

to indicate the congestion status. The source will then dynamically adjust its cell

transmission rate based on the feedback. On the other hand, in BECN congestion

notification is returned directly from the congested node back to the source. Obvi-

ously the BECN control scheme is able to react to network congestion faster than

the FECN, although it requires more hardware in the switch for implementation.

It has been shown that ECN is an effective control scheme to reduce informa-

tion loss and improve network throughput during congestion periods for some data

applications such as LAN interconnection.

4.4.4 Credit-based Flow Control

The control objective of credit-based flow control is similar to the ECN scheme

described in the previous section. However, instead of controlling the source's cell

transmission rate based on congestion indicators from the congested node, credit-

based flow control manipulates the traffic being sent to the receiving end of a link

according to the available resources for the virtual connection (i.e., credits). The

credit approach is thus a link-by-link per-virtual-connection flow control mechanism

where each link performs the scheme independently. The sending end of a link is

allowed to transmit cells to its receiving end only if it has credits for the virtual

connection. A credit balance is maintained at the sending end and is updated peri-

odically by credit cells sent by its receiver [68].







The credit-based approach has the advantage of excellent bandwidth utiliza-

tion with zero cell loss in a high-loaded network. When multiple connections are

active, the available bandwidth is shared fairly between them. If a connection can-

not. fully utilize its share, the unused bandwidth will be acquired quickly by other

aggressive connections. However, the control scheme requires per-virt ual-connection

buffering and processing in every switch and thus increases implementation complex-

its on the switch hardware.

4.4.5 Burst Admission Control

The Burst Admission Control is a control procedure that allows users to ne-

gotiate bandwidth with the network during a connection. This approach should be

applied to the applications that need spontaneous delivery of long bursts of critical

data so that satisfactory QOS can be guaranteed during data transfer. With this

control scheme, the bandwidth will be allocated only to the bursts based on the peak

bandwidth requirements prior to their transmissions. If sufficient bandwidth cannot

be reserved on some link of the connection path, the transmission of the burst will be

blocked or delayed. In order to ensure an acceptable probability of burst blocking,

the network may impose a limit on the connection peak rate that can be supported

by a link, for instance, 10 percent of the link bit rate.

Blocking large data transfers at the source during network overload can pre-

vent performance degradation to other connections and thus improve network stabil-

ity under high loading.

4.4.6 Usage Parameter Control

For each connection that has been admitted to the network, there should

be a service contract specifying a set of service parameters, including bandwidth

parameters arid QOS requirements. With the service iagieeient, a set of mechanisms

for monitoring traffic compliance during the transport of ATM cells is required. This







control function provides stable operation of the network and resource protection for

compliant users by discarding or tagging for priority discard the traffic that violates

its specified parameters.

The traffic control mechanism is performed by monitoring continuously a sin-

gle indicator, the cell loss priority (CLP), in every ATM cell header of a virtual

connection. If the CLP bit of a cell is set to 1, it indicates that the cell carries

nonessential information and may be discarded preferentially when congestion is en-

countered along the path. Another function served by the indicator is that the

network provider can mark the excessive cells that are not in compliance with the

traffic limits by setting their CLP indicators to 1. Thus those cells will be transferred

at their own risk to ensure fairness between competing users.

Generally, the peak cell rate of a connection should be monitored for all kinds

of applications. Additional functionality is required for those applications in which

the network bandwidth is not reserved at their peak rate. The traffic monitor-

ing mechanism established for these connections should effectively impose an upper

bound on the worst case traffic behavior expected from the connection.

4.4.7 Priority Control

The priority control which determines how cells should be treated in the net-

work is an important control function to support different service demands of ATM

users. During connection establishment, each connection should be assigned with

explicit priorities according to the service category and service requirements. The

priority levels of a connection are registered in the virtual connection identifier (VCI)

table so that the priorities of an incoming cell can be identified.

Two different types of the connection-level priority should be specified: the

delay priority and the loss priority. A traffic scheduling policy, which determines

the serving sequence between different delay priorities and how a finite outgoing

link bandwidth should be allocated in switching nodes, provides effective controls on







network queueing delay and delay variation for a given cell. On the other hand, the

loss priority of a connection is used by a cell loss mechanism that manages the accesses

to finite buffers in a switching node to satisfy various connection loss requirements.

In addition to the overall traffic control for different connection-level priori-

ties, additional thresholds imposed on the buffer utilization are required to support

different cell loss rates of the cell-level priority (i.e. cell loss probabilities for the cells

of the same connection with CLP=O and CLP=1). The cells with lower priority will

be discarded when the buffer utilization exceeds the threshold to provide better cell

loss performance for the cells carrying essential information.

Figure 4.2 shows an architecture of the ATMI traffic control. Finally, Table

4.2 summarizes the performance objectives and control functions of the important

traffic management schemes that were discussed in this chapter.

In the following chapters, three (3) traffic management schemes are inves-

tigated and optimized with respect to critical network resources. A space priority

buffer Inanngemenl scheme, which controls the finite buffer in a switching node to

support an arbitrary number of priority classes, is analyzed in Chapter 5. A multi-

nomial traffic model is chosen to give a good approximation of the aggregated input

traffic since each priority class may consist of a large number of independent traffic

sources. Previous works have typically considered only tw.o priority classes and overly

simplified queueing models. In Chapter 5 we present a general approach foi multiple

priority classes and optimization procedures for the optimal choice of loss thresh-

olds. In Chapter 6, two feedback flow control schemes for AI3R traffic, the BECN

and the credit-based mechanisms, are investigated. The worst-case (e.g., long file

transfers with TCP/IP) network performance with and without the flow controls is

examined. We show that with the implementation of the flow control schemes, packet

retransmission process, which might degrade severely the network throughput, can be

greatly reduced or completely eliminated, thus providing a substantial improvement



















Network Management
De slnation
Source -______.__ ..____. Deslinati
S- Network Resoure Engineering I -Detect cell loss
ATM applications -Resource allocation for
S-Send acknowledgement/
service categories
AAL laer -CBR sei rvice congestion information
or higher -VBR service Connection/Burst Admission Control to source
-AR since -Bandwidth allocation/resenration
based on band% idth requirement
and QOS
-Establish Usage Parameter Control
ATM layer Traffic shaping for connections


- - - - - - - -- - -

CrATMdi or N networks




















-----------------------------------------------
Usage Parameter Control Priority) Control
-Traffic monitoring -Pnority scheduling

-Excesive trafrc -Selective cell discarding
tagging i



Feedback Control
-Modulate traffic volumn
Credit or BECN into network FECN
(ABR service) -Infonrm traffic sources
of potential congestion

-----------------.----------------------------

cell stream or
control information channel


Figure 4.2: ATM Traffic Control Architecture
























Table 4.2: ATM Traffic Management
Traffic ATM Control Congestion Performance Control functions
management service time scale control objective
type
Network CBR, long term or preventive resource management resource allocation
resource VBR, whenever for acceptable for different
engineering ABR traffic call blocking service categories
condition performance
changes
Connection CBR, call duration prevent ve CBR and \'BR CBR. peak
admission \'BR. and reaclise acceptable connectionn band idth allocation
control ABR blocking pr.obat.ilty for connection
ABER no coniniated VBR: statistical
connection Ulocking band idth allocation
probability for connect ion
ABR no bandwidth
allocation at
connect ion set up
Explicit ABR burst duration reacli\e committed cell rate-based flow
congestion or round trip loss and delay control
notification delay time inform traffic sources
(forw ard or of potential congestion
backward)
Credit-based ABR burst duration pre\entie no cell loss lirk-by-link
flow control or round trip lol0 control
delay time per connection
buffering and
tralfic management
Burst ABR- burst duratt.on presentie no committed bust peak bandwidth
admission blocking probability allocation for burls
control committed cell lo-s
and dela) for
accepted buist
Usage CBR, cell time preventive CBR: 'ery low cell peak rate enforcement
parameter \ BR, loss and cell delay exce.ssie traffic
control ABR variation lagging
Priority CBR, cell liane preventive \BR: comiinh led cell priority assignment
control VBR. and reactive loss anid iela. for connections
ABR ABR: acceptable cell selective cell
loss and dela.i discarding under
congestion




66


on the network performance. In addition, a slow-start technique that can improve

the performance of the rate-based control scheme to a comparable level as with the

credit-based approach is proposed. We conduct a complete analysis on the issues of

performance improvement, resource efficiency, and practical implementation of these

control mechanisms.









CHAPTER 5
SPACE PRIORITY BUFFER MANAGEMENT FOR ATM OVERLOAD CONTROL

5.1 Buffer Management Schemes for ATM Switches

In this chapter, the issue of effectively managing the finite output buffers of an

ATM switch is concerned. Due to the burst and unpredictable nature of some traffic

sources, the occurrence of buffer overflows is inevitable. Simply dimensioning the

resource to satisfy the most stringent service requirement is generally not a practical

solution and will lead to low efficiency. In addition, systems with a large buffer can

introduce significant cell delay variation for the passing traffic if no priority control

is applied. This situation may be unbearable for the delay-sensitive applications.

More dynamic controls such as prioritizing different traffic according to their service

requirements are necessary for ATM systems to achieve high resource utilization and

ensure adequate network performance.

There are two major categories of the priority queueing mechanisms for finite

buffer systems being proposed: the lime priority and the space priority strategies.

The time priority strategies provide preferential treatment to the traffic with critical

delay requirements while the space priority favors the traffic with sensitive loss re-

quirements. Although these two kinds of queueing strategies were commonly studied

and analyzed in an independent manner, they can be implemented cooperatively in

a finite buffer system without conflict. For instance, a space priority (buffer access)

control scheme can be implemented at the server for controlling buffer memory input

to ensure satisfactory loss rates for different loss priority classes, while a time priority

(scheduling) control scheme can be enforced at the server for controlling buffer mem-

ory output to handle various delay requirements. Thus lihe delay and loss priorities







of a virtual connection can be assigned in a more flexible way to accommodate the

diverse QOS of ATM applications.

Two space priority queueing strategies, Push Out scheme and Partial Buffer

Sharing (PBS) scheme, have been suggested. In the push out scheme, an arriving high

priority cell is allowed to take the place of any low priority cell in the queue when the

buffer is full. If there is no low priority cell in the queue, the arriving high priority cell

is discarded. On the other hand, in the partial buffer sharing scheme, a threshold is

imposed on the buffer space available to both classes. A low priority cell is admitted

to the system only if the current queue length is less than the threshold, otherwise

it is lost. Obviously the push out scheme provides better resource efficiency, since a

newly arriving cell is rejected only if the buffer is saturated. However, in order to

keep track of cell positions and preserve proper cell sequencing, the push out scheme

implementation requires a much more complicated buffer management logic, which

may be undesirable for systems with large buffers. For instance, the egress buffer

memory in an egress adaptor of the CPS-100 switch described in Chapter 3 can

buffer up to 125,000 cells. The complexity to implement the push out scheme in such

a large buffer could be unacceptable; thus the partial buffer sharing scheme may be

a better choice if a large buffer space is desirable and the buffer efficiency is not a

critical consideration.

Recently much attention has been spent on the analysis and performance eval-

uation of the partial buffer sharing mechanism [69, 70, 72, 73, 74]. It has been shown

that the effectiveness of the priority discarding scheme can be very substantial, as

compared with the system without priority control. Most of the previous studies

consider only two priorities, in which a single threshold is set on the buffer utilization

to determine if an arriving cell with low cell-level priority (i.e., CLP bit set to 1)

should be discarded. One exception concerning an arbitrary number of priorities can

be found in [69]. In that study the problem of selecting an optimal set of nested







thresholds was considered based on a simplified queueing model. In order to enforce

more dynamic control and to accommodate the user's varied loss requirements, it is

desirable that more loss priority classes can be supported by a shared buffer system.

For instance, at a switching node a shared buffer memory may be allocated to accom-

modate CBR and VBR traffic. The network provider may specify several grades of

service that offer different cell loss rates for a number of connection-level priorities to

support various CBR and VBR applications. In such a system, we need to determine

multiple thresholds on the buffer so that the cell loss requirements can be satisfied.

To prevent excessive cell delay occurring to real-time traffic at a switching

point with a large buffering space, at least two logical buffers should be allocated to

separate real-time traffic such as CBR and V'BR from non-real-time traffic such as

ABR. The real-time traffic will require only a small buffer since the queue will always

be served in a higher priority. The PBS mechanism can be applied to the real-

time buffer to provide a strict control on cell loss requirements and queueing delay

introduced during cell buffering. The major portion of the buffering space could be

assigned to the non-real-time traffic for trading off cell loss for delay. The congestion

problem for this class of traffic can be controlled effectively by the feedback flow

control schemes, which will be investigated in the next chapter.

In this chapter an accurate queueing model to characterize tlle system is devel-

oped and methods to optimize the system performance are presented. This research

is motivated by the fact that in a heterogeneous environment, loss requirements

and traffic mixes can be very diverse and it is important to dimension the finite

buffer space properly to guarantee acceptable loss probabilities for different classes.

Moreover, simulating real buffer systems on computers to evaluate whether the loss

probabilities satisfy given loss constraints is generally compiitational feasible only

when the loss constraints are high (for instance > 10-'). Iere an analytic method

to estimate loss probabilities of multiple loss classes is developed and the numerical







optimization procedures to select the best threshold levels efficiently under different

system conditions are introduced.

The rest of this chapter is organized as follows. In Section 5.2, a complete

description of the problem is presented. A detailed queueing model analysis, along

with the numerical results, is addressed in Section 5.3. The system optimization

procedures to search for the best threshold levels under different system conditions

are introduced in Section 5.-1. Finally, a conclusion is given in Section 5.5.


5.2 Partial Buffer Sharing Scheme and Problem Statement

The research is concerned with a space priority queueing strategy for the finite

output buffer in ATM switching systems. The buffer implemented in the output of a

switch is used to temporarily store those cells which cannot be immediately sent out.

The instantaneous buffer access rate is designed to be much higher than the buffer

output rate to accommodate simultaneous arrivals from different inputs. To support

the diverse loss QOS requirements of ATM services, the buffer access is controlled

by a generalized PBS space priority queueing strategy. In the PBS a set of loss

thresholds is imposed on the buffer space available to different priority classes. Each

loss threshold B, (i = 1,...N) is associated with a loss priority class i. A class i

arrival can be admitted to the system only if the current buffer state is less than its

designated threshold, otherwise the arriving cell will be discarded. If we assume that

priority N represents the highest priority class and prio ity 1 is the lowest priority

class, priority N cells will have access to the whole buffer and, therefore, BN = B

and 0 < B, < B2 < ... < Bx Consequently, a finil.e buffer can be divided into N

portions: the first Bi buffer positions are accessible for all incoming cells, the next

B2 B] positions are accessible for class 2 or higher priority cells, and so on. The

term eligible group will be used to denote those classes which are eligible for a specific

portion of buffer space, for example, the eligible group of the first B1 buffer positions











BN BN-I B2 BI
maximum maximum
bu fer input buffer output
Ie=L rae = /''




accessible accessible accessible
for for for
class N class 2 to N class I to N

switching fabric buffer



Figure 5.1: Partial Buffer Sharing Mechanism


includes all classes (eligible group I), the eligible gioiip of the next B2 B1 positions

consists of class 2 to class A' (eligible group 2), etc. Figure 5.1 describes the PBS

mechanism. It is assumed that the service discipline of the buffer is first-come-first-

serve (FCFS). By adjusting the threshold values, different loss requirements under

various traffic load conditions can be fulfilled.

This approach leads to the problem of lhow to choose a set of optimal loss

thresholds under given constraints of load conditions nii loss probabilities. Under

a fixed load condition, an increase in the loss threshold of a particular class can

decrease the loss probability of the class and also increase the loss probabilities of

higher priority classes. Moreover, as stated in [69], the constraints of loss probabilities

implicitly place an upper bound on the maximum load that can be supported by the

system. The problem of interest is to determine a set of optimal loss tlileslholds such

that. tlie admissible load (p) to the system is maxiimized subject o tilhe given traffic

conditions and loss constraints. That is, the optimization problem can be formulated







as follows:


Maximize p(B1, B2, Bv) (5.1)


subject to PLi = loss constraint of class i,
Sr, = ratio of class i traffic load to total traffic load.
It is seen that the set of optimal loss thresholds under a maximum admissible

load might not be unique, that is, there may exist more than one set of loss thresholds

which give different loss probabilities but which may still fulfill the loss constraints.

In those cases, the optimal thresholds will be taken to be those B, which satisfy (5.1)

and the following condition: for each loss priority class, the B; is the smallest number

that satisfies the loss constraint of the class. Thus the buffer space retained for class

A' will be the largest and the loss probability of class NV will be the lowest among all

possibilities.

To solve the problem we need to develop a queueing model to characterize the

system.


5.3 A Queueing Model of Partial Buffer Sharing Mechanism

Based on the slotted nature of fixed-length cell processing in ATM switches,

the queueing system can be modeled as a discrete time Markov chain with finite buffer

capacity B and A' classes of arrivals. The Partial Buffer Sharing (PBS) scheme con-

trols access to the shared buffer according to the loss priority status of incoming cells.

A queueing model similar to the one stated by Iin and Silvester [70] is developed.

The queueing model presented in their work predicts accurately the loss probabilities

of a binary system with a given loss threshold and a multinomial traffic distribution.

However, unlike their model, the queueing model constructed here is intended to de-

scribe a multiple-threshold (N-class) system instead of a single-threshold (two-class)

system.








Suppose the transmission time of an ATM cell is one timeslot and all arrivals

and departures occur at slot boundaries. It is assumed that incoming cells have to

wait at least one tirneslot before being transmitted. Moreover, assume that cells

arrive at the system in a batch. The number of arrivals in a batch is random and

upper-bounded by L. The parameter L can represent the number of input ports or

the maximum number of cells that can be written into buffer within a timeslot. The

numbers of class i (i = 1, ...' ) cells in the batch are described by a joint probability

mass function (pmf), al,2,....Nv(nI, n,...n,v) = probability of nl class 1 cells, z, class

2 cells, etc., in an arriving batch. It is assumed that the probability of a class i cell

appearing in a batch is p, (i.e., p, = pr,) and is statistically independent of past

arrivals. Then the joint pmf a ,2,...\,v(nn, ...n,v) can be written as a multinomial

pm f:


a 1..2....v(nl, a', ...nv) = (5.2)
n ..1, 2,..., n,, (L - ...- nI )



i / .P2 .-r,,-n2-..-n"
L L L

Since only class 2 or higher priority cells (i.e., eligible group 2) can be accepted as

buffer state greater than B,, we need to calculate the marginal pmf

L
a2 .... 12...n. f,) -= a .,.....vY(ni n ...nv) (5.3)
nl=0


2 n 2 ,..., ,\,, iL 2... n-...

L L L L

and for the similar reason, the following marginal pmfls are also acquired:

L L
a3,...,'("3 .. = 1 a ,2....,v(Ni ...n .A')
n =0 n =0

n3 ... -, n, ,(L na3 ... ,V)












a -l ,'("r,. -1,inJ,) =


SvP3i, n,( P -n N_ i )L-n3-




PN-I),'N, N ( IN)
pNy1 nN-' (p /n PN-l PN L-nv-i-n"
SL L L L )


The pmfs of the aggregated batch size for different eligible groups are obtained


= pmf of the aggregated batch size for eligible group 1


all combiniions sbje 0 n.n, N y + + + f,1, = y,
all combinations subject to {0 < ni, n2, nN/_< ini +n- + +nI., = y)


= pmf of the aggregated batch size for eligible group 2


a2,...N(112 .---..N)


all combinations subject to {0 < n2,.. nN < 'y,n2 + ..+ nN = y}


= pmf of the aggregated batch size for eligible group N = aN(y)


To characterize the system, we need to find the steady state buffer size pmf

vector q = [q(0), q(1 ),..., q( B)] by solving tlie stationary equation:


q = qT


(5.5)


where T is the state transition matrix. The element e,,m in matrix T specifies the

state transition probability of the system going from state m to state n. The equation

below shows an example of the state transition matrix T.


1t(y)


ItNy)


1t(y)











t l(0) rlll)
t,(o) r (l )
01( O) Ii(1)
0 r1(0)


0 -
0


0 0
0 0
0 0



0 0


1L(2)
,l (2)



1,(0)
0


'l(2)


1j(1)
t1(0)


tIlL)
tlL)



11(2)
t L 10


0
0
'(L))


0

0


I((B, I) tli(B.0) t12( I)
It(BL 2) 12(B, 1,0) t12(Bi ,I)


t (0) 112(1,0) r,2(1. 1)
0 t2(0) 12( 1)
0 0 1j(0)


t12(B 2 ,B BI I ) t123(BI,B2 BI,0)
t,2(Bi IB B| 1) t123(B IB2 B,.0)


,2(,R~R-8 B )
t2(B2 Bi 1)
12(B2 3 2)


0


t,23(1,B2 B|,O)
12 1 B2 BI,0)
123(B; Bj 1.0)


0


230(l. B2 B, I)
t23(B2 BI,,
t.3(B2 s 1,1)


0


- 1234( 1, B2




0


- Bi. B B..0)




l-iWO


Since the probability of a class i cell appearing in a batch is p,, the total

traffic load to the system is pl +p2 + " + p, and as the buffer state exceeds the first

threshold, the effective traffic load becomes p2 + p, + + p,. Similarly, the effective

traffic load declines by a class arrival rate when the buffer state goes beyond the

corresponding threshold. Moreover, the transitions from state mn to state n < n -

are impossible because at most one cell will be served at each timeslot ald the state

transition probabilities from state mi to state n > m+ L I (n > L for i = 0) are also

zeros since lie number of arrivals in a batch is upper-bounded by L. The denotations

of other state transition probabilities are explained as follows. The t,(y,) represents

the probability that y, cells from eligible group i in an arriving batch enter tlie system,

the 1,,(y,, y,) is the probability that the first y, cells from eligible group i and exactly

yj cells thereafter from eligible group j in an arriving batch enter the system, and

so on. The transitions between state 0 < mi < B, I,=i and 0 < n < B, 1,=1 or state


2zll)


0
0
0


0
0
', (1







B,_i < nm < B, and Bii < n < B, depend only on the arrivals of eligible group i

and their probabilities are equal to ;i(n + 1 mi).

For the transitions from state 0 < m i< B, I,=i to B; I,=i<5 n < B,+, or state

Bi- < rn < B, to B, n < B,+I, the probabilities depend on the arrivals of eligible

group i and (i + 1) as well as the cell positions in the batch. Assuming every permu-

tation of the cell positions is with equal likelihood, the probabilities 1,,(i+I)(i;,y(i+l))

can be computed by considering the conditional probability that, given a number of

cells from eligible group i, there are exactly y(,+l) cells from eligible group (i + 1)

between position y, + 1 and the last position in the arriving batch [70]. In the next

step we multiply the conditional probability with the marginal pmf a,, v(n ...nx).

The ti,(i+I)(y,,y(;+)) can be obtained by summing up all these probabilities of possi-

ble combinations of n,,n,-+,...nx. For example, the corresponding probabilities for

a four-class system (N = 4) are given by:


112(yl,y/2' =


Y+Y2 L-(I,2+n3+n4)
E I E (57)
all combinations subject to {n2 + n3 + n4 = yp} ni=yi +y2-(n2+n+n,)
71 + ]2 + 113 + 114 1-- I
2.3.4(71,113, 1 ) ( 71 + 113 + 4 /
n/ +11-2 + 13 + n4
III'


2+y3 L -Irn 3+-1,

all combinal inns subject to {n3 + n4 = y3} 2a2=/a2+/3-I 13+114)
( n1 + 113 + n4 "? ( '1 y 14
Y3 / \ "3 +4 4 Y3
( 1 + 113 + n4
712


3+Y. L-n4 ( 3 + 1"4 y )
S I{ >I E 4(, 114) -
n=Y3 n3=y3+/4-n4 ( 3 + 114
k 13


a .? 3.4 ( 7 13, 714)


(5.8)


114 )Y
)


(5.9)


Depending on the distance between thresholds, the state transition probabil-

ities from 0 < m i B1 to n > B2 or state B,_1 < mn < B3 to n > Bi+, might need


13(/2, /3) =









134(.Y3, Y4)







to be solved. For instance, we need to figure out the probability of 1123(yly2,y13)

given the first y/ cells from eligible group 1 and the following Y/2 y2 = %2 8i) cells

from eligible group 2 and Y/3 cells afterwards from eligible group 3 in an arriving

batch if yl + /2 + 93 < L. Unfortunately, it is generally too difficult to compute

these probabilities analytically and thus they are solved in a numerical way. The

means to compute those transition probabilities across more than one threshold are

similar to the way that has been done for computing ti,(l,+i)(y,, (,+i)), except that

the conditional probability is now evaluated numerically. Finally, the probabilities in

any row of the state transition matrix need to be normalized so that the sum of all

elements in a row is equal to 1.

Once these state transition probabilities are determined, the equation q = qT

can be solved recursively to obtain the equilibrium state probabilities q(k). Specifi-

cally, this can be done by assuming an initial value for q(0) to solve for q( 1 ), q(2), ..., q(B)

sequentially and later deducing q(O) from the condition Zo qI i = 1. This method

is chosen because of easy programming. The stationary equation can also be solved

by many other numerical solution techniques.

5.3.1 Calculation of Loss Probabilities

The state probabilities q(k) can be used to calculate steady state loss prob-

abilities for different priority classes. To formulate lie loss probabilities, the re-

sults of a single-threshold system derived by Lin and Silvester [70] is adapted to a

multiple-threshold system. A more detailed explanation for the derivation of the loss

probabilities can be found in their paper.

Considering the probability for a tagged class i cell to be able to enter the

system, since it is assumed that the number of arrivals in a batch is upper-bounded

by L, the probability is always equal to 1 if the current bulfer state k is less than or

equal to B, L + 1 (if B; /. + 1 > 0). On the other hand, if tile butTer state k is

between B, and B, L + 1 (i.e., 1, I + 1 < k < B,), tie probability for a tagged







class i cell to successfully enter the system is related to its position as well as the

positions of other class cells in the batch. To begin, let us compute the steady-state

probability that a tagged class 1 cell in an arriving batch will be lost. Assuming that

the occurrence of a tagged cell in each position of an batch are equally possible, the

loss probability of a tagged class 1 cell (41) can be given by


01= ] (the probability that the tagged class I cell enter the system),
BI-L+1
- = q(k)({zfB, L+ 1 > 0)
k=0
B,
+ E q(k)
k=marO,Bi-L+2}
-P[the tagged class 1 cell arrives in one of the first (BI k + 1) positions of a batch I q = k
BI-L+I
= q(k){ifB, L + 1 > 0}
k=0

+ : q(k)
k=maxr{0.Bl-L+2}
"[ 1 ( .2.... v( ,11"2, *". VN)
all conmbinaiuns subject to {1 < n1 + n... + rN < L,nl > ) P
*n (, i, ?1 .... , k, )]

(5.10)

where

S1 if n1 + n + ... + < B, -k+l
PItil, n2,--- kjit BI-k+1 and
ni +n + ...+n,
,(n1, n2, .n,0) = 1 ifl n +" 2 + ... + ny < Bi
,n+n2+ ,...n otherwise.
Sni+ 2+...+n".-



The analysis of the loss probability of a class 2 cell is more complicated than

the computation of class 1 loss probability because of threshold B, limiting the en-

trance of class 1 cells. Depending on the buffer state, only cells in the eligible group

can be accepted to the system and thus the loss probabilities with different buffer

states need to be considered separately. Using the same assumption of an uniformly








distributed position, the loss probability of a tagged class 2 cell (02) can be formulated

by


2 = 1 02(the probability that the tagged class 2 cell enter the systemn,
B2-L+I
2 = E q(k){ifB,-L+ 1 0}
k=0
+-2,o(the probability that the tagged class 2 cell enter the system as mrar( B L + 2, B + I) < k < B )

+2,((tLhe probability that the Lagged class 2 cell enter the s>.tein if nmaxi(O.B L + 2) < < B, ),




B2
2.c, = q(k)
k:=mar{Bn -L+2,Bi +1)
-P[the tagged class 2 cell arrives in one of the first (Be k + I) positions

of an eligible group 2 batch lq = k]


k=,ar(B2-L+2.,B+l
S2 1 '2,J3,....\(112, 13, / )
all combinations subject Lo {1 < n2 r r. .+ rn; 1
Q2,,: (12, J3, ... n ., k)]

(5.11)


where

1 if 2 + nj + ... + ,.' < B2 k +
-+...+fN otherwise,
+. n 2 + n 3 + ...+ n ,



and

BI
2.1N = q(k)
k=mIr(0O.B2-L+2)
[Z "2 *",1.2. .r(,'I{}1 tt2, ***,N )
all comLiinations subject to {I < ni + n2.. + n,., L. n2 > I}
2.l ( l i ..".. 1 N, A. )]


(5.12)







where

S1I if n1 + + 2. + + Iv < B2 k +
= k B,-ktt and
fl1+nl+...+nlj
2,,(nn2,...n^,k) = n+ +...+n, and
+ n 2 "" 2+ H(n *1',71 .11N,k) otherwise,


H(II*, n, ...nN, k) =
nl n2 + ... + nl


min(n-1 B-B --(Bi-k+ 1) n,+ .+nv- I -[n'-1- (B, -- k1)]
lnl--I -r n, 1"2+ ... + n, - r
= /n, + n, +...+ n 1
Sn, + ... +n- 1


The loss probability of a tagged class i (i > 2) cell can be derived in a way

nearly like the loss probability of a class 2 cell. The only difference is the function

H in the calculation of Oj,. needs to be evaluated numerically in case of ma:r{0, B, -

L + 2} < k B,-2.

5.3.2 Numerical Results

In the previous section a queueing model is developed to compute the loss

probabilities of multiple priority classes under certain threshold levels. Using the

queueing model, some numerical examples showing the effectiveness of the Partial

Buffer Sharing scheme are presented. Let us consider the loss probabilities of a

four-class system (A' = 4) and assume that the maximal ai rivals in a batch is 10

(L = 10). Systems of greater priority class or larger bounds could be evaluated in a

similar manner.


Impact of loss thresholds. First the effect of varying the loss thresholds is

studied for a system of buffer capacity B = 60 and traffic load p = 0.9 with the

distance between threshold levels fixed at AB = 2. Figure 5.2 shows the loss proba-

bilities of four priority classes as a function of threshold levels. Three different traffic

mixes are considered: Figure 5.2(a) illustrates the loss probabilities of a balanced







traffic mix (r, = r2 = r3 = r4 = 0.25) and Figure 5.2(b) and Figure 5.2(c) show the

results of two extreme situations, class 1 dominated (r, = 0.7, r: = r3 = r., = 0.1)

and class 4 dominated (r, = r, = r3 = 0.1, r4 = 0.7), respectively. Due to the limi-

tation of the computing precision in our machine, the loss probabilities below 10-1

are offset by round-off errors and cannot be computed correctly. For those cases, a

small number 10-'" will be substituted for them. It is noted that using a logarithmic

scale, the loss probabilities display a linear-like variation as the threshold levels are

increased, which is similar to the results of the binary priority system [70, 72, 73]. As

the threshold levels increased linearly, the accessible bulfer space for the associated

priority class is expanded, thus reducing the loss probabilities. On the other hand,

the increment of the threshold levels changes the state equilibrium probabilities. The

buffer has a higher occupancy due to the increment, thus increasing the loss proba-

bility of the highest class. The curves giving the loss probabilities of the lower three

priority classes remain parallel as the thresholds vary. Moreover, it is observed that

the differences between the loss probabilities of the priority classes depend strongly

on the traffic mixture.


Impact of traffic load. Next, the influence of different traffic loads under a

balanced traffic mix is evaluated. The resulting loss probabilities are presented in

Figure 5.3 with traffic loads of p = 0.8 and p = 0.99. It is seen that the variation of

traffic load will effect the slopes of the curves giving the loss probabilities. With a

set of fixed threshold levels, the increase of system load will rise t lie loss probabilities

of all priority classes. In addition, it. is observed that the loss probability of the most

significant class can be improved substantially by sacrificing a moderate degree of

the loss probabilities of lower priority classes.







Impact of buffer capacity. The variation of the loss probabilities as a func-

tion of buffer capacity is evaluated. Figure 5.4 shows the probabilities against var-

ious buffer capacities with a fixed traffic load p = 0.9 and different traffic mixes.

The threshold levels are stabilized at a determined ratio of total buffer capacity

(B, = 0.7B, B- = O.SB, B3 = 0.9B). All the loss probabilities decrease as the buffer

capacity is expanded. Each curve of the loss priority classes varies with a different

slope since the increments of the threshold levels are now proportional to the associ-

ated ratio, instead of a fixed distance. It is noticed that the variation of traffic mix

has a substantial impact on the loss probabilities of the higher priority classes.


5.4 Optimization of Loss Thresholds

We now proceed to the problem of searching for a set of optimal loss thresh-

olds within a finite buffer. The objective is to maximize the system admissible load

without violating the given constraints of loss probabilities and traffic conditions.

As mentioned earlier, under a fixed load condition, an increase in the loss threshold

of a particular class can decrease its corresponding loss probability because the ac-

cessible buffer space for this class is increased. Simultaneously, the increase of the

loss threshold will increase the loss probabilities of higher priority classes because the

state equilibrium probabilities are changed. In other words, given a set of loss thresh-

olds that satisfies the loss constraints, an increase in the loss threshold of a particular

class will drive the loss probability away from the loss constraint of this class, while

making the loss probabilities of higher priority classes move closer (or even exceed)

to their loss constraints. Thus if there is any priority class for which loss probability

violates its loss constraint, we can try to increase the corresponding loss threshold to

reduce the loss probability (at the expense of increasing the loss probabilities of other

classes). On the other hand, considering the effect of increasing system load under a

set of fixed loss thresholds, the increase will raise the loss probabilities of all classes











(a) rl =r2=r3=r4=0 25


10 2


1o0


~ ~ e ....
-- e



4.-0-

+/





priority class 1 -
x
o : priority class 2

+ priority class 3
x
x priority class 4
Sporty class 4


10 15 20 25 30 35 40
Loss Threshold B1 (B2=B1+2,B3=B1+4)



(b) r1=r2=r3=0 1,r4=0.7


10 15 20 25 30 35 40
Loss Threshold B1 (B2=B1+2B3=B1 +4)


45 50 55


45 50 55


Figure 5.2: The Loss Probalilities as a Function of Threslhold Levels with B=60 and
p = 0.9 (a) Balanced Traffic Mix (b) Class 4 dominated (c) Class I dominated


c. a

-0-l
2 10
CL

0


1012


1014


10"

5





10


10.2


10.`


-12


0-14
0-


10 51.-
5


"+ ', "0 ,+.



"---







x
X,




priority class 1
o priority class 2
+ : priority class 3 C

x : priority class 4




84



(c) r1 =0.7,r2=r3=r4=0.1
100


10-2



S-oa



210 --. 060oo
U ) 4 -.' e .
a-
-r.
10-
10 -

10 1 : priority class 1
o : priority class 2
10 + : priority class 3
x : priority class 4
10-1W
5 10 15 20 25 30 35 40 45 50 55
Loss Threshold B1 (B2=B1+2,B3=B1+4)
Figure 5.2--Continued


because the buffer state has higher occupancy. If we keep increasing the system load,

eventually some of the loss constraints will be violated. Therefore, we can expect

that the more rigorous the loss constraints, the lower the system admissible load.

Since we cannot change the given loss constraints and traffic conditions, we can

only vary the loss thresholds for searching the optimal loss thresholds that maximize

system admissible load. To make the optimization process more efficient, a procedure

whose fundamental concept was introduced by Petr and Frost [69] is adapted. In

their study, it has been verified, by exhaustive search, that the procedure always

generates the optimal results for a buffer capacity up to 30. A similar algorithm is

used to search for a set of thresholds which produces the best system admissible load

under the given conditions. In addition, a well-established optimization technique,

the Hooke and Jeeves optimization algorithm [71], is utilized for vciifying the results

and making fine adjustments.











(a) rl=r2=r3=r4=0.25,load=0.8


Loss Threshold B1 (B2=B1+2,B3=B1+4)



(b) rl=r2=r3=r4=0.25, load=0 99


10 15 20 25 30 35 40
Loss Threshold B1 (B2=B1+2,B3=B1+4)


45 50


Figure 5.3: The Loss Probabilities as a Function of Threshold Levels with

Varied Traffic Load (a) p = 0.8 (b) p = 0.99


104


10"6

-8

-o
2 10
QC
0
K. I


10-12


1014


105-'
5


--- -- - -o- - -aOe O<>D

S-- + +


-.






,




: priority class 1

o : priority class 2
/
+ : priority class 3 /

x : priority class 4
/


13=60 and


c >l >lc at alt sk al: >It al:











(a) r1=r2=r3=r4=0.25


(b) rl=r2=r3=0.1,r4=0.7
i I

S: priority class 1

o : priority class 2

S + :priority class 3
Sx : priority class 4

x + +.-.


+, + -
0 ,
-


Figure 5.4: The Loss Probabilities as a Function of Buffer Capacity with B1 =

0.7B, B2 = 0.SB, 33 = 0.9B and p = 0.9 (a) Balanced Traffic Mix (b) Class 4

dominated (c) Class 1 dominated


-C -
-8
210

o
-3 ..,U


.a
.o.

210
l-
03
- ( .-(


100


21
10'



10-



10


u


10



10 20 30 40 50 60 70 80
Buffer Capacity (B1 =0.7B,B2=0.8B.B3=0.9B)


J\









0 (c) r1=0.7,r2=r3=r4=0.1
10

S: priority class 1
102 o : priority class 2
S. + : priority class 3
1-4
10 x : priority class 4


10 '-6




10
l o-. 1 '0

10- 12
t o s





10-14 \ +
\ Q
10-16-------\------------ ,,
10 20 30 40 50 60 70 80 90 100
Buffer Capacity (B1=0.7B,B2=0.8B,B3=0 9B)
Figure 5.4--Continued


Because of the discrete nature in this problem, it is ver, difficult to prove

by a rigorous mathematic means that the optimization procedures will always find

a global optimum. In numerical optimization techniques, two standard heuristics

that are frequently utilized to enhance the reliability of results are. ([) perturb the

extremum by taking a finite amplitude step away from it and then see if thie procedure

leads to other better points or the same one, and (2) find local extrema starting from

widely ranged initial base points and then pick the most extreme of these [71]. By

making use of the heuristics as well as the exhaustive search method to run many

tests on the results, we believe that employing tllie searching p)rocedure and the Hooke

and Jeeves method can always converge the system admissible load to an optimal

point.

First the searching procedure is explained briefly. The searching procedure

is initialized at a conservative base point with all the loss thresholds set to their







minimum values and p beginning at a small number. The loss probabilities at the

base point are then evaluated to see if there is any priority class violating its loss

constraint. If not, the base point is saved as a qualified base point and the p is

increased by a prescribed step size to explore if higher p is possible. This procedure

is repeated until some loss constraint is violated. At this point, we begin to search

for a set of loss thresholds that satisfies the loss constraints under the current p. The

corresponding loss threshold is increased by I each time to see if the reduced loss

probability, as well as the loss probabilities of other classes, fulfill the requirements.

If the exploration succeeds, the current p and loss thresholds become new base point

and we try to increase p again. If it fails, then the previous base point is the highest

p that can be achieved. Specifically, the searching procedure is terminated whenever

the loss thresholds have reached their maximum values or the loss constraint of the

highest class has been violated. The searching procedure, directing its moves based

on the knowledge of the effects of changing system variables, has climbing property

and can explore the searching space in a very efficient way to find the maximal system

admissible load. The logic diagram for this searching procedure is presented in Figure

5.5.

The outcome of the above procedure is substituted into an optimization algo-

rithm, the Hooke and Jeeves pattern search method, for verification and fine adjust-

ment. The Hooke and Jeeves optimization algorithm is a direct search method that

does not require the use of derivatives. The algorithm has ridge following properties

and is based on the premise that any set of design moves that have been successful

during early experiments is likely again to prove successful. The algorithm begins

with an initial base point in the feasible design space and prescribed exploration

step sizes. An exploration is then performed at a given increment along each of the

independent-variable directions following the logic shown in Figure 5.6. In this case,

the initial base point of the Hooke and Jeeves method is set to the final base point of







the searching procedure shown in Figure 5.5. For the sake of saving computing time,

the step size in the searching procedure is chosen to be larger than the exploration

step size in the Hooke and Jeeves algorithm (e.g., step size = 0.01 and exploration

step size = 0.001) so that the outcomes can also be fine adjusted by the Hooke and

Jeeves method. In addition, the Hooke and Jeeves algorithm can be evoked to adjust

the system variables for an optimal system performance whenever the traffic con-

ditions are changed. The previous base point can be used as an initial point with

the selection of an appropriate exploration step size to search for the new optimal

threshold arrangement in the dynamic environment.

The computational demand of the optimization process fluctuates from case to

case. It is mainly dominated by the cost of evaluating loss probabilities under given

loss thresholds and the size of the searching space. Since part of the state transition

probabilities of the queueing model might need to be solved in a numerical way,

the computation of loss probabilities can be demanding if the distance between loss

thresholds is small. Fortunately, by employing the searching procedure, we are able

to explore the searching space efficiently without making an exhaustive search over

all of the possibilities. It has been shown that the search efficiency can be improved

considerably for large N and buffer capacity, as compared to the exhaustive search

method [C9].

5.4.1 Numerical Examples: A Three-Class System

To demonstrate the clfect of varying threshold levels, the system admissible

load of a three-class system foi all possible combinations of the threshold levels is

computed. By simulating the three-class (two-threshold) system, we are able to

display the results in a 3-D visualization. The bulfer capacity is assumed to be GO

and 0 < B, < 82 < B. It is assumed that the loss constraints of the three classes are

PLi = 10-2, PL2 = 10-' and PL3 = 10-'", respectively, and a balanced traffic mix

is simulated (r, = r2 = r3 = 1/3). The maxinmun system admissible load for fixed




90








CSta-rt

Set initial
base point (initial load=0. 1,
I B1=1,Bi=Bi-I + t0=2 ,....N-1))
Evaluate loss
Sprobabilities at
base point


if
ac loss probability yes
of th e highest class exceeds So
Ls loss constraints

no
(Bi= Bi +11
if
Increase the yes any priority class no
corresponding ,olate its loss constraint? Set new' base point
loss threshold


adjust loss thresholdsInraeld
so that
BI < B2< <... BN-1I
(I oad = load + step size)


no
if BN-1 = buffer size?


yes

Stop

Figure 5.5: The Logic Diagram of the Sezirching Procedure






















Exploralory mo\es


reached


Figure 5.6: The Hooke and Jeeves P'attern Search Process







Table 5.1: The Optimal Loss Thresholds of a Three-class System with Balanced
Traffic Mix (PLI = 10-2, PL2 = 10-8, PL3 = 10-4)
B B, B2 pmar
10 3 7 0.294
20 6 15 0.721
30 12 24 0.S94
40 20 34 0.953
50 27 41 0.971
60 39 54 0.987
70 46 63 0.992
SO 5S 73 0.990
90 59 74 0.997
100 72 89 1.0


threshold levels was computed by increasing the system load gradually until some

of the loss constraints were violated. Figure 5.7 shows the maximum system loads

that can be achieved for different combinations of the threshold levels B, and B,.

The optimal point in this case is shown to be p = 0.987 with BI = 39 and B2 = 54.

The searching procedure was utilized for finding the best threshold levels under the

given conditions and it returned the values of p = 0.98 with BI = 38 and B2 = 52.

The outcome was then substituted into the Hooke and Jeeves algorithm and it was

adjusted to p = 0.987 with B, = 39 and B2 = 54, which is exactly the optimal point

shown in Figure 5.7. The optimal system load and loss thresholds with respect to

different buffer capacities are summarized in Table 5.1.

Next we demonstrate the potential performance improvement with the op-

timization procedures. Consider a three-class system with a set of loss constraints

PL, = 10-6, PL = 10-10 and PL3 = 10-'". We compare the maximal admissible

loads of the systems with a fixed threshold assignment and with a set of optimal

threshold levels. The buffer capacity is assumed to be 60 and a balanced traffic mix

is simulated. The assignment of fixed threshold levels is arbitrary and an obvious

choice is to select the levels which equally divide the available buffer space. Figure 5.8

and Table 5.2 present a comparison between the achievable loads with and without




9:3






















-o 0.8


. 0.6-

E
ca 0.4,
E


c 0.2


0
60

40
40
20 30
20
10
loss threshold B2 loss threshold B

Figure 5.7: The System Admissible Loads as a function of Loss Thresholds (PL1 =
10-2, PL2 = 10i-, PL3 = 10-')




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