Group Title: Investigation of interface properties and hot carrier degradation effects in silicon-on-insulator materials and devices /
Title: Investigation of interface properties and hot carrier degradation effects in silicon-on-insulator materials and devices
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Permanent Link: http://ufdc.ufl.edu/UF00097375/00001
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Title: Investigation of interface properties and hot carrier degradation effects in silicon-on-insulator materials and devices
Physical Description: vii, 161 leaves : ill. ; 29 cm.
Language: English
Creator: Chang, Yun-Shan, 1962-
Publication Date: 1995
Copyright Date: 1995
 Subjects
Subject: Silicon-on insulator technology   ( lcsh )
Metal oxide semiconductor field-effect transistors   ( lcsh )
Electrical and Computer Engineering thesis, Ph. D   ( lcsh )
Dissertations, Academic -- Electrical and Computer Engineering -- UF   ( lcsh )
Genre: bibliography   ( marcgt )
non-fiction   ( marcgt )
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Thesis: Thesis (Ph. D.)--University of Florida, 1995.
Bibliography: Includes bibliographical references (leaves 145-153).
Additional Physical Form: Also available on World Wide Web
Statement of Responsibility: by Yun-Shan Chang.
General Note: Typescript.
General Note: Vita.
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Bibliographic ID: UF00097375
Volume ID: VID00001
Source Institution: University of Florida
Holding Location: University of Florida
Rights Management: All rights reserved by the source institution and holding location.
Resource Identifier: alephbibnum - 002070218
oclc - 34462270
notis - AKQ8480

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INVESTIGATION OF INTERFACE PROPERTIES AND HOT CARRIER
DEGRADATION EFFECTS IN SILICON-ON-INSULATOR
MATERIALS AND DEVICES













BY
YUN-SHAN CHANG













A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL
OF THE UNIVERSITY OF FLORIDA IN
PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE DEGREE OF DOCTOR OF PHILOSOPHY


UNIVERSITY OF FLORIDA

1995


UNIVERSITY OF FLORIDA I.BRARES













ACKNOWLEDGEMENTS


I would like to express my deep appreciation to my advisor and the chairman

of my Ph.D. committee, Professor Sheng S. Li, for his guidance and support of my
research efforts. I also wish to thank Professors Gis Bosman, William R. Eisenstadt,

Mark E. Law, and Robert Park for serving on my supervisory committee.

I gratefully acknowledge the financial support of Ibis Technology. I wish to

thank Dr. Lisa Allen of Ibis Technology for providing the SIMOX samples and defect
measurement data for this study.

Special thanks are extended to Dr. Sorin Cristoloveanu of UA-CNRS in France,
Drs. C. Claeys and E. Simoen of IMEC in Belgium, and Dr. P. C. Yang of Feng Chia
University in Taiwan for their valuable discussions. I would like to extend my sincere

appreciation to my colleagues in the laboratory for their assistance.

Finally, I am greatly indebted to my grandmother, my parents, my parents-

in-law, my uncle, and especially, my dear wife, Iris Chen and my dear daughters,

Katherine and Daphne Chang for their love, support, patience, and encouragement

throughout the arduous procedure of completing my Doctor of Philosophy degree.












TABLE OF CONTENTS


Page

ACKNOWLEDGEMENTS ................................................... ii

ABSTRACT ............. ........................ ... ....................... vi

CHAPTER

1 INTRODUCTION .................................................... 1

2 A NEW CONTACTLESS S-POLARIZED REFLECTANCE TECHNIQUE
FOR DETERMINING THE SILICON FILM AND BURIED OXIDE THICK-
NESS IN SILICON-ON-INSULATOR MATERIALS .......................6

2.1 Introduction ......................................................... 6
2.2 Theory ..............................................................7
2.2.1 Measurement of TOP Si Film Thickness ..........................8
2.2.2 Measurement of Buried Oxide Layer Thickness .................. 10
2.3 Experimental Details ...................................... ...... 11
2.4 Results and Discussion .......................................... ..12
2.4.1 Measurement of TOP Si Film Thickness .........................12
2.4.2 Measurement of Buried Oxide Layer Thickness .................. 14
2.5 Conclusion ........................................................ 16

3 DETERMINATION OF INTERFACE RECOMBINATION VELOCITIES AND
CARRIER LIFETIMES IN SOI MATERIALS BY A CONTACTLESS OP-
TICAL MODULATION TECHNIQUE ...................................37

3.1 Introduction ..........................................................37
3.2 Theory for DBOM Technique ........................................38
3.3 Experimental Details ............................ .... ................. 43
3.4 Results and Discussion ..............................................45
3.4.1 Measurement of Front Interface Recombination Velocity .......... 45
3.4.2 Measurement of Substrate Lifetimes .............................46








3.4.3 Measurement of Back Interface Recombination Velocity ...........46
3.5 Conclusion ......................................... ................ 47

4 CORRELATION OF IMPLANTATION DEFECTS WITH DETERMINED
INTERFACE RECOMBINATION VELOCITIES AND CARRIER LIFE-
TIMES IN ANNEALED SIMOX SOI MATERIALS BY USING A CONTACT-
LESS OPTICAL MODULATION TECHNIQUE ........................ 69

4.1 Introduction .................. .................... ... ............... 69
4.2 Experimental Details .............................................. 70
4.3 Results and Discussion ............................. ...... ........... 72
4.3.1 Implant Energy, Channeling, and Non-channeling Conditions ......74
4.3.1 Implant Temperature Conditions ................................76
4.3.1 Implant Beam Current Conditions ...............................77
4.4 Conclusion ...........................................................79

5 THE EFFECTS OF PARASITIC BIPOLAR-TRANSISTOR CONDUCTION
ON THE HOT-CARRIER-DEGRADATION OF SOI MOSFETS ..........93

5.1 Introduction ........................................................ 93
5.2 Theory .............................................................. 94
5.2.1 Parasitic BJT Effects ........................................ 94
5.2.2 Hot Electron Injection ......................................... 97
5.2.3 Extraction of Degradation Parameters ............................. 99
5.3 Results and Discussion ...............................................99
5.4 Conclusion .................................................. 102

6 MODELING AND PARAMETER EXTRACTION OF GATE-ALL-AROUND
NMOS/SOI TRANSISTORS IN LINEAR REGION .................... 119

6.1 Introduction ...................................................119
6.2 Theory ............................................................. 120
6.2.1 Weak Inversion ........................................... 121
6.2.2 Strong Inversion ................... ..... ..................... 124
6.2.3 Moderate Inversion .................... ....................... 126
6.3 Results and Discussion ............................................. 128
6.3.1 Weak Inversion ................................................. 128
6.3.2 Strong Inversion ................................................ 129
6.3.3 Moderate Inversion ............................................ 130
6.4 Conclusion ........................................................ 130







7 SUMMARY AND CONCLUSIONS ...................................... 141

REFERENCES .............................................................. 145

APPENDIX A: DERIVATION OF EXCESS CARRIER CONCENTRATION IN
ULTRA-THIN TOP SILICON FILM .........................154

APPENDIX B: DERIVATION OF IMPACT-IONIZATION MULTIPLICATION
FACTOR AND CHANNEL CURRENT IN MOSFET PART 155

APPENDIX C: DERIVATION OF CURRENT COMPONENTS FOR PARA-
SITIC BJT ............................. . ............... .. . 158

APPENDIX D: DERIVATION OF SURFACE POTENTIAL AT
THRESHOLD ............................ ................. 160

BIOGRAPHICAL SKETCH .................................................. 161












Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy


INVESTIGATION OF INTERFACE PROPERTIES AND HOT CARRIER
DEGRADATION EFFECTS IN SILICON-ON-INSULATOR
MATERIALS AND DEVICES

By
Yun-Shan Chang

December 1995


Chairman: Sheng S. Li
Major Department: Electrical and Computer Engineering

This research effort mainly deals with the studies of interface properties and par-
asitic bipolar conduction on hot carrier degradation effects and the modeling of the

GAA (Gate-All-Around) MOSFET's in thin-film silicon-on-insulator (SOI) materials
and devices. It consists of three parts: In the first part, a contactless S-polarized
reflectance optical technique for mapping and determining the top Si film and buried
oxide layer thicknesses and an optical modulation technique for determining and map-

ping the interface recombination velocities and substrate carrier lifetimes in SIMOX
(Separation by IMplantation of OXygen).SOI wafers have been developed for use as
quality control and processing evaluation tools in the fabrication of ULSI circuits. In

the second part, the extraction of degradation parameters in the defective region after
hot carrier stress and the modeling of floating body effects in the partially depleted

(PD) SOI devices are presented. In the third part, A modeling of GAA devices and
the extraction of parameters are depicted.








Mapping of the top Si film and buried oxide thicknesses in a SIMOX wafer was
performed by using a contactless S-polarized reflectance optical modulation (DBSPR)

technique. The DBSPR method is based on the S-polarized reflectance measured at
oblique incident angles in the SIMOX wafer. A theoretical model was developed to
extract the top Si film and buried oxide layer thicknesses from the DBSPR technique.

Mapping of the interface recombination velocities and substrate carrier lifetimes in
a SIMOX wafer was performed by using a contactless optical modulation technique.
The optical method is based on the modulation of transmission intensity of an in-

frared (IR) probe-beam by a visible pump-beam (hv >E9) via free carrier absorption
in the SIMOX wafer. A theoretical model was developed to determine the interface
recombination velocities and substrate carrier lifetimes from the optical modulation

technique. The evaluation of implantation-condition effects on the defect formation

mechanisms in an annealed SIMOX wafer by using the DBSPR and the optical mod-
ulation techniques is also presented.

The extraction of degradation parameters in the defective region after hot carrier

stress in the PD SOI MOSFET's is discussed. Moreover, the developed model and
the experimental results reveal the aggravation of hot carrier effects on the parasitic

bipolar transistor conduction in the PD SOI devices. Using the two-piece model, the

degradation parameters in the defective region can be extracted. The modification of
kink behavior, breakdown voltage, and parasitic bipolar action after the hot carrier

stress is predicted by the developed models and observed in the experiment.

Modeling of the GAA devices was developed. The gate-all-around structure of

the GAA devices provides the enhancement of drain current and transconductance.
Due to the volume-inversion effect, the mobility is enhanced in the GAA devices.

Using the measured drain current versus gate voltage characteristics, the modeling

parameters can be obtained. Several current-voltage methods are employed to verify
the extracted parameters.













CHAPTER 1
INTRODUCTION



In an MOS transistor, only the very top region of the silicon wafer is actually
useful for electron transport. The inactive volume induces only undesirable, parasitic

effects. SOI (silicon-on-insulator) structures emerged from the idea of isolating the
active device overlay from the detrimental influence of silicon substrate. The top sili-
con film thickness of SOI can be adjusted to meet the requirements of the performance
of any electronic devices.

The SOI technology is becoming increasingly important for many ULSI appli-
cations due to the many advantages of this technology such as being capable of
operating at high temperature, high speed, high packing density, radiation hardness,
and the lower fabrication cost of device isolation. In ULSI circuits the advantages of
thin film SOI device structure over its bulk silicon counterparts include high carrier
mobility, sharp subthreshold slope, ameliorated short-channel effects, reduced hot-
carrier degradation, and increased drain current. In subquarter micron regime, the

ultra-thin-film CMOS/SIMOX technology is very promising for future low voltage
ULSIs [1]. Recently, the development of fully-depleted (FD) SOI devices fabricated

on ultra-thin SOI films has drawn great interest in SIMOX and bonded SOI wafers

for high-speed ULSI applications. This is mainly due to the reduction of parasitic
capacitances, body charging effects, threshold voltage shifting, latch-up effects, short

channel effect, and higher drive current ability. However, several device and material

problems need to be overcome before mainstream IC applications of these SOI mate-
rials can be fully realized. These include (i) floating body effects; (ii) heat dissipation









through the buried oxide (BOX) layer; (iii) the effects of back interface on device
reliability [2]; (iv) film thickness control in FD devices [3]; (v) the necessity of low
defect density, low cost ultra-thin film substrate (e.g., top Si film < 100 nm); (vi)
buried oxide integrity, and (vii) heavy metal contamination. As the SOI technology
enters the deep sub-micron CMOS regime, the supply voltage will be reduced be-
low 2 V [4]. The inherent low breakdown voltage due to parasitic bipolar action in
fully depleted(FD) devices, heat dissipation, and reliability problems will no longer
be much of a problem for low voltage (< 2.5 V) applications. For a ultra-thin-film
CMOS/SIMOX ULSIs, the high series resistance impairs the speed advantage. A
selective deposited material on the source and drain region is necessary[5]. Salicida-
tion on the source and drain may reduce drain/source parasitic resistance [6], but a
gate-to-source/drain leakage due to bridge [7] was observed. In addition, impurities
in the sources of silicidation metal (e.g. Ti, Co, W etc.) can thermally diffuse in
the later annealing. The stacking fault on the Si/SiO2 interface induced by oxygen
implantation during formation of the SOI structure can be decorated by these heavy
metals. Also, source/drain implantation and active region doping are other possible
sources to introduce the contamination impurities. This intrinsic gettering becomes
generation-recombination centers in the back channel, and the leaking current in the
back channel may result an increased subthreshold swing and a deteriorated short
channel effect.
Thinner BOX layers offer a better control of short channel effects, improvement of
the quality of silicon overlayer, heat dissipation, and reduction of the wafer manufac-
turing costs. The advantageous reduction in parasitic capacitance offered by the SOI
is somewhat diminished by thinning of the BOX. However, the PISCES simulations
show that increased capacitances due to a thinner BOX layer are minor compared to
bulk junction depletion capacitance [8]. Production of SIMOX wafers with thin BOX
layers requires special processing techniques to achieve an integral insulating layer.









To optimize the integrity of the formed oxide layer needs further study.
This dissertation mainly deals with the study of interface properties and parasitic
bipolar conduction on hot carrier degradation effects and the modeling of the GAA
(Gate-All-Around) MOSFET's in thin-film silicon-on-insulator (SOI) materials and
devices. There are three basic objectives: (1) To develop a contactless S-polarized
reflectance optical technique for mapping and determining the top Si film and buried
oxide layer thicknesses, and to develop an optical modulation technique for determin-
ing and mapping the interface recombination velocities and substrate carrier lifetimes

in SIMOX SOI wafers for use as quality control and processing evaluation tools in the
fabrication of ULSI circuits, (2) to extract the degradation parameters in the defec-
tive region after hot carrier stress and to investigate and modeling the floating body

effects in the partially depleted (PD) SOI devices, (3) to analyze the current-voltage
characteristics and to extract physical parameters for the GAA nMOS SOI devices.
Chapter 2 describes the theoretical and experimental aspects of the top Si film

and buried oxide layer thickness measurements on SIMOX samples by using a dual-
beam S-polarized reflectance (DBSPR) optical technique. A model for the DBSPR
technique was developed. It is shown that the top Si film and the buried oxide layer

thickness in SOI wafers can be determined by using a S-polarized He-Cd CW laser

(A = 442 nm) and a S-polarized He-Ne CW laser (A = 632.8 nm) as the incident light
source, respectively.
Chapter 3 presents a dual-beam optical modulation (DBOM) technique for de-

termining the interface recombination velocities and substrate carrier lifetimes in
thin-film SIMOX wafers. The DBOM method is successfully applied to determine
the front interface (Si/Si02) recombination velocities and the back interface (Si02/Si

substrate) recombination velocities and the substrate carrier lifetimes in SIMOX sam-
ples when a He-Cd CW laser (A = 442 nm) and a He-Ne CW laser (A = 632.8 nm)
are used as the pump beam, respectively.









In Chapter 4, the investigation of implantation-condition effects on the defect

formation mechanisms in the annealed SIMOX materials by using the DBSPR and
DBOM techniques described in Chapter 2 and 3 is presented. Different implantation
conditions such as implant energy, channeling, non-channeling, implant temperature,

and implant beam current are used in the study. An etch-pit method is also em-
ployed to compare the defect density in the top silicon film with the measured in-
terface recombination velocity. The correlation between the defect density and the
recombination velocity can be used to optimize the conditions of SIMOX fabrication.
Chapter 5 presents the effects of parasitic bipolar-transistor conduction on the
hot-carrier-degradation of SOI devices. An analytical model of parasitic BJT effects
on the PD SOI nMOSFET is presented for correlating the hot-carrier-induced aging,
and a modified lucky-electron model is developed for estimating the degradation of
SOI nMOSFET characteristics. The discrepancy between floating- and unfloating-
body connection in the hot-carrier-induced degradation is successfully explained by

the present model. The device aging was monitored mainly by changes in threshold
voltage, transconductance, and saturation current, and the corresponding degradation
parameters of aged devices were extracted from the measured Ida Vgl curves before
and after stresses.
In Chapter 6, the modeling and parameter extraction of nMOS GAA transistors
in linear region are presented. The non-ideal GAA MOSFET's was modeled as a
parallel connection of one long-double-gate and two edge-gate transistors. Using
Poisson equation which considers both the depletion charges and minority carriers,

the current-voltage relationship and the expressions for the surface potential and
surface electric fields were derived in the regions near and below threshold. Due
to the volume inversion characteristics of the GAA devices, the surface potential at
threshold is no longer pinned at the classical limit (i.e., 20F, where 4F is the Fermi





5


potential) of strong inversion. The models allow for the parameter extraction of low-
field mobility Po, surface state density N,,, series resistance R,, and surface scattering

parameter 0 from the measured static current-voltage curves in the linear region of
the GAA devices. Finally, key conclusions of this work are given in Chapter 7.












CHAPTER 2
A NEW CONTACTLESS S-POLARIZED REFLECTANCE TECHNIQUE FOR
DETERMINING THE SILICON FILM AND BURIED OXIDE THICKNESS IN
SILICON-ON-INSULATOR MATERIALS


2.1 Introduction

Silicon-On-Insulator (SOI) technology is becoming increasingly important for a
wide variety of applications due to the many advantages of this technology such as

simple isolation, capability of operating at higher temperature, higher packing density,
radiation hardness, and reduction of parasitics. Nonuniformity in the thickness of top
Si film and buried oxide of the SOI wafers can result in fluctuation of the threshold
voltage in SOI MOSFETs. Moreover, both the Si film and buried oxide thicknesses
are important parameters for modeling [9] and process control of the SOI materi-
als and devices. The most commonly used methods for determining the SOI film
thickness are reflection interference spectroscopy, ellipsometry, scanning electron mi-

croscopy (SEM), and transmission electron microscopy (TEM)techniques. Although
other techniques such as threshold voltage method [10, 11] and high-frequency CV
method [12] have also been applied to determine the Si film and buried oxide layer

thicknesses in the processed SOI devices, these methods are performed on the fin-
ished SOI devices, and can not be considered as the nondestructive and contactless
techniques for screening the film non-uniformities of the starting SOI wafers and for
process monitoring. In this chapter, we report the development of a new contact-
less dual-beam S-polarized reflectance (DBSPR) technique for determining the film
thickness on absorbing and nonabsorbing films formed on the same semiconductor

substrate. The technique was applied to determine thicknesses of top Si film and
buried oxide layer in SIMOX wafers. The DBSPR technique can be combined with









the dual beam optical modulation (DBOM) technique developed by us earlier [13, 14]
as a nondestructive and contactless quality control tool for SOI technology.


2.2 Theory

In this section, we describe the DBSPR theory for determining the thicknesses

of top Si film and buried oxide layer (BOX) in a SOI wafer using the S-polarized re-

flectance measurements. As shown in Fig. 2.1, an S-polarized laser beam is impinging

at an angle of incidence 01 on the surface of a SIMOX wafer. The total reflection

coefficient can be expressed as [15, 16]

ro + r e-i-' + r2e-i(AI+A2) + rorl r2e-i2
1+ ror e-i + ror2i( + o2e( ) r2e-i2 ( )

where
4ir
A1 = --nsitf cos 02 (2.2)

4?r
A2 = --noto S cos 03 (2.3)

where ro, ri and r2 are the Fresnel reflection coefficients at the air/Si film, Si film

/buried oxide, and buried oxide/Si substrate interfaces, respectively; A, and A2 are

the phase changes that result from the double travel of light in the top Si film and

buried oxide layer, respectively; A is the wavelength of the incident light; tf is the Si

film thickness; t,, is the buried oxide thickness; 02 and 03 are the refraction angles

in the Si film and the buried oxide layer, respectively; no, is the refractive index of

the buried oxide layer; ni is the refractive index of Si film and ni = Nsi jk, where
Ni is the real part of the refractive index, and k(= ;) is the imaginary part of the

refractive index [17]; a is the optical absorption coefficient. The Fresnel reflection

coefficients ro, r, and r2 are given by

cos 01 nsi cos 02
cos 0 + n cos 02 (2.4)









rn,i cos 02 no, cos 03 .
rl = (2.5)
n,; cos 02 + nox cos 03
no, cos 03 n,i cos 2 (2.6)
r2 = (2.6)
nox cos 03 + ni COS 02
2.2.1 Measurement of Top Si Film Thickness

As shown in Fig. 2.1, to determine the thickness of top Si film in a SOI wafer,
an S-polarized blue He-Cd CW laser (A = 442nm) is used to obtain the S-polarized
reflectance, and the total reflectance is measured by using a laser power meter. Equa-
tion (2.1) may be expressed as
ro0 + re-in1
r -(2.7)
1 + rorie-i~

Equation (2.7) is an approximation of Eq. (2.1) by neglecting the back reflectances (r')
below the Si/buried oxide layer interface (r ro r+ree-' with r' w ri). Since the blue
light is mainly absorbed in the top Si film (a 3x104 cm-') [18], the approximation
can be applied to both thick film and thin film for certain angles of incidence. For
thin-film samples, Eq. (2.7) is valid over a wide range of incident angles (see Fig. 2.5).

Under this approximation, the error on the measured top Si film thickness is less than
5%, as shown in Fig. 2.6(b). It is found that this technique is adequate for measuring
the film thickness in semiconductor or SOI wafers with tf > 30nm.
The total reflectance R = r r* (* denotes the complex conjugate) can be ex-
pressed as
S Ro + Rie-b + 2/RTRe-b cos(X + 60 ) )
1 + RoRie-2b + 2f_-R7e-6 cos(X 60 61)
where X = 4ft and b = 4rt; u and v are given, respectively, by
A A

2u2 = N2 k2 sin2 01 + /(NJ, k sin2 60)2 + 4N,.k2 (2.9)

22 = -N + k2 + sin2 0, + (N2 k2 sin2 01)2 + 4Nk2 (2.10)

Note that u and v are the real and imaginary part of n,i cos 02, respectively, Ro is
the calculated reflectance at air/Si film interface; R1 is the calculated reflectance









at Si film/buried oxide interface, and So and 6S are the calculated phase angles of
Fresnel reflection coefficients at the interfaces of air/Si film and Si film/buried oxide,
respectively.
The top Si film thickness of the SOI wafers can be determined from the DBSPR
measurements using the expression given by

Rm-R=0 (2.11)

where Rm is the measured reflectance, and R is given by Eq. (2.8).
Since the blue light is mostly absorbed in the top Si film, the e-2b terms in
Eq. (2.8) are negligible. Thus, Eq. (2.11) can be written as

e_(R Ro)
X + + 217r+ cos-'( ) -= 0,, = 0,1,2, 3, ....... (2.12)
2VR-o j1A_2 _+B2
where l denotes the different modes; A, B, and are given by

A = cos(So 61) Rm cos(6o + S6) (2.13)

B = sin(So 81) + Rm sin(So + 61) (2.14)

= tan-'(B/A) (2.15)

In the DBSPR measurement system, only two parameters, namely, the film thick-
ness if and the film real part refractive index Ni,, are unknown. Thus, tf and Nsi
can be determined from Eq. (2.12) by using the multiple angles of incidence in the
measurements. In this case, Eq. (2.12) can be expressed in terms of the functions G
and F as

G(tf) = F(A,N,,,, O1, Rm) = F(AN, Ni,, ', R,, 2) = F(A, Ni,a, O,Rm3) (2.16)

where Rmi, Rm2, and Rm3 are the measured reflectances at the angles of incidence
01, 0', and 0', respectively. Therefore, if and Nsi can be extracted from Eq. (2.16).
Although different values of if and Nsi are obtained from Eq. (2.16) due to the









different modes given in Eq. (2.12), only one unique solution of tf and Ns will satisfy
Eq. (2.16) under different incident angles, which is the sole solution of tf and N,8 for
the SOI wafer.
As an example, the thickness of top Si film for a SIMOX wafer was measured by
using this method. From Fig. 2.3(a) and (b), the reflectances Rm1=0.490, Rm2=0.485,
and R33=0.640 were measured at angles of incidence 01=470, 0'=180, and 0 =570 on
sample-1, respectively, and the arrows indicate the possible solutions of tf and Ni.
The two lines in each mode are the "+" and "-" solutions in Eq. (2.12). It is clearly
shown that the value of (tf, Ni)=(200nm, 4.73) gives the closest cross point in both
Fig. 2.3(a) and (b). Therefore, this set of (tf, N,;) yields the correct values of tf and
N,i of the top Si film.

The multiple-angle of incidence method described above is tedious and time
consuming; it is highly desirable to use a single-angle of incidence method along with
numerical calculation of Eq. (2.11) to determine the Si film thickness across the entire

SOI wafer. The multiple-angle step is only performed in the initial measurement to
obtain the value of tf, which is followed by the single-angle measurements over the
entire wafer. This allows a quick determination of film thickness across the entire

SIMOX wafer.


2.2.2 Measurement of Buried Oxide Layer Thickness

We next discuss the measurement of buried oxide thickness in SOI wafers by the

DBSPR method. To determine the thickness of buried oxide layer in a SOI wafer, a
red He-Ne CW laser (A = 632.8nm) is employed to obtain the S-polarized reflectance
data. Using the value of tf obtained above, the buried oxide layer thickness to. is
calculated from the following two equations


Rm Rtoa.l(Ol, tf, tox, nox, n,) = 0


(2.17)









and

C2

where Rtotal is the total reflectance from the incidence of red laser beam, and

C = Ro{l + R2 + 2R cos(X2 6 62)} 2Re-2b(1 cosX2)

+ 2 -oRie-b{cos(6o 61 + X1) + cos(6o 61 + XI + X2)

+ R1 cos(X2 X 60 62) + R1 cos(X1 + 60 + 61)} (2.19)


C2 = 1 + R + 2R cos(X2 61 62) + 2RORle-2b(1 cos X2)

+ 2V/ J~oRe- {cos(Xi -6o- b1)+ cos(Xi + X2 -0 o 62)

+ R1 cos(6o -62 X, + X2) + Ri cos(6o 61 X1)} (2.20)

where X1 = 47rtfu/A and X2 = 4rtox/fn72 -sin2 9i/A; 62 is the phase angle of
Fresnel reflection coefficient at the Si film/buried oxide interface. The value of to.
can be determined by using the multiple-angle of incidence and Eq. (2.17).
As an example, the oxide layer thickness for a SIMOX wafer is determined using
the above method. Figure 2.4 shows the measured values of Rm of 0.883, 0.896, and
0.925 at angles of incidence 320, 41, and 65* for sample-1, respectively. The cross
point (to, 360nm) indicated by the arrow is the correct value of to,.
Similar to the Si film thickness measurements, the uniformity of buried oxide
layer thickness in the SIMOX wafer can be determined from the measured reflectance
at the angle of incidence 01 and the numerical solution of Eq. (2.17) using values of
to, obtained from the multiple-angle reflectance measurements.


2.3 Experimental Details

Figure 2.2 shows the schematic diagram of the experimental setup for the dual-
beam S-polarized reflectance technique. A 14 mW He-Cd CW laser (A = 442nm) and









a 4 mW He-Ne CW laser (A = 632.8nm) are used in the experiment. Both laser beams

are focused to a beam size of about 2 mm diameter and polarized by the Dichroic
linear polarizers (with extinction ratios of < 1.6x10-4 for A = 442nm and < 7.6x10-'
for A = 632.8nm). The two laser beams are both reflected by half-silver coated mirrors

and then focused at the same spot on the surface of the measured sample. The S-
polarized reflectances are monitored by the laser power meter. Error in reflectance

measurement due to the fluctuation of laser power can be reduced by monitoring the

incident laser power intensity and reflected power intensity simultaneously. In the

experiment, the blue laser beam (A = 442nm) was used to determine the Si film

thickness tf and the red laser beam (A = 632.8nm) was used to measure the buried

oxide thickness to,. The multiple-angle reflectance measurement was first performed

using blue laser beam, and the same procedure was then repeated using the red laser

beam on the same spot of the wafer. Next, the single-angle reflectances of blue and

red laser beams were measured by scanning the laser beam across the entire SIMOX
wafer.


2.4 Results and Discussion


2.4.1 Measurement of Top Si Film Thickness

Si film thickness measurements were performed on both n- and p-type SIMOX

wafers with different top Si film thicknesses. From Eqs. (2.12) and (2.16), we calcu-

lated the thickness tf and the real part refractive index Nsi of the top Si film using

the measured values of R, 01, the average value of optical absorption coefficient [18]

a ; 3x104 cm-1, film imaginary part refractive index [15] k 0.1055, at A = 442nm.

The results for several SIMOX wafers are summarized in Table 2.1. For a thin-film

sample, the approximation of Eq. (2.8) may produce a larger error in reflectance









data at certain angles of incidence, as shown in Fig. 2.5, but the error of film thick-

ness is much smaller than the reflectance error, as shown in Fig. 2.6(b). From the
single-angle reflectance measurements and the numerical solution of Eq. (2.11), the

micro-uniformities of the top Si film thickness for different samples were obtained.

The results are summarized in Table 2.3. In order to assess the accuracy of the values

of tf determined by the DBSPR technique, we compare our measured values with
those determined by the conventional reflection interference spectroscopy measure-

ments, as shown in Table 2.3. Reasonable agreement was obtained between these two

methods.

Figure 2.8 shows the 3-D mapping of Si film thickness for sample-1. The average

thickness is 198.8 nm and the standard deviation of thickness uniformity is about

1.5 nm. We scanned 300 points on each SIMOX wafer. Sample-2 and 3 are thick

film SIMOX wafers; the uniformity of top Si film thickness for both samples is not as

good as that of sample-1. Similar results on the Si film thickness uniformity across the

entire SIMOX wafer were also obtained from the reflection interference spectroscopy

measurements for sample-1, 2, and 3.

Figure 2.5 shows the reflectance calculated from Eqs. (2.8) and (2.1), and the

measured reflectance at different angles of incidence for sample-1. The reflectance

obtained from Eq. (2.8) is equal to the total reflectance at the angles of incidence

of 180 and 460. Within these equal-value angles of incidence, the measured Si film

thickness has the smallest error. However, the equal-value angles of incidence are

difficult to obtain if the Si film thickness is unknown. Figure 2.6(a) shows some

optimal angles of incidence over a wide range of Si film thicknesses. Although a

smaller error was obtained at angle 850, a broadened beam spot on the surface of

the measured samples is undesirable for the measurements. For samples with smaller

film thickness, the largest error (peak-like shape) shown in Fig. 2.6(b) shifts to the

smaller incident angles. Hence, the ideal angle of incidence is between 550 and 680









over a wide range of film thicknesses.
Table 2.5 shows the statistical measurements of tf for several SIMOX samples.
Five measurements were repeated at each point. Values of the standard deviation of
the measurement results indicate the excellent resolution and reproducibility of this
method.


2.4.2 Measurement of Buried Oxide Thickness

Similar to the Si film thickness measurements, the buried oxide thickness can be
determined from Eqs. (2.17) and (2.18) using the measured values of Rm, 01, tf, the

average value of absorption coefficient [18] a 3.3x103 cm-', Si02 layer refractive
index citesze no,, 1.46, Si film refractive index [15] n,i w 3.85 j0.015 and A =

632.8nm. The results for several SIMOX wafers are summarized in Table 2.2. Figure

2.6(c) shows the errors of buried oxide layer thickness as a function of incident angle
by using the measured values of tf in Eq. (2.17). The trend of errors is similar to that
of film-thickness measurements. From the single-angle reflectance measurements and

the numerical solution of Eq. (2.17), the micro-uniformities of buried oxide thickness

for different samples were obtained. The measured buried oxide thicknesses for several
SIMOX samples are listed in Table 2.4, which were found in reasonable agreement
with those determined by the ellipsometry method. It is better to use larger incidence

of angles, since the errors may be coupled to the measured values of tf. Similar to
tf measurements, using larger incidence of angles may reduce the errors over a wide

range of film thicknesses.

Figure 2.9 shows a 3-D mapping of the buried oxide thickness in sample-1. The

average thickness is 389.1 nm and the standard deviation of thickness uniformity is
6.2 nm. We also scanned 300 points in each SIMOX wafer. Sample- 2 and 3 have

the similar uniformity as sample-1. Moreover, the results of ellipsometry method also

show the similar uniformity for sample- 1, 2, and 3.








Unlike Si film thickness measurement, the measurement of buried oxide thickness
has no restrictions on the angles of incidence. The influence due to uncertainty of the
measured reflectance in the substrate (A2 = 2m7r, where m = 0, 1,2, 3,.....) does not
exist in this case since there are no cross points of total reflectance and the film-free
reflectance at any angles of incidence, as shown in Fig. 2.7. Also, Table 2.6 shows
the statistical measurements of tax for several SIMOX samples. Five measurements
were repeated at each point. Similar to the results of tf measurements, the excellent
stability and reproducibility were obtained in the DBSPR method.

The discrepancy of the measured values of BOX thickness between the DBSPR
and the ellipsometry methods (see Table 2.4) may be attributed to the presence of a
transition layer (SiO,) [16] between the BOX and the bulk Si substrate (see Fig. 2-10).
The BOX thickness was confirmed by the SEM (e.g., to, of sample-1 measured by
SEM varied between 340 nm and 360 nm as shown in Fig. 2-11) which indicated that
the ellipsometry method is more accurate than the DBSPR method. The recalculated
results revealed that the existence of the transition layer renders the measured BOX
thickness much closer to the measurement results of ellipsometry method than that
without consideration of the transition layer (e.g., the BOX thickness of sample 1

becomes 358.4 nm with a 12.5 nm transition layer presence). The total reflection
coefficient (including the transition layer) may be rewritten as rtotat = D D /D2 where
Dl and D2 are given as follows

D, = ro + rie-'^A + r2e-'i(A1+2) + rorlr2e-i^ + rorlr3e-i(a2+^3

+ror2r3e-'i3 + r3r2r3e-i(A +A3) + r3e-i(l +C2+A3) (2.21)

D2 = 1 + rore-i'^ + ror2e-i(AI+A2) + rlr2e-iA2 + rlr3e-i(A2+A3)

+r2r3e-i3 + ror3e-i(A+A2+A3) + rorlr2r3e-i(^ +A3) (2.22)

where r2 and r3 denote the Fresnel reflection coefficients at the BOX/transition layer
and transition layer/Si substrate interfaces, respectively, and A3 is the phase change









of incident light in the transition layer.
The thickness and refractive index of the transition layer can be determined by
the ellipsometry measurements. The ellipsometry method [16] is to measure the phase
change (A) and magnitude ratio ('I) of the polarized lights (S and P polarized). Using
the measured A and I to fit the theoretical curves of the three layer structure (i.e., Si
overlayer, BOX and transition layer), the BOX and transition layer thicknesses can
be obtained. The DBSPR method can not distinguish the transition layer from the
BOX. Inclusion of the transition layer reduces the sensitivity of thickness variation of

top silicon film (see Figs. 2-12 and 13). From the previous report of Levy et al. [16],

the transition layer thickness varied from 12.5 to 25 nm and the refractive index
ranged from 2.4 to 3.1 for the transition layer/Si substrate interface and from 1.45

to 2.25 for the BOX/transition layer interface. The sensitivity of BOX thickness on

the transition layer thickness and refractive index is shown in Figs. 2-14, 15, and 16,
respectively.


2.5 Conclusion

In this work, a new contactless dual-beam S-polarized reflectance (DBSPR) tech-

nique for determining the top Si film and buried oxide thickness in the SOI wafers has
been demonstrated. Basically, the limitation of the DBSPR method in the ultra-thin

and thicker top Si film could be solved by using a dye laser (or multiple light source
with different wavelengths) as light source. The longer wavelengths can be used in

the thicker top silicon film structure. On the other hand, the shorter wavelengths

can be used in the ultra-thin film structure. In principle, there is no limitations
on the film thickness measurements of the two-layer structure. Except on very thin

layer, the uniform optical property of the boundary between layers is not valid. In

order to evaluate the DBSPR method, the advantages and disadvantages of the DB-

SPR, spectroscopic reflectance (SR), and spectroscopic ellipsometry (SE) methods









are compared, and the results are summarized as follows:

Advantages:

SE: nondestructive, quick, accurate, suitable for ultra-thin film and multiple

layer structure.

SR: nondestructive, suitable for thicker film measurements.

DBSPR: quick, nondestructive, simultaneous determination of top Si film and

BOX thicknesses, simple setup, and low cost.

Disadvantages:

SE: stable light source intensity control; linear detector response to avoid gen-

eration of harmonics; control of the stray light; very thin layer is questionable;

thicker layer thickness measurements need multiple beams and angles of inci-
dence.

SR: thin film measurements need an extremely short wavelength as light source;

need different incident light source scannings; detector noise.

DBSPR: unable to be used in the samples with structure more than two layers;

a very short wavelength light source is needed for measuring very thin layer.

Although the DBSPR method has some weaknesses in the film thickness measure-

ments on SIMOX SOI wafers, it could be very suitable for use as a quality assessment

tool in the bonded SOI wafer fabrication when the transition layer is absent.









Table 2.1 Measurements of Si film thickness and film real part refractive index
by multiple angles of incidence for different SIMOX samples.

01 01 01 tf N,i
Sample (degree) (degree) (degree) Rm Rm R Rm3 (nm)
1 47 18 57 0.490 0.485 0.640 200 4.73
2 57 20 35 0.668 0.444 0.488 550 4.85
3 55 30 20 0.709 0.554 0.459 1660 4.84


Table 2.2 Measurements of buried oxide film thickness by multiple an-
gles of incidence for different SIMOX samples.

01 01 0" toa
Sample (degree) (degree) (degree) Rmi Rm2 Rm3 (nm)
1 41 32 65 0.896 0.883 0.925 360
2 48 34 63 0.804 0.742 0.835 400
3 41 34 50 0.701 0.670 0.660 430









Table 2.3 Measured Si film thickness for different SIMOX samples.

Thickness
(__m) Sample 1 Sample 2 Sample 3
Maximum 0.2048 0.5443 1.6484
Minimum 0.1970 0.5246 1.5536
Average 0.1988* 0.2004t 0.5389* 0.5300t 1.6162* 1.6500t
Standard
Deviation 0.0015 0.0055 0.0436
* measured by S-polarized reflection method.
t measured by reflection interference spectroscopy.


Table 2.4 Measured buried oxide thickness for different SIMOX samples.

Thickness
(p1m) Sample 1 Sample 2 Sample 3
Maximum 0.3944 0.4032 0.4808
Minimum 0.3629 0.3410 0.4065
Average 0.3891* 0.3479t 0.3663* 0.3900t 0.4484* 0.3900
Standard
Deviation 0.0062 0.0127 0.0112
* measured by S-polarized reflection method.
t measured by spectroscopic ellipsometry.









Table 2.5 Statistical measurements of Si film thickness at different
points of the SIMOX samples. The first point (pt. 1) is located
at the center of the samples; the second and third points (pt. 2
and 3) are located, respectively, at the diagonal positions on
the edge of the samples.

Thickness Sample 1 Sample MI3 Sample 2
(prm) Average Std.* Average Std.* Average Std.*
pt. 1 0.1970 0.0001 0.1848 0.0001 0.5421 0.0017
pt. 2 0.1971 0.0001 0.1867 0.0004 0.5440 0.0012
pt. 3 0.1971 0.0001 0.1857 0.0002 0.5411 0.0012
* standard deviation.







Table 2.6 Statistical measurements of BOX layer thickness at different
points of the SIMOX samples. The first point (pt. 1) is located
at the center of the samples; the second and third points (pt. 2
and 3) are located, respectively, at the diagonal positions on
the edge of the samples.

Thickness Sample 1 Sample MIS Sample 2
(/m) Average Std.* Average Std.* Average Std.*
pt. 1 0.3689 0.0017 0.3538 0.0004 0.3610 0.0021
pt. 2 0.3742 0.0018 0.3416 0.0004 0.3849 0.0024
pt. 3 0.3634 0.0010 0.3498 0.0010 0.3931 0.0028
* standard deviation.





















Incident Light


........... .........



SiO,
Si02



flax


Figure 2.1: A schematic drawing of laser beams impinging on a SOI wafer
under the angles of incidence at 01, 09, and 0" and the cor-
responding total reflectances R, R', and R"; tf is the Si film
thickness; t,, is the buried oxide thickness; no, and ni are the
refractive indices of SiO2 layer and top Si film, respectively.

























Laser
Power
Meter



Polarizer
4420A A --- --- *
He-Cd Une
Laser Filter Shutter


Wafer
Under
Test


Half


Polarizer Half
Laser M
Mirror


Figure 2.2: Schematic diagram for the dual-beam S-polarized reflectance
measurement setup.





















4.3

4.0 1
(a) 0.10


4.0 -
(b) 0.10


0.12 0.14 0.16 0.18 0.20
Film thickness (pm)


0.12 0.14 0.16 0.18 0.20
Film thickness (pm)


0.22 0.24 0.26


0.22 0.24 0.26


Figure 2.3: Thickness curves of the thin Si film for sample-1 under the
angles of incidence (a) 470 and 180, (b) 470 and 570, with film
real part refractive index varying from 4.3 to 6.4, 1 is the mode
number given in Eq. (2.12).






















0.70

0.57

0.45

0.32

0.20
E
r 0.07

-0.05

-0.18


-0.30 '' I I I I I
0.00 0.11 0.22 0.33 0.44 0.56 0.67 0.78 0.89 1.00
Buried oxide film thickness (pm)


Figure 2.4:


Rm Rtotal vs. buried oxide thickness to, for sample-1, which
is plotted over a wide range of to0 that fits Eq. (2.17) under
the angles of incidence 320, 410, and 65.








































0 10 20 30 40 50 60 70 80 90
Incident angle (degree)


Figure 2.5:


Plots of the reflectances vs. angles of incidence for sample-1;
solid line is the total reflectance calculated from Eq. (2.1);
dashed line is the reflectance obtained from Eq. (2.8).


















20 85*
0 18 ....... 68*
t 16
C 14 -
a) 14
o..12
8o 12 0

ti 8
Q 6
6 ......
) 4
Cr 2 ................
(a) 0 100 200 300 400 500 600 700 800 900 1000
) Si film thickness (nm)
C, 4.5
S4.0
3 3.5
.- '3.0
: 2.5 -
E 2.0
~ 1.5
c( 1.0
g. 0.5
0.0
00 10 20 30 40 50 60 70 80 90
(b) Incident angle (degree)

7.0
0 6.0
w) k 5.0 -
4.0
o 3.0
|: C 2.0
.2 1.0
0 10 20 30 40 50 60 70 80 90
(c) Incident angle (degree)







Figure 2.6: (a) Fitting errors of the reflectance obtained from Eq. (2.8)
vs. Si film thickness tj for sample-1. (b) The errors of film
thickness vs. incident angle for sample-1. (c) The errors of
buried oxide layer thickness vs. incident angle for sample-1.
























1.0
---- Total reflectance
0.9 ....... Ro .


0.8


0.7


0.6


0.5


0.4 -
0.6 -- --- -- I ---- I I-'"'"'""oO--





0.3
0 10 20 30 40 50 60 70 80 90

Incident angle (degree)





Figure 2.7: Dependence of the reflectances on the angle of incidence for
sample-1; solid line is the total reflectance; dashed line is the
reflectance calculated on the surface of film-free Si substrate.










Th tc n PvP (oA










t,
rb

A










.C
"O
,^^^
\ VfwftMTf
c1^^^^

*(^^^*^^Iy^^t
4 y=^^^^^^


Figure 2.8: 3-D mapping of Si film thickness tf on the surface of sample-1.











Th Ic Inox ( A)


LJJLI


Figure 2.9: 3-D mapping of buried oxide thickness to on the surface of
sample-1.










Incident Ught
e4


SiOx


A,



A2


A3


Figure 2.10: A schematic drawing of laser beams impinging on a SIMOX
SOI structure with transition layer. Where tox2, norl, n0o2,
and A3 is the layer thickness, refractive indices, and incident
light phase change of transition layer, respectively.


n o \ O............ .. ..... ..... ...... .....r


.S i.S ub state :.. .... ..... .. ... ...






31















....., : . .... ..... .































Figure 2.11: The SEM result for sample 1.






32
















385


S380
E

u 375
U)

o 370
:-

- 365


" 360
a,

m 355


350 I
197.0 197.8 198.6 199.4 200.2 201.0 201.8 202.6 2034 204.2 205.0

Top Silicon Film Thickness (nm)


Figure 2.12: The sensitivity of to, to tf without transition layer.



















With Transition Layer


352

351

350

349

348

347


346 I I I I I I I I I I
197.0 197.8 198.6 199.4 200.2 201.0 201.8 202.6 2034 204.2 205.0
Top Silicon Film Thickness (nm)


Figure 2.13: The sensitivity of to, to tf with transition layer (tox2 = 12.5
nm, nox2 = 2.4, and no,, = 2.25).























350



E 349 -

U,
(D
- 348
-
F---





346



345
125 150 175 200 225 250

Transition Layer Thickness (A)





Figure 2.14: The sensitivity of t,, to transition layer thickness (noz2 = 2.4
and no,, = 2.25).





35














380

375
E

S370
0)
CO
-O 365

-D 360

0
-0 355

CO 350

345
2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1

Transition Layer Refractive Index (nox2)





Figure 2.15: The sensitivity of to to transition layer refractive index (n,,2)
(to=2 = 12.5 nm and no,, = 2.25).






















380


S375
E

S370
CO

0 365
I-
-) 360

0
V 355

m 350


345 I I I I
1.45 1.55 1.65 1.75 1.85 1.95 2.05 2.15 2.25

Transition Layer Refractive Index (nox1)





Figure 2.16: The sensitivity of to. to transition layer refractive index (nol)
(to,2 = 12.5 nm and no,2 = 2.4).












CHAPTER 3
DETERMINATION OF INTERFACE RECOMBINATION VELOCITIES AND
CARRIER LIFETIMES IN SOI MATERIALS BY A CONTACTLESS OPTICAL
MODULATION TECHNIQUE


3.1 Introduction

Recently, the development of fully-depleted (FD) SOI devices fabricated on ultra-
thin SOI films has drawn great interest in SIMOX and bonded SOI wafers for high-

speed ULSI applications. This is mainly due to the reduction of parasitic capacitances,
body charging effects, threshold voltage, latch-up effects, soft error rate, and the lower

fabrication costs of device isolation. However, several device and material problems

need to be overcome before mainstream IC applications of these SOI materials can
be fully realized. These include (i) floating body effects; (ii) heat dissipation through
the buried oxide layer; (iii) the effects of back interface on device reliability [2]; (iv)
film thickness control in FD devices [3], and (v) the necessity of low defect density,
low cost ultra-thin film substrate (e.g., top Si film < 100 nm). As the SOI technol-
ogy enters the deep sub-micron CMOS regime, the supply voltage will be reduced
below 2 V [4], the floating body effect, heat dissipation, and reliability problems
become less significant. On the other hand, the fluctuation of SOI film thickness,
which influences the threshold voltage, drive current, and latch-up voltage on the FD

SOI devices, will have less important effect on the partially depleted (PD) devices

with nonuniform channel doping and source/drain extension-halo instead [4]. One of
the bottlenecks in the widespread use of the SOI technology is the availability of low

defect density, low cost ultra-thin film SOI substrates. Although the optimization

on ion-implantation and annealing conditions has significantly reduced the disloca-
tion density and improved the interface property of SIMOX materials, it is highly









desirable to develop a contactless and nondestructive diagnostic technique for rou-
tine screening of the SOI wafers prior IC fabrication. Although several methods such
as capacitance [19, 20], dynamic transconductance [21, 22], threshold-voltage [23],
microwave lifetime measurement [24], surface photovoltage (SPV) [25], photolumi-

nescence scanning (PL) [26], atomic force microscopy (AFM) [27], and transmission
electron microscopy (TEM) [28] are available for characterization of SOI material
quality, these techniques do not offer a direct means for determining the interface
recombination velocities in SOI materials. In this chapter, we report a contactless
dual-beam optical modulation (DBOM) technique [13, 14] for determining the sub-
strate carrier lifetimes and interface recombination velocities in SIMOX wafers. Ba-
sically, This DBOM technique is to continue the previous works of Dr. Yang. The
consideration of multiple reflection of the pump beam inside the top silicon film and
the BOX layer was added into this technique. In addition, the refractive index of the
pump beam inside the silicon film was corrected. Moreover, the multiple-pump-beam
incidence at different oblique angles was developed for interface recombination veloc-
ity measurement. The DBOM technique can combine with the contactless dual-beam
S-polarized reflectance (DBSPR) method [29] developed by us for quality control and

defect study in SOI materials.


3.2 Theory for DBOM Technique

In this section, we describe the theory for determining the front-interface recom-
bination velocity (S2), back-interface recombination velocity (S3), and the substrate

carrier lifetime (r,) in a SIMOX wafer by using the DBOM technique. As shown
in Fig. 3.1, a CW laser is impinging upon a p-type SOI substrate, the excess elec-
tron concentration An in the Si substrate can be obtained by solving the continuity









equation
92An An
D, 7 + G(x) = 0 (3.1)

with boundary conditions given by

DAn
Dn, = S An(O) (3.2)
Ox L=0
DOAn
-DnOx S2An(t) (3.3)
x=t/
Dn- 8 = S3An(tf + to.) (3.4)
Ox x=toz+tf

and the generation rate G(x) can be expressed as

G(x) = aq]S0 cos 02(1 R T)e-a in the top Si film (3.5)

G(x) = aqOr cos 02Te-a(x+ty) in the Si substrate (3.6)

where a, ri, 4o, R, and T are the absorption coefficient, quantum efficiency, photon
flux, total front surface reflectance, and back-interface transmittance at a given pump-
beam wavelength, while, Dn, tf, to., 7, and S1 are the diffusion coefficient, top Si film
thickness, buried oxide (BOX) layer thickness, excess carrier lifetime, front-surface
recombination velocity in the SOI wafer, respectively. Note that both R and T can
be determined by using the DBSPR method [29].
The excess electron concentration in the top Si film (An1) and the Si substrate
(An2) can be obtained by solving Eq. (3.1)

n(x) = ao(1 R T) cos02 (C0 X C --
An(x)=) Ce L +C2e L, e-,= (3.7)

n2 oUOT COS 02 aD, + S3 (X-(- IttoZ)) --(t
S(a2 ) e38)
I



where

1 (aD + Si)(- S2) (aD, S2)(- + S1)e-(tf
C1 = L )c (3.9)
2 (S1 + S2) cosh(IL) + (SI S2 + D) sinh( L)











1 (aD, + Si)(- + S2) (aD,s S2)( Sj St)e ))
C2= (3.10)
2 (SI + S2) cosh() + (SS + ) sinh()

where 02 is the refraction angle of the incident pump beam in the top Si film; Lf =
\Dnrf and L, = V are the diffusion lengths of excess minority carriers, and
7r and r, are the minority carrier lifetimes in the top Si film and the Si substrate,
respectively.
When the pump beam is turned on, the excess carriers are generated in the top
Si film (ANI) and Si substrate (AN2) which tend to modulate the IR transmitted
intensity. Under low injection condition, the transmitted intensity of the probe beam,
ANV, and AN2 can be expressed as [30]

I= Ioexp (AN, o + f, '(aono + ppo)dx

+AN2alc + ft +,(nno + appo)dx) (3.11)

where

AN., = An'(xx a077(1 R T)}o cos 02
JO Df(2 I()
LL 1
x LCL(1 e LfC2(1 e)+ (e-at (3.12)

and,
d
AN2 = An2(x)dx
Jtf+toz
= qoT cos 02 aDn +S3 1 (3.13)
= L[ s (3.13)
D,(a2- ))D +S3

where Io, no, and po are the transmitted intensity, electron concentration, and hole
concentration in the absence of pump-beam excitation; d is the sample thickness;

afc = an + O, is the total optical absorption cross-section of electrons and holes with








0, = 1 x 10-1A2cm2 and ,p = 2.7 x 10-18A2cm2 [31], respectively, and A is the
wavelength of the probe beam.
The fractional change in the probe-beam transmitted intensity AI/I (with AI =
I Io) can be expressed as
(AI AI
In + 1) =- -o~a,(AN + AN2)

{ a7(1 R T)o cos02 ( -- LC -
-c ( LyC (1-e )_ L C2(1-e +)

1 -a or> oT cos 02 aD + So 1
+ I (e-Cf l a oTCOs2 a) + VLS3 .l) (3.14)

Based on the facts that for ultra-thin Si film, with highly absorbed pump-beam
(a > 4 x 103cm-1), low front surface recombination velocity (S1 102cm/s [32]), low
film carrier lifetime (rf 1 to 2 orders of magnitude smaller than bulk Si [33, 34]), and
higher interface trap density in SIMOX [21, 22, 23] (about one order of magnitude
higher than that of the thermally oxidized silicon [18]), the following assumptions
prevail in the ultra-thin film SIMOX wafers: (i) tf/Lf < 1, (ii) aLf,aL, > 1, (iii)
aD, > Si, (iv) D > SiS2L (v) aD, > S2. Using these assumptions, Eq. (3.14)
becomes

I 7
( -7cycos 02 o (1 R T) S2)+


+ (D + S3 (3.15)

It should be noted that if the thickness of Si film is much smaller than the
width of excess carrier distribution (e.g., tf < Lf), the gradient of excess carrier
concentration along the x direction (as shown in Fig. 3.1) due to the diffusion process
is very smaller, then, Eq. (3.1) may no longer be suitable for describing the mechanism
of excess carrier recombination. In Appendix A, we derived the excess carrier density









(ANV) in the top Si film for ultra-thin film SOI wafer. The result is identical to the
part of Si film shown in Eq. (3.15).
As shown in Fig. 3.1, to determine the front-interface recombination velocity S2
in a SOI wafer, a He-Cd CW laser (A = 442 nm) is used as pump beam. Since the
blue light is mainly absorbed in the Si film (see Fig. 3.3), and for an ultra-thin Si film
with Si + S2 > tf/rf (see Fig. 3.4 and 3.5), the S2 can be deduced by eliminating the
second term in Eq. (3.15) under different incident angles 01 and 0'

AI AI2 \-1
Sa + S2 t 1 1
(cafi00 cos 021 (TI OUc02 cos 022T2

x [tfi(-e-CC)](1 R1 T' 1 R -(3.16)

where subscripts 1 and 2 are the measured parameters corresponding to incident
angles 01 and 01, respectively. Si is in the order of 102 cm/s for a well-passivated
silicon surface [30, 32].
To determine the excess carrier lifetime r, in the SOI substrate, a He-Ne CW
laser (A = 632.8 nm) is used as the pump beam to illuminate on the back surface of
the SOI wafer. Since the reflectance R, of a not well-passivated silicon surface can be
determined by the known rms values of surface slopes m and surface roughness a [35]
and Si substrate of SOI wafer, the fractional change of the transmitted probe-beam
intensity can be expressed as

Al r (aD,+S,
-= fc0 Ccos I 02(1 R.) [- (aD"+S ) (3.17)
I -a D, + SLs ]

and the substrate lifetime 7, is obtained from Eq. (3.17) using the back surface re-
combination velocity of S, ; 6 x 104cm/s [36]


r, = ( 4 j (3.18)








where

A fo0 cos 02(1 R,) aD,n + S,)
Similar to the determination of S2, the back-interface recombination velocity S3
is obtained by measuring 7, and using a He-Ne laser (A = 632.8 nm) as pump beam.
Since the He-Ne laser is mainly absorbed in the Si substrate (see Fig. 3.3). The S3
can be determined from Eq. (3.15) under different incident angles

(K a)Dn
1 L,K

where
AT i A2 \
K = I- 12 I
(aOfc07ol cos 2l(1 R1 T1) Ufc4o>02 cos 022(1 R2 T2)

x -(TT (3.21)
7, I-RI-Tj) I R2 T2

where subscripts 1 and 2 are the measured parameters corresponding to incident
angles 01 and 0', respectively. Note that the above analysis can be applied to n-type
SOI wafers as well provided that the parameters for electrons are replaced by holes
(i.e., Dn by Dp and 7, by Tp etc.).


3.3 Experimental Details

Figure 3.2 shows the schematic diagram of the DBOM experimental setup. A
tungsten lamp, which is used as the probe beam, is passing through an IR filter (a
low-doped Si wafer) with a cutoff wavelength of about 1.1 ym, and is focused to a
beam size of about 4 mm diameter. A 14 mW He-Cd CW laser or a 4 mW He-Ne
CW laser was used as the pump beam which is lined up with the probe beam in the
experiment. Both laser beams are focused to a spot size of about 2 mm diameter and
polarized by the Dichroic linear polarizers (with extinction ratios of < 1.6x10-4 for
A = 442 nm and < 7.6x10-5 for A = 632.8 nm). Both probe beam and pump beam are









chopped at 405 Hz for synchronous detection by a lock-in amplifier. The pump beam

is reflected by half-silver coated mirrors and then focused into the same spot as the
probe beam on the measured sample. In the experiment, the substrate carrier lifetime

r, was measured by using an IR probe beam and a He-Ne laser pump beam impinging

on the back surface of the SIMOX wafer. The rms values of the surface slope m and

the surface roughness a were measured by using Sloan Dektak II surface profiler to
obtain the reflectance. The IR transmitted beam intensity I was first measured using
the chopped probe beam and a lock-in amplifier. The change in the transmitted

intensity AI was measured by using the chopped pump beam superimposed on the
probe beam which was not chopped, and the resulting IR transmitted intensity was

measured by using a lock-in amplifier.

To determine the back-interface recombination velocity S3, the probe and pump

beams were impinging on the front surface of the measured sample with the different
oblique incident angles of the pump-beam excitation. The measurements of I and

AI are the same as in the determination of r,. Values of R were measured by using a

laser power meter. For different angles of pump-beam excitation, the measurements

of I, AI, and R are carried out in a similar procedure.

The front interface recombination velocity S2 was determined by using the He-

Cd laser as pump beam and using the same procedures as described above. The
S-polarized reflectances of pump beam were monitored by a laser power meter to

determine the front surface reflectance R and the back-interface transmittance T of

the SIMOX wafer.








3.4 Results and Discussion

3.4.1 Measurement of Front Interface Recombination Velocity

Front interface recombination velocity measurements were carried out in both
n- and p-type SIMOX wafers with different top Si film thicknesses, annealing tem-
peratures, and oxygen implant doses. From Eq. (3.16) and the values of R and T
obtained by the DBSPR method [29], we calculated the front interface recombination
velocity using the measured values of AI, I at the angles of incidence 01 = 230 and
0; = 630, the average value of optical absorption coefficient a w 3 x 104 cm-1 [18],
rfc 9.5 x 10-'8 cm2 [31], r7 w 0.5 [18], 0o z 7.48 x 1017 cm2s-1 at 01 = 230,
and 0o 4.62 x 1017 cm-2s-1 at = 63. The results for several SIMOX wafers
are summarized in Table 3.1. From the results, it is noted that the multiple implant
sample has a larger defect density in the front interface than that of the single implant
sample This is consistent with previous work reported by Venables et al. [37].
For a thick-film (tf > 5000A) SIMOX wafer with small film lifetime (7F < 0.3ps),

Eq. (3.16) may not give a good estimation of the front-interface recombination veloc-
ity, as shown in Fig. 3.4 and 3.5. Under such condition, a shorter wavelength pump
beam (e.g., UV laser) can be employed to obtain the film lifetime (ry). The front-
interface recombination velocity can be determined by substituting this measured r7
into Eq. (3.15) and using the blue He-Cd laser as a pump beam and using different
incident angles (e.g. 01 and 0Q) [13].
Figure 3.6 shows the mapping profile of the interface recombination velocities

(S1 + S2) for sample-MI3. The average value is 325 cm/s. For a well passivated
silicon surface [30, 32] S, is about 100 cm/s, while S2 was found to be 225cm/s. We
scanned 300 points on each SIMOX wafer and divided the 4" SIMOX wafer into 60
squares in the DBOM measurements. Thus, the area of each square represents the
average value of five measurements. From Fig. 3.6, it is shown that the uniformity of








front-interface recombination velocities in sample-MI3 is lower near the center region
than the upper edge region of the wafer. Sample-MI1 and SI2 have the similar results
as sample-MI3.


3.4.2 Measurement of Substrate Lifetimes

The substrate lifetimes were determined from Eqs. (3.17), (3.18), and (3.19) using
the measured values of m, a, AI, I, the average value of optical absorption coefficient
a 4.1 x 103 cm-' [18], afc 9.5 x 10-s1 cm2 [31], ] P 0.85 [18], and 0o 4.02 x 107
cm-'s-1 at 0O = 230. Values of Rr in Eq. (3.17) were calculated using Eqs. (27)
and (39) given in Davies' report [35] with the measured values of m and a. The
results of the calculated R, are listed in Table 3.2. The measured substrate lifetimes
for several SIMOX wafers are summarized in Table 3.1. Sample-SI has a lower r,
than other SIMOX samples tested. This may be due to the heavy metal impurity
introduced in this SIMOX wafer during the single oxygen implantation process. The
heavy metal impurities are gettering in the Si substrate during the post implantation
annealing [38, 39]. The gettering impurities degrade the substrate lifetime.
Figure 3.7 shows the mapping profile of the substrate lifetimes for sample-MI3.
The average value is 10.8 ps. We also scanned 300 points on each SIMOX wafer. From
Fig. 3.7, a uniform distribution of substrate lifetime was observed and the lifetimes
are higher near the center region than the edge region of the wafer. Sample-MI1 and
SI2 have similar uniformity profiles as sample-MI3.


3.4.3 Measurement of Back Interface Recombination Velocity

Similar to the front-interface recombination velocity measurements, the back-
interface recombination velocity can be determined from Eqs. (3.20) and (3.21) using
the measured values of 7,, AI, I, the average value of optical absorption coefficient
a w 4.1 x 103 cm-1 [18], ofc a 9.5 x 10-18 cm2 [31], rq ; 0.85 [18], oo z 4.02 x 1017









cm-2s-i at 01 = 23, and 00o 9.96 x 1016 cm-2s-1 at 0' = 630. Values of R

and T in Eq. (3.21) were obtained from the DBSPR method [29]. The results for
several SIMOX wafers are summarized in Table 3.1. It is noted that sample-SI1 has a
higher back-interface recombination velocities than other SIMOX samples. This may

be attributed' to the post-implantation annealing induced by the copper diffusion
from the Si surface into the buried oxide and Si substrate, with copper impurities
precipitated in the back interface (e.g. intrinsic gettering) [38, 39] of the SIMOX

wafer.

Figure 3.8 displays the mapping profile of the back interface recombination ve-
locities for sample-MI3. The average value is 59.8 cm/s. We also scanned 300 points

on each SIMOX wafer. From Fig. 3.8, the back-interface recombination velocities are
lower near the central region than in the edge region of the wafer.

Finally, the statistical measurements of 7,, S3 ,and S1 + S2 were performed on
the different points for several SIMOX samples (see from Table 3.3 through Table

3.5). Five measurements were repeated at each point. Values of the standard devia-
tion of the measurement results indicate the excellent stability and reproducibility of

the DBOM method. The determined r,, S3, and S maybe sensitive to temperature,

back-side surface roughness, top Si film thickness, or BOX thickness. From the calcu-

lation results, 7, is not much sensitive to temperature, backside roughness, and rough

surface recombination velocity (see Figs. 3-9, 10, and 11). While, the back-interface

recombination velocity is sensitive to temperature and BOX thickness (see Figs. 3-12,

13, and 14). For the front-interface recombination velocity, the measured values are
more sensitive to tf than to to (see Figs. 3-15 and 16).


3.5 Conclusion

In this work, a contactless dual beam optical modulation (DBOM) technique for

determining the front-and back-interface recombination velocities and the substrate









carrier lifetimes in SIMOX wafers has been demonstrated. For ultra-thin film, the
limitations are (i) rf > 10-9 sec, (ii) 7, > 10-11 sec, and (iii) interface recombination
velocity smaller than 10 cm/sec. In general, 7T varies from 0.1 to a few /Is, and
7, > rf [33, 34]. The interface recombination is ranged from several tens to hundreds
of cm/sec [21, 22, 23] (s = oavthrkTD1t [75] where Dt is the density of interface
states). The most commonly used methods to determine the carrier lifetimes are
the photocoductivity and the SPV methods. While, the interface recombination

velocity is usually determined by capacitance and conductance techniques [19]-[23].

The advantages and disadvantages for the photoconductivity decay, SPV (surface
photovoltage), and DBOM techniques are described as follows:

Advantages:

Photoconductivity decay: traditional method; simple.
SPV: nondestructive; sample preparation is simple; steady-state method; im-
mune to slow trapping and detrapping.

DBOM: contactless and nondestructive; simple for sample preparation; steady-
state method; suitable for thin-film structure measurements.

Disadvantages:

Photoconductivity: thicker samples (at least several ym) to decouple surface
and bulk recombination; contact necessary; and transient method.

SPV: contact method; sample thickness needs much thicker than the diffusion

length; SCR (space charge region) width must be smaller than the diffusion
length; stray capacitance must be controlled for good signal-to-noise ratio.

DBOM: sensitive to the variation of top silicon film thickness and the BOX

thickness.

This method is especially useful for quality control and defect studies of the SOI

wafer manufacturing. Using this technique, the interface properties and the quality





49


of SOI wafers can be evaluated versus processing and growth parameters. Thus, the
contactless DBOM technique described in this work may be used to obtain optimal

manufacturing process for the SOI materials.










Table 3.1 Substrate lifetimes, front-interface recombination velocities, and back-
interface recombination velocities measured by DBOM method for several
SIMOX samples.


t to, Dose Anneal Resistivit,
Sample (A) (A) (cm-2) (OC, h) (type, fl-(
MIlt 2004 3479 1.8E18 1310,5 p,10-20
SI2 5300 3900 1.8E18 1285,6 n, 6
MI3t 1870 3744 1.8E18 1285,6 p 10-20
t multiple implant wafer with doses of 0.5, 0.5,0.8


7,
m) (Ps)
23.26
7.39
10.79
x 10s1 cm-2


Table 3.2 Measured reflectance R, of
the back surface for differ-
ent SIMOX samples.


Sample
MI1
SI2
MI3


m
0.0456
0.0460
0.0495


0.3557
0.3311
0.3454


R0
0.2371
0.2371
0.2371


* A = 6328A is the wavelength of the
incident pump beam.
t R, = Ro x R,.e where Ro is
the reflectance of a well passivated
Si surface, and R,et is the relative
reflectance [35] obtained from the
measured m and a.


S1 + S2
(cm-s-1)
174.40
242.63
324.87


S3
(cm.s-1)
44.70
95.99
59.79


y









Table 3.3 Statistical measurements of substrate lifetimes at dif-
ferent points of the SIMOX samples. The first point
(pt. 1) is located at the center of the samples; the
second and third points (pt. 2 and 3) are located, re-
spectively, at the diagonal positions on the edge of
the samples.

7, Sample 1 Sample MIS Sample 2
(p[s) Average Std.* Average Std.* Average Std.*
pt. 1 33.98 0.11 11.84 0.017 9.97 0.018
pt. 2 32.91 0.19 12.40 0.045 5.73 0.018
pt. 3 21.47 0.27 11.74 0.051 5.83 0.012
standard deviation.






Table 3.4 Statistical measurements of back-interface recombina-
tion velocities at different points of the SIMOX sam-
ples. The first point (pt. 1) is located at the center of
the samples; the second and third points (pt. 2 and 3)
are located, respectively, at the diagonal positions on
the edge of the samples.

S3 Sample 1 Sample MIS Sample 2
(cm/s) Average Std.* Average Std.* Average Std.*
pt. 1 58.62 1.11 52.86 1.01 96.85 3.56
pt. 2 48.45 1.52 57.75 1.04 106.50 3.79
pt. 3 48.51 1.24 46.87 1.50 115.05 4.05
standard deviation.






52


Table 3.5 Statistical measurements of front-interface recombina-
tion velocities at different points of the SIMOX sam-
ples. The first point (pt. 1) is located at the center of
the samples; the second and third points (pt. 2 and 3)
are located, respectively, at the diagonal positions on
the edge of the samples.

S1 + S2 Sample 1 Sample MIS Sample 2
(cm/s) Average Std.* Average Std.* Average Std.*
pt. 1 154.84 3.55 278.94 7.14 222.50 7.85
pt. 2 176.02 3.53 318.51 8.21 251.50 8.71
pt. 3 197.22 5.64 322.44 8.14 247.82 6.73
standard deviation.


















Incident Light
0


.s
. ..::::: . :. T f : : : e 1
Si Film s2:::


::1~::........ .......:::


s ... . ...-...... ... . ... . .. .... ...
~ T .I%.%.%%*..." ... .. . .N \ ....^..... . ... Y. ......
..... .. ..... ..... ............. ....

Si Substrate***,***"****,'","'*.'''*...
'' ~'' `~~' ''' `'~ '' '' ~' '' ~~ ........... ` ''


Figure 3.1: A schematic diagram of pump beams impinging on a SOI
wafer under different angles of incidence at 01 and 0' and the
corresponding total reflectances R and R', transmittances T
and T'; tf is the Si film thickness; to. is the buried oxide
thickness; no, and n,i are the refractive indices of SiO2 layer
and top Si film, respectively; S1, S2, rf, and Ani(x) are the
recombination velocities, minority carrier lifetime, and minor-
ity excess carrier concentration in the top Si film, respectively;
S3, r,, and An2(x) are the recombination velocities, minority
carrier lifetime, and minority excess carrier concentration in
the Si substrate, respectively.
























Laser
Power
Tungsten Pinhole IR Filteter
Lamp Ge Detector


E> Lens Lens '
Chopper / ,'Wafer
Li. f ^, Under
-I __ ,,. __... Test
He-Cd LiHe '4
Laser Filter Chopper
lan e. .s Planar
tr,,,, -\\ r - Mirror
He-Ne
Laser ; Lock-in
Amplifier








Figure 3.2: Schematic diagram for the contactless dual-beam optical mod-
ulation (DBOM) experimental setup.






















32 1.6
230
28 -- 630 -1.4

24 -1.2

S20 1.0

16 / 0.8 CL
h= 6328 A ,-
12 0.6

8 0.4
h= 4420 A
4 0.2

0 11 0.0
102 103 104
tf(angstrom)




Figure 3.3: Ratio of the absorption of pump beam in top Si film to Si
substrate vs. top Si film thickness under different incident
angles.







































2000 4000 6000 8000


10000


tf(angstrom)


Figure 3.4:


Ratio of (tf/rs)/(Si + S2) in Eq. (3.15) for different top Si
film thicknesses and film lifetimes with S1 + S2 = 300 and 400
cm/s.





















1.6
S1+ S2= 150 cm/s
1.4 - S +S2= 250 cm/s

1.2 /

(W) 1.0 "Tf= 0.3ps

0.8
>1 Tf= 0.5/Js
0.6
Sf= 1.0 ps
0.4

0.2 --" Tf= 10ps

0.0
0 2000 4000 6000 8000 10000

tf (angstrom)




Figure 3.5: Ratio of (tf/rf)/(Si + S2) in Eq. (3.15) for different top Si
film thicknesses and film lifetimes with S1 + S2 = 150 and 250
cm/s.

















Sample M13
S1 +S2 measurement


0+ 35%

+ 25%

+ 15%

+ 5%
Lave
-5%

15%

25%

35%


(324.87 cm/s)


Figure 3.6: Mapping of the front interface recombination velocities S1 + S2
for sample-MI3.
















Sample M13
Ts measurement







+ 35%

+ 25%




..average (10.79 ps)
-.5%


-15%

-25%


- 35%


Figure 3.7: Mapping of the substrate lifetimes 7, for sample-MI3.





















Sample M13

S3 measurement


0+ 35%


+ 25%


+ 15%


+ 5%


(59.79 cm/s)


-15%


-25%


- 35%


Figure 3.8: Mapping of the back interface recombination velocities S3 for
sample-MI3.


. ........
...........
...........
............
............
...........





















26


a)

S25
E


(D 24





Temperature (K)
0


23
n



300 310 320 330 340 350 360 370 380 390 400

Temperature (K)


Figure 3.9: The sensitivity of substrate carrier lifetimes to temperature.
























23



S 22
CO
U)
E

_ 21

._



(D
S20



_ 19
=)
CO


18 I' I I I
55000 56000 57000 58000 59000 60000

Rough Surface Recombination Velocity (cm/s)





Figure 3.10: The sensitivity of substrate carrier lifetimes to S, of the rough
back side of measured wafer.






































22 1 I I I I I I I
237.1 240.3 243.5 246.7 249.9 253.1 256.3 259.5 262.7 265.9 269.1
Relative Reflectance (1/1000)





Figure 3.11: The sensitivity of substrate carrier lifetimes to relative re-
flectance of the rough back side of measured wafer.








































44 ii I i I I I I I I -
197.0 197.8 198.6 199.4 200.2 201.0 201.8 202.6 2034 204.2 205.0
Top Silicon Film Thickness (nm)


Figure 3.12: The sensitivity of back-interface recombination velocity to tf.






65















48

46

E 44

S43

41

CD
0
4 37

c 35

L 33

S32

30
330 340 350 360 370 380 390 400

Buried Oxide Thickness (nm)


Figure 3.13: The sensitivity of back-interface recombination velocity to to,.






















59

58 -

E 57 -

56 -

54 -

: 53 -

S52 -

51 -
C 51

o 50 -

48

47
300 310 320 330 340 350 360 370 380 390 400
Temperature (K)





Figure 3.14: The sensitivity of back-interface recombination velocity to
temperature.






67














232

224

E 216
0
- 208

199

rc 191

c 183

S174

C 166
0
LL 158 -

149 I I I I I I -
197.0 197.8 198.6 199.4 200.2 201.0 201.8 202.6 2034 204.2 205.0

Top Silicon Film Thickness (nm)


Figure 3.15: The sensitivity of front-interface recombination velocity to tf.























193

188

183

178

173

168

163

158

153

148

143
330 340 350 360 370 380 390 400

Buried Oxide Thickness (nm)


Figure 3.16: The sensitivity of back-interface recombination velocity to to,.











CHAPTER 4
CORRELATION OF IMPLANTATION DEFECTS WITH DETERMINED
INTERFACE RECOMBINATION VELOCITIES AND CARRIER LIFETIMES IN
ANNEALED SIMOX SOI MATERIALS BY USING A CONTACTLESS OPTICAL
MODULATION TECHNIQUE


4.1 Introduction

The development of low-power and high-speed ULSI circuits fabricated on ultra-
thin film SOI wafers has recently drawn great interest. Key to the success of low-power
and high-speed applications will be the availability, cost, and performance advantage

of quality SOI material meeting the requirements of low-power and high-speed ULSI
circuits. SIMOX (Separation by IMplantation of OXygen) is a promising candidate

for low-power, high-speed, and high density ULSI circuit applications [6]. A quality

Si-overlayer is crucial for such applications. Although the multiple low dose implanta-

tion and annealing sequences have been applied to reduce the threading dislocations

in the Si-overlayer, the drawbacks of multiple low-dose implantation include time con-

sumption, expense, and yield reduction, as well as a possibility for increased metal

contamination. The use of single-dose implant SIMOX is economically feasible and

has proven satisfactory for large demonstration circuit fabrication [42]. In order to

make the SOI technology widespread use in mainstream IC applications, the reduction
of defect density in the Si-overlayer of single-dose implant SIMOX wafers is inevitable.

There are two possible sources of defect formation in the top silicon film: (i) evo-
lution of defects from the as-implanted state and (ii) creation of point defects during

high temperature annealing (HTA). That is, defects are created at the uppermost part

of the Si-overlayer due to silicon interstitial (Sij) migration at the surface [43, 44],

and defects are formed near the front-interface due to the strain gradients generated









in densification of the buried oxide (BOX). The growth defects at the uppermost part

of the Si-overlayer are mainly small dislocation loops which evolve to threading dislo-
cations and segments [44]. The formation of pairs of threading dislocation attributes
to small loops pinned at the Si/BOX interface. The defects growing near Si/BOX in-

terface during HTA is due to the reconstruction of silicon when the SiO2 precipitates
dissolve [44, 45]. Stacking faults may form under certain conditions. These defects
degrade the device performance. In addition, the interaction of Sij with BOX during
HTA is of great interest, because point defects play a key role in interface defect kinet-

ics [46]. Although several dislocation studies [47]-[51] were performed under different
implantation conditions, a general discussion on defect formation mechanisms and

their relation to carrier lifetimes in high-dose implant SIMOX is of interest. In this

work, we determine the interface recombination velocities and substrate carrier life-

times of annealed SIMOX wafers under different implantation conditions by using the
DBOM technique. The correlation between the formation of defects and the interface

recombination velocities and substrate carrier lifetimes under different implantation

conditions can be obtained for improving the wafer quality of the single-dose implant
SIMOX materials.


4.2 Experimental Details

Four sets of SIMOX samples were prepared for this study by oxygen implantation

into silicon wafers using an Ibis 1000 implanter. The wafers were annealed at 1310
C for 5 hours in a 95.5% Ar ambient. The first and second sets of samples were

used for implant energy, channeling and non-channeling studies. Six n-type samples

were prepared for these two sets, and the implant energies were ranging from 155 to
185 keV with an implant temperature of 580 C. The top Si film thickness varied

from 124.4 to 196.3 nm for different channeling wafers and 201.1 to 248.8 nm for non-

channeling wafers. The BOX thickness varied from 353 to 354.4 nm for channeling









wafers and 360.1 to 369.5 nm for non-channeling wafers. The third and the fourth
sets of samples were used for implant temperature and beam current studies. There
are three p-type samples in each set with the implant dose of 1.70 x 10" cm-2 and the

implant energy of 175 keV. The implant temperature ranged from 540 to 640 OC for

the three different lots, with the top Si film and BOX thickness ranging from 197.1

to 178.5 nm and 387.8 to 392.7 nm, respectively, for samples of the third set. The

implant beam current ranged from 45 to 65 mA for the three beam current lots, with

the top Si film and BOX thickness ranging from 183.4 to 179 nm and 377.3 to 383.8

nm for samples of the fourth set.

In this experiment, the DBOM technique [40, 41] was employed for determining

the interface recombination velocities and substrate carrier lifetimes. The measure-

ments of interface recombination velocities were carried out with the incidence of

pump beam at 01 = 23* and 0' = 630. For the measurements of substrate-excess-
carrier lifetimes, the pump beam was incident at 01 = 230. First, the substrate carrier

lifetime 7, was measured by using an IR probe beam and a He-Ne laser pump beam

impinging on the back surface of a SIMOX wafer. The rms values of the surface slope

m and the surface roughness a were measured by using Sloan Dektak II surface pro-

filer to obtain the reflectance. The IR transmitted beam intensity, I, was measured

using the chopped probe beam and a lock-in amplifier. The change in the transmit-

ted intensity AI was measured by using the chopped pump beam superimposed on

the probe beam which was not chopped. The resulting IR transmitted intensity was

measured by using a lock-in amplifier.

To determine the back-interface recombination velocity, S3, the probe and pump
beams impinged on the front surface of the sample with different oblique incident

angles of the pump-beam excitation. The measurement procedures for I and AI

were the same as in the determination of 7,. Values of R were measured by using a

laser power meter. For different angles of pump-beam excitation, the measurements









of I, AI, and R were carried out in a similar procedure.
Finally, the front interface recombination velocity, S2, was determined by using
the He-Cd laser as the pump beam and using the same procedures described above.
The S-polarized reflectances of the pump beam were monitored by a laser power meter
to determine the front surface reflectance, R, and the back-interface transmittance,
T, of the SIMOX wafer.


4.3 Results and Discussion

Before discussing the implantation effects and results, the etch-pit method and
the formation of dislocations in SIMOX wafer are described briefly as follows.
The etching rate of a chemical solution depends distinctly on the crystallographic

orientation. The etching rate is significantly affected by local stress caused by defects.

In regions near dislocations, chemical etching proceeds more rapidly compared with
perfect regions. As a result, etch pits that often have crystallographic symmetry
are formed on the sample surface. Etch pit is commonly observed with an optical
microscope, which gives rise to the differential interference contrast due to the etched
features on the sample surface.
Three types of simple dislocation in the diamond lattice are (i) screw dislocation
( A dislocation that has its axis perpendicular to its Burgers vector is called a pure

edge dislocation), (ii) 600 dislocation (A 600 dislocation that has its axis 600 to its

Burgers vector is called a 600 dislocation), (iii) pure edge dislocation (A dislocation
that has its axis parallel to its Burgers vector is called a screw dislocations).
If the dislocation lies entirely within the crystal, the dislocation line forms a closed

loop, which is referred as a dislocation loop. Most of the dislocation line is of mixed

type, partly edge and partly screw. The dislocation may move inside the crystal by
slip (e.g., applying shearing forces in the opposite direction to the top and bottom of
the crystal will result in prismatic dislocation loops) and or climb (since the edge of









an extra half-plane consists of a row of atoms having incomplete lattice boding, atom

can easily be added or removed from these sites. A climb force can be produced as

an elastic stress applied to the extra plane of a dislocation F/L = -ab where b is the

Burgers vector and a is the stress).

The dislocation formation mechanism in SIMOX structure is not fully under-

stood. The dislocations may be divided into as-implanted and HTA (high-temperature-

annealing) induced. Here the as-implanted effects are discussed first.

The dislocation formed in implantation maybe come from (i) ion implantation and

(ii) silicon oxidation into silicon dioxide. In ion implantation, the implant collision

cascades produce the silicon interstitial (Si-- Sil+V). And, in the internal oxidation

(2.25 Si+2 0, -- 1.25 Sij+SiO2), the Sij is also produced after the oxidation. The Sij

will either form dislocations or migrate toward the surface and incorporated there.

During implantation the formed oxide precipitates block Sij diffusion to the surface.

Hence, the internal oxidation is the main source for emission of Sij and creation of

stress.

After HTA, threading dislocations are formed by (i) evolution of defects in the

as-implanted state and (ii) creation of defects during annealing. The as-implanted

defects near the Si overlayer surface will agglomerate the Si, (from internal oxidation)

and evolve it into threading dislocations. The internal oxidation will densify the BOX

and will emit the Sij. Moreover, if the annealing temperature is inhomogeneous, the

stress may be induced and then the dislocations generated.

The measurements of interface recombination velocities and substrate-excess-

carrier lifetimes were carried out for four sets of samples used in this study. The

results for different implantation conditions are shown in Figs. 4-1 through 4-8.









4.3.1 Implant Energy, Channeling, and Non-channeling Conditions

In Figure 4.1, the relationship between the defect density, the front-interface
recombination velocity, and the implantation conditions for the six wafers is shown.
The results indicate that a higher implant energy yields lower defect density and lower

recombination velocity in the Si-overlayer area. As the energy of implant decreases,
the quality of Si-overlayer degrades as measured by defect density and recombination
velocity.

Figure 4.2 presents the front interface recombination velocity versus implant
energy in the channeling (00) and non-channeling (100) implanted samples. Based
on the low recombination velocity values, the results reveal that higher energy (185

keV) and channeling implants lead to a better interface quality. The non-channeling
implant produces more damage to the interface than that of the channeling implants.
In the low energy implant, the implant range, R, was more shallow than that
of higher energy implant. Defects are created at the uppermost part of Si-overlayer
due to the Sij migration to the surface [43, 44]. The semiloop dislocations introduced
during implantation annealed out the surface during HTA. Meanwhile, some semiloop
dislocations extended downwards to the front interface and formed pairs of threading

dislocations [44]. Most of the existing defects, created by implantation and located
near the front interface, become dominant if the Si-overlayer is thinned [44]. During
HTA, the SiO2 precipitates at this zone are dissolved as

Si02 + 1.2Si -+ 2.2Si + 02 (4.1)

The Sij is provided by the formation of BOX at the front interface according to


2.2Si + 02 -+ Si02 + 1.2Sii


(4.2)









The dissolution of the SiO2 precipitates and the absorption of Sii is needed to bal-

ance each other. If the outdiffusion of oxygen occurs, the extra defects will be intro-
duced [52]. The reconstruction of silicon in this zone is a three-dimensional coales-

cence process which introduces dislocations in order to accommodate the translational

and rotational displacements. For a thinner Si-overlayer, the Sir can easily migrate to
the surface. Hence, the dislocation loop is easily formed. In the channeled samples,

the implanted oxygen atoms travel down channels for the initial part of the implant
process, and are slowed down mainly by electronic stopping. A deeper oxygen atom

penetration results in less damage and a lower probability of oxide precipitation in

the Si-overlayer.

Figure 4.3 shows the back-interface recombination velocity versus the implant

energy in the channeling and non-channeling implanted samples. Contrary to the

front interface, the back interface indicates that a better interface quality is attributed

to the lower energy (155 keV) and non-channeled implant. In Figure 4.4, the substrate

carrier lifetimes versus implant energy for the channeled and non-channeled samples

are presented. Similar to the results of the back-interface recombination velocity

measurements, a better silicon substrate quality was obtained from lower energy (155

keV) and non-channeled implant. The results are consistent with Fig. 4.3 in that the

channeled implants produce more damage to the substrate than that of non-channeled

implants. A deeper oxygen atom penetration results in more damage to the silicon

substrate and Si island in BOX near back interface [47]. The higher energy and

channeled implants generate damage in the deeper region of the implanted samples.

Hence, a poor interface and silicon substrate quality is presented at the backside of

BOX.









4.3.2 Implant Temperature Conditions

Figure 4.5 shows the relationship between the defect density, the front-interface
recombination velocity, and the implantation temperature for the three SIMOX wafers.
The results show that higher implant temperature yields a low defect density and

lower recombination velocity in the Si-overlayer region. As the implant temperature
decreases below 590 OC, the quality of Si-overlayer degrades as measured by defect
density and recombination velocity. The results also show that defect density and re-

combination velocity decrease sharply when the implant temperature is higher than
590 oC.
The amount of oxygen present in the Si-overlayer is strongly dependent on the

implantation temperature [53]. The concentration of oxygen interstitials in the silicon
can be estimated as [54]

[O] = 1.53 x e-1.03eV/kT cm-3 (4.3)

where kT is the thermal energy. A higher dissolution rate of oxygen in the Si-overlayer
may result in a reduction of semiloop defects and producing of thermal donors dur-

ing the HTA treatment. A reduction of semiloop dislocations after HTA in higher

temperature (550-700 OC) implant has been observed by P. Roitman et al. [45]. From

the earlier works of Tuppen et al. [55] and Davis et al. [53], amorphous silicon can

be formed near both sides of the BOX at a lower implantation temperature (< 500

OC). These regions may become polycrystalline zones after the HTA treatment. Our
results reveal that implant temperatures at 590 *C or greater may result in a good

active silicon layer.

Figure 4.6 illustrates the back-interface recombination velocity and substrate car-
rier lifetimes versus the implant temperature. Similar to the studies in the front inter-

face, higher implant temperatures produce a better back interface quality. The results

of the substrate-excess-carrier lifetime measurements exhibit a different trend from









the measured results of back-interface recombination velocity. The measurements
reveal that the lower implant temperature (540 OC) yields a better silicon substrate
quality. The lower lifetime in the Si substrate is suggested to result from heavy metal
gettering [39]. Heavy metal is introduced during implantation and diffuses into the

Si substrate during HTA process. The BOX does not prevent the diffusion of heavy
metals [56] into the silicon substrate. Due to a better back-interface quality under
higher temperature implants, less gettering of extrinsic heavy metals at the interface

is expected. Hence, more heavy metals are presented inside the silicon substrate.


4.3.3 Implant Beam Current Conditions

In Figure 4.7, a plot showing the relationship between the defect density, the
front-interface recombination velocity, and the implantation beam current for the

three SIMOX lots is presented. The results show that the lower implant beam current

yields lower defect density and lower recombination velocity in the Si-overlayer region.
As the beam current of implant increases, the quality of the Si-overlayer degrades
as measured by defect density and recombination velocity. The high beam current

implant produces more damage to the interface than that of the lower beam current
implants. In the high beam current implants, more damage is expected to form near
the surface of the implant samples [57]. A large quantity of half loop dislocations is

created in the Si-overlayer for the higher beam current implants which form threading

dislocations during the HTA [45].
Figure 4.8 illustrates the back-interface recombination velocity and the sub-

strate carrier lifetimes versus the implant beam current. Contrary to the studies
in front interface, a higher beam current produces a better back interface quality.
The substrate-excess-carrier lifetime measurements show a different result from that

of the back-interface recombination velocity. The measurements reveal that the lower

beam current yields a better substrate quality. The poor back interface quality found









in lower beam current implants maybe attributed to the oxygen deficiency and a
greater number of Si islands generated in the BOX near the back interface will result.
The quality of the silicon substrate is influenced by the heavy metal gettering and
the quality of back interface.

Finally, the defects and the relationship to the measured recombination parame-
ters will be discussed here. The formation defects in the Si overlayer of SIMOX wafers
maybe attributed to the crystal strain around dislocation cores, the dangling bonds of
different dislocation types, and the known trapping which occurs with metallic point
defects (see Fig. 4-9). Under low injection, the lifetime and surface recombination

velocity are expressed as /lcavthNt and avthNit, respectively, where Nt and Nt are
the defect density in the bulk and at the interface, respectively. The dangling bond
or electron trapping is consistent with the faster recombination results. That is, the

dangling bond acts as the trapping center. In the history of defect examination in
SIMOX material, there are several kinds of defects which have been identified. The
most common type of top Si film defects is the threading dislocation (see Fig. 4-

10) [45]. These typically result through the initial half loop formation which grows
in diameter to eventually intersect the Si surface and the BOX interface, resulting in

the characteristic threading dislocation pair formation (see Fig. 4-11) (extending from

surface to BOX interface) [45]. Threading dislocations, even up to 109 cm-2 density,

have not been shown to adversely affect device performance [58]. Although the crys-
tal strain extends for several hundred nm around the dislocation core, there has been

no published correlation between device failure and dislocation density. However, if

there are any metals present, chances are the dislocations will getter the metals to
the dislocation sites. Then, the device performance will be hindered, as metals are
known to trap and kill lifetimes [75]. Another type of dislocation that has recently
been discovered, under certain implant and anneal conditions, are pyramidal stacking
faults (not the standard tetrahedral stacking faults found in the bulk silicon!) (see








Fig. 4-12). These very small stacking faults will form at the BOX interface if and when
the BOX is slightly under-implanted [59]. With a slightly increased oxygen dose, the
pyramidal stacking faults will be absorbed by the growing BOX thickness. Thus, this
emphasizes their extremely small size and extremely proximity to the BOX interface.
Dislocation types have been classified through standard Secco chemical etching and
SEM (threading dislocation pairs resulting from loop expansion) (see Fig. 4-11), and
TEM has shown the pyramidal stacking faults when the material is underdose with
oxygen (see Fig. 4-10). The TEM may result in a misleading of defect counts as the

defect density below 1 x 107 cm-2 [60]. There are other types of dislocations, but
these have been eliminated in the most recent SIMOX material [61]. Each type of
dislocations behaves differently with respect to etch pit density. For the threading

dislocations, the etch pit pairs are visible at about 1000 from the interface and all
the way to the interface as the etch continues. For the stacking faults near the BOX
interface, the etch pits appear as a singular pits and only at the last 250 to 150 from

the BOX interface [61]. The density of the threading dislocations is a function of dose
(the thicker the BOX, the greater the dislocation density). The pyramidal stacking
fault density is rather constant provided that they appear at all.


4.4 Conclusion

In this work, a study of defects in SIMOX wafers under different implantation

conditions has been carried out by using the DBOM technique. Using this tech-
nique, the quality of SIMOX wafers can be evaluated versus processing and growth
parameters. The measurement results reveal that higher energy, channeling, higher

temperature, and lower beam current implants may result in a lower front-interface
recombination velocity and a lower Si-overlayer defect density. A better Si-overlayer

quality is obtained with those conditions. As described, the half loop dislocations and

interstitial point defects near the front interface play a decisive role in the dislocation









formation in the Si-overlayer during HTA process. A minimization of the dislocation

loops formed in the Si-overlayer during implantation is the key factor to improve the
quality of the single-dose implant SIMOX wafers. From the results of back-interface

recombination velocity and substrate lifetime measurements, a better back interface

and silicon substrate quality is obtained under lower energy and non-channeling im-

plants. Although higher implant temperature and higher beam current implants may

result in a lower back-interface recombination velocity, the substrate carrier lifetime

measurements show the contrary tendency. A higher substrate carrier lifetime is ob-

tained under lower temperature and lower beam implants. This discrepancy may

attribute to the heavy metal gettering at the silicon substrate and the backside of

BOX after HTA treatment.




















108 500 -
-+-Defect Density
S- Velocity

-... o 400 .


EE
S107 300 8
Q)Q
0)

- 200 .

C
2
106 I I i 100
155 keV 155 keV 170 keV 170 keV 185 keV 185 keV
0deg 10deg 0deg 10deg 0deg 10 deg
Implant energy and Implant angles



Figure 4.1: Measured defect densities and frontinterface recombination
velocities for the different energies and angle implants.





















450
E A non-channeling
I channeling
4J 380
CO


d 310
E
0

240


E 170
2 -
I-ioo
.100 I I I
140 150 160 170 180 190 200

Implant energy (KeV)



Figure 4.2: Measured front-interface recombination velocities for the
channeling and non-channeling implants versus the implant
energy.



















200
E A non-channeling
S175 n channeling


S150
E
8
125


c 100


75
140 150 160 170 180 190 200
Implant energy (KeV)



Figure 4.3: Measured back-interface recombination velocities for the
channeling and non-channeling implants versus the implant
energy.

























A non-channeling
* channeling


- 35
u,



. 30


L_

-25

U}

x
20
9'2o




C) 15


140


I I I I I


200


Implant energy (KeV)




Figure 4.4: Measured substrate-excess-carrier lifetimes for the channeling
and non-channeling implants versus the implant energy.


L




























..












.. ... . .. .......


Defect Densiy

Velocity


-


150



^ 120
E
r,
90


C
o 60



O 30



0


550 g
E

500 O




0
0
L_
400 a






u.
350
C

U-


'300
00


Implant temperature (K)







Figure 4.5: Measured defect densities and front-interface recombination
velocities for the different temperature implants.


0 550 600 650 7


I


-
| | |





86














200 20 '3


195 o
\ S3 18

S190 ,
16 0
0 185

C) TS 14
0 180 \

C175 12
175 -
Ca -
170 10 0
500 550 600 650 700

Implant temperature (K)



Figure 4.6: Measured substrate-excess-carrier lifetimes and back-interface
recombination velocities for the different temperature im-
plants.





















7


S6

.


4

c(
t5



.2



1


Beam current (mA)




Figure 4.7: Measured defect densities and front-interface recombination
velocities for the different beam current implants.


1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 '3 00
45 50 55 60 65 70





















_220 23 U


E210
-21
3C- E
S200 -
. t-19 (D


1 17
Q 19 -


S180 -
m x

- 170 \ -
" : .,.
.C

S 160 ' ' ' ' I I ' I 13 C
40 45 50 55 60 65 70

Beam current (mA)



Figure 4.8: Measured substrate-excess-carrier lifetimes and back-interface
recombination velocities for the different beam current im-
plants.
























;'~.. '' ^ :. : ::'' ;i *

;,~~~~ 4A;^*^*]*?.
fe
-0" K.r
j (:~


-I..


.I'


Figure 4.9: The High Resolution TEM for distinguishing the metallic get-
tering in the dislocation site.
























-oo-P5- 7"
ry-.. ^., ". .
s ..*'*


Figure 4.10: The TEM shown threading dislocation through the top silicon
film.


-9~















































Figure 4.11: The SEM shown threading dislocation pairs after etch-pit
etching.














































Figure 4.12: The TEM shown threading dislocation and pyramidal stack-
ing fault in the top silicon film.












CHAPTER 5
THE EFFECTS OF PARASITIC BIPOLAR-TRANSISTOR CONDUCTION ON
THE HOT-CARRIER-DEGRADATION OF SOI MOSFETS


5.1 Introduction

The hot-carrier-induced degradation is one of the major challenges for shrinking

further the size of bulk Si or SOI components into deep submicrometer dimensions.
The degradation of nMOSFET resulted in circuit failure maybe attributed to the
high electric field near drain/body junction. In SOI transistors, fully depleted (FD)

device exhibits less aging effects than that of PD devices [2, 62]. This was due to
the smaller maximum channel-electric field and vertical oxide field for the FD de-
vices [62]. The hot-carrier damage in subthreshold region due to the floating-body

effects has been investigated for PD devices [63]. Although no clear evidence has
been shown that the aging of SOI MOSFETs is more severe than that of the bulk
Si counterparts, the degradation mechanisms are more complex. These include (i)
not only the front gate oxide but also the buried oxide and related interface may be

damaged [2, 64, 65]; (ii) interface coupling allows the front channel to sense the pres-
ence of defects at the opposite interface [2]; (iii) the field maps are different, and (iv)

floating body effects may come into play. The purpose of this work is to investigate

the latter aspect by revealing the main consequences of stresses conducted in floating-
and unfloating-body modes. In next section, an analytical model of parasitic BJT
effects in PD SOI nMOSFET is presented for correlating the hot-carrier-induced ag-
ing, and a modified lucky-electron model is developed for estimating the degradation
of SOI nMOSFET characteristics. A comparison of the degradation between floating
and unfloating-body modes are presented. The defective parameters are extracted by




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