Group Title: NARC : network-attached reconfigurable computing for high-performance, network-based applications
Title: Abstract
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Permanent Link: http://ufdc.ufl.edu/UF00094734/00001
 Material Information
Title: Abstract
Physical Description: Book
Language: English
Creator: Conger, C.
Troxel, Ian
Espinosa, D.
Aggarwal, V.
George, Alan D.
Publisher: Conger et al.
Place of Publication: Gainesville, Fla.
Publication Date: 2005
Copyright Date: 2005
 Record Information
Bibliographic ID: UF00094734
Volume ID: VID00001
Source Institution: University of Florida
Holding Location: University of Florida
Rights Management: All rights reserved by the source institution and holding location.

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NARC: Network-Attached Reconfigurable Computing
for High-performance, Network-based Applications


C. Conger', I. Troxel, D. Espinosa, V. Aggarwal, and A. George
High-performance Computing and Simulation (HCS) Research Laboratory
Department of Electrical and Computer Engineering, University of Florida
Gainesville, FL 32611-(. 111

ABSTRACT

Network-Attached Storage (NAS) is a widely deployed technology in a variety of settings such as data centers
that provides a reasonably cost-effective, powerful, and scalable solution to data storage requirements. As
opposed to server-based, direct-attached storage, the NAS concept features storage systems that are directly
attached to the network and reduce various limitations that traditional high-end storage servers impose on
cost and flexibility. Researchers at the University of Florida have adapted this concept to hardware-based
reconfigurable computing (RC) systems to similarly achieve a cost-effective, flexible, powerful, and scalable
means in which to quickly and easily integrate PLDs such as FPGAs into high-performance, network-based
systems, from small-scale embedded systems to large-scale distributed systems. We have coined the term
NARC, or network-attached reconfigurable computing, in describing this novel concept.

The team at the University of Florida has recently completed a year-long effort to design, build, and evaluate
several working prototype boards for NARC. Each board connects on the front side to an Ethernet network
and on the back side to one of several FPGA development boards from Xilinx. The NARC board currently
features a Fast Ethernet controller and transceiver, a 32-bit ARM processor running Linux to handle the
TCP/IP protocols, a dual-port memory subsystem, control mechanisms to enable configuration and use of
the FPGA hardware remotely over the network, as well as a growing selection of test applications. The
NARC's flexible architecture allows future versions to include any type of back-end FPGA board to be
attached to ever faster Ethernet variants (e.g. Gigabit or 10 Gigabit Ethernet) or other network protocols,
with future plans for integration of all components onto a single board or device. This presentation will
describe the prototype design effort pointing out numerous lessons learned. We will also showcase some of
the many application areas in which we believe the NARC concept can be effectively applied, such as in-situ
network traffic analysis and deep packet processing for security, deployment into legacy and future military
systems such as aircraft or smart munitions for advanced processing, as well as NARC's first conceived role
as a cost-effective resource in RC-enabled distributed computing systems such as clusters. Finally, the
presentation will include several case studies to highlight the efficacy and efficiency of the NARC in
performing useful tasks as compared to traditional servers on the network.


1 Corresponding author, email: conger@hcs.ufl.edu, telephone: 352-392-9046.




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