Title: CHREC : the new industry/university Center for High-performance Reconfigurable Computing
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Title: CHREC : the new industry/university Center for High-performance Reconfigurable Computing
Physical Description: Book
Language: English
Creator: George, Alan D.
Publisher: George, Alan D.
Place of Publication: Gainesville, Fla.
Publication Date: 2008
Copyright Date: 2008
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General Note: Presented at 2008 Non-convential Computing Conference
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Bibliographic ID: UF00094690
Volume ID: VID00001
Source Institution: University of Florida
Holding Location: University of Florida
Rights Management: All rights reserved by the source institution and holding location.

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Alan D. George, Ph.D.
Director, NSF CHREC Center
Professor of ECE, University of Florida
(on behalf of faculty/staff of CHREC at Florida, GWU, BYU, and VT)


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SOutline


. Motivations, challenges, vision


. A new national


research


center


* Research activities


* Conclusions


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Reconfigurable Computing


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Motivations,


Challenges,


Vision


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Computing Reformation
End of wave (Moore's Law) riding fcIk + ILP (CPU)
a Explicit parallelism & multicore the new wave
Many promising technologies on new wave
a Fixed & reconfigurable multicore device architectures
Many R&D challenges on new wave
a Tried & true methods no longer sufficient; complexity abounds
a Semantic gap widening between applications & systems
e.g. App developers must now understand & exploit parallelism
Inherent traits of fixed device architectures
a App-specific: inflexible, costly (e.g. ASIC)
a App-generic: power, cooling, & speed challenges (e.g. Xeon)
a Many niches between extremes (DSP, Cell, GPU, NP, etc.)
Reconfigurable architectures may offer best of both worlds
a Speed, flexibility, power, adaptability, economy of scale, size
a Bridging embedded & general-purpose computing, superset of fixed
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What is a Reconfigurable Computer?


System capable of changing hardware structure to
address application demands
a Static or dynamic reconfiguration
U-
a Reconfigurable computing, configurable computing,
custom computing, adaptive computing, etc.
a May be mix of conventional fixed & reconfigurable
devices (e.g. control-flow CPUs, data-flow FPLDs)

Enabling technology? FPGA
ECA
" Field-programmable multicore devices FPCA
FPOA
" FPGA et al. (broad & growing space) TILE
XPP
Applications? et al.
u Vast range computing and embedded worlds
a Faster, smaller, cheaper, less power & heat, more
adaptable and versatile, selectable precision


Performance


4
4
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Opportunities for RC?


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When and Where to Apply RC?

* When do we need?
a When performance & versatility are critical
Hardware gates targeted to application-specific requirements
System mission or applications change over time
a When the environment is restrictive
Limited power, weight, area, volume, etc.
Limited communications bandwidth for work offload
a When autonomy and adaptivity are paramount
* Where do we need?


a In conventional servers, clusters, and supercomputers (HPC)
Field-programmable hardware fits many demands
High DOP, finer grain, direct dataflow mapping, bit manipulation,
selectable precision, direct control over H/W (e.g. perf. vs. power)
a In space, air, sea, undersea, and ground systems (HPEC)
Embedded & deployable systems can reap many advantages w/ RC


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Challenges @ Many Levels

* Performance prediction
a When and where to exploit RC?
Performance analysis
a How to optimize complex systems and apps?
Numerical analysis
a Must we throw DP floats at every problem?
Programming languages & compilers
a How to productively express & achieve parallelism?
System services
a How to support variety of run-time needs?
Portable core libraries
a Where cometh building blocks?
System architectures
a How to scalably feed hungry devices?
Device architectures
a Broad device types, how track for HPC and HPEC?


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Perora~nceiw

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Performance
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^^fMLanguage


& Compilers


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A New National


Research Center


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What is CHREC? CHREC
NSF Center for High-Performance
Reconfigurable Computing
* NSF Center for High-Performance Reconfigurable Computing
a Pronounced "shreck"
a Under development since Q4 of 2004 (LOI to NSF) A
Lead institution grant by NSF to Florida awarded on 09/05/06
Partner institution grant by NSF to GWU awarded on 12/04/06
BYU and VT became official new partner sites on 12/04/07
a CHREC began operations in January 2007
* Under auspices of I/UCRC Program at NSF
a Industry/University Cooperative Research Center
CHREC is supported by both CISE & Engineering Directorates @ NSF
a CHREC is both a Center and a Research Consortium
University groups form the research base (faculty, students)
Industry & government organizations are research partners, sponsors,
collaborators, and technology-transfer recipients
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Objectives for CHREC

Serve as foremost national research center in this field
a Basis for long-term partnership and collaboration amongst industry,
academe, and government; a research consortium
a RC: from supercomputers to high-speed embedded systems
Directly support research needs of our Center members
a Highly cost-effective manner with pooled, leveraged resources and
maximized synergy
Enhance educational experience for a large set of high-
quality graduate and undergraduate students
a Ideal recruits after graduation for Center members, many US
Advance knowledge and technologies in this field
a Commercial relevance ensured with rapid technology transfer

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NSF's Model for I/UCRC Centers




Research Interaction


Basic Applied/Development


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CHREC Faculty (17& growing) I
* University of Florida (lead)
a Dr. Alan D. George, Professor of ECE Center Director
a Dr. Herman Lam, Associate Professor of ECE
Dr. K. Clint Slatton, Assistant Professor of ECE and CCE
L Dr. Greg Stitt, Assistant Professor of ECE
u Dr. Ann Gordon-Ross, Assistant Professor of ECE
L Dr. Saumil Merchant, Research Scientist in ECE
* George Washington University (partner) We also feature a
a Dr. Tarek EI-Ghazawi, Professor of ECE GWU Site Director strong team of
a Dr. Ivan Gonzalez, Research Scientist in ECE dozens of
a Dr. Sergio Lopez, Research Scientist in ECE graduate students
* Brigham Young University (partner) spanning the four
a Dr. Brent E. Nelson, Professor of ECE BYU Site Director CHREC sites,
a Dr. Michael J. Wirthlin, Associate Professor of ECE many of them US
L Dr. Michael Rice, Professor of ECE citizens.
u Dr. Brad L. Hutchings, Professor of ECE
* Virginia Tech (partner)
a Dr. Shawn A. Bohner, Associate Professor of CS VT Site Director
L Dr. Peter Athanas, Professor of ECE
L Dr. Wu-Chun Feng, Associate Professor of CS and ECE
L Dr. Francis K.H. Quek, Professor of CS


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CHREC Members


Honeywell


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AFRL Munitions Directorate
Altera
Arctic Region Supercomputing Center
Boeing [new]
Cadence
GE Aviation Systems
Harris Corp. [new]
Hewlett-Packard 27 members with
Honeywell 37 memberships
IBM Research in 2008
Intel
L-3 Communications [new]
Los Alamos National Laboratory [new]
Luna Innovations [new]
NASA Goddard Space Flight Center
NASA Langley Research Center
NASA Marshall Space Flight Center
National Instruments [new]
National Reconnaissance Office
National Security Agency
Network Appliance [new]
Oak Ridge National Laboratory
Office of Naval Research
Raytheon
Rincon Research Corp. [new]
Rockwell Collins
Sandia National Laboratories


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Membership Fee Structure

NSF provides base funds for CHREC via 1/UCRC grants
u Base grant to each participating university site to defray admin costs
Industry and govt. partners support CHREC through memberships
a NOTE: Each membership is associated with ONE university
a Partners may hold multiple memberships (supporting multiple students) at
one or multiple univ. sites (e.g. NSA, NRO, AFRL/MN, GSFC, MSFC, etc.)
Membership Fee: $35K per annum
a Why $35K unit? Base cost of graduate student for one year
Stipend, tuition, and related expenses (IDC is waived, otherwise >$50K)
u Fee represents tiny fraction of budget (1-2%) & benefits of Center
CHREC budget projected to exceed $3M/yr in 2008
Equivalent to >$10M if Center founded in govt. or industry
Each university invests in various costs of CHREC operations
a 25% matching of industry membership contributions
a Indirect Costs waived on membership fees (-1.5x multiplier) More bang
a Matching on administrative personnel costsforyour buck!
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Center Membership Benefits

. Research and collaboration
a Selection of project topics that membership resources support
L Direct influence over cutting-edge research of prime interest
L Review of results on semiannual formal basis & continual informal basis
L Rapid transfer of results and IP from projects @ ALL sites of CHREC
* Leveraging and synergy
a Highly leveraged and synergistic pool of funding resources
L Cost-effective R&D in today's budget-tight environment, ideal for ROI
* Multi-member collaboration
a Many benefits between members
L e.g. new industrial partnerships & teaming opportunities
* Personnel
a Access to strong cadre of faculty, students, post-docs
* Recruitment
a Strong pool of students with experience on industry & govt. R&D issues
* Facilities
L Access to university research labs with world-class facilities


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CHREC & OpenFPGA


CHREC


Research context and support Open
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Technology innovations


Production
Utilization


Diagram c/o
Dr. Eric Stahlberg


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Education & Outreach


* CHREC is enabling advancements at all its sites
New & updated courses
Degree curricula enhancements
a Student internship connections
a Visiting scholars
* Example: new RC courses @ Florida site
a New undergraduate (EEL4930) & graduate (EEL5934)
dual-listed courses in RC began in Aug'07
Lectures, lab experiments, research projects
a Fundamental topics Rockwel
a Special topics from research in CHREC CollnI S
Supported by new RC teaching cluster
a Sponsored by educational grant from Rockwell Collins
a Cluster of 21 RC workstations each housing Nallatech PCI-X card
with Xilinx Virtex-4 LX100 user FPGA (supported by RCI grant)


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Research


Activities


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2007 CHREC Projects (Florida Site)


F1-07: Simulative Performance Prediction
a Before you invest major $$$ in new systems, software design,
& hardware design, better to first predict potential benefits

F2-07: Performance Analysis & Profiling
L Without new concepts and powerful tools to locate and resolve
performance bottlenecks, max. speedup is extremely elusive
F3-07: Application Case Studies
a RC for HPC or HPEC is relatively new & immature; need to
build/share new knowledge with apps & tools from case studies

F4-07: Partial Run-Time Reconfiguration
a Many potential advantages to be gained in performance,
adaptability, power, safety, fault tolerance, security, etc.
F5-07: FPLD Device Architectures & Tradeoffs
a How to understand and quantify performance, power, et al.
advantages of FPLDs vs. competing processing technologies


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2007 CHREC Projects (GWU Site)


G1-07: SW/HW Partitioning & Co-Scheduling

a Algorithms and tools for profiling, partitioning, co-
scheduling, and targeting of RC Systems




G4-07: High-Level Languages Productivity

L Insight to understand underlying differences among
available tools, guide programmer in choosing correct
language, impact future HLL development




G5-07: Library Portability and Acceleration Cores

L Framework for portable and reusable library of
hardware cores populated with key modules for RC

L Initial focus upon case studies in computational
biology & medical imaging


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2008 CHREC Projects


Potential Bottlenecks
IDE


Florida Site
FPGAP0 FPGA2
a F1-08: System-Level Formulation for Alg/Arch Exp 2 M 0%B
Abstraction layer exploring complex alg. & arch. formulations
a F2-08: Application Performance Analysis R _
Extending run-time performance analysis to HLL-based RC apps
L F3-08: Case Studies in Multi-FPGA Application Design -I
New insight in multi-device apps, extend RAT prediction models _
a F4-08: Reconfigurable Fault Tolerance & Partial Reconfig.
System-level FT, exploiting RTR and PR for dynamic response to rad hazards
a F5-08: Device Characterization & Design Space Exploration
Extending studies to broader range of RC devices (FPCA, ECA, TILE, etc.)
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a G5-08: Library Portability for HLL Acceleration Cores
Exploring and defining portable interface framework (PFIF)
a G6-08: Intelligent Deployment of IP Cores
Identify HW tasks, deploy intelligently (grouping, IP interconnect)
L G7-08: Partial Run-Time Reconfiguration for HPRC
Explore PR for HPC apps to reduce RTR delay, HW virtualization


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2008 CHREC Projects


rHLL (Matlab/Fortran)
Tools ? *


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Libraries -J
a B1-08: Core Library Framework for HPC/HPEC Coregen JHDL
Framework for encapsulating details of reusable circuit cores
a B2-08: Heterogeneous Architectures for HPEC RC
Device characterizations with RC/Fixed hybrids (FPGA, Cell, GPU) F
a B3-08: High-Reliability RC Design Tools and Techniques
Device-level FT, auto. insertion of SEU mitigation, SEU estimation & det
a B4-08: Reliable RC DSP/Comm Systems
Application-specific techniques for DSP/communications system design


HLL (C/C++/SysC)




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section


* Virginia Tech Site
Platfc
a V1-08: Model-Based Engineering Framework for HPRC Applications ndor
Adapt model-based design methods for RC, feature SDR for case studies
a V2-08: Process-to-Core Mapping for Advanced Architectures
SPlatfc
Explore process-to-core mappings for hybrid multicore and RC architectures


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IDARPA Studies @ CHREC


* Research roadmaps for app
development on FPGA systems
a Bridging app/arch semantic gap
Prevalent challenge of multi-core
a RC to revolutionize DOD missions
* 2 DARPA studies @ CHREC
a One at founding sites + Clemson
a One at new sites
* Focus areas
a Study underlying tools limitations
Theory, practice, technologies
a Formulate strategic research paths
Revolutionary, impactful
a Craft research roadmaps
Highlight DARPA-hard challenges


* Exploration of a Research Roadmap for Application
Development & Execution on FPGA-based Systems
* Future FPGA Design Methodologies and Tool Flows
I. Formulation
(a) Algorithm design exploration
(b) Architecture design exploration
(c) Performance prediction (speed, area, etc.)
II. Design
(a) Linguistic design semantics and syntax
(b) Graphical design semantics and syntax
(c) Hardware/software codesign
III. Translation
(a) Compilation
(b) Libraries and linkage
(c) Technology mapping (synthesis, place & route)
IV. Execution
(a) Test, debug, and verification
(b) Performance analysis and optimization
(c) Run-time services


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Conclusions


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Conclusions

* RC making inroads in ever-broadening areas
a HPC and HPEC; from satellites to supercomputers!


As with any new field, early adopters are brave at heart
a Face challenges with design methods, tools, apps, systems, etc.
L Fragmented technologies with gaps and proprietary limitations
Research & technology challenges abound Fui
a Application FDTE, device/system arch., FT, RTR, PR, etc.
L CHREC sites and partners leading key R&D projects Eci
Industry/university collaboration is critical to meet challenges
a Incremental, evolutionary advances will not lead to ultimate success
a Researchers must take more risks, explore & solve tough problems
a Industry & government as partners, catalysts, tech-transfer recipients
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P1







Y1 Achievements of CHREC

* Among best new NSF Centers on record
a- Cited by NSF as their "model" new 1/UCRC center -
: Grown to >30 academic, industry, and govt. partners in 1 year
-p "Your Center's feedback is extraordinary. In all my survey research work
over the years I have not seen such outstanding feedback."
i NSF Evaluator, Dr. Vida Scarpello, 12/29/07, surveyed CHREC members
S 16 founding members cited net ROI of $2.4M in Y1 [avg $ gain > 4]
a Awarded Fundamental Research Supplement by NSF in July '07
* Selected by DARPA for dual studies .
L Laying foundation to spur revolution in app development
* Many research successes from Y1 projects, such as:
a First performance analysis framework & tool for RC
L RAT model for rapid prediction of RC app performance
a Variety of app case studies (LIDAR, MD, SAR, HSI, DDC)
a Quantitative analyses of HLLs and FPLD devices for RC


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Acknowledgements

We express our gratitude for support of CHREC by
National Science Foundation
a Program managers & assistants, center evaluator, panel reviewers
CHREC Industry and Government Partners
a 27 members holding 37 memberships in 2008
University administrations @ CHREC sites i.lfA 1)
a University of Florida
a George Washington University
a Brigham Young University
a Virginia Tech
Equipment and tools vendors providing support
a Aldec, Altera, Celoxica, Cray, DRC, GiDEL, Impulse, Intel,
Mellanox, Nallatech, SGI, SRC, Synplicity, Voltaire, XDI, Xilinx
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Thanks for Listening! @


* For more info:



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* Questions?


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Under the auspices of the highly acclaimed
program for IndustrvUniversitv Cooperative
Research Centers (UUCRC) at the National
Science Foundation, CHREC
(pronounced "shreck") is a new national
center and consortium for fundamental
research in reconfigurable computing.
CHREC is comprised of more than 30
organizations from academia, industry, and
government with synergistic interests and
goals in this field. After completing a two-
year development and selection process at
NSF, CHREC became operational in January
2007. CHREC consists of four university
sites, where faculty and students conduct
the research for CHREC, and 27 industry
and government members, partners


collaborating on all research tasks and when completed applying technology
transfers.

A broad range of goals have been defined with NSF for CHREC, including: (1)
Establish the nation's first multidisciplinary research center in reconfigurable high-
performance computing as a basis for long-term partnership and collaboration
amongst industry, academe, and government; (2) Directly support the research
needs of industry and government partners in a cost-effective manner with pooled,
leveraged resources and maximized synergy; (3) Enhance the educational
experience for a diverse set of high-quality graduate and undergraduate students;
and (4) Advance the knowledge and technologies in this emerging field and ensure
relevance of the research with rapid and effective technology transfer.

Center Directors
Dr. Alan D. George (UF), Center Director
Dr. Tarek El-Ghazawi (GW), Center Co-Director
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CHREC Sites
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