• TABLE OF CONTENTS
HIDE
 Title Page
 Acknowledgement
 Table of Contents
 Abstract
 Introduction to bipolar junction...
 Physical degradation mechanisms...
 Current-accelerated stress methodologies...
 Base current relaxation transient...
 Effect of high current density...
 Summary and conclusions
 Reference
 Biographical sketch
 Copyright






Title: Reliability of silicon bipolar junction transistors in integrated circuits
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Permanent Link: http://ufdc.ufl.edu/UF00082404/00001
 Material Information
Title: Reliability of silicon bipolar junction transistors in integrated circuits
Physical Description: vi, 253 leaves : ill. ; 29 cm.
Language: English
Creator: Carroll, Michael S., 1968-
Publication Date: 1995
 Subjects
Subject: Bipolar transistors   ( lcsh )
Bipolar integrated circuits   ( lcsh )
Electrical and Computer Engineering thesis, Ph. D   ( lcsh )
Dissertations, Academic -- Electrical and Computer Engineering -- UF   ( lcsh )
Genre: bibliography   ( marcgt )
non-fiction   ( marcgt )
 Notes
Thesis: Thesis (Ph. D.)--University of Florida, 1995.
Bibliography: Includes bibliographical references (leaves 246-252).
Statement of Responsibility: by Michael S. Carroll.
General Note: Typescript.
General Note: Vita.
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Bibliographic ID: UF00082404
Volume ID: VID00001
Source Institution: University of Florida
Holding Location: University of Florida
Rights Management: All rights reserved by the source institution and holding location.
Resource Identifier: aleph - 002070209
oclc - 34461947
notis - AKQ8471

Table of Contents
    Title Page
        Page i
    Acknowledgement
        Page ii
    Table of Contents
        Page iii
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    Abstract
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    Introduction to bipolar junction transistor reliability
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    Physical degradation mechanisms of silicon bipolar junction transistors during reverse emitter-base bias stress
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    Current-accelerated stress methodologies for silicon bipolar junction transistors under reverse emitter-base bias stress
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    Base current relaxation transient in silicon bipolar junction transistors after reverse emitter-base bias stress
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    Effect of high current density operation on silicon bipolar junction transistor characteristics
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    Summary and conclusions
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    Reference
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    Biographical sketch
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    Copyright
        Copyright
Full Text














RELIABILITY OF SILICON BIPOLAR JUNCTION
TRANSISTORS IN INTEGRATED CIRCUITS







By

MICHAEL S. CARROLL


A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL
OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT
OF THE REQUIREMENTS FOR THE DEGREE OF
DOCTOR OF PHILOSOPHY

UNIVERSITY OF FLORIDA


1995










ACKNOWLEDGEMENTS


I would like to thank my supervising professors Dr. Arnost Neugroschel and Dr.

Chih-Tang Sah for their guidance during my doctoral research. I would also like to

thank Dr. Toshikazu Nishida, Dr. Peter Zory, and Dr. L. Elizabeth Seiberling for serving

on my supervisory committee. I also thank Yi Lu, Jack Kavalieros, Michael Han, and

Steven Walstra for helpful discussions, and Kurt Pfaff for assistance in measurements

and data analysis. The financial support from Intel Corporation and the Semiconductor

Research Corporation is also gratefully acknowledged.










TABLE OF CONTENTS


page

ACKNOWLEDGEMENTS................................................................................. ii

A B STR A C T ........................................................................................................... v

CHAPTERS

1. INTRODUCTION TO BIPOLAR JUNCTION TRANSISTOR
RELIABILITY ........................................................................................ 1

1.1. Introduction........................................................................................ 1
1.2. Bipolar Transistor Fabrication.............................................................. 4
1.3. Shockley-Read-Hall Recombination Theory............................. ... 9
1.4. Shockley Equations for BJT Currents........................... ..................... 11
1.5. Sah-Noyce-Shockley Recombination Current................................ 16
1.6. Surface Trap-Assisted Tunneling Current............................ ........... 20
1.7. Reverse-Bias Current in the Emitter-Base Junction........................... 25
1.8. Analysis of Base and Collector Currents.................. ... ...... 28
1.9. Theory of Hot-Carrier Oxide-Silicon Interface
Trap Generation........................... ......... ..................... 32
1.10. Bipolar Transistor Self-Heating................................ .......... 41
1.11. Summ ary ............................................................................... ............ 45

2. PHYSICAL DEGRADATION MECHANISMS OF SILICON BIPOLAR
JUNCTION TRANSISTORS DURING REVERSE EMITTER-BASE
BIA S STRESS........................................................................................ 46

2.1. Introduction......................................................................... 46
2.2. Fundamental Excess Base Current Mechanisms.............................. 52
2.3. Analysis of Hot Carriers During Stress................................ ...... 69
2.4. Analysis of Excess Base Current Kinetics.......................... ....... 78
2.5 Device Models for Excess Base Current............................ ....... 95
2.6. Sum m ary................................................................................. .. .........101











3. CURRENT-ACCELERATED STRESS METHODOLOGIES
FOR SILICON BIPOLAR JUNCTION TRANSISTORS
UNDER REVERSE EMITTER-BASE BIAS STRESS.............................103

3.1. Introduction........................................................................................ 103
3.2. Background and Demonstration of Current Acceleration......................106
3.3. Hot Carrier Analysis During Stress....................................................118
3.4. Demonstration of TTF Extrapolation on Two Technologies.................124
3.5. Sum m ary............................................................................................ 148

4. BASE CURRENT RELAXATION TRANSIENT IN SILICON
BIPOLAR JUNCTION TRANSISTORS AFTER
REVERSE EMITTER-BASE BIAS STRESS.....................................150

4.1. Introduction................................. ...................................... .................150
4.2. Experiments and Results............................ .........................................154
4.3. Model for Base Current Relaxation........................................................169
4.4. Sum m ary........................................................... ................................. 186

5. EFFECTS OF HIGH CURRENT DENSITY OPERATION ON SILICON
BIPOLAR JUNCTION TRANSISTOR CHARACTERISTICS..................187

5.1. Introduction........................................................................................ 187
5.2. Experiments and Results......................................................................191
5.3. Model for Current Gain Increase and Emitter Resistance
Decrease.......................................................................................222
5.4. TTF Extrapolation of High-Current Stress Data....................................229
5.5. Sum m ary............................................................................................ 237

6. SUMMARY AND CONCLUSIONS...................... ......................................241

6.1. Sum m ary......................................... ................................................... 241
6.2. Oxide/Silicon Interface Reliability....................................................241
6.3. Oxide Charging and Discharging........................................................243
6.4. Polysilicon/Silicon Interface Reliability.............................................244

R EFEREN CES..................................................................................................246

BIOGRAPHICAL SKETCH...........................................................................253










Abstract of Dissertation Presented to the Graduate School
of the University of Florida in Partial Fulfillment of the
Requirements for the Degree of Doctor of Philosophy

RELIABILITY OF SILICON BIPOLAR JUNCTION
TRANSISTORS IN INTEGRATED CIRCUITS

By

MICHAEL S. CARROLL

December 1995


Chairman: Dr. Almost Neugroschel
Cochairman: Dr. Chih-Tang Sah
Major Department: Electrical and Computer Engineering


The reliability of silicon bipolar junction transistors in integrated circuits is

investigated. The decrease in the common-emitter current gain during bipolar transistor

operation in BiCMOS circuits is analyzed and modeled. The current gain degradation

during reverse-bias stress of the emitter-base junction is found to be the result of

interface trap generation at the oxide/silicon interface and charging of the oxide layer

near the emitter-base junction perimeter by energetic electrons and holes to increase the

base current. A model for interface trap generation based on the rupture of weak

impurity bonds by hot carriers is presented to explain the measured kinetics of the

increase in interface trap density. A surface electron channel after heavy reverse-bias

stress is shown to exist over the quasi-neutral base from positive oxide charging. The

stress voltage thresholds for positive oxide charging are also measured and analyzed.

Accelerated reverse emitter-base bias stress methodologies are presented which

allow for more rapid and accurate determination of bipolar transistor time-to-failure at










low power supply voltages. Hot holes are found to be the primary cause of interface

trap generation for low stress voltages. Significant transistor degradation is measured

for stress voltages as low as 2.5V, indicating bipolar transistor reliability will remain an

important concern in the future.

The base current relaxation transient following reverse emitter-base bias stress is

analyzed and attributed to a decrease of trapped positive charge in the oxide layer near

the emitter-base junction perimeter. The trapped holes in the oxide are modeled to

tunnel from oxide traps to the silicon valence band during base current relaxation. The

relaxation transient is found to occur after a certain delay time. The effects of IB

relaxation are also found to decrease at low stress voltages.

The bipolar transistor reliability during operation at high current densities in the

forward-active mode is investigated. An increase in the current gain is found at

moderate forward emitter-base bias, and this phenomenon is attributed to the passivation

of polysilicon/crystalline-silicon interface traps in the emitter by atomic hydrogen. A

model is presented which explains the measured results in both n/p/n and p/n/p

transistors.
















CHAPTER 1
INTRODUCTION TO BIPOLAR JUNCTION TRANSISTOR RELIABILITY


1.1. Introduction


The bipolar junction transistor (BJT) was invented in 1947 at Bell Telephone

Laboratories to become the first solid-state amplifier. The theory of BJT operation was

first proposed by Shockley in 1949 [1]. In the nearly fifty years following the invention

of the BJT, many improvements have been made in device performance through

extensive work on the optimization of the design and fabrication technology. The

original germanium point contact transistors developed in the late 1940s were replaced

by silicon planar diffused transistors in the early 1960s to allow for cost-effective mass

production and the thin base layers necessary for high-frequency applications [2]. This

led to the first integrated circuits, which were manufactured at Fairchild Semiconductor

Corporation using silicon bipolar transistors, diodes, and resistors [2]. By the early

1980s, the metal oxide semiconductor transistor (MOST) had replaced the BJT in many

digital logic applications, with complementary metal oxide semiconductor (CMOS)

logic gaining widespread use. However, the advent of bipolar-CMOS (BiCMOS) logic

in the mid 1980s suggests BJTs will continue to be important for future VLSI circuit

applications where the superior load capacitance drive of BJTs over MOSTs is

necessary. However, the reliability of submicron, polysilicon-emitter BJTs in integrated










circuits still has several important unresolved issues which must be studied for BiCMOS

and other logic designs to reach their full potential.

The decrease in common-emitter current gain (3F) when the emitter-base junction

of a BJT is reverse biased during circuit operation has been studied extensively since it

was first reported by Collins in 1968 [3-25]. This phenomenon has been determined to

be the limiting factor in BiCMOS circuit reliability in some designs [8], which has

intensified the investigation in recent years. Although a consensus has been reached that

this phenomenon is mainly due to hot carrier degradation of the SiO2/Si interface near

the emitter-base junction, the fundamental mechanisms causing the device degradation

have not been conclusively demonstrated. Several empirical modeling attempts have

had limited success in predicting the BJT OF degradation rate in some cases [8,9,11], but

faster, more accurate, and physically-based methods of determining the reliability of

new BJT technologies are needed for the low-voltage (3.3V and 2.5V), deep-submicron

BiCMOS technologies anticipated in the future.

Operation of polysilicon-emitter BJTs in the normal, forward-active mode at high

current densities has been shown to cause fluctuations in 3F as well as a decrease in the

emitter resistance [26-33]. This reliability issue is expected to become more important

as BJT emitter dimensions continue to decrease and current densities surpass ImA/lim2

or 100kA/cm2. A decrease in PF has been measured on many transistor technologies,

and is modeled to be the result of SiO2/Si interface degradation near the emitter-base

junction [26-29]. An increase in pF during high current density operation has also been

measured in many instances and is attributed to the capture and release of atomic










hydrogen at grain boundaries in the polysilicon emitter contact and at the

polysilicon/silicon interface in the emitter [31-33], by extending the model for boron

acceptor deactivation in p-type silicon developed by Sah [34]. However, only limited

work has been done on the PF instabilities at high current densities, and a detailed

analysis is critical to improve the understanding of this problem.

The reliability issues introduced above will be studied and modeled in this work

in an effort to determine the physical mechanisms involved, improve device time-to-

failure (TTF) extrapolation methods, and evaluate the potential reliability problems at

the low-voltage circuit operation expected in the future. This will serve as an important

step in determining the necessary improvements to submicron BJT designs.

In this introductory chapter, submicron silicon BJT fundamentals for reliability

analysis are presented as a foundation for studying BJT reliability. The important BJT

current components encountered during operation will be characterized, and a model for

trap generation at the SiO2/Si interface from hot carriers will be presented. In Ch.2, the

fundamental PF degradation mechanisms during reverse emitter-base bias stress will be

analyzed and modeled. In Ch.3, two accelerated methods for determining the TTF for

BJTs due to PF degradation during BiCMOS circuit operation will be presented and

demonstrated. This analysis will also determine which degradation mechanisms are the

most important for low-voltage operation in present and future circuits. In Ch.4, the

post reverse-bias stress relaxation transient of the base current in submicron BJTs will

be examined and modeled. In Ch.5, the changes in PF and the emitter resistance










decrease during high current density forward-active operation will be analyzed. Finally,

a summary of this dissertation is given in Ch.6.


1.2. Bipolar Transistor Fabrication


Since the majority of the reliability issues for submicron BJTs have been

attributed to device degradation at the perimeter of the heavily doped emitter-base

junction [3-33], the characteristics of the emitter and base layers in different BJT

designs must be taken into account when attempting to explain the fundamental

degradation mechanisms. Therefore, the design and fabrication steps to form BJTs in

VLSI applications must be examined. Submicron BJTs are generally fabricated using

polysilicon emitter contacts to enable shallow emitter-base junction depths. BJTs which

are to be integrated into BiCMOS circuits may have a fabrication technology which fits

as closely as possible into the standard CMOS processing steps. In this case, the

technology is referred to as CMOS-based BiCMOS process. If a high performance BJT

is integrated into a CMOS process with little change in the BJT design, the technology

is referred to as a bipolar-based BiCMOS process. In both cases, some compromises to

the device designs must be made to allow cost-effective manufacturing. Two designs

have emerged to satisfy this need. The majority of BiCMOS BJTs reported thus far

have consisted of one of these basic designs, possibly with some additional features to

enhance the performance or reliability.

The first design is the self-aligned BJT, which has similar fabrication steps as the

self-aligned MOS transistor. A cross-section of two typical self-aligned polysilicon










emitter bipolar transistors are shown in Fig. 1.1 [35, p.87]. For the single polysilicon

level self-aligned BJT shown in Fig.l.1(a), the p-type intrinsic base is formed by a

boron implant inside an n-type well. A polysilicon layer is then deposited and

implanted with arsenic to form the n+ polysilicon emitter. A nitride layer is deposited

on top of the n+ polysilicon layer. These layers are then patterned to form the active

device area. This is followed by a p+ implant to form the extrinsic base contact. The

base contact is automatically aligned to the active device area, since the polysilicon

emitter contact is used as the implant barrier. The silicon portion of the emitter is

formed by out-diffusion from the n+ polysilicon layer. For the double polysilicon level

self-aligned BJT shown in Fig.l.1(b), a p+ polysilicon layer is used to form the base

contact. A hole is opened in the p+ polysilicon layer to form the active device area. The

n+ polysilicon layer is then added, and the n+ silicon emitter is formed by out-diffusion

from the polysilicon. For both of these processes, sidewall oxide spacers allow for close

alignment of the metal interconnect layers. The collector contact is formed by an n+

implant into the n-type collector layer on the edge of the device. The advantage of the

self-aligned BJT design is that it is easily integrated into a CMOS process and produces

a very compact and high performance transistor design, since the active transistor area is

automatically aligned to the p+ base contact. However, the close proximity of the

highly doped n+ silicon portion of the emitter and the p+ base contact region may

produce a high electric field in this region. This may cause reliability problems in

BiCMOS applications, as will be analyzed in Ch.2. Some processing variations similar















Si02


_ P+ p n+ P


I I\I


n well


p substrate


I I1


n well


p substrate

(b)



Fig.1.1 BJT cross-sections for single polysilicon and double polysilicon self-aligned
processes. Adapted from Alvarez [35, p.87].


P+ jn P+










to the lightly-doped drain technology in MOS transistors have been used to decrease the

electric field in this region [21].

The second design will be referred to as a non self-aligned BJT. A typical cross

section is shown in Fig.1.2 [35, p.88]. In this design the p-type base is formed by a

boron implant in a n-type well, and a p+ base contact is implanted at the edge of the p-

type base. An oxide layer is then grown, and an opening is etched to form the active

transistor area. The emitter polysilicon is then deposited over the oxide opening and the

silicon emitter is formed by out-diffusion from the polysilicon. An n+ collector contact

is implanted into the n-type collector layer on the other side of the active transistor

region from the base contact. This design is not as compact as the self-aligned BJT,

because more tolerance must be left for alignment of the oxide etch and emitter

polysilicon deposition step which forms the active transistor area. Thus, the p-type base

extends a longer distance between the active transistor area and the p+ base contact.

However, this BJT design may require fewer steps to produce than the self-aligned

process. It also does not place the p+ base contact directly next to the n+ emitter

contact. This decreases the electric field in the emitter-base junction and may increase

the reliability of the transistor during operation in BiCMOS circuits.

For each of the designs mentioned above, a substrate n+ collector (sub-collector)

may also be added to the process to improve BJT performance, although this will

increase the complexity of the fabrication due to required epitaxial silicon crystal growth

over the subcollector to form the active device region. The collector technology has not

been found to affect the reliability issues investigated in this work.


















SiOo


LP+
_J_ II


n well


p substrate


Fig.l.2 BJT cross-section for a non self-aligned process. Adapted from Alvarez [35,
p.88].










1.3. Shockley-Read-Hall Recombination Theory


The recombination of electrons and holes in semiconductors determines the

current which flows in p/n junction devices under normal operation. In order to

understand and model BJT operation and reliability, the various recombination

processes which determine the device operation must first be analyzed. The basis for

modeling the recombination kinetics in silicon is the single trap level analysis first

proposed by Shockley and Read [36], which assumes that recombination may be

modeled by a single trap level in the silicon energy gap. The transition rates between

electrons in the conduction band and the traps are the electron capture rate (cn) and

electron emission rate (e ), while the transition rates between holes in the valence band

and the traps are the hole capture rate (Cp) and hole emission rate (ep). The steady-state

rates of electron and hole recombination are then

RN = cNPT eNT (1.1)

and

Rp= pPNT epPT, (1.2)

where N is the density of electrons in the conduction band, P is the density of holes in

the valence band, NT is the density of electrons in traps, and PT is the density of holes in

traps. The quantity NTr is defined as the total number of traps, so PT = NTT NT. It is

assumed that the equilibrium values for cn, cp, en, and ep are good approximations for

the values during steady-state situations. The steady-state rates of electron and hole

recombination are required to be equal such that there is no build-up of charge at the










traps over time. Thus, the electron density in the traps may be found by from Eqs.(1.1)

and (1.2) to be

Nr(eN + e )
N N=(eN + ep) (1.3)
cN + e + + P + e

The result in Eq.(1.3) may be substituted into Eq.(l.1) or Eq.(1.2) to find the net

recombination rate of electrons and holes. For steady-state conditions which are close to

equilibrium, the recombination rate can be further simplified to be

NP n.2
R = 1 (1.4)
(N + N)tp + (P + P1)Cn

where

N = en/c = niexp[(ET' E)/kT] (1.5)

and

P1 = ep/Cp = niexp[(EI ET')/kT]. (1.6)

The quantity ni is the intrinsic electron concentration, ET' is the effective trap energy

which includes trap degeneracy, E1 is the intrinsic Fermi Energy, k is the Boltzmann

constant, and T is the temperature. The quantities =n 1/c NNr and Tp = 1/cpNT are the

steady-state recombination lifetimes of electrons and holes. Eq.(1.4) may be simplified

for the case of n-type silicon where NN >> PN, ni, N1, and P1. In this case, the

recombination rate simplifies to

R = (PN PNo)/tp (1.7)

where PN is the hole concentration in the n-type silicon, and PNo = ni2NN is the

equilibrium hole concentration. Therefore, the recombination rate is found to vary










linearly with the excess minority carrier density in neutral silicon, which is the basis for

Shockley's minority carrier injection theory.


1.4. Shockley Equations for BJT Currents


The important BJT current components for forward-active operation of a n+/p/n

transistor are shown in Fig.l.3. Ideal expressions for these currents were derived by

Shockley in 1949 [1], and a similar analysis is repeated in this section as a foundation

for modeling BJT reliability. The electron current in the base will be examined first.

The forward bias on the emitter-base junction during forward-active operation

establishes an injected minority electron concentration, NB, in the p-type base. At the

edge of the emitter-base space-charge region, x=0g, for low-injection conditions the

injected electron concentration is related to equilibrium electron concentration in the

base, NBO = ni2/NAA, by

NB(OB) = NBo exp(qVBE/kT), (1.8)

where NAA is the p-type base doping concentration, q is the charge of an electron, and

VBE is the forward emitter-base bias. If the collector-base junction is assumed to be

shorted (VcB=0) during normal BJT operation, then

NB(XB) = NB0. (1.9)

The steady-state electron transport in the quasi-neutral base can be approximated by

considering only the diffusion of injected electrons according to the equations

JN = qDBdNB/dx (1.10)















B
OV


1 I,-JB


O JP-r
JN(OB) J((X)


Jc


JE
+---


Jp(OB)


O--
Jp(OE)

emitter


-XE


JN(OE)


OE OB


base


XB Oc


collector


ovC
OV


-. -p


Fig. 1.3 Schematic diagram of a BJT showing the important current densities which
contribute to the emitter current, base current, and collector current in
forward-active operation. Solid dots represent electrons in the conduction
band and circles represent holes in the valence band. Adapted from Sah [42,
p.833].


-VBE
E


JN(OC)










dJN/dx = RN = q(NB(X) NBO)/B, (1.11)

where the recombination rate in the quasi-neutral base is assumed to vary linearly with

the excess injected electron concentration, Ng NBO, as demonstrated in Eq.(1.7). The

quantity Dg is the electron diffusivity in the base, and tB is the electron lifetime in the

base. The solution to Eqs. (1.10) and (1.11) using the boundary conditions in Eq.(1.8)

and (1.9) is

sinh[(XB x)/LB
NB(x) NBO = NBO[exp(qVBE/kT)- 1] B (1.12)


where LB = (DBgB)0.5 is the electron diffusion length in the base. The electron currents

in the base at the edges the emitter-base and collector-base space-charge regions, x=OB

and x=XB, are found to be

JN(B) = (qNBoDB/LB) [exp(qVBE/kT) 1] ctnh(XB/LB) (1.13)
and

JN(XB) = (qNBODB/LB) [exp(qVBE/kT) 1] csch(XB/LB) (1.14)

by substituting Eq.(1.12) into Eq.(1.lO). The difference of JN(0B) JN(XB) is the

electron current lost to recombination in the base as electrons diffuse from x=OB to

x=XB. An equal hole current must flow into the base to compensate for the holes which

recombine with the electrons. Therefore, the hole current due to carrier recombination

in the base is

[ cosh(XB/LB) 1
JP-r = (qNBoD/L)[exp(qVBE/kT) 1] (1.15)
sinh(X BlL B)










The injection of holes into the emitter from the p-type base by the forward-biased

emitter-base junction also occurs in BJTs. This is the major component of base current,

Ig, in most current BJT designs before aging. The density of injected holes in the

emitter at the edge of the emitter-base space-charge region, x=0E, is

PE(0E) = PEO exp(qVBE/kT), (1.16)

where PEO = ni2/NDD is the equilibrium hole concentration in the emitter, and NDD is the

emitter doping concentration. The concentration of holes at the emitter contact, x=-XE,

generally depends on the contact recombination velocity, SE, for typical submicron

transistors with shallow emitter layers and polysilicon emitter contacts. The

recombination rate of holes at the emitter contact can be modeled to vary linearly with

the excess hole concentration in the emitter at the silicon surface, PE(-XE) PEO, such

that

RP(-XE) = SE[PE(-XE) PEO] (1.17)

The recombination rate of holes at x=-XE, Rp(-XE), must also be equal to the minority

carrier hole current at x=-XE. Therefore,

-JP(-XE) = SE[PE(-XE) PEO' (1.18)

The hole transport in the emitter layer is governed by diffusion such that

dJp/dx = -q(PE(x) PEO)/tE, (1.19)

where TE is the hole lifetime in the emitter. The solution of Eq.(1.19) evaluated at x=0E

with the boundary conditions in Eqs.(1.16) and (1.18) is [37]


LE/tEsinh(XE/LE) + SECosh(XE/LE)
Jp(E) = qP[exp(qVBE/kT)- 1] + (SEE/DE)(XE/E (1.20)
E O BE cosh(XE/LE) + (SELE/DE)sinh(XE/LE)










where LE = (DETE)0.5 is the hole lifetime in the emitter, and DE is the electron diffusivity

in the emitter. Thus, the hole current injected into the emitter is found to have the same

dependence on VBE as the injected electron current in the base, although the dependence

on SE in the emitter makes the expression in Eq.(1.20) more complicated.

The current in the collector layer is dominated by the current from electrons

which are injected from the emitter into the base and reach the collector-base space-

charge region, JN(XB), which was derived in Eq.(1.14). The collector current, Ic, may

be approximated by multiplying Eq.(1.14) by the emitter area, AE, if interband impact

generation in the collector-base junction space-charge region is negligible. Therefore,

Ic = (qAEni2DB/NAAL-) [exp(qVBE/kT) 1] csch(XB/LB). (1.21)

The base current, Ig, is the sum of the hole current injected into the emitter from the

base plus the hole current which flows into the base to compensate for recombination of

injected electrons. Therefore, Ig is the sum of the currents in Eq.(1.20) and Eq.(1.15).

However, in devices with very short base layer thicknesses, the hole current injected into

the emitter will dominate Ig' So,


S LE/Esinh(XE/LE) + SEcosh(XE/LE)
IB--(qAEni2/ND)[exp(qVBE/kT)- 1] .C +(- E-E E) (1.22)
B 1 DD cosh(XE/LE) + (SELE/DE)sinh(XE/LE)


The emitter current, IE, is simply the sum of the Ic and Ig. An important conclusion

from the above analysis is that the ideal components of Ig and Ic will both be

proportional to exp(qVBE/kT) for forward emitter-base biases. However, the ideal

Shockley BJT equations are not adequate to completely describe device operation, since











the generation and recombination currents associated with the emitter-base and

collector-base space-charge regions are ignored.


1.5. Sah-Noyce-Shockley Recombination Current


The ideal BJT current equations derived in the last section assume that

recombination in the space-charge region of the emitter-base junction is negligible

during forward-active operation compared to the injection of electrons from the emitter

into the base and the recombination of carriers in the quasi-neutral layers. This may not

be the case in some transistors, and the base current associated with carrier

recombination in the emitter-base space-charge region, or Sah-Noyce-Shockley current,

may be quite important. The increase of the base current due to surface recombination

at the SiO2/Si interface has been found to be an important reliability concern in BJTs [3-

31]. The recombination kinetics for a single trap level derived by Shockley, Read, and

Hall can be extended to provide an analysis of recombination in the space-charge region

of a forward-biased p/n junction. This was first done by Sah, Noyce, and Shockley in

1957 [38]. Since the assumptions leading to the linear dependence of the recombination

rate on excess minority carrier density in Eq.(1.7) are not valid in the space-charge

region of a p/n junction, a more detailed analysis must be performed. The electron and

hole distributions vs. energy assuming a Boltzmann distribution are

N = nexp[(FN EI)/kT] (1.23)

and


P = niexp[(E Fp)/kT],


(1.24)










where FN and Fp are the electron and hole quasi-Fermi energies. Eqs.(1.5), (1.6), (1.23),

and (1.24) can be substituted into Eq.(1.4) to obtain an approximate steady-state

recombination rate in terms of the carrier steady-state lifetimes, the intrinsic Fermi

energy, and quasi-Fermi energies. If n = Tp = r, Eq.(1.4) becomes

^_R = (n/t) sinh[(FN Fp)/2kT] (1
R = (1.25)
cosh[(Ei FNp)/kT] + exp[(Fp FN)/2kT] cosh[(ET' EI)/kT]

where FNP=(FN + Fp)/2 is the average of the electron and hole quasi-Fermi energies.

The current due to recombination in the emitter-base space-charge region is

X EB
JSNS = q Rdx, (1.26)


where XEB is the space-charge region thickness. An analysis of Eq.(1.25) demonstrates

that the recombination rate in the junction space-charge region depends nearly

exponentially on three quantities: (1) the difference of the electron and hole quasi-

Fermi levels in the space-charge region or approximately the emitter-base junction

voltage, VBE; (2) the energy difference between the intrinsic Fermi level, EI, and the

average of the quasi-Fermi levels, FNP; and (3) the energy separation between the trap

level, ET, and the intrinsic Fermi level, E1. Therefore, for a fairly uniform trap density

spatially and vs. energy in the silicon energy gap, the maximum recombination rate will

occur for traps near midgap at the point in the space-charge region where the average of

the two quasi-Fermi levels is also near midgap. This is illustrated in Fig. 1.4, where the

maximum recombination point is shown by a solid dot. The total recombination current

in Eq.(1.26) may be approximated by integrating only over the shaded area in Fig.l.4,

since this is where the majority of the recombination takes place. The approximate















n+ Si


pSi


-VBE
E -


vB
ov


Fig.1.4 Energy band diagram for the emitter-base junction of a BJT showing the
maximum recombination point (solid dot) in the emitter-base space charge
region according to Eq.(1.25) with T = T'. The Sah-Noyce-Shockley current
may be approximated by assuming recombination dominates in the narrow
shaded region near this point. Adapted from Sah et al. [38].










thickness of this recombination region, XR, may be found by calculating the length of

the space-charge region where IEI FNPI < 3kT. For IE, FNpI > 3kT, the

recombination rate has decreased by a factor of ten from the maximum.

Carrier recombination in the emitter-base space-charge region of a BJT will

increase IB, as holes are required to flow into the space-charge region to maintain the

steady-state concentration. In most BJTs, the component of IB due to Sah-Noyce-

Shockley recombination current is dominated by surface recombination at the SiO2/Si

interface. This is because the density of traps at the Si/SiO2 interface, NIT, is usually

much larger than the density of traps in the bulk silicon. Energetic carriers are also

known to increase NIT through impact bond-breaking processes. Therefore, the surface

Sah-Noyce-Shockley Ig component produces many of the instability problems

associated with BJTs. An approximate expression for this recombination current may

be obtained by assuming that the current is dominated by recombination in the effective

recombination region, XR. The interface traps near midgap are assumed to dominate the

recombination current. If SN = Sp = SO is the recombination velocity of the interface

traps at the maximum recombination point, then Eq.(1.26) becomes [38]

IB-SNs = (qARniSo) [exp(qVBE/2kT) 1] (1.27)

The quantity AR = PEXR is the effective surface recombination area, and PE is the

emitter-base junction perimeter. The recombination velocity and, consequently, IB-SNs

is directly proportional to the density of interface traps, NIT, through the relation So =

0.5qni7rCOthNI [39]. Another important point from the above analysis is that the Sah-

Noyce-Shockley surface recombination component of Ig is proportional to










exp(qVBE/2kT), while the IB components due to recombination in the quasi-neutral base

or emitter were shown to be proportional to exp(qVBE/kT) in the last section. Therefore,

the two Ig components may be distinguished by the measured reciprocal slope factor, n,

of the base current, where IB cc exp(qVBE/nkT). The reciprocal slope factor will be

n=1.0 when IB is dominated by recombination in the quasi-neutral layers, and n=2 when

IB is dominated by recombination in the emitter-base space-charge region.


1.6. Surface Trap-Assisted Tunneling Current


The injection of electrons from the emitter to the base during forward-active BJT

operation and the recombination of these injected electrons in the quasi-neutral base and

emitter and in the emitter-base space-charge region have been analyzed in the previous

two sections. The recombination processes examined so far involved electron and hole

capture and emission at traps in the silicon energy gap based on Shockley-Read-Hall

processes. Another possible recombination process involves quantum mechanical

tunneling of electrons from the conduction band in the emitter to traps in the energy gap

in the emitter-base space-charge region, as shown in Fig. 1.5. A hole is then captured at

the trap to complete the two-step process. Another possible process involves holes in

the valence band of the base tunneling to traps in the energy gap followed by electron

capture. These two-step tunneling processes were analyzed in detail by Sah in 1961 [40]

to explain the excess current in gold-doped tunneling diodes. Very similar processes

may occur at the SiO2/Si interface in the emitter-base junction, although the interface

traps are distributed throughout the silicon energy gap. Surface trap-assisted tunneling















p Si
n+ Si x) V=-q(Vbi VBE)
-VBE F NE
Ec

IB-T
-- .. .. .. Fv --OB
Ev OV
Ev

0 Xt XEB












Fig. 1.5 Energy band diagram for the emitter-base junction of a BJT showing the trap-
assisted tunneling process during forward bias. The electron tunneling
potential barrier from the conduction band in the emitter to the trap (triangle)
is shown by the shaded region. The average electron tunneling distance is
labeled x,. Adapted from Sah [40].










currents were identified in submicron self-aligned BJTs by Li et al. [41]. If the

tunneling event is the rate limiting step in the two-step tunneling process, then the

current due to trap-assisted tunneling will have different characteristics than the

recombination currents based on Shockley-Read-Hall processes.

The probability for an electron to tunnel from the conduction band in the emitter

to a trap in the emitter-base space-charge region is determined by the potential barrier

between the conduction band in the emitter and the trap, which is shaded in Fig.1.5.

The approximate potential barrier shape may be calculated for an abrupt, one-sided

junction, which is a valid approximation of the emitter-base junction in submicron BJTs.

The potential energy, V, vs. position in the emitter-base space-charge region using the

depletion approximation is found by applying Gauss's Law and integrating twice to get

[42, p.412]

V(x) = -[2qNAA(Vbi VBE)/Si]0.5x + (qNA/2esi)x2, (1.28)

where NAA is the base acceptor impurity concentration, Vbi is the junction built-in

voltage, esi is the silicon permittivity, and x is distance perpendicular to the emitter-base

junction from the emitter edge of the space-charge region. The potential energy is set to

zero at the emitter edge of the space-charge region (x=0), and V = -q(Vbi VBE) at the

base edge of the space-charge region (x=XEB). Since the emitter-base space-charge

region width is

XEB = [2Esi(Vbi VBE)/qNAA0.5, (1.29)

Equation (1.28) may rewritten as

V(x) = -2(Vbi VBE)(x/XEB) + (Vbi VBE)(x/XEB)2. (1.30)










The electron tunneling probability through the potential barrier described by Eq.(1.30)

may be approximated by [42, p.64]


T=exp [-2 (x)dx (1.31)


where

a(x) = {2mx[V(x) E] }o05/h. (1.32)

In Eq.(1.32), E is the electron kinetic energy, mx is the electron effective mass in the

tunneling direction, and fi = h/2ic is the normalized Planck constant. The limits of the

integration in Eq.(1.31) are from x=0 to x=xt, where xt is the average tunneling distance

for electrons as shown Fig. 1.5. The current due to the tunneling-limited recombination

pathway may be approximated by assuming that the tunneling step is rate limiting. This

means the traps involved in the tunneling of electrons may be considered to be mostly

empty since the hole capture event occurs much faster than the electron tunneling step.

Therefore, calculating only the tunneling rate of electrons from the conduction band to

traps in the energy gap will allow the tunneling-limited recombination current to be

approximated. Only the traps in the energy gap at energies slightly greater than the

bottom edge of the conduction band in the emitter are assumed important, as this is

where the electron density in the conduction band is largest. Since most of the tunneling

electrons have low kinetic energy, E is small in Eq.(1.32) compared to the tunneling

potential barrier height. Equation (1.30) may be substituted into Eq.(1.32) and

integrated in closed form in Eq.(1.31) to produce

T = exp[-2(2mx/h2)05 t(Vbi VBE)0.XEBI, (1.33)










where

yt = 0.5[(xt/XEB) 1][(2xt/XEB) (x/XEB)2]05 + 0.5arcsin[l (x/XEB)]. (1.34)

The quantity yt depends on the average tunneling distance from the emitter edge of the

space-charge region to the trap, xt, in relation to XEB. A constant ratio of xt/XEB is

assumed to allow yt to be independent of VBE and simplify Eq.(1.33). Equation (1.29)

may also be substituted into Eq.(1.33) to yield

T = exp[-4(mxesi/i2NA)0.5 t(Vbi VBE)] = exp[-(Vb, VBE)/VT]. (1.35)

The surface trap-assisted tunneling current is found by integrating the tunneling

probability over the initial and final electron density of states. The initial and final

density of states are assumed not to vary significantly with VBE, which makes the

tunneling current proportional to the tunneling probability such that

IB-Ts B-T exp[(VBE Vbi)/VT], (1.36)

where IB-TO and VT are constants. Equation (1.36) will be used in Ch.2 to model the

measured surface trap-assisted tunneling current. The value of VT found during least-

square fit to the data may be used to calculate the approximate average tunneling

distance for electrons. The constant IB-TO will directly depend on the interface trap

density in the emitter-base space-charge region and the electron density in the emitter

near the space-charge region. The density of available traps in the space-charge region

for tunneling will most likely vary as VBE is changed, since NIT is known to vary with

energy in the silicon energy gap. This may cause some small deviations of the measured

current from Eq.(1.36), and may also provide information on the variation of NI with

energy in the top portion of the energy gap.










1.7. Reverse-Bias Current in the Emitter-Base Junction


The leakage current which flows in the n+/p emitter-base junction of submicron

BJTs during reverse-bias is known to be an important cause of OF degradation [8,9,11].

Therefore, the source of the reverse-bias emitter-base junction current must be analyzed

to understand BJT Fp degradation. For the heavily doped n+/p junctions in submicron

BJTs, the major source of reverse-bias current for junction voltages below breakdown is

the interband tunneling of electrons from the valence band in the emitter-base space

charge region to the emitter conduction band. This is shown in Fig.1.6, where the

valence-band electrons are indicated by solid dots surrounded by circles. This notation

emphasizes that the tunneling process leaves behind holes in the valence band of the

space-charge region as electrons tunnel to the emitter conduction band. The tunneling

process may be direct, phonon-assisted, or trap-assisted. Two trap-assisted tunneling

pathways are also shown in Fig.1.6. The tunneling probability for the direct or phonon-

assisted pathways for electrons in a reverse-biased p/n junction may be approximated by

assuming a triangular potential barrier at the point in the junction where the tunneling

rate is maximum, which is near the emitter edge of the space-charge region. This

tunneling barrier is shaded in Fig.1.6. The tunneling probability is [42, p.65]


4(2mx)o.5E 1"5
T = exp 4- (2X)5EG ,1 (1.37)
3qhE


where mx is the tunneling electron effective mass in the direction from base to emitter,

EG is the silicon energy gap which determines the height of the triangular potential

tunneling barrier, and E is the electric field in the emitter-base space-charge region near













secondary
electron


p Si


*B
OV


impact generation


(T)
interband tunneling
(direct or phonon-assisted)


Fig. 1.6 Energy band diagram for the emitter-base junction of a BJT during reverse-
bias showing the tunneling (direct or phonon-assisted) and trap-assisted
tunneling pathways. The shaded area represents the electron tunneling
potential barrier from the valence band in the emitter-base space-charge region
to the conduction band in the emitter. Interband impact generation and
thermal generation are also shown. Adapted from Neugroschel, et al. [24].


n+ Si


+VEB
E-,










the emitter which determines the slope of the triangular potential barrier. The tunneling

current is found by integrating the tunneling probability over initial and final electron

states. Since the tunneling probability is an exponential function of the electric field, the

tunneling rate is dominant at the highest electric field point in the emitter-base space-

charge region. Therefore, current may be approximated as being proportional to the

tunneling probability at this point. This gives an emitter current of

IE = IE exp(-Vo/E), (1.38)

where IEO and Vo are constants. The value of Vo may be calculated approximately from

the electric field, silicon energy gap, and effective mass. The maximum electric field in

the space-charge region of a one-sided junction may be written as

Emax = Eo(Vbi + VEB),n (1.39)

where Eo is the maximum electric field at equilibrium and n is a constant. For an abrupt

junction n will be approximately 0.5. By assuming the tunneling current is dominated

near the point in the space-charge region where the electric field is Emax, the tunneling

current in Eq.(1.38) may be rewritten as

IE = IE exp[-Vl/(Vbi + VEB)]. (1.40)

A least square fit may be performed on the measured reverse emitter current to find IEO'

V1, Vbi, and n in Eq.(1.40). For the submicron BJTs measured in this work the value for

n has been consistently found to be close to 0.5, indicating the one-sided, abrupt

junction approximation made in this and the last section is valid for evaluating the

tunneling currents.










The holes left behind in the emitter-base space charge region may create

additional electron-hole pairs through interband impact generation (or avalanche

multiplication) if the holes attain sufficient kinetic energy. This is shown in Fig.l.6.

This process is important only at relatively high VEB, where the carriers in the emitter-

base space-charge region are accelerated to high kinetic energy. The secondary

electrons generated through the impact generation may also create additional electron-

hole pairs, and junction breakdown is achieved when the impact-generation efficiency

approaches unity. Current in the emitter-base junction is also produced from thermal

generation of electron-hole pairs, but this current is found to be negligible in submicron

BJTs compared to the tunneling and interband impact generation currents.


1.8. Analysis of Base and Collector Currents


A schematic diagram of a n+/p/n BJT is shown in Fig.1.7. The desired current

flow for forward-active operation consisting of electrons from the emitter being injected

by the forward-biased emitter-base junction into the base and collected by the shorted or

reverse-biased collector-base junction into the collector is labeled as the collector

current, Ic. The collector current is affected by the intrinsic transistor area, the base

doping concentration, and by generation of electron-hole pairs in the collector-base

junction, but will generally be expected to remain stable during normal device operation.

The base current, Ig, consists of holes from the p-type base which recombine with

electrons in the base, emitter, or emitter-base space-charge region. These recombination

mechanisms were analyzed in sections 1.4 and 1.5. Several of these recombination












































Fig.l.7 Schematic diagram of a BJT showing the various recombination processes
which contribute to the base current along with the desired electron current
flow from emitter to collector. The diamonds are bulk silicon traps and the
triangles are interface traps at the SiO2/Si or polysilicon/Si interfaces. The
tunneling limited recombination current is not shown. Adapted from
Neugroschel and Sah [22].
















n+ Si it p Si Ec
-VBE FN
E e E cT
B-1Bs
B-Ts IB-2s B



Ev 0-0















Fig.1.8 Energy band diagram showing the recombination processes in the emitter,
base, and emitter-base space charge region along the silicon surface. The
triangles represent interface traps at the SiO2/Si or polysilicon/Si interfaces.
Adapted from Sah et al. [38].










pathways are illustrated in Fig.1.7 for recombination at either bulk silicon traps

(diamonds) or surface traps at the interface between the silicon and oxide or polysilicon

layers (triangles). Bulk traps are created during crystal growth or device fabrication and

are either due to crystal defects or impurity atoms. Their density is not expected to be

affected by device operation since high temperature or particles with very large kinetic

energy are required to alter the impurity atom concentration or create additional crystal

defects. However, the density of interface traps may increase substantially during

device operation if carriers are accelerated to kinetic energies on the order of several

electron-volts in the vicinity of the interface. Therefore, the base current components

due to surface recombination may change during device operation and cause reliability

problems. In Ch.2, the increase in IB2s will be shown to cause a decrease in pF during

BJT operation in BiCMOS circuits. In Ch.5, the decrease in IB-1Es will be shown to

increase OF during operation at high current density.

The location of the recombination is used to differentiate the recombination

pathways in Fig.1.7. The IB-2s component is due to surface Sah-Noyce-Shockley

recombination in the emitter-base space-charge region with reciprocal slope factor n=2.

The IB-lEb and IB-1Bb are the bulk recombination components of Ig in the quasi-neutral

Emitter and Base with reciprocal slope factor n=l. The surface recombination

components of the base current along with the surface trap-assisted tunneling current,

IB-Ts, are also shown in the energy band diagram in Fig.l.8.










1.9. Theory of Hot-Carrier Oxide-Silicon Interface Trap Generation


It is well known that the increase of Ig and decrease of OF during reverse emitter-

base bias stress is due to an increase in the surface Sah-Noyce-Shockley current as NIT

increases [3-25]. It has been proposed that the breaking of Si-H interface bonds by hot

carriers may be the dominant interface trap generation mechanism for some transistor

technologies. Under this assumption, a model for interface trap generation may be

constructed. This was first done by Hu et al. [43], but many of the details of the model

were not investigated. Thus, a similar model is presented here for use in Ch.2. A

schematic diagram of the model presented here is shown in Fig.1.9. Interface traps are

assumed to be created or passivated through the reaction

Si-H Si- + H, (1.41)

where Si- is a broken Si-H bond or interface trap. The quantity H is the atomic

hydrogen concentration near the SiO2/Si interface. The energy for the reaction to

proceed from left to right (generation or increase of NIT) is provided by hot carriers.

The reaction will also proceed from right to left (passivation or reduction of NIT) if there

is sufficient atomic hydrogen near the interface. The rate equation for the net NIT

generation may be written as

dNIT/dt eH(NB NIT) CHNITHI (1.42)

if a first order reaction is assumed. The rate coefficients for NIT generation and

passivation are eH and cH, and Nm is the density of Si-H interface bonds which may be

broken by hot carriers. The hot carrier density and kinetic energy will directly affect eH











































Fig.1.9 Schematic diagram of the model for SiO2/Si interface trap generation
presented in this chapter. The circled H symbols represent atomic hydrogen
which is emitted and captured at interface traps. The triangles represent
interface traps which are initially passivated by the atomic hydrogen in the
unstressed device. The model is similar to that proposed by Hu et al. [43].










and the rate of NIT generation. The quantity HI is the effective areal hydrogen

concentration near the interface which is defined as

xI
H = Hdx = H(0)XI, (1.43)


where H(0) is the hydrogen concentration very near the SiO2/Si interface, and XI is the

width of the SiO2/Si interface region. For low NIT and HI, the NIT generation process

will be dominant and Eq.(1.42) can be approximated as

NIT = eHNIt. (1.44)

This suggests that if NIT and HI are low at the start of the reverse-bias stress, then the

rate of NIT generation will be proportional to the stress time. As interface traps are

created during the rupture of Si-H bonds, the density of hydrogen also increases near the

interface. In general, HI depends on the rate of interface trap generation and the rate of

hydrogen diffusion away from the interface. This may be modeled by the rate equation

dH/dt = dN,,/dt DHH(O)/Xo, (1.45)

where DH is the hydrogen diffusivity, and Xo is the oxide layer thickness. In Eq.(1.45),

the atomic hydrogen density is assumed to have a linear gradient in the oxide layer as

shown in Fig.l.10. The hydrogen concentration is assumed to be small compared to

H(0) at the top of the oxide layer where the polysilicon emitter overlap acts as a

hydrogen sink. Eq.(1.45) may be rewritten as

dHi/dt = dNr/dt (DH/XIXo)HI (1.46)

A general solution for NIT from Eqs.(1.42) and (1.46) is difficult to obtain analytically.

However, the following discussion lends some insight into the form of the solution. As










H(0)


cO?
I
E JH= DHH(O)/Xo
0


"I-



H(X)-
I I
o0X1 X /(1cm)



Si SiO2 polysilicon






Fig.1.10 The linear atomic hydrogen concentration gradient in the oxide layer which is
assumed in Eq.(1.45). The hydrogen flux away from the SiO2/Si interface is
JH = DH[H(0) H(Xo)]/Xo = DHH(O)/Xo, since H(0)>>H(Xo).










HI builds up, the rates of generation and passivation of NIT will eventually become

nearly equal, and dNIT/dt and dH/dt will drop to zero if HI remains unchanged. At this

point, the NIT generation is limited by the hydrogen diffusion from the interface. In this

case, the rate of interface trap generation would be equal to the rate of hydrogen

diffusion from the interface, or

dNiT/dt = (DH/XIX)HI. (1.47)

By substituting Eq.(1.47) into Eq.(1.42) and integrating over time, Eq.(1.42) becomes

NIT + (cHXIX2DH)NIT2 = eHNBt, (1.48)

where it is assumed that NIT << NIB. According to Eq.(1.48), the kinetics of NIT

generation would be expected to follow a power law dependence, or NIT o tm, where m

ranges between 1.0 at short stress times and 0.5 at long stress times. Eventually, as NIT

approaches Ng, the NIT generation rate drops to zero, because there are very few weak

interface bonds left to be broken.

A general solution to Eqs.(1.42) and (1.46) may be approximated by converting

the differential equations to difference equations using the Euler approximation. For

simplicity, the initial NIT and HI concentrations are assumed to be negligible, and Nm is

assumed to be much larger than NIT. The results of the general solution for NIT and HI

vs. stress time are shown in Fig. 1.11 for three different hydrogen diffusion rates. For all

of the curves in Fig. .11, the initial rates of NIT and HI generation are proportional to the

stress time, or have a slope of m=1.0 when plotted on logarithmic axes. For low

hydrogen diffusion rate (low DH/XIXo), the NIT generation and passivation rates

eventually become comparable. Therefore, dNIT/dt and dHi/dt drop to nearly zero. At









1012-
--large DH/XIXo NIT oc to- --
-moderate DH/XXo .
0^ 1011- --- small DH/XIXO
C' '
E "
S1010 --


Fig.1 To9 x t g a s

: 10 ""
Z 10a
NIT c HI oc t,
HI cc-t0.5

107 I I
10-1 1 10 102 103 104

t/(ls)






Fig. 1.11 The approximate general solution for the time dependence of the interface trap
density (NIT, top three curves) and atomic hydrogen concentration at the
interface (HI, bottom three curves) from Eqs.(1.42) and (1.46) is calculated
using the Euler approximation. Three different hydrogen diffusion rates are
shown to demonstrate the effect on NIT and HI. For moderate to high
diffusion rate, the NIT curve is proportional to tm, where m varies between 1.0
and 0.5.










longer time, the hydrogen finally starts to diffuse from the interface, and NIT and HI are

both proportional to t0.5. For the moderate and large hydrogen diffusion rates, the

hydrogen begins to diffuse away from the interface before the NIT generation and

passivation rates become comparable. Therefore, the NIT curves show a smooth

transition from m=1.0 to m=0.5 for NIT, as suggested by the approximate solution in

Eq.(1.48). As shown in Fig.l.12, the approximate solution for NIT in Eq.(1.48) is an

excellent approximation of the calculated general solution for NIT for moderate and high

hydrogen diffusion rates when NIB >> NIT. Only for the low hydrogen diffusion rate

does Eq.(1.48) deviate from the general solution for NIT. If the assumption that NI >>

NIT is removed, then the calculated general solution to NIT shows a drop in dNIT1dt

when NIT approaches Nm, as shown in Fig.l.13. However, Eq.(1.48) does not account

for the drop in the NIT generation rate as NIT approaches NB. Thus, an extra term must

be included in the right side of Eq.(1.48) to give

t
NI + (cHXIXo2DH)NIT2 = eHN H Ndt, (1.49)


which is solved to yield

-1 + 1 + (2cHXIX/DH)(eI eH NTdt) 0.5
N = .(1.50)
r CHXIXoDH

The solution for NIT in Eq.(1.50) may be approximated by calculating NIT over a

number of points and using a summation of NIT over time to approximate the integral.

In Fig. 1.13 it is demonstrated that the solution for NIT from Eq.(1.50) is an excellent

approximation, even when NIT approaches NIB. The advantage using Eq.(1.50) rather














C'J
E
0

z


10-1 1 10 102 103


t/(ls)






Fig.1.12 The calculated general solution for NIT from Eqs.(1.42) and (1.46) is
compared to the approximate result for NIT from Eq.(1.48) for three different
hydrogen diffusion rates. For the moderate and large hydrogen rates,
Eq.(1.48) is shown to provide an excellent approximation of NIT if NIB >>
NIT.


104












10"
u general solution for NIT


E 1010- Eq.(1.50)


109


108


107
10-1 1 10 102 103 104

t /(s)






Fig.1.13 The calculated general solution for NIT from Eqs.(1.42) and (1.46) is
compared to the approximate computed result for N from Eq.(1.50). The
total number of interface bonds, NIB, is set to 101cm-2 to illustrate the
saturation of NIT at long stress time. The result for NIT from Eq.(1.50) is
shown to be an excellent approximation of NIT, even when NIT approaches
NIB










than calculating the general solution for NIT from Eqs.(1.42) and (1.46) is that a much

larger At may be used between the calculated NIT points in Eq.(1.50), which reduces

computing time significantly. The integral in Eq.(1.50) does not become important in

the solution for NIT until NIT becomes comparable to NIB. In Fig. 1.13, NIT from

Eq.(1.50) is calculated at 500 points to maintain a good approximation of the integral,

whereas a minimum of 105 points (maximum At of 0. ls) is required when solving for

the general solution for NIT. Although the theoretical analysis of NIT generation in this

section assumes that broken Si-H bonds are the major cause of NIT, the same analysis

may also be applied to other impurity interface bonds using the same rate equations.


1.10. Bipolar Transistor Self-Heating


When BJTs operate at high current densities, the energy losses of carriers through

phonon scattering may locally heat the silicon crystal to temperatures much higher than

the ambient temperature [44]. This is known as transistor self-heating. The amount of

the temperature increase of the device above the ambient temperature, AT, is related to

the total power dissipation, P, by

AT = RhP, (1.51)

where Rth is the thermal resistance of the device. Therefore, the key to predicting the

magnitude of the self-heating in BJTs is to measure Rth-

A measurement procedure which is useful for extracting the approximate Rth is to

measure IB vs. reverse collector-base bias, VCB [45]. If Ig is dominated by

recombination in the emitter, and VcB is well below collector-base junction breakdown,










then the measured increase in Ig as VCB is increased is strictly due to device self-heating

and is an accurate measurement of the change in device temperature. This measurement

is demonstrated in Fig.l.14 for a 0.81pm x 3.2ptm BJT at VBE=0.64V and an ambient

temperature of 1500C. The data in Fig.1.14 is replotted vs. P in Fig. 1.15, where

P =IcVCE (1.52)

Eq.(1.52) is valid for forward-bias VBE in the low to moderate range where resistive

power losses in the device contacts are negligible, and the majority of the self-heating is

due to phonon scattering in the reverse-biased collector-base junction. For submicron

transistors, it may be difficult to measure significant self-heating without raising VBE to

large values at room temperature. Thus, the measurement is performed at elevated

ambient temperature to solve this problem. Since Ig is an exponential function of device

temperature and is not a function of VCB for voltages well below junction breakdown

[45],

a(AIB/IB)/aP = Rth (ln[IB])/T. (1.53)

Thus, Rt may be solved to be

Rt = [(kT2)/(EG qVBE)][(AIB/IB)/P], (1.54)

where EG is the silicon energy gap. The value of Rth is obtained from the slope of the

curve in Fig.l.15, and is found to be Rth=0.95K/mW.

In Ch.5, the transistor self-heating must be calculated for very large values of

VBE, where the transistor current is limited by the emitter series resistance rather than

minority carrier injection. In this case, the power dissipation is

P = IEAVBEO + IC(VCE AVBEO) (1.55)






43


1.66
T=150C
1.65- VBE=0.64V

1.64-
(CD
1.63-

._ 1.62-

1.61

1.60 I I
0 1 2 3 4

VBC /(1 V)





Fig.1.14 The base current vs. reverse collector-base bias at 1500C and forward emitter-
base bias of VBE=0.64V. The increase in IB is caused by transistor self-
heating as the power dissipation increases.

















m 0.01 a(AIB/IB)/P = 0.028mW-'

0.0 -



-0.01
0 1 2

P/(1 mW)






Fig.1.15 The percent change of the base current vs. transistor power dissipation at
1500C and VBE=0.64V. The slope of the curve is found to be 0.028mW-,
which yields Rt=0.95K/mW from Eq.(1.54). This measurement technique is
from Reisch [45].










where AVBEO is the voltage drop in the emitter contact. Eq.(1.55) is approximately

equal to Eq.(1.52) if IE = IC.


1.11. Summary


The background necessary for the analysis of BJT reliability in the subsequent

chapters of this dissertation was given. An introduction to the common fabrication

procedures was given in section 1.2. In the next four sections, theoretical expressions

for the measured transistor currents during forward-active operation were presented. In

section 1.7, the reverse-bias leakage current in the emitter-base junction was examined.

A model for trap generation at the SiO/Si interface from the rupture of Si-H bonds was

presented in section 1.9. Finally, transistor self-heating was analyzed in section 1.10.
















CHAPTER 2
PHYSICAL DEGRADATION MECHANISMS OF
SILICON BIPOLAR JUNCTION TRANSISTORS
DURING REVERSE EMITTER-BASE BIAS STRESS


2.1. Introduction


It has been known since the 1960s that the electrical characteristics of oxide

passivated silicon bipolar junction transistors (BJTs) change during operation. A

reduction of the common-emitter current gain (3F or hFE) due to an increase of the

transistor base current, Ig, during an application of reverse emitter-base bias to near the

junction breakdown voltage was first reported by Collins [3,4] in 1968. He performed

reverse-bias stress experiments at various current levels and temperatures and proposed

that degradation of the SiO2/Si interface near the emitter-base junction was the probable

cause of the pF decrease. He also demonstrated that junction breakdown was not

necessary for PF degradation and found no significant temperature dependence of the

degradation rate. Additional studies were performed by Verwey [5] in 1969 and

McDonald [6] in 1970. The increase in Ig was attributed to an increase in the surface

recombination velocity at the SiO2/Si interface at the emitter-base junction perimeter

and charge injection into the oxide. The increase in the surface recombination is caused

by the breaking of interface bonds by hot electrons and holes generated during the

reverse-bias stress to increase the interface trap density, NIT. Experiments with a field










gate over the emitter-base junction [5,6] showed that both electrons and holes can be

injected and trapped in the oxide, depending on the polarity of the gate voltage applied

during the stress. These experiments also showed that the stress-induced excess base

current, AIB, was a function of the silicon surface potential. The gate-controlled BJT

was first described by Sah [46] who studied the base current mechanisms in detail [47].

The gate-base voltage controls the surface potential and recombination rate at the

surface of the emitter-base space-charge region as well as the size of the induced surface

channel in the quasi-neutral base, and thus controls the BJT base current and pF [47,48].

A principle result obtained by Sah was that if a surface channel is induced by the gate

potential, the channel current due to the recombination either in the channel bulk space-

charge region or the SiO2/Si interface can give a reciprocal slope factor (diode ideality

factor) n for the base current larger than 2.0 in the current relation, Ig exp(qVBE/nkT).

This exceeds the slope factor for Sah-Noyce-Shockley recombination current in the bulk

emitter-base space-charge region which requires 1.0_n<2.0 [38]. Thus, the measured

slope factor of the base current can be an important indicator of the surface channel

presence in VLSI transistors without the gate electrode.

The effects of reverse-bias stress on the characteristics of advanced BJTs received

renewed attention in the last decade from a number of investigators [7-25] as the use of

BiCMOS logic became widespread. In 1985, Petersen and Li [7] demonstrated that the

large reverse-bias leakage current in heavily-doped n+/p emitter-base junctions in

submicron BJTs can degrade pp even at reverse-bias voltages much less than

breakdown, and avalanche was not a necessary condition for BJT degradation as was










found in earlier studies on larger transistors. They also showed through the use of light

to generate carriers in the base that the increase in AIB or degradation of 3F may be

accelerated by the injection of additional electrons into the emitter-base junction during

reverse-bias stress. In 1987, Joshi et al. [8] were the first to demonstrate that significant

PF degradation may occur from the transient reverse emitter-base bias stress of the pull-

up BJT in a BiCMOS inverter during output node transition from high to low. They

showed that the AIB increase was directly related to the current flowing in the emitter-

base junction during stress, and that device failure may be predicted by measuring the

cumulative stress charge. They also suggested that the reliability of BiCMOS circuits

may be limited by the BJT reliability from reverse emitter-base bias stress. In 1988,

Tang and Hackbarth [9] proposed a model for the rate of AIB increase based on a single

first-order rate equation for NIT generation and annihilation in the emitter-base space-

charge region. The model was demonstrated to fit the data measured in their work, but

was not able to predict the time dependence of the increase in AIB in some other

technologies or stress conditions. Hackbarth and Tang [10] also demonstrated that the

reverse-bias leakage current in the emitter-base junction may also increase during

reverse-bias stress. Also in 1988, Burnett and Hu [11] developed a largely empirical

degradation rate model for AIB based on a measured power law dependence of AIB on

stress charge. They measured BJT degradation for a small range of reverse-bias stress

voltages using constant current stress, and found good agreement with their power law

model. Hu et al. [43] had used a similar model for MOS transistor (MOST) degradation

in earlier studies. In this work, a NIT generation model was developed in which the










rupture of H-Si bonds was assumed to be responsible for the majority of the NIT

increase, and the diffusion of hydrogen was considered along with the generation of NIT

by hot carriers and the annihilation of NIT by hydrogen recapture at the interface to

account for the measured kinetics. The model by Burnett and Hu [11] proved to be

convenient for BJT reliability analysis, but the accuracy of the model over a wide range

of stress voltages has not been proven. The model also lacked a physical basis for the

power law dependence of AIB on stress charge, thus making the extrapolation to low

stress voltages questionable. Furthermore, this model is based on constant reverse-bias

current stress rather than constant reverse-bias voltage stress. As will be demonstrated

in this chapter, constant current stress is physically incorrect for analyzing hot carrier

effects, because it does not maintain a constant hot carrier kinetic energy during stress.

In Ch.3, it will be demonstrated that the hot carrier kinetic energy is the fundamental

parameter responsible for interface trap generation.

In 1991, Niitsu et al. [12] measured anomalous rates of AIB increase which were

not consistent with those predicted in the model by Burnett and Hu [10], and these

effects were qualitatively attributed to oxide charging. In 1993, Kosier et al. [13]

measured a similar superlinear AIB time-dependence in radiation-induced BJT

degradation. This effect was also attributed to oxide charging, but the radiation-induced

oxide charging is expected to differ from hot-carrier oxide charging in magnitude and

location. In 1995, Maugain et al. [14] used a quantitative model to explain the

anomalous AIB increase. They extended the model by Burnett and Hu [11] to include a

modulation of AIB due to the change in silicon surface potential from positive oxide










charging, but no justification for the assumed exponential dependence of AIB on surface

potential was presented. They also used constant current stress over a very narrow range

of reverse-bias stress voltages near junction breakdown to examine the AIB increase, and

did not propose a model for positive oxide charging or attempt measure a threshold

voltage below which positive oxide charging will not occur.

In 1993, Huang et al. [18] also extended the model by Burnett and Hu to include

the temperature dependence of reverse-bias stress in submicron BJTs. The rate of AIB

generation was found to be inversely proportional to temperature for the stress

conditions and BJT technology investigated in their work. This was explained by a

higher NIT annihilation rate, or larger hydrogen capture rate according to Hu's model

[43] at higher temperatures. In 1994, Momose et al. [19] performed similar

measurements and found that the peak degradation rate occurred at approximately 500C,

suggesting that the temperature dependence of AIB generation is technology dependent.

The first significant investigation into the microscopic mechanisms for BJT

degradation at stress voltages much less than breakdown was performed by Kizilyalli

and Bude [20] in 1994. They suggested that to explain the current gain degradation

during reverse-bias stress in heavily doped n+/p emitter-base junctions, the effect of

both interband tunneling generated hot holes and interband impact generated secondary

hot electrons must be considered. They also speculated that holes injected into the oxide

could be responsible for interface trap generation. Recent efforts in reliability modeling

have also focused on determination of the 10-year time-to-failure (TTF) using a voltage-

acceleration method [21]. Using this method, TTF is measured at stress voltages higher










than those encountered during operation, and the results are extrapolated to the lower

operating voltages using an empirical curve fit.

In spite of these extensive investigations of BJT degradation during reverse-bias

stress, detailed microscopic models of the dominant degradation mechanisms and their

geometrical locations are still not well understood. Even the source of the hot carriers

causing the increase in IB has not been conclusively determined. The purpose of this

chapter is to report a systematic experimental delineation of the (3F degradation

phenomena under reverse emitter-base bias stress in submicron Si BJTs and model their

effects on BJT degradation rate. In particular, the microscopic mechanisms of NIT

generation and positive and negative oxide charge build-up during reverse-bias stress

and their effects on surface recombination are discussed in detail. The reverse-bias

stress voltage thresholds necessary for positive and negative oxide charge will also be

presented. It will be noted that the fundamental BJT degradation mechanisms are

identical to those which cause instabilities in the silicon MOS transistor (MOST) [49-

51] with only modification of spatial distribution of the carrier recombination sites

because of different BJT and MOST geometries. The study shows that the location of

AI, is a very important factor in determining the degradation rate. It is further shown

that the device models accounting for the degradation are exactly those studied before,

i.e. interface trap generation at the SiO2/Si interface of the oxide passivated surface of

the p-type base of the n+/p/n Si BJT and the n-type surface channel on the p-type base

[46-48]. Measured results will show that AIB after heavy stress cannot be explained

entirely by an increase in the recombination rate at the narrow emitter-base junction










space-charge region, and requires an electron surface channel on the p-type base which

is induced by positive oxide charge. The effects of both positive and negative oxide

charging on the rate of AIB increase are also modeled. The device models presented

here originated from previous investigations by Sah which were described in a research

report by Neugroschel [22].

Experimental results and fundamental mechanisms of AIB generation are

described in section 2.2. The analysis of hot carrier kinetic energy and the location of

interface trap generation and oxide charging are described in section 2.3 The measured

kinetics of AIB generation are examined and modeled in section 2.4. Finally, the device

models explaining AIB are described in section 2.5.


2.2. Fundamental Excess Base Current Mechanisms


Most of the results in this work were obtained from non self-aligned n+/p/n BJTs

fabricated by CMOS-baseline BiCMOS technology. Fig.2.1 shows a schematic cross-

sectional view of the device. Its n+ polysilicon emitter contact overlaps the oxidized

surface of the extrinsic p-type base and creates a MOS capacitor with gate-base voltage

equal to the emitter-base voltage (VEB = VGB). This emitter polysilicon overlap

experimentally controls the surface electric field at emitter-base junction and the p-type

base in this device, which are important parameters in determining the transistor

degradation rate. The results and the analysis presented below are, however, very

general and apply to BJTs fabricated by other technologies, such as self-aligned BJT-

baseline BiCMOS processes.









-VBE

n+ poty-Si


A A Al


ov
9B


SiO2


A NIT A


n+ emitter

-2 B-2s '/ B-Bs


-1 Es '-lEb p base
B-2b 113- -Eb-


I +


n collector_ I


p+Base
contact



O
O


ovt C
OV


Fig.2.1 Schematic cross section of a BJT showing the recombination processes which
contribute to the base current. The diamonds are bulk silicon traps, and the
triangles are interface traps at the SiO2/Si or polysilicon/Si interfaces.
Adapted from Neugroschel and Sah [22].










The observed degradation phenomena in submicron silicon n+/p/n BJTs are

illustrated in Figs.2.2 through 2.10. Fig.2.2 shows the collector and base currents, Ic

and IB' measured as a function of the forward emitter-base bias, VBE, before and after

increasing reverse emitter-base bias stress. They show that the pre-stressed Ic and Ig

are nearly ideal, i.e. following Shockley's ideal theory [1] of Ic and Ig c exp(qVBE/kT)

for VBE>0.4V. The reciprocal slope factor, n, is nearly equal to that predicted by

Shockley's ideal minority-carrier injection theory, where n=n1-l.0, and

F=IC/IB =constant (independent of VBE or Ic). After successive reverse emitter-base

stresses, Fig.2.2 shows that IC does not change, as predicted by the ideal theory.

However, IB increases with stress by greater than four orders of magnitude at low VBE

due to the increase of a stress-induced excess base current component, AIB, with

reciprocal slope factor of n=n2=2. The increase of AIB is generally attributed to an

increase in the Sah-Noyce-Shockley space-charge region surface recombination current,

shown as IB-2s in Fig.2.1, due to an increase in the interface trap density, NIT in the

emitter-base space-charge region. For long stress times, an additional AIB component

with n=n4=4 appears for VBE<0.3V. This Ig component was previously measured in the

gated BJT in the 1961-2 studies by Sah [46,47] and was explained by the formation of a

surface electron channel connected to the emitter-base junction. A surface electron

channel is created when the surface of the p-type quasi-neutral base layer is depleted or

inverted by a positive voltage on the gate or by trapped positive oxide charge to allow

electron conduction prior to electron-hole recombination. The existence of a AIB

component with n=4 is a key experimental hint which suggests that positive oxide









10-4
Stress: VBE=-5.5V for 104s IC

1 0--'







10-10 n=4
-- n=l


10-12
0.0 0.2 0.4 0.6 0.8 1.0

VBE /(1V)






Fig.2.2 Base and collector current vs. emitter-base voltage for a n+/p/n BJT before
and after several periods of reverse-bias emitter-base stress. The stress
consisted of VBE=-5.5V for a total of 104s. The measured curves for IB are at
20, 50, 100, 2000, 5000, and 104s of stress time. The excess base current, AIB,
is defined as the difference between in base current before and after stress.










charging must be included in the model for AIB presented in section 2.5. Quantitative

analysis will also show that the greater than four orders of magnitude increase in Ig in

Fig.2.2 at low VBE cannot be accounted for entirely by an increase in NIT in the thin

emitter-base space-charge layer, further supporting the presence of a surface channel.

The temperature dependence of Ic and IB vs. VBE before stress and after moderate

and heavy reverse-bias stress is shown in Figs.2.3 through 2.6, and an activation energy

plot from the data in Fig.2.6 is given in Fig.2.7. Figs.2.8 and 2.9 show the temperature

dependence of the reverse-bias emitter current, IE, before and after stress. As shown in

Figs.2.3 and 2.4, both Ic and IB maintain a nearly ideal reciprocal slope factor of n=1.0

for the temperature range from 291K to 77K before stress. After a moderate stress of

VEB-stress=5.5V for 100s, Fig.2.5 shows that Ig contains a stress-induced AIB component

for the entire temperature range. Since AIB has a reciprocal slope factor of n=2 at 291K,

it is often interpreted as strictly due to Sah-Noyce-Shockley surface recombination in

the emitter-base space-charge region. However, AIB is shown to deviate severely from

the Sah-Noyce-Shockley theory at low temperatures, where the reciprocal slope factor

would be calculated to be n=8 from the measured data at 77K. At low temperature, AIB

is instead modeled accurately by a forward-bias surface trap-assisted tunneling

expression, where

IBT-s O exp[(VBE Vbi)/VT] (2.1)

as derived in Ch.1 as Eq.(1.36). This tunneling mechanism is similar to the excess

tunneling current mechanisms analyzed by Chynoweth et al. [52] and Sah [40] in tunnel

diodes, except the traps involved are interface traps and, therefore, are distributed in the















Sn=1.0










VBE-/(.V)
10-8

12291K.
77K
10-10


10-12 I
0.0 0.2 0.4 0.6 0.8 1.0 1.2

VBE /(l V)





Fig.2.3 Base current for an unstressed BJT vs. emitter-base voltage measured at
several temperatures from 77K to 291K. The measured curves are at 77, 95,
125, 155, 195, 240, 265, and 291K.















=n=1.0

S10-8
291K

10-10 77K



10-12
0.0 0.2 0.4 0.6 0.8 1.0 1.2

VBE /(1V)





Fig.2.4 Collector current vs. emitter-base voltage measured at several temperatures
from 77K to 291K. The measured curves are at 77, 95, 125, 155, 195, 240,
265, and 291K.



















m


10-11 I \X l \ I I I -I -I -I
0.0 0.2 0.4 0.6 0.8 1.0 1.2


VBE /(1V)





Fig.2.5 Base current measured at several temperatures from 77K to 291K vs. emitter-
base voltage after a moderate reverse-bias emitter-base stress of VBE=-5.5V
for 100s. The measured curves are at 77, 95, 125, 155, 195, 240, 265, and
291K.



















m


10-1


10-


0.0 0.2 0.4 0.6 0.8 1.0


1.2


VBE /(1V)





Fig.2.6 Base current measured at several temperatures from 77K to 291K vs. emitter-
base voltage after a heavy reverse-bias emitter-base stress of VBE=-6.0V for
1000s. The measured curves are at 77, 95, 125, 155, 195, 240, 265, and 291K.






61


Stress: VBE=-6.0V for 1000s

C Y VBE=0.8V
C1) 10-2
Co)
12EA=O.l 1eV

10-3
N

4 10-4- 0
EA=0.20eV
o 10-5
C 1 A IB-4s after stress
0 1 -66 0 IB-2s after stress
10 c EA=0.40eV

10-7 I I I I
3 4 5 6 7 8

1000/T /(1 K-1)


Fig.2.7 Activation of plot of I, IB-2s' IB-4s from Fig.2.6 vs. 1000/T after heavy stress.










silicon energy gap. This perimeter tunneling current has also been identified in self-

aligned BJTs [41]. The value of VT at 77K is found to be 0.0521V from a least-square

fit to the data, as shown in Fig.2.5. If the base impurity concentration is

NAA=2x1018cm-3, the electron tunneling effective mass is mx=0.20mo, and the average

electron tunneling distance is xt=0.26XEB (26% of space-charge region thickness), then

the value of VT=0.0521V is also calculated theoretically. At room temperature, AIB is a

combination of surface recombination and surface trap-assisted tunneling, thus

explaining the reciprocal slope factor slightly greater than 2.0. The measured data

indicates that for the moderate stress case NIT in the emitter-base space-charge region

has increased which increases both IB_2s and IBTs. However, no significant change in

the electric field in emitter-base junction at the silicon surface due to oxide charging is

suggested at this stress level.

After additional heavy stress at VEB-stress=6.0V for 1000s on the same device,

Fig.2.6 shows that AIB has increased such that it dominates IB for the entire forward

emitter-base bias range. The primary AIg mechanism has changed after heavy stress

such that it follows the Sah-Noyce-Shockley space-charge layer surface recombination

theory with n=2 much more closely for the entire temperature range. The reciprocal

slope factor gradually increases from n=2.0 at 291K to n=2.8 at 77K, which indicates a

slight deviation from the ideal recombination theory. However, this deviation is much

less than that measured after moderate stress in Fig.2.5, and does not suggest any

significant contribution from the surface trap-assisted tunneling mechanism. Instead

this deviation from the Sah-Noyce-Shockley theory at low temperatures is explained by










electron conduction in a stress-induced surface channel before recombination. For low

current levels at the higher temperatures in Fig.2.6, an additional AIB component with

n=4 is measured due to this same surface channel electron conduction before

recombination. The surface trap-assisted tunneling current which was dominant at low

temperatures after moderate stress has decreased dramatically after heavy stress such

that it is nearly insignificant.

There are two possible reasons for the large decrease in the trap-assisted tunneling

current. The first is a decrease in the density of available interface traps for tunneling in

the emitter-base space-charge region. However, this disagrees with the large increase in

the Sah-Noyce-Shockley recombination current which suggests a large increase in NIT

in the space-charge region. The second possibility is an increase in the tunneling

potential barrier related to a decrease in the emitter-base junction electric field or

increase in the tunneling distance. This will decrease the trap-assisted tunneling current

drastically, and may be modeled by a change in VT in the Eq.(2.1). The decrease in the

electric field at the surface of the emitter-base junction space-charge region is consistent

with the formation of a surface electron channel during heavy reverse-bias stress,

already suggested by the AIg measurements as mentioned above. The thickness of the

emitter-base space-charge region at the silicon surface is increased as positive oxide

charging depletes the surface of the quasi-neutral base. This same effect will be shown

to increase the Sah-Noyce-Shockley surface recombination current in addition to

decreasing the surface trap-assisted tunneling current.










An activation plot of Ic and Ig after heavy stress is shown in Fig.2.7. The ideal Ic

is shown to have an activation energy of EA=0.40eV at VBE=0.8V, or Ic O

ni2exp(qVBE/kT) cc exp(-0.40/kT). This is consistent with the fact that ni2 =

NcNvexp(-EG/kT) = exp(-EG'/kT), where EG'= 1.20eV for the temperature range in

Fig.2.7, and qVBE EG' = 0.8eV 1.20eV = -0.40eV = -EA. The activation energy for

the stress-induced AIB at VBE=0.8V is EA=0.20eV for the higher temperatures, which

corresponds to a niexp(qVBE/2kT) temperature dependence since ni = exp(-0.60/kT).

This temperature dependence for AIB is expected for Sah-Noyce-Shockley

recombination [38]. However, at low temperatures the temperature dependence of AIB

decreases, due to a deviation from the Sah-Noyce-Shockley theory as surface channel

electron conduction becomes more important. The surface channel recombination

component of Ig with n=4 at low current levels for the higher temperatures can be

decomposed from the measured total AIB. This current component is labeled IB-4s in

Fig.2.7 and is found to have an activation energy of EA=0.1 leV or approximately a

ni.5-exp(qVBE/4kT) temperature dependence. This current component drops below the

noise level for lower temperatures. The measured temperature dependence in Fig.2.7 for

the surface channel recombination current is consistent with the surface channel currents

measured in gate controlled BJTs by Sah [47].

The reverse-bias emitter current, IE, in the unstressed device is shown in Fig.2.8.

The major mechanism for IE in the heavily doped n+/p emitter-base junction at voltages

much less than breakdown is expected to be interband tunneling of valence-band






65



10-4 I I I I
interband impact
generation -
6_ (avalanche)

interband
tunneling
10-8
CI)

10-10 / -39.4 /
IE-T oc exp (1.1 .54 -
(1.1 + VEB)""'


10-12
0 1 2 3 4 5 6

VEB /(1 V)






Fig.2.8 Reverse-bias stress current, IEstress, vs. emitter-base voltage for an unstressed
BJT. For VEB stress<4.5V, the stress current may be modeled by the interband
tunneling formula shown, as shown by the least-square fit of Eq.(2. 1) to the
data (dashed line). For VEB-stress>4.5V, interband impact generation current
becomes important.










10 0 -l ,J, I tS J I V y, l --u L,-,- I i
Unstressed device



291K

-- I77K


'I 10-10-
1 0 interband
tunneling



10-12
0 1 2 3 4 5

VEB /(1V)





Fig.2.9 Reverse-bias stress current, IE-stress' vs. emitter-base voltage for an unstressed
BJT at various temperatures from 77K to 291K. The measured curves are at
77, 95, 125, 155, 195, 240, 265, and 291K.






67



10-6 T=77,95,125,155,195,240,265,291K

Stress: VBE=-6.0V for 1000s


291 K
< 10-8
surface
trap-assisted
S_ tunneling 77K
CO-

4--






10-12
0 1 2 3 4 5


VEB /(1V)






Fig.2.10 Reverse-bias stress current, IE-stress, after heavy stress at various temperatures
from 77K to 291K. The measured curves are at 77, 95, 125, 155, 195, 240,
265, and 291K. The interband tunneling current is still dominant for
VEBstress>3.0V and for all VEB-stress at low temperatures. An additional trap-
assisted tunneling current is important heavily stressed devices for
VEB-stress<3-0V










electrons in the space-charge region to the quasi-neutral emitter conduction band, or

Zener tunneling. The excellent fit of IE to the interband tunneling expression [53],

IE-T exp[-Vl/(VEB + Vbi)m], (2.2)

suggests that this mechanism indeed dominates for stress voltages below =4.5V in

Fig.2.8. The derivation of the simplified expression in Eq.(2.2) appears in Ch.l. The

values in Eq.(2.2) used in the least-square fit to the data in Fig.2.8 are Vbi=1.1V,

V,=39.4V, and n=0.54. The fact that m is close to 0.50 indicates that the one-sided,

abrupt junction approximation is valid for the emitter-base junction in reverse bias. If

the base doping concentration is assumed to be NAA=2x1018cm-3 and the tunneling

effective mass is mx=0.20mo, then Vbi=1.1V and V1=39V, which are close to the values

used in the least-square fit. At reverse-bias emitter-base voltages approaching junction

breakdown, the interband impact generation of electron-hole pairs or avalanche

multiplication also contributes to the measured IE'

The temperature dependence of the reverse-bias emitter current before stress is

shown in Fig.2.9. The small temperature dependence for IE is further support of the

interband tunneling mechanism. After heavy stress, as shown in Fig.2.10, the reverse-

bias IE contains an additional stress-induced component for VEB<3.0V. The larger

temperature dependence of this stress-induced IE along with its increase during reverse-

bias stress suggests that it is due to reverse-bias surface trap-assisted tunneling, which is

the inverse of the two-step process involved in forward-bias trap-assisted tunneling.

This reverse-bias trap-assisted tunneling current component may be an important source










of hot carriers at stress voltages less than 3.0V in devices with large interface trap

density.


2.3. Analysis of Hot Carriers During Stress


In Fig.2.11, the schematic cross-section of a BJT under reverse-bias stress is

shown. As was discussed in section 2.2, the major reverse-bias current mechanism for

VEB-stress<4.5V is interband tunneling, labeled (T) in Fig.2.11. The maximum tunneling

probability occurs at the maximum electric field point in the emitter-base junction,

which is near the emitter edge of the emitter-base space-charge region and also near the

SiO2/Si interface for a typical base doping profile in which the peak of the boron

distribution is near the interface [21]. This locates the reverse-bias tunneling current

near the SiO2/Si interface where the BJT degradation is known to occur. The valence-

band electrons which tunnel to the emitter conduction band are generally not energetic

enough to break interface bonds or charge the oxide after tunneling, as shown in the

energy band diagram for the reverse-biased n+/p emitter-base junction in Fig.2.12. This

is because the electron tunneling is concentrated very close to the quasi-neutral emitter,

as shown in Fig.2.12. Although the tunneling electrons are not energetic, the holes left

behind in the valence band of the emitter-base space-charge region after electron

tunneling are accelerated toward the base by the junction electric field and may become

energetic (hot) holes. Since the electron and hole quasi-Fermi levels are very near the

conduction and valence band edges for typical n+/p emitter-base junctions, the hot holes

may attain a maximum kinetic energy of =qVEB-stress as they reach the quasi-neutral









+VEB-stress

E En+ poly-Si


A\ A


SiO2


n+ emitter y




p
--------------------- (
xz-zzz-zzz zZ
p base
_ _ _1 -^ --


n collector


Open
Open


OV
B
p+Bs- 'iB


p+Base
contact


-- B


Fig.2.11 Schematic cross section of a BJT during reverse-bias stress with open
collector or reverse-biased collector-base junction. The interband tunneling
(T) and interband impact generation (I) processes which make up the
measured emitter current are shown. Adapted from Neugroschel et al. [24].


A









secondary
hot electron


n+ Si
EMITTER


interband
tunneling


pSi
BASE


eB
OV


primary
hot hole


E

X


Fig.2.12 Energy band diagram of a reverse-biased emitter-base junction indicating
interband tunneling (T) and interband impact generation (I). Tunneling-
generated hot holes, impact generated secondary hot electrons, and thermally
generated hot electrons are shown. The hot holes are shown to acquire a
maximum kinetic energy of Ek-max = qVEB-stress at the base edge of the
emitter-base space-charge region. Adapted from Neugroschel et al. [24].


I
























n+ Si __ B
|IB-OV
X














Fig.2.13 Magnified schematic diagram of near the emitter-base junction indicating the
interface trap generation and oxide charging pathways. Interface trap
generation by hot holes and electrons is indicated by an asterisk. The solid
triangles are unbroken interface bonds and the empty triangles are broken
interface bonds. The pathways for positive charging of oxide hole traps
(hexagons) and negative charging of oxide electron traps (squares) are also
indicated. The letters denoting the oxide charging pathways correspond the
processes in Fig.2.14. Adapted from Neugroschel et al. [24].









p Si
Ec
---- ----B

-Ev OV

(C) (d) (e)


-QOT

+VEBstress FN Si02 (g
Ec A
Ev (b)
n+ polySi +oT
(h) (a)




/I x

Y




Fig.2.14 Energy band diagram along the direction perpendicular to the SiO2/Si
interface near the reverse-biased emitter-base junction of a n+/p/n BJT. The
injection of hot holes into the SiO2 valence band and capture at oxide hole
traps (hexagons) is shown as process (a). The direct tunneling of hot holes to
oxide hole traps is shown as process (b). The injection of hot electrons into
the SiO2 conduction band and capture at oxide electron traps (squares) is
shown as process (c). The tunneling of hot electrons into the SiO2 conduction
band or to oxide electron traps is shown as processes (d) and (e). The impact
generation of electron hole pairs in the polysilicon emitter contact overlap and
the back injection and capture of hot holes at oxide hole traps and SiO2/Si
interface traps are shown as processes (f) and (g). Process (h) is similar to (g),
but involves direct tunneling to oxide hole traps. Adapted from Sah [54,
p.397].










base, as demonstrated in Fig.2.12. The hot holes may break strained interface bonds to

increase NIT through an impact process, represented by the star in the magnified

schematic diagram of the emitter-base junction in Fig.2.13. The open triangles represent

interface traps, and the filled triangles represent unbroken weak interface bonds. Since

interface trap generation is known to have a strong kinetic energy dependence, NIT will

vary along the SiO2/Si interface with the maximum located near quasi-neutral base

during reverse-bias. The hot holes with kinetic energy greater than 4.3eV (the SiO2/Si

valence band barrier height) may be injected into the oxide valence band and trapped at

oxide hole traps (hexagons) to positively charge the oxide, as shown in Fig.2.13 and in

Fig.2.14 as process (a). The hot holes will acquire the necessary kinetic energy of 4.3eV

as they near the base edge of the space-charge region. Therefore, both NIT and +QoT

generated from hot holes are expected to be maximized near the edge of the quasi-

neutral base. Since the hot hole mean free path is h=5nm, the average energy loss is in

the =60nm space-charge region during stress is less than 0.75eV for hot holes, since the

maximum optical phonon energy is =60meV. Interband impact electron-hole pair

generation may cause substantially larger energy losses, but this only affects a small

percentage of the hot holes until VEB-stress nears junction breakdown. Hot holes with

kinetic energy less than 4.3eV may tunnel to oxide hole traps close to the SiO2/Si

interface, as shown in Fig.2.14 as process (b), but this process will produce only small

amounts of +QoT. It should also be noted that interface traps generated at the surface of

the quasi-neutral base will give positive interface charge, +QIT, due to the empty donor-










like interface states, which will deplete the surface of the p-type base. This will enhance

the effects of +QoT in forming a surface channel in the quasi-neutral base.

For stress voltages approaching junction breakdown, the interband impact

generation of electron-hole pairs becomes an important contribution to the measured

reverse-bias current. At lower VEB-stress' impact generation may still be an important

source of hot electrons, compared to the density of thermally generated electrons in the

space-charge region. The impact generated hot holes, however, will be of much smaller

density than the interband tunneling generated hot holes until VEB-stress nears junction

breakdown. The impact generation mechanism is labeled (I) in Figs.2.11 and 2.12. The

impact-generated secondary electrons may also break interface bonds through an impact

process in a similar manner as hot holes, as shown in Fig.2.13. The secondary hot

electrons will produce the largest NIT very near the edge of the quasi-neutral emitter,

since this is where they attain their maximum kinetic energy. Secondary hot electrons

with kinetic energy greater than 3.13eV (the SiO2/Si conduction band barrier height)

may be injected into the oxide and negatively charge oxide electron traps (squares), as

shown in Fig.2.13 and in Fig.2.14 as process (c). Hot electrons with kinetic energy less

than 3.13eV may also tunnel to the oxide conduction band or directly to oxide electron

traps, as shown in Fig.2.14 as processes (d) and (e). Hot electrons which are injected

into the oxide but not captured at oxide hole traps may also impact generate hot holes in

the polysilicon emitter contact overlap. The impact-generated hot holes in the emitter

polysilicon may be back injected into the oxide and trapped at oxide hole traps to

positively charge the oxide [54, p.397], which is labeled (f) in Fig.2.14. This positive










oxide charge generation mechanism during electron injection into the oxide was recently

proposed, analyzed, and experimentally verified in thin oxide MOS transistors [55,56].

Hot electrons may significantly contribute to BJT degradation if their density is

comparable to hot holes. However, the location of the NIT, -QoT and +QOT generated

from hot electrons is near the quasi-neutral emitter, which differs from the location of

the NIT and +QoT generated from hot holes near the base. Since the majority of the

surface recombination in the emitter-base space-charge region during forward bias takes

place in a narrow portion of the space-charge region, the location of NIT and QOT is very

important in determining their relative contributions.

The fundamental VEB-stress thresholds for oxide charging are determined by

considering the kinetic energy requirements of hot carriers to be injected into the oxide

[54, p.408]. As mentioned above, the kinetic energy threshold for hole injection into the

oxide valence band is =4.3eV, based on the valence band potential barrier at the SiOz/Si

interface. Since the maximum hot hole kinetic energy is =qVEB-stress for the interband

tunneling generated hot holes, as shown in Fig.2.12, the minimum stress voltage for

positive oxide charging from direct injection of hot holes, as shown by process (a) in

Fig.2.14, is VEB-stress=4.3V. Although the conduction of holes in the oxide valence band

may be limited by the opposing electric field during stress as shown in Fig.2.14, the

injection and trapping of holes will still occur. For thicker oxides in self-aligned BJTs,

the field in the oxide may be much less than that shown in Fig.2.14. The minimum

stress voltage for impact generation of hot holes in the polysilicon emitter contact

overlap and back injection of the hot holes into the oxide, as shown in process (f) in










Fig.2.14, is also VEBstress=4.3V [54-56]. This is easily estimated by considering the

minimum energy required for electrons in the polysilicon layer to impact generate hot

holes with kinetic energy greater than =4.3eV such that they may be injected into the

oxide valence band. Thus, the two important sources of positive charge initiated by both

hot holes and hot electrons are cut off for VEB-stress<4.3V. Therefore, the anomalous AIB

increase associated with positive oxide charging [12-14] is not expected for

VEB-stress<4.3V. This is confirmed by the measurement of the AIB generation kinetics at

VEB-stress=4.0V in Fig.2.15 which shows no anomalous increase in the AIB generation

rate. Limited positive oxide charging very near the SiO2/Si interface may be measured

for VEBstress<4.3V for the case of direct hole tunneling to traps in the SiO2, as shown in

process (b) in Fig.2.14. However, the amount of positive charging will be small due to

the exponential dependence of the tunneling probability on distance. This phenomenon

will be encountered in the model for the Ig relaxation transient in Ch.4. The threshold

for negative oxide charging is determined by the =3.13eV conduction band potential

barrier at the SiO2/Si interface. However, since the majority of hot electrons are

generated as a result of interband impact generation, this kinetic energy threshold is not

easily translated to VEB-stress. At VEB-stress<4V, the density of impact generated

secondary hot electrons will be small and significant negative oxide charging will also

be expected to cease.

The SiO2/Si interface traps are generated by two mechanisms of breaking the

strained Si-Si, Si-O, or Si-H bonds: (1) the direct impact by energetic holes and

electrons in the emitter-base space-charge region already mentioned above and shown










schematically in Fig.2.11, and (2) the hole-capture energy of holes back injected into the

SiO2 as they are captured at SiO2 interface traps [54, p.397]. This is shown by process

(g) in Fig.2.14. As will be explained in section 2.5, the large increase (>104) in the

magnitude of the stress-induced AIB as shown in Figs.2.2 and 2.5 cannot be explained

exclusively by an increase in NTr in the very narrow emitter-base space-charge region by

the two mechanisms just described. Instead, positive oxide charging over the quasi-

neutral base is necessary to induce a surface channel which increases the recombination

area.


2.4. Analysis of Excess Base Current Kinetics


The fundamental recombination and tunneling mechanisms causing the IB

increase and PF decrease have been delineated, and the hot carriers created during stress

have been examined. The time dependence or kinetics of the AIB increase, which

directly determines the device time-to-failure, will now be analyzed. Further support for

the AIB mechanisms measured in section 2.2 will be obtained. One method for quickly

measuring the effects of a reverse-bias stress on AIB is to measure Ig and Ic at a single

forward emitter-base bias, VBE-meas, which corresponds to the expected operating point

in the circuit. This method allows for frequent sampling of Ig and Ic without significant

interruption of the reverse-bias stress, and provides a true worst-case measurement of

device degradation. A constant reverse-bias stress voltage, VEB-stress' is used in all

measurements of the AIB kinetics. Constant current stress has been used during reverse-

bias stress by other investigators [11,12,14], but this method obscures the measurement










of detailed kinetics since the stress voltage and hot carrier kinetic energy are changing

during stress.

The AIB kinetics measured at VBE-meas=0.6V during reverse-bias stress varying

from VEB-stress=4.0V to 6.OV is shown in Fig.2.15. The percent change of IB or AIB/IBO

is plotted vs. the stress time. An accelerated stress method involving the use of base

layer punch through current during reverse-bias stress is used at VEB-stress=4.0V to

accelerate the stress current and reduce the stress time by approximately 100 times [23].

The measured data in Fig.2.15 indicates that the AIB increase is initially proportional to

the stress time, or AIgB c t at short stress times. For moderate stress times, the rate of AIB

increase slows such that AIgB to5, and may slow further at longer stress times to AIB c

t0-3. For VEB-stress>4.3V in Fig.2.15, the rate of AIB generation is shown to suddenly

increase such that AIB o t1.4 at long stress times. This anomalous or superlinear AIB

increase has been measured by other investigators during both reverse-bias stress and

radiation stress, and has been modeled to be the result of positive oxide charging near

the emitter-base junction during stress [12-14]. Eventually, the rate of AIB increase

slows and then saturates as the various processes involved in the AIB increase reach

steady-state. The AIB kinetics at short to moderate stress times may be explained

adequately by a simple first-order interface bond breaking model [11,43], but the

deviation from this model may only be explained by also considering both positive and

negative oxide charging near the emitter-base space-charge region as demonstrated in

this chapter.










10 1 1 l l I I l
VBE-meas=0.6V
102-

/ ---- t.4
S10 VEB-stress=6.Os s s5.V
2 4.0V









10-1 10 103 10 10 109

t /( s)






Fig.2.15 The percent change of the stress-induced excess base current, AIB/IBO,
measured at VBE=0.6V is plotted vs. time while being stressed at varying
VEB-stress from 4.0V to 6.0V. AI is shown to be proportional to tm, where m
varies during stress. The slope m is initially close to 1.0 for short stress time.
It drops to 0.5 at moderate stress time, and as low as 0.3 for longer stress time.
For VEB stress>4.0V, m increases suddenly to 1.4 before AIB saturates to a
nearly constant value. The accelerated stress is performed with base-collector
shorted to provide stress current acceleration.










A model for interface trap generation based on the release and diffusion of atomic

hydrogen from the SiO2/Si interface by hot carriers was proposed by Hu [43] and used

by Burnett and Hu [11] to explain the measured effects of BJT degradation over a

limited reverse-bias voltage range. A similar model for interface trap generation along

with some additional details of solving the rate equations for interface bond breaking

and hydrogen diffusion in general were explained in Ch.1. The resulting approximate

equation for the case of sufficient hydrogen diffusion that the rate of NIT generation

does not saturate before becoming diffusion limited is


Nrr + (CHXIX2DH)N2 = eH t eH dt (2.3)

where NIT is the interface trap density, NIB is the total number of hydrogen passivated

interface traps or total number of H-Si bonds, eH and cH are the emission and capture

rates of hydrogen at the interface traps which are a function of the stress voltage, XI is

the SiO2/Si interface thickness where the atomic hydrogen can react with the interface

traps, Xo is the oxide thickness, and DH is the diffusivity of atomic hydrogen. The

solution for NIT from Eq.(2.3) may be easily approximated numerically to yield NIT as a

function of stress time. The stress-induced AIB may be assumed to be directly

proportional to the change in surface recombination velocity, ASo, and the

corresponding change in interface trap density, ANIT, during stress by the relation [38]

AIB = qARniASoexp(qVBE/2kT) = 4.8x10-ANIT (2.4)

where [39]


ASo = 0.57thANIT = 1.5x107AN .


(2.5)










In Eqs.(2.4) and (2.5), AR = PEXR is the effective emitter-base space-charge region area

where surface recombination is important, PE is the emitter perimeter, c is the capture

cross section of the interface traps, 0th is the thermal velocity, and the reciprocal slope

factor is assumed to be n=2. The numerical result relating AIB and ANIT in Eq.(2.4) uses

reasonable values of XR=3nm, a=10-14cm2, 0th=107cm/s, and assumes that

VBE-meas=0.6V as in Fig.2.15. The value of XR=3nm is estimated by considering the

width required for 3kT variation of the potential on either side of the maximum

recombination point in the emitter-base space-charge region, where FNp = (FN + Fp)/2 =

Er. An abrupt junction approximation is used in the calculation with total space-charge

region thickness of XEB=18nm at VBE=0.6V. The theoretical fit to the measured data in

Fig.2.15 using Eqs.(2.3) and (2.4) is shown by the dashed lines in Fig.2.16. The values

for Ng, eH, and CHXIXo/DH used to obtain the fit in Fig.2.16 are listed in Table 2.1. It

is evident from Fig.2.16 that the theoretical model for NIT generation results in an

adequate fit to AIB for short to moderate stress times, but fails to properly model the AIB

kinetics for long stress times.

It has been suggested that a more accurate theoretical basis for the measured data

in Fig.2.15 at long stress times may be obtained by including the effects of oxide

charging near the emitter-base junction during stress [12-14]. However, no detailed

models have been presented which account for the location and pathways of the oxide

charging, as described in the last section. Both positive and negative oxide charging

may be modeled individually by first order models [50], where

QOT = QOT-[1 exp(-oNINJ)] = QoT-[1 exp(-t/T)]. (2.6)

















0
m
m


10-1 10 103 105 107


t /(1 s)






Fig.2.16 The theoretical fit from Eqs.(2.3) and (2.4) which model the generation of
interface traps is compared to the measured AIB/IBO from Fig.2.15. The values
for the parameters in Eq.(2.3) used to fit the measured data are given in Table
2.1.


109













Table 2.1 The values of the parameters used in Eq.(2.3) for fitting the data in Fig.2.15
vs. stress voltage. The result of the fit is shown in Fig.2.16.


VEB-stress /(1V)

4.0

4.5

5.0

5.5

6.0


NB /(1cm-2eV-1)

1.3x1013

1.3x1013

1.3x1013

2.2x1013

3.0x1013


eH /(s-1)

4.5x10-6

8.1x10-5

5.1x10-4

3.0x10-3

3.2x10-2


CHXXo/DH /(1cm-2)

1.5x10-10

1.9x10-"

4.5x10-12

2.3x10-12

2.4x10-12


Note:


Nrr(t-4-)= =~rr(t-66)=NIB










The quantity QOT-, is related to the total number of oxide electron or hole traps, a is the

oxide electron or hole trap cross section, and NINJ is the electron or hole fluence passing

through the oxide. The fluence may be assumed to be proportional to the stress time

(oNINJ = oJt/q = t/h) if the current injected into the oxide does not vary significantly

with time. Using the depletion approximation for a MOS capacitor [42, p.338], the

surface potential may be calculated to be

Vs = [(VG MS + Q oTCO + QITC + VAA)0.5 VAA0.5]2 (2.7)

where VAA=EsqNAA/2Co2, s is the silicon perimittivity, NAA is the base impurity

concentration, Co is the oxide capacitance, and (MS is work function difference between

n+ polysilicon and p-type base.

It is well known from Sah-Noyce-Shockley recombination theory and gated BJT

measurements that the surface recombination rate is an exponential function of the

silicon surface potential, Vs, if the surface is depleted, in addition to being proportional

to NIT [38,46-48,57]. This is demonstrated by measuring the base current due to

recombination at the surface of the quasi-neutral base while sweeping the gate-base

voltage in a gated BJT structure as shown in Fig.2.17. If there is oxide charging during

reverse-bias stress, this effectively shifts the Ig vs. VGB curve in Fig.2.17 to the left for

positive charging or to the right for negative charging. This measurement is a basis for

separation of the effects of QIT and QOT in MOSTs and BJTs [57]. It was assumed by

Maugain et al. [14] in their quantitative analysis of the effects of oxide charging on AI,

that oxide charging near the emitter-base space-charge region associated with hot carrier

injection into the oxide would provide the same modulation of the total recombination















IB oc exp(qVs/kT)

. 400 AIB


after SHEi
200 stress

unstressed

-1.0 -0.5 0.0 0.5 1.0

VGB /(1V)






Fig.2.17 The base current vs. gate-base voltage in a BiMOS device, which is similar to
gated BJT as described by Nishida [49]. The base current is shown to have an
exponential dependence on surface potential, Vs, as the gate-base voltage is
changed. In a BJT without a gate, the oxide charge may modulate Ig in a
similar manner.










rate in the space-charge region, and the measured AIB would, therefore, be proportional

to exp(qVs/kT). However, no theoretical basis was given to justify this model. Since

AIB is proportional to the integrated recombination rate in the emitter-base space-charge

region, the exponential dependence of AIB on oxide charging is not necessarily

expected. If NIT is fairly uniform throughout the space-charge region, then a small

change in Vs due to oxide charging near the emitter-base junction will change the point

in the space-charge region where the recombination rate is maximum, where FNp = (FN

+ Fp)/2 = EI. However, the total AIB will not vary exponentially with Vs. This is

demonstrated Figs.2.18 and 2.19, where the distortion of the surface potential due to

positive oxide charging during reverse-bias stress is demonstrated to change the point of

maximum recombination rate shown by a solid dot, but does not increase IB

significantly.

The positive oxide charge from hot holes and hot electrons will be located in the

vicinity of the emitter-base space-charge region during stress. This means that the

positive charge extends into quasi-neutral base during forward-bias, since the space-

charge thickness during forward-bias is smaller than during reverse-bias as

demonstrated in Fig.2.20. Thus, the significant positive oxide charging for up to

= 100nm over the quasi-neutral base will deplete the silicon surface in this region.

In order to present a first-order quantitative model for the AIB increase from

positive charging, a situation is presented in which AIB is nearly an exponential function

of AVs, as assumed by Maugain [14]. If the large density of +QIT and +QoT generated

during stress depletes the surface of the quasi-neutral base such that it is nearly intrinsic,










tIE


0 IB-2s

n+ Si -- Si
I:B
I-----------,---- _--- "'-]





n+ Si p Si

EvE
-VBE FN (F+Fp)/2

FF -- --- -,\ El
F A -



SXR







Fig.2.18 The schematic diagram and energy band diagram along the silicon surface
near the emitter-base junction before stress or at short stress times with
negligible positive oxide charge. The point of maximum recombination is
designated by a dot, and the effective recombination thickness is shaded and
labeled XR. Adapted from Sah et al. [38].









E

B H ) M +QoT SiO2
AAA A A A A A+QIT .
1-3 IB-2s
n+ Si PB Si
---...-..--.------ --- I B





n+ Si p Si
Ec
EE FNN (FN+Fp)/2
E"-c V, '-..FN

E. -- ---- / oF
.. ........ .-------- -..-............ -B

v OV
Ev-- -
XR






Fig.2.19 The schematic diagram and energy band diagram along the silicon surface
near the emitter-base junction after moderate stress and moderate oxide
charging such that the quasi-neutral base is slightly depleted. The point of
maximum recombination has shifted to the right from Fig.2.18. Adapted from
Neugroschel and Sah [22].









E-VBE

N, Si02

O B-2s
n+ Si P Si 6 B
_--- IB OV
(a)
+VEB-stress
+IE
N,T ^ITA A+QOT Si02
IE-T<
n+ Si p Si B
'-IB OV

(b)






Fig.2.20 The energy band diagram along the silicon surface near the emitter-base
junction during (a) forward bias and (b) reverse-bias. The major current
pathways are also shown. Adapted from Neugroschel et al. [24].











Ettl
8 8 0 +QOT Si02
A AAAAAAA+QIT


n+ Si B-4s IB-2s p Si B
S--IB




n+ Si p Si
(FN+Fp)/2 P--Ec
-VBE FN ......
E FE


,. ----------- ---- - E
F' Pv 0V

E...... -
S OV

EXR








Fig.2.21 The schematic diagram and energy band diagram along the silicon surface
near the emitter-base junction after heavy reverse-bias stress and heavy oxide
charging such that the surface of the quasi-neutral base has become nearly
intrinsic. The effective recombination area is shaded and designated by XR.
Adapted from Neugroschel and Sah [22].










as shown in Fig.2.21, the surface recombination there will dominate the measured AIB.

In this case, the modulation of the surface potential, AVs, from further positive oxide

charging will have a strong effect on the measured AIB. This model is supported by the

measurements in section 2.2 which suggested the presence of a surface electron channel

over the p-type base. Thus, it is assumed to be a valid model for the devices in this

work. The expression for AIB in Eq.(2.4) may be extended to account for the surface

potential modulation as

AIB = 4.8xlO-18ANiexp(qAVs/kT), (2.8)

where the recombination rate at the surface of the quasi-neutral base is assumed to be

nearly an exponential function of Vs. For small AVs when the surface of the quasi-

neutral base is nearly intrinsic, this approximation is valid. Using Eq.(2.8), the

theoretical fit to the data in Fig.2.15 is shown in Fig.2.22. The model in Eq.(2.8)

predicts that the rate of AIB generation will increase with positive oxide charging and

decrease with negative oxide charging. With both positive and negative oxide charging

included, the theoretical fit is able to accurately model the AIB kinetics for the entire

range of stress time. The values of NIB, eH, and CHXIXo/DH for NIT generation are the

same as those used in the fit in Fig.2.16 and listed in Table 2.1. The additional

parameters involving positive and negative oxide charge which are QOT+I/CO'

QOTj/Co, '+, and T_ are listed in Table 2.2, where the symbols with + and refer to

+QOT and -QOT respectively.

The one-dimensional model used to generate the theoretical fit in Fig.2.22 can

only roughly approximate the two dimensional effects of interface trap generation and









oxide charging included


10 -- experiment
I

VEB-stress=6.0V
o 10 5.ov
m 4.5V,
'4.0V

1 0


1 0 ,,/ -
/ normal accelerated
/I, stress stress
10'
10-1 10 103 105 107 109

t/(ls)






Fig.2.22 The theoretical fit from Eqs.(2.3) though (2.7) which model the generation of
interface traps and oxide charge is compared to the measured AIB/IBO from
Fig.2.15. The values for the parameters in Eqs.(2.3) and (2.6) used to fit the
measured data are given in Tables 2.1 and 2.2.












Table 2.2 The values of the parameters used in Eqs.(2.6) through (2.8) for fitting the
data in Fig.2.15 vs. stress voltage. The result of the fit is shown in Fig.2.22.


VEB-stress /(V) NOT+ /(lcm-2)

4.0 0

4.5 2.5x1012

5.0 2.6x1012

5.5 2.4x1012

6.0 2.3x1012


T+ /(ls)



6.3x105

4.7x104

2.7x103

1.3x102


NoT- /(1cm-2)

9.5x101

9.5x101

9.5x10'

9.5x101

9.5x101


Note:


N0T=Q0TIq


z_ /(ls)

8.9x106

1.3x105

6.0x103

2.1x102

2.9x101




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