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THEORY AND EXPERIMENTS OF ELECTRONHOLE RECOMBINATION AT Si/SiO2 INTERFACE TRAPS AND TUNNELING IN THIN OXIDE MOS TRANSISTORS BY JIN CAI A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY UNIVERSITY OF FLORIDA 2000 * i ir  .. I1 . ^ \ UNIVERSITY OF FLORIDA 3 1262 08554 465Il 3 1262 08554 4657 ACKNOWLEDGEMENTS I am deeply indebted to Professor ChihTang Sah for his education, encouragement and patience throughout my graduate study at the University of Florida. I would like to thank Professors Arnost Neugroschel, Ewen Thomson and Sergei Obukhov for serving on my supervisory committee. I would also like to thank Professors Hunhui Sun and Xun Wang who led me into the field of solidstate physics during my senior year at Fudan University. I am grateful to our industrial mentors from AMD, Harris, Intel, Motorola and Texas Instrument who provided the samples used in this dissertation research. I am also indebted to Dr. Tak Ning and Dr. Philip Wong for hiring me as a summer intern at IBM Research and Dr. Yuan Taur for his mentorship during my internship which exposed to me the latest stateoftheart silicon technology. Additional thanks go to my previous and present colleagues, Dr. Michael Han, Dr. Guoxin Li and Yih Wang, for their professional helps and personal friendship. Financial support from Semiconductor Research Corporation and a Robert C. Pittman Doctoral Research Fellowship is gratefully acknowledged. Finally I would like to thank my wife, Yijun Chen, and our parents, Fumin and Yumei Cai, Xuehong and Gendi Chen, for their continuous support throughout my five year graduate education. TABLE OF CONTENTS ACKNOWLEDGEMENT...................................................................................... ii A B STR A C TS .......................................................................................................... v CHAPTERS 1 INTRODUCTION............................................................................. ...... 1 2 INTERFACIAL ELECTRONIC TRAPS IN SURFACE CONTROLLED TR A N SISTO R S.......................................................................................... 6 2.1 Introduction................................................................... ........ 6 2.2 Carrier Recombination in MOS Transistor Channel Region..... 9 2.3 Carrier Recombination in MOS Transistor Junction Space Charge Region........................................... ........................ 18 2.4 Diffusion Limitation and Other NonIdeal Factors.................. 27 2.5 Application Examples........................................................ 31 2.6 Sum m ary.............................. ............................................... 39 3 SPATIAL DENSITY PROFILE OF INTERFACE TRAPS FROM DCIV MEASUREMENTS.... .............. ..................... ................ 40 3.1 Introduction............................................. ........................... 40 3.2 Theoretical Analysis.......................................................... 41 3.3 Extraction of MOST Device Parameters............................ 59 3.4 Profiling Interface Traps in Junction SpaceCharge Regions.... 66 3.5 Interface Trap Profile in the Channel Region.......................... 70 3.6 Sum m ary............................................ ..................................... 80 4 GATE TUNNELING CURRENTS IN ULTRATHIN OXIDE MOS TR A N SISTO R S......................................................................................... 81 4.1 Historical Survey.................................................................. 81 4.2 Recent Technology Motivations............................................ 86 4.3 Theory of Tunneling in MOS Structures.............................. 88 4.4 Theoretical TunnelingCurrent Voltage Characteristics........... 97 4.5 Experimental Correlations.................................................... 111 4.6 Sum m ary.................................................................................... 129 5 INTERBAND TUNNELING NEAR THE DRAIN/SUBSTRATE JUNCTION PERIMETERS IN MOS TRANSISTORS.............................. 131 5.1 Introduction................................................................................ 131 5.2 Theory of Drain Junction Perimeter Tunneling........................ 132 5.3 Tunneling into Quantized Surface Accumulation Layer.......... 139 5.4 BaseTerminal Current under Accumulation Gate Bias............ 148 5.5 Interface Trap Assisted Tunneling............................................. 158 5.6 Sum m ary.................................................................................... 170 6 SUMMARIES AND CONCLUSIONS...................................................... 171 A PPEN D IX .......................................................................................................... .. 175 RE FE REN CE S..................................................................... ..................................... 190 BIOGRAPHICAL SKETCH .................................................................................... 200 Abstract of Dissertation Presented to the Graduate School of the University of Florida in Partial Fullfilment of the Requirement for the Degree of Doctor of Philosophy THEORY AND EXPERIMENTS OF ELECTRONHOLE RECOMBINATION AT Si/SiO2 INTERFACE TRAPS AND TUNNELING IN THIN OXIDE MOS TRANSISTORS by Jin Cai August 2000 Chairman: ChihTang Sah Major Department: Electrical and Computer Engineering Surface recombination and channel have dominated the electrical characteristics, performance and reliability of p/n junction diodes and transistors. This dissertation uses a sensitive directcurrent current voltage (DCIV) method to measure base terminal currents (IB) modulated by the gate bias (VGB) and forward p/n junction bias (VpN) in a MOS transistor (MOST). Base terminal currents originate from electronhole recombination at Si/SiO2 interface traps. Fundamental theories which relate DCIV characteristics to device and material parameters are presented. Three theorybased applications are demonstrated on both the unstressed as well as hotcarrierstressed MOSTs: (1) determination of interface trap density and energy levels, (2) spatial profile of interface traps in the drain/base junctionspacecharge region and in the channel region, and (3) determination of gate oxide thickness and impurity doping concentrations. The results show that interface trap energy levels are discrete, which is consistent with those from silicon dangling bonds; in unstressed MOS transistors interface trap density in the channel region rises sharply towards source and drain, and after channelhotcarrier stress, interface trap density increases mostly in the junction spacecharge region. As the gate oxide thins below 3nm, the gate oxide leakage current via quantum mechanical tunneling becomes significant. A gate oxide tunneling theory which refined the traditional WKB tunneling probability is developed for modeling tunneling currents at low electric fields through a trapezoidal SiO2 barrier. Correlation with experimental data on thin oxide MOSTs reveals two new results: (1) hole tunneling dominates over electron tunneling in p+gate pchannel MOSTs, and (2) the small gate/drain overlap region passes higher tunneling currents than the channel region under depletion to flatband gate voltages. The good theoryexperimental correlation enables the extraction of impurity doping concentrations, which complements the DCIV method. Two fundamental theories of interband tunneling are developed to correlate with the VGB dependence of drain/base p/n junction currents: (1) direct tunneling at the drain/base junction perimeter with and without the quantization effects in the base surface accumulation layer, and (2) interface trap assisted tunneling in the gate/drain overlap region. The second theory gives better correlation, which is further supported by the DCIV peaks originated from interface traps in the gate/drain overlap region. CHAPTER 1 INTRODUCTION One of the most significant advancements in silicon transistor technology development was the passivation of silicon surface by a thermallygrown oxide layer some forty years ago [1,2]. Today, the metaloxidesemiconductor (MOS) transistor has become the most important building block of ultralargescaleintegrated (ULSI) circuits. In MOS transistors, electrical currents conduct in silicon surface channels directly underneath the silicon/silicon dioxide interface. The mismatch of amorphous thermal SiO2 and crystalline Si at the interface gives rise to point defects such as the unpaired silicon dangling bond which acts as an electronic trap. The intrinsic interface trap density after the thermal oxidation step can be as high as 5x012cm2, corresponding to a fractional occupancy of 0.6% of a (100) silicon plane, most of which are passivated by hydrogenation in a forming gas annealing step, to give a residual active interface trap density on the order of 1010cm2 in asmanufactured MOS transistors. However, during transistor operation, passivated interface traps can be reactivated and new interface traps can be generated which degrade MOS transistor performance by lowering its subthreshold slope and increasing its leakage current. Traditional smallsignal measurement techniques such as the MOS capacitance voltage method can only resolve interface trap density higher than about 101cm2 and can not detect manufacturing residual interface traps on stateoftheart MOS transistors. The seminal work on surface recombination and channel by Sah [3,4] was recently extended by Neugroschel and Sah [5] in 1995 to develop a sensitive technique known as the DCIV methodology that measures the DC recombination current of injected minority carriers at interface traps. The sensitivity is achieved by forwardbiasing a p/n junction in a MOS transistor structure to exponentially raise the injected minority carrier concentration. In the past five years, many DCIV application papers and reports have been published which include delineation of interface trap generation/annealing kinetics on electricallystressed transistors [6,7] and diagnosis of transistor design and manufacturing processes on prestress transistors [810]. This dissertation analyzes the theoretical basis of the DCIV method and develops theorybased new applications for characterization of scaled MOS transistors with very thin gate oxide. In chapter 2, the gatevoltage controlled interface trap recombination current from the baseterminal is analyzed using the ShockleyReadHall steadystate recombination kinetics to provide analytical expressions for DCIV lineshape, linewidth, peak voltage and peak amplitude. It is predicted by the theory that DCIV peaks in the intrinsic to flat band gate voltage range originate from interface traps located in the channel area, while additional peaks in the surface accumulation range originate from interface traps covering the gated p/n junction spacecharge region. A new application to determine interface trap density and energy level from the forward p/n junction bias dependence of the DCIV peak current is proposed and demonstrated on both unstressed and channelhotcarrier stressed MOS transistors. The distortion of DCIV lineshape from minority carrier injection level and diffusion is also analyzed. In chapter 3, spatial distribution of interface traps in the gated p/n junction space charge region (JSCR) is shown by theory to affect the DCIV lineshape in the gate voltage range between the weak inversion of the channel area and the weak inversion of the gateoverlapped drain area. In this gate voltage range, the recombination rate per unit interface trap is sharply peaked in the JSCR due to rapid lateral variation of minority carrier concentrations. Based on this discovery, an algorithm is developed to determine spatial density profile of interface traps which has a resolution of 3nm. For interface traps located outside the JSCR in either the channel area or the drain area, the gate voltage that gives the peak recombination current depends only on transistor parameters such as the channel and drain doping concentrations. Thus these peak voltages provide a means to probe the MOS transistor design parameters. An analytical threeparameter formula is given to fit the forward junction bias dependence of DCIV peak voltage for the extraction of gate oxide thickness, impurity doping concentration and flatband voltage. MOS transistor has been aggressively downscaled in the past 25 years to increase its speed while reducing its manufacturing cost at the same time. This trend will continue in the near future [1112]. In each technology generation, gate oxide thickness is scaled almost in proportion to the channel length, while the Si/SiO2 interfacial layer can not be scaled and becomes a more significant part of the total SiO2 thickness in thin oxide MOS transistors. The DCIV method will continue to be a powerful tool for evaluating interface reliability as well as for characterizing transistor design. On thin oxide MOS transistors, DCIV measurements show baseterminal current that rises with gate voltage, due to (1) increased gate oxide tunneling current at both inversion and accumulation gate voltages, and (2) increased current flow through forwardbiased drain/base p/n junction at accumulation gate voltages. Quantitative understanding of these two phenomena will not only provide accurate baselines for DCIV peak analysis, but also enable new techniques for the characterization of scaled MOS transistors. Recent experimental data on ultrathin oxide (1.0nm3.0nm) MOS transistors [13] prompted us to develop a gate oxide tunneling theory that takes into account all three tunneling particle species (electrons, holes and valence electrons), which is presented in chapter 4. Theoryexperimental correlation will prove two results: (1) hole is the dominant tunneling carrier in p+ gate pchannel MOS transistors, which was not recognized previously, and (2) the much smaller gate/drain overlap area passes higher current than the channel area in the gate voltage range between flatband and strong inversion [10,13]. Experimental tunneling currents from gate, source/drain, well and substrate terminals will be matched with the tunneling theory from which transistor design parameters such as oxide thickness, impurity doping concentrations in the channel and drain areas are determined. In chapter 5, physical origins for the increased DCIV baseterminal current at accumulation gate voltages are investigated. Two theories of interband tunneling are considered: (1) direct tunneling at the drain/substrate junction perimeter including the effects of quantized surface accumulation layer, and (2) interface trap assisted tunneling in the gateoverlapped drain area. The second theory has a lower threshold gate voltage 5 and predicts a ShockleyReadHall recombination current peak from interface traps located in the overlap area, both of which are supported by experimental data. We will summarize and conclude the dissertation in chapter 6. CHAPTER 2 INTERFACIAL ELECTRONIC TRAPS IN SURFACE CONTROLLED TRANSISTORS 2.1 Introduction Surface recombination and channel have dominated the electrical characteristics, performance, and reliability of p/n junction diodes and transistors. Due to the technological importance, extensive research efforts have been undertaken to study interfacial electronic traps at the Si/Si02 interface and to delineate their microscopic (atomic) origins [14]. Two kinds of densityofstates (DOS) spectra were repeatedly observed in the energy gap of silicon: two DOS peaks near the midgap and a Ushaped distribution that rises towards the two band edges. The discrete energy levels are characteristic of point defects at the Si/SiO2 interface, while the Ushaped bandtail states are from random variations of SiO bond length and bond angles [15]. These conclusions were supported by early works of molecularorbital calculations of Si/SiO2 interfacial electronic structures [16,17]. The peaked DOS were correlated to the trivalent silicon dangling bond (Pb center) on oxidized (111) silicon [1820] and its two variations (Pbo and Pbl centers) on oxidized (100) silicon by the electron spin resonance (ESR) experiments [19,21]. Recent studies using ESR on oxidized silicon and spindependent recombination (SDR) on MOS transistors reveal that the two Pb centers on (100) Si have different generation and annealing kinetics. Electric field stress including the nonuniform channel hot carrier stress [22] and the uniform FowlerNordheim stress [23] creates mostly PbO centers, while both centers can be either passivated or generated by atomic hydrogen [24,25]. The structural difference among the three Pb centers can be grossly described by the direction of the single unpaired Si sp3 hybrid orbital. It points to a normal <111> direction for both the Pb center on (111) Si and the Pb center on (100) Si, while it points nearly along <211> for the Pbl on (100) Si [26]. Multiple DOS peaks of yet another origin were observed by 10.2eV lightinduced hole injection in MOS capacitors annealed in oxygen ambient which could be from oxygen dangling bonds at the Si/Si02 interface [27]. While electron spin resonance has been used to identify the atomic structures of interface traps on large area (~lcm2) oxidized silicon wafers, other techniques are more traditionally used to monitor interface traps in MOS transistors and MOS capacitors in manufacturing facilities. This includes MOS capacitance [28,29] and conductance [30] methods and more recently the chargepump method [31] and DCIV method [5]. Routine manufacturing processes have reduced interface trap areal density to below 1010cm2 by slow cooling after hightemperature oxidation steps and by postoxidation annealing in hydrogen. At this low density, the DCIV technique has its unique advantage in sensitivity over the other smallsignal and transient techniques. The principle of DCIV is the use of a surface potential controlling gate terminal voltage, VGB, to modulate the baseterminal DC current, Ig, from electronhole recombination at the SiO2/Si interface traps [3,4]. The DCIV methodology, which gives a family of IBVGB curves from MOSTs and gated p/n junctions, was recently developed by Neugroschel and Sah [5] to monitor the density of oxide and interface traps generated by hot carriers (HC) in bipolarjunction and metaloxidefieldeffect transistors (BJTs and MOSTs) in order to determine the transistor failure rate and 10year operation time tofailure (TTFop) voltage [32]. Its application was extended to monitor the degradation rate of transistors stressed at high currentdensities and low voltages (HJ), and to delineate the origin of hydrogenrelated interconnect degradations [6,7]. Recent demonstrations showed that the DCIV method could serve as a highly sensitive diagnostic monitor for transistor designs [8] and manufacturing processes [8,33]. The DCIV lineshape (i.e. Ig vs VGB around the IBpeak) was also used to obtain the electronic and quantummechanical properties of the residual SiO2/Si interface traps on stateof theart thermally grown thin gate oxides [34]. This chapter reports the elementary theory of the IBVGB characteristics to help quantify the applications of the DCIV methodology for the extraction of fundamental and applicationspecific properties of transistors and interconnects and their materials, such as the physical (spatial location and density) and electronic (quantum density of states) properties of the residual and stressgenerated interface and oxide traps, the dopant impurity concentration profiles, and the hydrogen sources. Analytical solutions and their physical models are presented first to illustrate the effects of material and interface trap parameters on the IBVGB lineshape and on the VGBpeak value at the IBpeak. Application examples are then given for the processresidue and hotcarrier generated interface traps on thin thermally oxidized gateoxide of production MOS transistors. 2.1 Carrier Recombination in MOS Transistor Channel Region In DCIV measurements, excess minority carriers are injected by a forward biased p/n junction into the MOSgated SiO2/Si interface which covers MOST's channel region (denoted by MCR for midchannel region) and drainsource junction space charge region (JSCR). The p/n junction can be located either away from the gated interface, such as the well/substrate junction (bottomemitter, BE) and a remote p/n junction (remoteemitter, RE) or under the gated interface, such as the source or drain p/n junction (sourceemitter, SE, and drainemitter, DE, or topemitter with sourcedrain tied to the same forward bias voltage). The IBVGB theory is presented for these injection bias configurations. The IBJSCR current is especially important for factory applications to monitor channelhotcarriergenerated interface traps, while the IBMCR current is also useful for determining the electronic properties of the processresidual and stressgenerated interface traps. Modifications of the theory by DCIV bias configurations, diffusion, dopantimpurity profiles and 2dimensional geometries are then discussed. Figure 2.1 is the energy band diagram of the metaloxidesilicon structure with a forwardbiased p/n+Si bottom emitter (BE) junction. It is labeled in detail to help describe the approximations of the analyses as follows. All voltages are normalized by kT/q. The BE is forwardbiased at UBE while the DC voltage applied to the gate G1 UGB>O UGB > 0 G ISi02 Oxidel n+Si Emitter B UPN UBE E, E Up Bg IB BQNR XB  X=O X=XBO Fig. 2.1 Energy band diagram and crosssectional view of a gated SiO2/pSi/n+Si structure with the p/n' junction forward biased. UN and Up are respectively the electron and hole quasiFermi potentials normalized to thermal voltage (kT/q). Labeled on the figures are the terminologies (gate, base, and emitter), dimensions [XBO and XB(VGB,VEB)], and the normalized (to kT/q) voltages and quasiFermipotentials (UGB, UFB=FlatBand, and Up, UN). relative to the pSi base is UGB. UN and Up are electron and hole quasiFermi potentials in pSi and their difference, known as the quasiFermipotential split, is UPN=UpUN which is slightly smaller than the applied BE voltage, UBE. A formula for AUpN will be derived later. In the quasineutral region of pSi base (BQNR), the quasiFermi potentials are: Up= + log{ (N+4niexpUpN) 1/2+N] /2ni} (2.1) UN log{ [ (N +4nexpUpN) 12 ] /2ni} (2.2) The electron and hole concentrations at the SiO2/Si interface (Ns and Ps) are modulated by the gate voltage via bending the Si energy band. The total energy band bending is denoted by the surface potential Us=U(x=0,y). There are four fundamental transition processes between the continuous band states of silicon crystal and the localized trap states with an energy level ET in the Si energy gap, as shown in the transition energy band diagram of figure 2.2. The rate (event/second) of the four processes can be conveniently described by: (a) electron capture from the conduction band at Cnn(NTTnT), (b) electron emission to the conduction band at ennT, (c) hole capture from the valence band at cppnT, and (d) hole emission to the valence band at ep(NTTnT). Here n and p are electron and hole concentrations in the conduction band and valence band respectively, NTT is the total density and nT is the electronoccupied density of trap states, and e's and c's are emission and capture rate coefficients of the four processes which depend on the energy levels of both the trap state and the band state. These transition processes are mostly thermal involving emission and capture of phonons (ho). Since the indirect energy gap Ec niio) en T ^ G nl hi notio) 1.12eV ep (NTTnT) Fig. 2.2 A transition energy band diagram showing four fundamental transition processes between a band state and a gap state in silicon: capture of a condition band electron by the trap (a), emission of an electron to the conduction band from the trap (b), capture of a valence band hole by the trap (c) and emission of a hole to the valence band from the trap (d). The volume density of band electrons, band holes, electronoccupied traps and total traps are n, p, nT and NT respectively. The rates of the four process are shown in terms of e's and c's. Purely thermal emission and capture processes involve multiple phonons. 4 I nT i Cp pnT Cn n(NTTnT) \^" n2 n2tiM of Si is 1.12eV and the maximum optical phonon energy in Si is only about 60meV, the thermal capture and emission processes could involve about ten phonons for midgap trap levels. Theoretical calculation of a multiphonon process was first done by Huang and Rhys [35] and later refined by Huang [36]. In contrast to the lattice scattering process which can be treated by taking the linear coupling of electron Coulomb potential and lattice vibration as the perturbation to calculate the scattering rate, the multiphoono process can not be treated in such a way since the linear coupling term could only result in the emission and capture of a single phonon. Instead, the breakdown of the adiabatic approximation [37] was used as a perturbation to compute the transition rate between the band state and the trap state while the linear coupling term was used in the time independent perturbation theory to compute the lattice distortion/relaxation [38] in the initial and final states. The firstprinciples calculation of the capture crosssections in a multiphonon process is rather laborious. For the purpose of developing a theory for the DCIV methodology, it would suffice to use the phenomelogical kinetic theory developed by Shockley and Read, and by Hall [39] which treats the fundamental capture and emission rates as constants independent of kinetic energies of band electrons and holes. The steadystate areal rate, Rss, of electronhole recombination at a discrete energylevel interface trap (the equilateral triangle in Fig. 2.1), located at UTI from the intrinsic Fermi potential, with a density of NIT (#/cm2), is given by the ShockleyRead Hall formula: (CnsCpsNsPS enseps) Rgg = NyI = RSSN *IT (2.3) CnsNS + ens + CpsPS + eps Cns, Cps, ens and eps are the electronhole captureemission rate coefficients at the interface traps. From detailed balance near thermal equilibrium, c's and e's are related by ens = Cnsniexp(UTI) and eps = Cpsniexp(UTi). Using Boltzmann representation, Ns=niexp(UsUN) and Ps=niexp(UpUs), then (1) becomes (1/2) (cnscps )1/2n exp(UPN) 1] RSS = NIT RggSsNIT exp (UpN/2) cosh (Us) + cosh(UTI,) (2.4) where Us.(x=O) = Us+loge(cns/cps)/2(Up+UN)/2, and UTI* = UTI loge(Cns/Cps)1/2. The expression (2.4) is exact with no approximations other than the thermal Boltzmann distribution with lattice temperature T. It immediately shows the presence of a peak at Ugs=0. The peak magnitude and the surface potential at the peak are (1/2) (cnscps) 1/2ni[exp(UPN)1] RsSpeak = NIT exp(UPN/2) + cosh(UTI*) SRSS1peak NIT (2.5) USpeak = (U+UN) /2 loge(Cns/Cps)1/2 (2.6) The peak formula (2.6), was derived by Sah et al. in 1957 [40]. The half width at half maximum (HWHM) of the RssUs line is: AUs = cosh1[2+exp(UpN/2) cosh(UTI, )] (2.7) = cosh1(2), for UpN > 2(IUTII + 4) = UTI, (UpN/2) for UPN < 2(IUTI*I 4) The HWHM drops to the narrowest, (cosh'2)*(kT/q)=1.32kT/q=34mV, at high VPN and widens to UTI* at low VpN. Results (2.4)(2.9) are valid at all injection levels in both p and nSi. For singlediscrete level interface trap, they predict a peak body terminal recombination current, given by IBpeak = qRsslpeak NiTdydz that is proportional to exp(UpN/n) with a transition of n from 1 to 2 over a small range of forward bias, about AUPN=4 or AVpN=100mV. This result gives two important consequences. First, for a single species of interface traps with a spatially varying concentration, the DCIV lineshape will not change due to the ydistribution of NIT. Second, if there are many interface trap species, each with a different energy level EI*, IB is then just the superposition of the bellshaped Rss curves one from each of the energy levels or species with different peak locations in VGB, resulting in a broadening and generally bellshaped multipeak DCIV curve [34] and an nslope between 1 and 2 over a larger range of VPN. For low injection levels, traditionally defined as N < NAA/10 in pSi, we have Up=UF>O for pSi (UN=UF<0 for nSi), where UF is the majority carrier Fermi potential. This is the common application range of the DCIV methodology. At low levels, equation (4) becomes: USpeak = UF UPN/2 loge(cns/Cps)1/2 (pSi) (2.8) = UF + UpN/2 loge(cns/cps)1/2 (nSi). (2.9) Thus, the peak is in the flatband to intrinsic gatevoltage range (0 this gatevoltage range, Sah [41] had given a formula for Vs(VGB) listed in (2.10) below which we shall use to obtain the analytical solutions for the IBVGB linewidth. Vs = VGB VFB  2.sign(Vs) *VA{ [1+(VGBVFBkTAD/q) /VA]1/2 1} (2.10) VFB is the flatband voltage, VAA=sqNAA/2C2x where Cox=Eox/Xox is the oxide capacitance per unit area, and AD=l in this range [41]. The last term in (2.10) is the voltage drop across the oxide layer, whose error is negligible when using AD= 1 until Vs is about kT/q from the flatband condition. The VGB at the peak can be solved from (2.10) in terms of VSpeak given by (2.8) and (2.9): VGBpeak VFB = VSpeak + 2 sign (Vspeak) (VAA I VSpeak )1/2 (2.11) Thus, the DCIV peak location is determined, via VSpeak, by the substrate impurity concentration, trap parameters in terms of loge(cns/cps) and oxide thickness (from VAA). The halfwidth at half maximum (HWHM) of the DCIV peak is: AVGB = AVs + 2fv [ Vspeak VSpeak I AVs (flatband side) (2.12) = AVs + 2 fv [ VSpeakl+AV Vspeak ] (intrinsic side) (2.13) Since Rsg is symmetric around the peak in Vs, (2.12) and (2.13) show that the DCIV Ig VGB lineshape is asymmetric and slightly wider on the flatband side of the peak than on the intrinsic side. The difference is on the order of 0.5(VAAVSpeak)/2(AVs/Vspeak)2 which is more pronounced in transistors with thick oxide and high surface impurity concentration. At high injection levels with N > 10NAA, we have Up=UN or the electron and hole concentrations are nearly equal in the BQNR, and the maximum surface recombination rate is near the flatband. The exact result is USpeak = loge(cps/cns)1/2 derived from (2.6). So the peak could not move deeply into accumulation range even at extremely high forward bias since cps/cns is not likely to be outside of the range of 0.01 to 100 for any physically realistic bound state. The linewidth at the high injection level limit is obtained from the general MOS voltage equation in pSi, VGB(Vs): VGBVFBVS = sign(Vs) (kT/q) . {2UAA[ (euslUs) (a1) + (eUS1+Us) (a+1) ]}12 (2.14) where a = [1 + 4n2exp (UpN) /NAA]1/2. At high injection levels, a = 2exp[(UpN/2)UF] >> 1. Only one term in the { } of (2.14) will dominate, depending on the sign of Us: VGBVFBVS = 2 (kT/q) (UA) 1/2sign (U) exp [ ( I Us I +UN/2UF) /2] (2.15) The halfwidth of the DCIV line is then AVGB AVS = 2 (kT/q) (e+AUS/21) [U Cps/Cnsexp (UN/2UF) ] 1/2 (cps>cns,Vs>0) (2.16) 2 (kT/q) (1eUs/2) [U, Cns/Csexp (UPN/2UF) ]1/2 (Cps These results show that the Full Width Half Maximum (FWHM) has the exp(UpN/4) dependence on forward bias at high injection levels. Thus, at low injection levels, the IBVGB linewidth can be large which is determined by the trap level, ETI. The linewidth then decreases with increasing VpN (to about FWHM=70mV for very thin oxide) until the onset of high injection level condition, beyond which it increases exponentially with VpN. Figure 2.3 shows the theoretical and normalized DCIV lineshapes or the unit steadystate recombination rate, Rssi vs VGB. The shape changes with increasing forward biases, VpN, applied to a n+/p junction in pSi with an acceptor impurity concentration of NAA=1017cm3, an oxide thickness of 5.0nm, and a discrete interface trap level at ETI.=200meV. For VpN maximum Rss1. The linewidth gradually decreases with increasing VpN and reaches the high injection level asymptote as indicated by the dashed line at VpN=900mV. 2.3 Carrier Recombination in MOS Transistor Junction SpaceCharge Region The preceding IBVGB theory applies to interface traps over MOST's mid channel region. This IB component will be denoted as the IBMCR. The MCR formulas assumed that there is no lateral variation of the carrier concentrations, thus, the surface energy band bending Us is constant, independent of y, at a given gate voltage. For interface traps over MOST's source and drain JSCR, the foregoing analysis needs to be extended to take into account of Us(y) in the JSCR. These interface traps contribute a second component to Ig, denoted as IBJSCR, when source, drain or both of them are forward biased. Figure 2.4 illustrates the crosssectional view and the energy band diagram at the SiO2/Si interface, x=0, of a forwardbiased abrupt p/n+ junction. In Fig. 2.4, the buildin potential of the p/n+ junction is given by MOST \ a, I "I N VPN I I VPN CZ 900mV +i I =0 E II L I 0 0.5 0 0.5 1.0 VGBVFB /(1 V) Fig. 2.3 Theoretical normalized DCIV lineshapes as a function of minority carrier injection levels, VPN. Parameters used are as follows. VpN=0900mV at 100mV intervals with OmV and 900mV the asymptotes. pSi with NAA = 1017cm3. ni=101cm3. Oxide thickness Xox=5.0nm. Discrete interface trap at ETI = 200meV from the intrinsic Fermi level (midgap) with Cns=Cp = 10cm3/s, and NIT=low0 but arbitrary since normalized. G Fig. 2.4 The xcross section view of the twodimensional energy band diagram of a p/n' junction on the SiO2/Si interfacial plane, x=0. The onesided junction space charge region extends from y=0 to Y=YEB in the pSi. VBI = builtin potential of the p/n' junction, VB = p/n+ barrier height = VBI Vs VpN, Vs = surface band bending outside the JSCR, and VpN = Vp VN = forward bias voltage applied to the p/n+ junction disregarding voltage or potential drops. All labeled potentials are normalized to (kT/q) with subscripted (#) symbol U#=qV#/kT. VBI=(kT/q)loge(NAANDD+/n2). The total normalized barrier height at the surface of the p/n+ junction is: UB=UBIUPNUsx+USE (2.18) where Usx and USE are the surface band bendings outside of the JSCR in the MCR and in the emitter (n+drain) region respectively. We use U(y) to represent the normalized surface potential in the JSCR along the interface from y=0 at the junction boundary to Y=YEB at the pedge of the JSCR, with U(YEB)=Usx given by boundary condition. For the onesided p/n+ junction, the n+ side JSCR is much smaller than the p side JSCR and the lateral (ydirection) voltage drop across the n+ side JSCR can be neglected. However, the vertical (xdirection) surface band bending in the n+drain is significant at large negative gate biases even for highly degenerate doping concentrations. Figure 2.5 shows surface band bendings Vsx in part (a) and VSE in part (b) for the gated p/n+ junction as a function of gate to psubstrate voltage VGB with the drain to psubstrate forward bias VDB=VPN as a parameter. The results were obtained by solving onedimensional MOS capacitor equations taking into account of non equilibrium minority carrier concentrations. At VGB<IV when the psubstrate surface is strongly accumulated, surface band bending in n+ drain with NDD=1019cm3 becomes more significant than that in the psubstrate with NAA=1017cm3. VSE reaches 1.0V at VGB=3V under a 100mV forward bias, while Vsx is at 0.25V at the same gate voltage and is independent of forward bias. It shows that under the surface accumulation VGB range, Vsx is the dominant term in eqn. (2.18) for UB and therefore indispensable in evaluating the surface potential U(y) in the JSCR. I I1tyrCt. UA IV U 11 > 0.6 ox: 3.0nm CX 0.3 800mV 0 a) 0.3 I I II i 0.3 I I I n+Drain: 1019cm3 0 S 800mV > 0.3 0.6 VpN=OmV 0.9 1.2 3 2 1 0 1 VGB /(1V) Fig. 2.5 Surface band bending in (a) psubstrate, Vsx and (b) n+ drain, VSE as a function of gate voltage, with the forward bias on the drain/substrate junction as a parameter that varies from OV to 800mV with a step size of 100mV. Transistor parameters include doping concentrations: NAA=107cm3 in psubstrate, NDD=1019cm3 in n+ drain and 5x109cm3 in n+ polysilicon gate, and gate oxide thickness of 3.0nm. The carrier concentration at 0 N (y) = niexp[U(y) UN] = niexp[Usx+U(y) U (YEB) UN] Pg (y) = niexp [UpU(y)] = niexp[UpUsxU(y) +U (YEB) ] IBJSCR is then obtained by integrating Rss, given by (2.3) over the JSCR, which (2.19) (2.20) gives YEB NIT(y)dyZ IBJSCR = IBJO (2.21) 0 exp(UpN/2)cosh(UsJ) + cosh(UTI,) where for the p/n+ junction IBJO = q(CnsCps) 1/2(ni/2) [exp(UpN)l] (Ampere) (2.22) US* = Usx + U(y) U(YEB) (Up+UN)/2 + 1oge(cns/cps)1/2 (2.23) Two NIT spatial distributions will be considered: (1) Localized NIT(y)=NIT6(y YT) and (2) uniform NIT(y)= NIT = constant. The localized interface trap distribution is expected for channelhotcarrier generated traps in MOSTs from Sah's Si:H bond breaking model [42] in which the generated silicon dangling bonds are concentrated at the location near the drain junction towards the source where the secondary hot carrier kinetic energy reaches the Si:H bond energy (3.1eV). For the localized spatial distribution, IBJSCR has a peak when Us,*=0 in (2.23), which gives: USXJSCRpk = (Up+UN)/2 loge(Cns/Cps)1/2 [U(YT) U(YEB) = USXMCRpk (YT) U(YEB)] (2.24) This shows a general result: the IBJSCR peak is always at the accumulation gatevoltage side of the IBMCR peak. For interface traps located closer to the p/n+drain junction boundary, y=0, [U(YT>O)U(YEB)] in (2.24) is larger and the peak is further into the accumulation VGB range. Quantitative results can be obtained from analytical solutions when aEx,/axl< does not modulate the potential variation inside JSCR, only outside in the MCR. Then, using the depletion approximation, U(y) assumes the quadratic form illustrated in Fig.3 given by U(y) U(YEB) = (q/kT) (qNA/2cs) (YEB y)2 = (YEBy) 2/2L2 0 where LD = [(kT/q)(Es/qNAA) 1/2 is the Debye screen length in psubstrate, U(YEB)=USX and the JSCR barrier height is given by Ug = U(0) U(YEB) YB/2La. The thickness of the JSCR, YEB, is determined from the barrier height UB. Using (2.18) and (2.25), we derive the following expression for the surface potential at the trap location y=YT inside the JSCR in terms of surface band bendings outside of the JSCR, Usx and USE: U(YT) = UBI UpN + USE  2 [UYT(UBIUsxUpN+USE) 1/2 + UYT (2.26) where UyT Y 2LD. At IBJSCR peak, U(YT) satisfies equation (2.6), which together with (2.26) provide the following equation to relate the two surface band bendings at the peak: USXJSCRpk = UBIUPN+USEJSCRpk (1/4UYT) X [UBIUN/2 UF+USEJSCRpk+UYT+ 1ge(Cns/Cps)1/2]2 (2.27) The surface band bendings outside the JSCR in psubstrate and n+ drain are both determined by the gate voltage through the onedimensional MOS capacitor equation. Thus eqn. (2.27) provides a means to numerically solve the two surface band bendings at IBJSCR peak. The result of IBVs HWHM (denoted by AVs) in equation (2.7) applies to all NIT locations, while the result of IBVGB HWHM in (2.10) and (2.11) applies to NIT in JSCR only if U(YT)U(YEB) < USXMCRpk so that USXJSCRpk in (2.24) will not change sign, which corresponds to NIT located near the pedge of the JSCR. If the condition is not satisfied, then AVs translates differently to AVGB because the peak is now in the accumulation range while (2.10) of VGB(Vs) is valid only for the depletion range. To give an analytical solution in the accumulation range, we use the asymptotic Vs(VGB) equation given by [41]: Us = loge (UGBUFBUs)2/4U + AA] (pSi) (2.28) with AA= 1, then the HWHM of IBVGB is given by AVGB = AVs + 2 (kT/q) 4U exp( UIsxJscRpk /2) [exp (AUs/2) 1] (accum. side) (2.29) AVGB = AVs + 2 (kT/q) JUAexp( IUsxJSCRpk /2) [1exp(AUs/2) ] (FB side) (2.30) To compare the linewidth of JSCR peak to that of the MCR peak, we examine the change of surface potential U(YT) with respect to an infinitesimal change of VGB by taking the derivative of eqn. (2.26), which gives: AU(YT) = [1(UyT/UB) /2AU]sE + (UYT/UB)1/2AUsx = [1(YT/YEB)1/2]AUSE + (YT/YEB)1/2AUS (2.31) In the limit that the interface traps are located near the MCR (YTYEB), the JSCR peak is close to the MCR peak with gate voltage corresponding to the weak inversion of p substrate surface where IAUsE< near the drain region (YT>O), the JSCR peak is close to the drain peak where IAUsEI>>AUsxl, refer to Fig. 2.3. Therefore the two asymptotic limits of (2.31) are: AU(YT) = (YT/YEB)1/2 AUSX YTYEB, near MCR (2.32) AU(YT) = [1(Y,/YEB)1/2] AUSE YTO, near drain (2.33) The above equations clearly show the DCIV linewidth dependence on the spatial location of the interface trap YT. If the interface traps are near the two edges of JSCR, the DCIV linewidths approach those of the MCR peak and the drain peak respectively, as AU(YT)=AUsx at Y,=YEB and AU(YT)=AUsE at YT=O. The DCIV linewidth increases as a function of (YEB/YT)1/2 as the location of NIT moves away from the MCR edge into the JSCR, it increases as a function of 1/[1(YT/YEB)1/2] as the NIT location moves away from the drain edge. In case of a spatially constant NIT, we shall evaluate the IBJSCR integral, (2.21), analytically to describe the dependence of this current component as a function of VpN. Since the integrand is expected to be a bellshaped function with a maximum surface recombination rate at y=YM that satisfies UsJ =0 in (2.23) we can use the Taylor series to expand the integrand about y=YM and keep terms up to the second order. The result is then 22qc cnsCpsniNITZ IB= 3(q EM /kT) [exp(UpN) 1] (2.34) exp (UpN/4) [exp (UpN/2) +cosh (UTI.) ]1/2 EM is the electric field at the position YM(VGB). EM varies with a lowpowerexponent of VpN so that the Ig dependence on VpN is dominated by the exponential dependence of VpN shown in numerator and denominator of (20), which predicts a n=1.33 to n=2 transition from low forward biases to high forward biases with a transition range of about UpN8 =200mV. 2.4 Diffusion Limitation and Other NonIdeal Factors DCIV measurement on MOS transistors can use four different bias configurations to inject minority carriers to the SiO2/Si interface [8], as illustrated in figure 2.6. They are the drainemitter (DE), sourceemitter (SE), topemitter (TE) with both source and drain junctions tied and forwardbiased together, and the bottomemitter (BE) in transistor structures having a well/substrate p/n junction which can be forward biased. In each of the bias configurations, the p/n junctions not forward biased are zero biased (they can also be reversebiased or even forwardbiased at a lower voltage). In the first three gatedemitter configurations (DE, SE, TE), the bodyterminal current Ig has two surface recombination components: from the MCR, IBMCR, and from the one or two emitterbase JSCRs, IBJCR, while in the ungated BE configuration, IB contains only IBMCR because the drain and source p/n junction collectors are grounded so their IBJSCR=0. However, the zerobiased source and/or drain p/n JSCR's also reduce the interface minority carrier concentrations in the MCR. This lowers IBMCR and changes the IBVGB lineshape which becomes appreciable in short channels. A more prominent SourceEmitter TopEmitter BottomEmitter Fig. 2.6 Four DCIV bias configurations: (a) Drainemitter, (b) Sourceemitter, (c) Topemitter, and (d) Bottomemitter. (d) DrainEmitter lowering and shapechange of IBMCR arises from the 2dimensional geometrical edge effect due to the proximity of the grounded collector and forwardbiased emitters in the thinbase whose base thickness under the drain and source junction, is comparable with the metallurgical channel length. Another source of deviation from the simple ideal theory comes from the 2D impurity doping profiles as a result of channel and junction engineering. Minority carriers injected from the body/well junction in BEDCIV will have a drift component due to the builtin field Ex(x) = (kT/q)d(logeNAA)/dx from the vertical impurity profile. The vertical profile also gives a variation of the injected minority carrier concentration near the source and drain junction perimeters. These would give a difference between the TE and BE lineshapes. The channel regions that have different NAA(x=0,y) and different oxide charge density, QoT(y), will shift VGB Of the DCIV peaks which are combined into a broader peak. Diffusion of the injected carriers in the BQNR (Base Quasi Neutral Region) can affect and even limit the terminal Ig, especially the IBVGB lineshape. For example, the interface recombination rate could be so high that the minority carrier concentration at the SiO2/Si interface is decreased below the injected value at the injecting p/n junction boundary, Ns < No = (n/NAA)exp(UBE). In the limit of NITo, Ns=(nf/NAA) or UpN(x)=0. The interface recombination and base diffusion mechanisms are in series. In contrast, bulkJSCR recombination (the SahNoyceShockley or SNS current component) and base diffusion mechanisms are in parallel [40]. Thus, the gate controlled terminal IB in the DCIV methodology is limited by the smaller of the two series current mechanisms, base diffusion current at low VpN and interface recombination current at higher VpN. A simple analytical solution to include diffusion limitation is obtained using VBE = VpN+AVpN and assuming that AVPN is mainly in the BQNR since the surfacespacecharge layer is much thinner than the BQNR. Then, AVPN(VBE) at the IBpeak can be obtained as follows by equating the interface recombination current to the diffusion current: JBpeak = [qni(CnsCp) 1/2NIT/2] . [exp(UN)l] / [exp (UpN/2) +cosh(UTI) ] (2.35) = JD = (qDB/Xg) (n /NA) exp(UpN) [exp(AUpN)I] (2.36) which gives exp (AUp) 1 = (NXB/niDB) [ (CnsCps) 1/2NIT/2] [lexp(UpN) ] / [exp(UPN/2) +cosh(UTI) ] (2.37) = 1000 [lexp(UN)] / [exp(UpN/2)+cosh(UTI,) ] (2.38) = 1000./cosh(UT*), for 0 = 1000.exp(UpN/2), for UpN>2[logecosh(UI) +2.3]=2(U( U, +1.6) (2.40) Dg is the minority carrier diffusivity in the base well of XB thick. The value of 1000 is obtained from using the following estimated typical values: cns=Cps=108cm3/s for a 0.3nm diameter neutral potential well of the interface traps and NIT=2 109cm2 (which give a surface recombination velocity of S=(cnsCps)/)2NIT=20cm/s); NAA=107cm3 at x=Xg, ni=10l1cm3, Dg=10cm2/s, and XB=104cm which gives (NAAXB/2DBni)=50s/cm. It is evident from the approximate results given in (2.39) and (2.40) that there could be a significant AUPN only at low UpN's and only if the interface trap energy level is near the midgap. The DCIV lineshape in this case will be distorted and have a diffusionlimited flat top. An interfacerecombinationlimited threshold VpN can be defined by equating the asymptotic current equations limited by recombination (2.36) and diffusion (2.37). Using the numerical values just listed, this gives UpNth = 2[6.908 cosh(UT*)] (2.41) The diffusion current JD given by (2.36) for constant NAA can be generalized to graded and retrograded profiles, NAA(x), by replacing the preexponential factor with the exact integral given by f [NAA(x)/DB(x)n?(x)]dx which is integrated over the quasi neutral base, x=0 to x=XB. This is the wellknown Gummel Number. 2.5 Application Examples DCIV measurements have been performed extensively since its revival in 1995 [5] on silicon micron and submicron MOSTs manufactured by 19881998 technologies with channel aspect ratios of W/L=100lm/100pjm to 10m/0.lgm and gate oxide thicknesses from 30nm to Inm. This section will present the DCIV curves obtained on both unstressed and hotcarrierstressed MOSTs to illustrate the theoretical analyses of the experiments. The data were from the large pMOSTs to minimize the 2D effects. The pMOSTs have W/L=50gm/50pm, 10.5nm gate oxide, NDD(interface) = 2x1017cm3 and a graded nwell with p+buried bottom emitter. The first examples are from unstressed pMOSTs where the IBVGB peak originates from the residue interface traps of the manufacturing processing steps. Figure 2.7(a) shows a family of normalized experimental BEDCIV curves in solid lines and theoretical curves in dashed lines based on EIr.=228meV and Nrr=7.8xl09cm2. These numerical values were obtained from a 2parameter leastsquaresfit [33] of the IBpeak vs VpN shown in Fig. 2.7(b) which shall be coined as the DCIV PeakPlot (PPlot). The Pplot fits very well only the discretetraplevel theory while the data deviate substantially from the theory computed from constant or Ushaped interface trap energy level distributions. Diffusion current was not included in this fit. Fig.7(a) indicates a good theoretical account of the lineshape at the strong inversion side while the experimental halfwidth is wider on the flatband side. Several sources contribute to the difference including: diffusion limitation at these low VpN values which would broaden the linewidth, larger surface impurity concentration than assumed from CV measurements and graded vertical doping profiles. Figure 2.8 shows the differences among the DE, SE, TE and BEDCIV curves measured at VpN=400mV on the same unstressed pMOST. The three gatedemitter configurations (DE, SE and TE) all show one narrow peak indicating low NIT concentrations inside the gated JSCR. Overlap of SE and DE curves shows good source/drain symmetry. The different VGBpak locations between TE and DE or TE and SE come from the lateral variation of the minority carrier (holes) concentration at the 105 mo 0 C) 1010 1015i 0 1 r 0) N 0 z 0.5 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Forward bias /(1V) 0 Gate Voltage 0.5 /(1V) 0.8 1.0 Fig. 2.7 Experimental BEDCIV's and PeakPlots on unstressed 50/50 pMOST compared with theories. Parameter values are: ETI*=228meV and NIT=7.8x109cm2 from leastsquaresfit to the discretelevel theory using cns=cps=108cm3/s (assumed), ni=10locm3, and from CgVGB data, NAA(x=0)=2xl017cm3, and Xox=10.5nm. (a) Peak Plots (Bpeak vs VPN) of experimental data (points) and theory from three assumed DOS's of interface traps: a: Discretelevel given above, b: constant DOS over EGSi with DIT = 7.1x109/cm2eV, and c: Ushaped DIT = 2.5x109cosh(ETl/200meV)/cm2eV. (b) Lineshape comparison with one discretelevel theory. I I 1 I I I a ' A  a) BbV  BEDCIV . 1  ,, Theory with NIT DOS / a Discrete (fitted) b,"" / b Constant a c .. Ushape 1 1 1 I I i I i ) r VpN=400mV a DE i ) b  SE Sc TE E d BE ,b  \i \ 0.5 0 0.5 1.0 Gate Voltage /(1V) Fig. 2.8 Experimental lineshape comparison of DCIV at VpN=400mV from four different measurement configurations (DE, SE, TE, and BE) on the 50/50 pMOST. interface, Ps(y), from Ps(0)=0 at the shorted source junction to Ps(L)=Pss[exp(UPN)l] at the forwardbiased drain junction in the DEDCIV bias configurations or vise versa in the SEDCIV bias configuration. Ps(y) is further reduced due to the finite diffusion length towards the MCR from the injection edge of the drain or/and source junction. These give a smaller effective channel interface recombination area and also a smaller effective VPN which would shift the peak location towards the VGB side as indicated by (2.9). Figure 2.8 shows that the IBVGB linewidth of the ungated emitter (BE) is almost doubled in comparison with those of the gated emitter (SE, DE and TE), which is due to carrier injection against a diffusion barrier from graded BQNR. These effects on the lineshape from junction and geometrical edge effects and impurity concentration profile, indeed, provide flexible variables that can be leveraged in the monitor application of the DCIV methodology for optimization of transistor designs and fabrication processes. For the second sets of application examples, the DCIV theory is used to evaluate the interface traps generated during the substratehotcarrier (SHC) and channelhot carrier (CHC) stresses of the same 50/50 pMOSTs used in the preceding unstressed examples. During the SHC stress, the p+buried/nwell junction is forward biased to inject a high concentration of holes into the strongly inverted hole surface channel which is reverse biased by a high reverse voltage applied simultaneously to the drain and source p+/nwell junctions. This high reverse voltage accelerates the injected holes to a kinetic energy greater than the Si:H interfacial bond energy (3.1eV) in order to release the hydrogen and generate the silicon dangle bonds, Si., which are the interface traps. Reasonably good lateral uniformity of interface trap generation was expected from using lowenough VBE and strongenough inversion VGB to minimize the lateral drop of the vertical acceleration potential due to channel ohmic resistance. Figure 2.9(a) shows the IBVGB DCIV lineshapes which indicates a larger experimental linewidth suggesting diffusion limitation. Figure 2.9(b) shows the DCIV PeakPlot, IBpeakVPN, which includes also the unstressed data that coincide the stressed data for VpN<400mV further indicating diffusion limitation. The stressgenerated interface traps are still quite discrete as indicated by the good fit to the discreteenergylevel model at high VpN's. The leastsquaresfit (LSF) stressedgenerated trap energy level, ETI = 280meV, should shift towards midgap when diffusion is taken into account. A second example of stressgenerated interface traps was obtained using the channelhotcarrier stress on the same 50/50 pMOST whose DCIV at VpN=350mV and PPlot are shown in Fig. 2.10. The unstressed peak near the intrinsic gate voltage (VBG=+0.IV) does not grow at all which is consistent with its MCR location where there are few if any hot carriers. The growing poststress peak is broad (FWHM 2V) and in the accumulation range (VGB=+1.8V). It has an n2 over many decades in the PPlot (inset of Fig.8) which suggests that the interface traps are mainly generated in the drain JSCR, as anticipated by the JSCRDCIV theory just described, and the CHC stress theory [42] where the channel hot holes and the secondary hot electrons are generated in the drain junction space charge region in the pMOST during stress. 104 CO 0 1 N Cz E 0 z _ <1 0.4 0.5 0.6 0.7 0.8 Bias /(1V) 1.0 Fig. 2.9 Experimental and theoretical LSFitted BEDCIV's from substratehot carrier (hole) stressed 50/50 pMOST. (a) The PeakPlots IBpeak vs VpN showing a discreteenergylevel interface trap at ETI.=280mV and NIT=5x10l'cm2. (b) Lineshape comparison with the discretelevel theory. Other parameter values are the same as those of Fig. 2.7. 0.1 0.2 0.3 Forward 0.5 0 0.5 Gate Voltage /(1V) 250 _"'l""'" ""111 11 "'1111 1 ' ' 200  C A n=2 150 n A _ 1 10141 0 0.2 0.4 m 100 Forward Bias B 50 CHH stress i \ ~ I  ..... _ 0 0.LL L Hl I 1 i i ri 1 I IIII 1 1 0 1 2 3 Gate Voltage /(1V) Experimental DEDCIV's taken on a channelhotcarrier (hole) stressed pMOST, with the PeakPlot of the stressedgenerated AIB.peak in the inset. CHC (CHH) stress condition: VSB=OV, VDB=7.0V, VGB=l.OV and t=1000 sec. Fig. 2.10 2.6 Summary Theory and experiments on gatevoltage modulation of the recombination rate at the interfacial electronic traps are quantitatively correlated in prestress and two poststress (channel and substrate hot carrier stresses) DCIV applications. The wider experimental linewidths could be an indication of diffusion limitation in the low forward bias range, and from 2dimensional effects at high forward bias range due to lateral variations of the interface minority carrier concentration along the gated conduction channel. The examples illustrate the identification of discrete interface trap energy levels and the near midgap energy level positions. CHAPTER 3 SPATIAL DENSITY PROFILE OF INTERFACE TRAPS FROM DCIV MEASUREMENTS 3.1 Introduction The DC basewell terminal (or pad) current, Ig, modulated by the applied gate/base DC voltage, VGB, in MOS transistors was a method recently reactivated to monitor electricfieldstress generated interface traps as a transistor reliability monitor [5] and to serve as a prestress diagnostic monitor for transistor design and processing [8]. The VGBmodulated Ig arises from recombination of the injected minority carriers by a forwardbiased p/n junction (Drain/Base, Source/Base, or Substrate/Basewell) with the majority carriers in the basewell, at the SiO2/Si interface traps under the gate oxide. Electronhole recombination can occur at interface traps under the gate oxide in three regions [3,4]: (1) the midchannel region MCR (2) the drain and source junction space charge regions DJSCR and SJSCR, and (3) drain and source lowlydoped extension regions DLDER and SLDER. A detailed theoretical analysis was presented in chapter 2 for the MCR and JSCRs. Some of our recent application demonstrations [8,33,34] focused on interface traps NIT in the MCR. However, recombination at interface traps in the other two regions, JSCR and LDERs, becomes increasingly important in unstressed transistors as the channel length is scaled down and it is wellknown that recombination in JSCR dominates in stressed transistors [8,43,44] regardless of the channel length [8,33]. It was anticipated [8] and analytically demonstrated in the previous chapter that the IBVGB lineshape and its VpN dependencies are affected by two lateral variations: the interface traps, NIT(y), [8] and the interface concentration of the injected minority carriers N(x=0,y) [8] in nchannel MOSTs or P(x=0,y) in pchannel MOSTs. This spatial dependency was analytically shown in chapter 3 to be substantial in the JSCR due to the rapid spatial variation of the carrier concentrations in the JSCR. We will now describe the procedures for obtaining the NIT(y) distribution and some transistor design parameters (gate oxide thicknesses and dopant surface concentration). The theoretical analyses and computed illustrations are given in section 3.2. Analyses of the experimental data to give transistor design parameters in the MCR and NIT(y) profiles in both the JSCR and MCR are presented in sections 3.3, 3.4 and 3.5 respectively. A summary is given in section 3.6. 3.2 Theoretical Analysis The analytical formulas were derived and described in chapter 3 for the ShockleyReadHall (SRH) steadystate recombination rate Rss at interface traps in the MCR and JSCRs. There is an additional VGBdependence of Rss from NIT in the LDERs, which will be included in this chapter. The present analyses for the LDER follow the steps for the MCR with two noticeable differences: (i) the nearly zero flatband voltage in the LDERs due to the same dopant type and nearly the same high dopant impurity concentrations in the Sigate and drain and source LDERs according to the traditional designs of digital CMOS transistors and (ii) the gatetodrain voltage is now VGD = VGBVDB = VGBIVPN (+ for nMOST and for pMOST) which gives Ig the additional VPN dependency, both are leverageable for NIT characterization described as follows. As illustrated by the computed potential variation curves in Fig.l, the (VpN) forwardbiasinjected minority carriers reduce the interfacial potential barrier height on both the MCRside (lower curves) and the LDERside (upper curves) of the JSCR shown in Fig. 3.1(a), and the total potential barrier height through the JSCR shown in Fig. 3.1(b). This VpN dependency significantly affects the DCIV or IBVGB lineshape from NIT's located in the JSCR. [The interfacial electric potential, V(x,y) at the SiO2/Si interface x=0, has been denoted by the two traditional and two recent engineering notations: J(x=0,y) = Vs(y) V,(x=0,y) = VIs(y). The subscript I for intrinsic Fermi potential will be dropped for arbitrariness of the reference electric potential and for notation compactness using kT/q normalization: Us(y) = (q/kT)Vis(y).] The curves in Figs. 3.1(a) and (b) were computed using the carrier depletion as the zeroth approximation in the JSCR [45] but they do include, in the MCR and the LDERs, the injected carrier concentration from the forward bias (VpN) just described, and also the FermiDirac carrier distribution and impurity deionization for high impurity surface or interface concentrations [46]. The upper part of Fig. 3.1(a) gives the total lateral drop of the interfacial potential in the LDER with 1019cm 3. The potentialdrop is about 100 times smaller than that in the MCR with 1017cm3 shown in the lower part of Fig. 3.1(a) as expected from the concentration ratio. Figure 3.1(b) shows that at VGB=IV (about flatband in the MCR), the p/n junction barrier height, VB, at the interface is reduced 43 0.05 .DJSCR VPN=OmV S 800mV C >  ~ 0.5  VpN=OmV 0 1BJSCR > 1.0 1 I __I_,_I 3 2 1 0 1 VGB /(1 V) (a) 0.05 ' 1 1 1 { p Base ) ( JSCR ) n+Drain } > 1 S ~ VN=OmV 0  " VPN=800mV .80mV I  > BJSCR  0 0.5 DJSCR  > VpN=OmV B VGB=IV: 1.0 I 1 I 1 120 80 40 0 40 y/(1 nm) (b) Fig. 3.1 GateBasewell voltage (VGB) dependence of the potential variation through the spacecharge layer at the SiO2/Si interface of the drain or source n+/p Base junction covered with a n+Si gate in the carrierdepletion and thick oxide limits with spatially constant dopant impurity concentrations of NGG=5x1019cm3, NDD= 1019cm3, and PBB=11017cm3, and oxide thickness of Xox=3.0nm. (a) The potential drop in the drain and basewell sides of the junction spacecharge region, VDJSCR and VBJSCR for forward applied dc biases of VpN=OmV to 800mV. (b) The potential variation along the SiO2/Si interface for VpN=OmV and 800mV. 100 n+Drain: 1x1019cm3 VpN=OmV pBase: 1x1017cm3 80 Xox:3.0nm  C 60 S40 (I 20 800mV 0 3 2 1 0 1 VGB/(1V) (a) 100 1.0 VpN=OmV 80 0.8 E E c S60 / 0.6 00. m 40 0.4 >_ 20 0V 0.2 > 0 0 3 2 1 0 1 VGB/(1V) (b) Fig. 3.2 The length of junction spacecharge region as a function of the applied dc gate voltage, VGB, for applied junction dc biases VpN=OmV to 800mV. (a) Total length, YJSCR. (b) Length on the basewell and drain (or source) sides, YJSCRBase and YJSRCDrain. Transistor parameters are the same as those used in Fig. 3.1. nearly 600mV by the injected carriers, from VB=720mV at VpN=OmV to VB=120mV at VpN=800mV. The geometrical effect, shortening of the length of the JSCR by VpN in Fig. 3.1(b), should also be noted which is leveraged in NIT profiling. This is further illustrated in Fig. 3.2(a) for the total length, YJSCR, and in Fig. 3.2(b) respectively for YJSCR's component on the Channelside (left Yaxis) and the LDER (or Drain and Source) sides (right Yaxis) whose curves are nearly the same with ratio 100 from the dopant impurity concentration ratio at the interface, 1019/1017=100. The effects of this lateral interfacial potential variation with forward bias are shown in Figs. 3.3(a) and 3.3(b) in which the normalized SRH recombination rate, Rss/Rsspk, or normalized basewellpad current, IB/IBpk, at a midgap interface trap in the JSCR are computed as a function of VGB. As described in the following two paragraphs, the IBVGB lineshape provides the basis for calculating the spatial dependence of the interface trap density, NIT(y) from experimental DCIV IBVGB curves. In Fig. 3.3(a), the effects of spatial variation of NIT(y) in the JSCR on the IBVGB characteristics (at VpN=200mV) are illustrated for the seven NIT(y) distributions: NIT(y)=NITo=constant in the (i) MCR, (ii) Drain (or Source) LDER, and (iii) Drain (or Source) JSCR; and the four discrete NIT(y)=NIT18(yYT) distributions located at (iv) (vii) y=YT=10, 20, 30 and 40nm from the metallurgical p/n junction boundary. There are several obvious features in Fig. 3.3(a) useful for NIT(y) characterization from experimental data. First consider the six distributions except the constantNIT in the Drain or SourceJSCR, (iii). (1) The VGBpk moves from inversion to depletion 1.2 1 1 1 I I I I JSCR:YT(nm) = 10 20 30 4'' 1.0 LDER= 2 4 5 6 31=MCR ._ SLDER  0.8 i E 0.6 / _ 0 Z .4 cons a) 0.4 IT iEeV 0.2 ETeV , VpN=200mV / 0 / f I 2.5 2.0 1.5 1.0 0.5 0 VGB /(1V) (a) 1.2 I ( ooI I ( NIT=cnst. VpN(mV)= o< ~ 1.0 3 S0.8 N o E_ 0.6 Z uc 0.4 0.2 2.5 2.0 1.5 1.0 0.5 0 VGB/(1 V) (b) Fig.3 Effects of spatial variation of interface trap concentration (NIT) and forward bias voltage (VpN) on the normalized DCIV lineshape (IBNormalize or RssNormalize vs VGB) from an Simidgap (ETI,=OmV) interface trap located in the drain and source lowlydopedextension regions (DLDER and S LDER), the junction spacechargeregion (JSCR), and the midchannel region (MCR). (a) Three spatially constant NIT's: curvel=MCR, curve2=DLDER and SLDER, and curve3=JSCR, and four discrete (delta function) NIT'S located at YT=10, 20, 30, and 40nm (curve4,5,6,7) from the p/n impurity concentration boundary, at a forwardbias of VpN=200mV. (b) Forwardbias dependence (VpN=OmV to 800mV) for the constant NIT in the JSCR. flatbandaccumulation as the discrete NIT(y=YT) moves from the MCR edge towards the p/n boundary y=0. (2) The IBVGB lineshape from the constantNIT in the MCR and D LDER (or SLDER) and from the four spatially discrete NIT(y) all are sharply peaked Gaussianlike with increasing width as YT moves from the MCR towards the Drain (or Source) LDER. These two lineshape properties provide the basis for its utility as a deltafunction probe for the lateral variation of NIT(y). For the spatially constant Njr(y)=NITo in the JSCR, (iii), the following effects on the lineshape and position are noted. From the VpN=200mV curve in Fig. 3.3(a): (31) the VGBpk is near that of the NIT located in the MCR (i), and (32) the upper part of the lineshape is similar to that of MCRNIT (i) also. The curves in Fig. 3.3(b) shows the effect of increasing VpN or injected minority carrier concentration: (33) VGBpk shifts toward flatbandaccumulation (negative VGB in mostT, (34) the lineshape broadens, (35) a substantial plateau, about 25% for VpNO0, diminishes, (36) the upper 20% of the IBVGB lineshape is nearly Gaussian with a slightly skew on the accumulation side, and (37) the entire half of the IBVGB lineshape on the inversionside (positive VGB in nMOST) is nearly Gaussianlike. Figures 3.4 and 3.5 provide theoretical estimates of the confidence level or the accuracy of using the deltafunction approach to analyze the DCIV IBVGB data for extracting slowly and rapidly varying NIT(y) profiles respectively. The assumed (continuous lines) and the extracted (crosses) profiles are shown in Figs. 3.4(a) and 3.5(a), respectively for the exponential profile, exp(y/3nm), and the Gaussian profiles, exp[(yYT)2/I_] located at four distances YT=10,20,30,40nm from the p/n boundary. 1.0 0.8 c0 E E 0.6 C1 S0.4 I 0.2 20 40 y /(1 nm) 101 rr lU ( (a) 60 0 20 40 60 y /(nm) (b) VpN=200mV ETI=O SBJ I ( "cJ/ IBI (1011cm2) , I  2.0 1.5 1.0 VGB/(1 V) 0.5 (c) Fig. 3.4 Illustration of the use of the DCIV lineshape for profile extrapolation of the midgap interface trap concentration, NIT(y), for an exponential profile located inside the JSCR, at VPN=200mV. Transistor parameters are the same as those of Fig. 3.1. (a) Assumed and extrapolated profiles. (b) Fractional error. (c) Current integrals of the profileextrapolation algorithm. c.s I EI o E ::=. r 49 1.0 Assumed + Extracted 0.8 C'J 10 I E 20 E 0.6 o c + 40 =YT(nm) c. 0.4 + + + + ++ + 0.2 + 0 + 0 20 40 60 0 20y /(1 nm)40 (a) 60 n+Drain   '  1 pBase DJSCR Slo .nm)= S101 263 Ynm)= 10 30 20 46 0 0 20 y/(lnm)40 (b) 60 30 1 1 1 1 1 1 1 1 1 VpN=200mV YT=  ET=O 40nm 20 Onm 20nm E 20 10nm BL  c 10 SB1 __  0 2.0 1.5 1.0 0.5 VGB /(1V) (c) Fig. 3.5 Illustration of the use of the DCIV lineshape for profile extrapolation of the midgap interface trap concentration, NIT(y), for four Gaussian profiles located at YT=10, 20, 30 and 40nm from the n+D/pB boundary inside of the JSCR at VpN=200mV. Transistor parameters are the same as those of Fig. 3.1. (a) Assumed and extrapolated profiles. (b) Fractional errors. (c) Current integrals of the profileextrapolation algorithm. The difference or fractional error of the extracted profiles are shown in Figs. 3.4(b) and 3.5(b), indicating excellent accuracy (<0.07 or 7%) for the slowly varying exponential NIT in Fig. 3.4(b), but rather large differences for the rapidly varying Gaussian NIT in Fig. 3.5(b), the latter as expected since RSSI(Y,VGB) is far from a deltafunction, nevertheless, Fig. 3.5(a) shows that extrapolated profile are peaked and Gaussianlike with a peak location near the true physical location and with a linewidth about 1.5times wider which increases 2times wider as the peak moves towards the baseside or channelside of the JSCR. Thus, theoretical corrections could be made to correct part of such a systematic difference. The Nrr(y) profile extraction procedure, used to give Figs. 3.4(a), 3.4(b), 3.5(a) and 3.5(b), starts with the deltaapproximation for evaluating the general formula (2.21) YJSCR IBJSCR (VGB) = NIT (y) RSS1(y, VGB) dy (3.1) where W is the channel width. The integrand RSSI(Y,VGB) is the SRH recombination rate per unit interface trap. Its lineshape in y and VGB are both bellshaped and rather sharp, resulting in a simple but accurate mapping of the experimental IBVGB to the Nrr(y)y profile. The bellshape characteristics are illustrated by the following examples. The maximum of Rssi(y)y at a given VGB [See Fig. 3.6(a).] occurs at the position y=YM(VGB) which was given by Eq. (2.4): Us*j = U(YM)(Up+UN)/2 + loge(cns/cps)1/2 = 0 (3.2) Up and UN are the hole and electron quasiFermi potentials, respectively. Using the U(y) from the depletion approximation and the abrupt dopant impurity concentration CO a) CO CO, 0 10 20 30 40 y/(1 nm) 50 60 (a) 0.5 I ','1.0 S1.5 2.0 I I i 0 10 20 YM 30 40 50 /(lnm) Fig. 3.6 Gatevoltage dependence of the spatial variation of the steadystate recombination rate at VpN=200mV. Other parameters are the same as those of Fig. 3.1. (a) Gate voltage dependence of Rssi vs y. (b) Location, YM, of the peak Rss1 vs gate voltage. 60 (b) model, YM has the following dependence on VGB where Usx and USE are total surface potential changes in the xdirection normal to the SiO2/Si interface in the MCR (Basewell) and the DLDER or SLDER (Emitters) respectively. YM(VGB) = rLD [UBIUSXUPN+USE 'UUpN/2UsXloge (Cn/Cps)1/2] (3.3) LD is the Debye length, UBI the builtin potential of the n+D/pB junction. This equation maps a gate voltage to a spatial location in the JSCR in order to extract the Nrr(y) profile from the experimental IBVGB. Shown in Fig. 3.6(a) for the nMOST with midgap trap at VpN=200mV, as VGB is swept from subthresholdinversion (VGB=0.6V) to flatbandaccumulation (VGB=1.4V), the position of the RssI maximum, YM, moves from the MCRedge of the JSCR (YM=46nm) towards the metallurgical p/n boundary or the LDERedge of the JSCR (YM=9nm + 0). This shift is computed from (3.3) and shown in Fig. 3.6(b) indicating almost a linear dependence of 30nm/V in the flatband accumulation range (VGB<0.94V). Another feature is the narrowing of the RIls(y) linewidth towards flatbandaccumulation shown in Fig. 3.6(b) which sharpens the probe for the NIT(y) profile. The sharp bellshaped Rssl(y) can be approximated by a delta function to evaluate the Ig integral, (3.1): JSCR IBJSCR(VGB) = WNIT(M) RSS (yVGB)dy = NIT(YM)*IB_(VGB) (3.4) where IBJSCR is the experimental baseterminal current or theoretically generated current using (3.1). The interface trap profiling formula in the JSCR is then given by NIT(YM) = IBJSCR(VGB)/IB1 (VGB) (3.5) where IBI(VGB) defined by (3.4) is the recombination current from a spatially constant interface trap concentration inside the JSCR normalized to NI(0 To estimate the error in the extracted NIT profile using the deltafunction approximation in (3.4), an assumed profile of NIT in the JSCR is used to compute IBg(VGB) from (3.1) and IBI(VGB) from (3.4). These were given in Fig. 3.4(c) for the exponential profile and Fig. 3.5(c) for the four Gaussian profiles. The ratio of these two curves then give the extracted NIT profiles in Figs. 3.4(a) and 3.5(a) and the corresponding difference errors in Figs. 3.4(b) and 3.5(b). Practical applications using this procedure to extract prestress and poststress NIT profiles are given in section 3.4. Figures 3.73.9 give additional illustrations of the dependencies of the DCIV Ig VGB characteristics on the forwardbias VpN or injected minority carrier concentration. These VpN dependencies can be used to determine additional properties of the interface traps. The trapspatiallocation effects on the VGBpkVpN is shown in Fig. 3.7 for the NIT distributions given in Fig. 3.3(a) which indicate that increasing forward bias, VpN, or minority carrier concentration would decrease VGBpk towards flatbandaccumulation if NIT(y) is constant in the JSCR and MCR, or localized near MCR (YT>30nm) while increase VGBpk towards subthreshold and inversion if Nrr(y) is localized (deltafunction) in the JSCR (YT<30nm) or in the LDER. The trapenergylocation effects on the shape of the Rss or IB vs VGB curve is shown in Fig. 3.8(a) for a spatially constant NIT in the JSCR and four trap energy levels, ETI=O.OV (midgap), 0.1V, 0.2V and 0.3V. The shallower traps (ETI=0.2V, 0.3V) have a broader RSSVGB or IBVGB and steeper and higher plateau in the flatbandaccumulation 0 S NIT(y) constant 0.5 constant MCR ^ y=YT(nm)= 40 S  JSCR  T_ ~~      1 .0 203 jSC >_ 10 ....s A 10OSCR 1.5 constant Source constant or Drain LDER 2.0 I I 1 1 1 1 0.2 0 0.2 0.4 0.6 0.8 VPN /(1V) Fig. 3.7 Forwardbias (VpN) dependence of the VGB at IBpk for the seven NIT(y) distributions shown in Fig.3. 1.2 1 NIT = constant in JSCR 1.0 VpN=200mV S0.8 / _ N / 1 E ETI=0.3eyV' o 0.6  z Ch .""0.2ey.V / i  S00.4 .1eI SETI=0 0.2 /~ \ \  0 i 2.0 1.5 1.0 0.5 0 VGB /(1 V) (a) 1.2 1 1 1 1 ,1 ,1 Discrete JSCRNIT 1.0 Y=20nm .. 0 ETI=0.3eV' / S0.8 / I \  S/' 0.2/ , 0.6 / , z i C 0. (P 0.4  II \ / // E= \ 0.2 ,/ E// 0 'r L I I I I Ik I L I 2.0 1.5 1.0 0.5 0 VGB/(1 V) (b) Fig. 3.8 Effects of energy level of the interface trap in the JSCR on the DCIV lineshape at VpN=200mV. Other transistor parameters are the same as those in Fig. 3.1. (a) Constant NIT in the JSCR. (b) Discrete NIT at YT=20nm from the n+D/pB boundary. range (VGB<lV in this nMOST example). Figure 3.8(b) is for localized NIT in the JSCR which shows broadened IBVGB when the energy level of the interface trap moves from the midgap EIT = 0 towards one of the band edge, EIT = 0.3eV. The trapenergylocation effects on the shape and the normalized reciprocal slope of the log(IBpk) vs VpN characteristics are shown in Figs. 3.9(a) and 3.9(b). (We called this the Peak Plot or PP in contrast to the Gummel Plot and the Shockley Plots.) This PP is probably the most powerful result of the DCIV methodology for rapid interface trap energy level determination because the VpNdependence of the peak Ig current is a function of only the effective interface trap energy level, ETI = ETI + (kT)loge(ns/cps)1/2. It is completely independent of the surface energy band bending and other material properties, such as surface impurity concentrations, oxide thickness, and carrier capture rates. Although ETI* contains the carrier capture rate ratio it would only give an uncertainty in the extracted ETI of (kT/q)loge(cns/Cps )12 ~ 1.l(kT/q) ~ 30mV since the carrier capture ratio is usually in the range of 0.1 to 10 for neutral trap potential wells of the intrinsic and silicondanglingbond interface traps observed experimentally thus far. Figure 3.9(a) gives the IBpkVPN plots for four ETI(eV) (0, 0.1, 0.2, 0.3) with the seven spatial NIT distributions of Fig. 3.3(a). Figure 3.9(b) gives the reciprocal slope defined by exp(UpN/n) = [exp(UpN) ]/[exp(UpN/2)+cosh(UTI.) ] (3.6) Six of the NIT distributions have identical PP's (unbroken lines) in Fig. 3.9(a) which are the two constantNIT's in the MCR and LDERs (Drain and Source), and the four delta functionNIT's in the JSCR. Their nfactor, shown Fig. 3.9(b), approach the ideal CM 1U  _1012 SETI(eV)= E O / 1 S ' NT(cm'2)  KBpkSCR 1.0x1011 S JBpkMCR 2.5x10 1020 I _,_I ___,I_, 0 0.2 0.4 0.6 0.8 1.0 VpN /(1V) (a) 2.5 ETI(eV)= '.0.0 2.0 C 1.5 01 0.2,' 0.3, 1.0 ....  1.0 0.5 F  0 0.2 0.4 0.6 0.8 1.0 VPN /(1V) (b) Fig. 3.9 Effects of energy level of the interface trap in the JSCR and MCR on the peak recombination current vs forward bias. Other transistor parameters are the same as those in Fig. 3.1. (a)IBpk and KBpk vs VpN. (b) Reciprocal slope or voltageswing vs VPN. Shockley value of n=l at low VpN for the three nonmidgap traps (ETI* = 0.1eV, 0.2eV, 0.3eV), increasing to n=2 at high VpN or Ps=Ns >> ni in a small range of VPN about 200mV (10% to 90% rise). It degenerates to n=2.0 at all VpN for the midgap trap ET*.=0. The seventh, constantNIT in the JSCR, has a slightly higher PP (broken line) in the lower VpN range and a higher n than the other six distributions. For this case, Fig. 3.9(b) also illustrates the contribution to IBpk from the NIT at the channel or MCRedge of the JSCR. This geometric effect from YJSCR(VpN) increases n above 2 at low VpN for the midgap trap as indicated by the dotted line in Fig. 3.9(b). To remove this geometric effect, the YJSCR(VPN) dependence can be taken out approximately by normalizing the numerically integrated IBpk integral to YJScR(VPN) before using (3.6) to compute n. Such a procedure is desired in this theoretical illustration since the reciprocal slope is defined for the purpose of quickly assess the properties of the interface traps from the experimental VpN dependence of IBpk used in the initial analyses of the gatecontrolled baseterminal current [5,8] and the 1957 SNS theory for the recombination at traps in the bulk JSCR [40]. The insensitivity on the spatial distribution of NIT of the six distributions first considered above allows an accurate determination of the effective energy level of the interface traps, ETr., and the thermal activation energy of the Ig which is an important component of the standby current in CMOS operations. In practice, the interface traps have always been observed near the midgap (ErTI=OeV). Some extracted shallowtrap energy levels in previous analyses of data [8,33,34] originated from emitterinjection limited and diffusionlimited Ig current through a thick basewell layer or long channels rather than from shallow interface traps. 3.3 Extraction of MOST Device Parameters One of the applications of the DCIV baserecombinationcurrent methodology was its use as the diagnosis monitor for transistor design and fabrication processes [8]. In this section, a demonstration is given on the extraction of the surface concentration of the base dopant impurities, Nxx, and the oxide thickness, Xox, and their comparisons with the design values. A sample of the experimental TopEmitter DCIV (TEDCIV) data matrix used in this demonstration is shown in Figs. 3.10(a) and (b) for two drawn channel lengths, W/L=10gm/10pm and 10m/0.25pm, of prestressed pMOSTs on 8 inch wafers fabricated by a 0.25pm technology. The other 4sets in the 6set matrix were obtained for L = 5, 2, 0.8 and 0.4im drawn channel lengths. Similar application results have been obtained for earlier (0.5p1m and 0.35im) and later (<0.18jim) technologies [8]. The broke lines in Figs. 3.10(a) and (b) show the location of the (IBpk,VGBpk) whose shift towards flatbandaccumulation (positive VGB for pMOSTs) with increasing drain and source forwardbias, VpN=0700mV, is characteristic of an interface traps in the MCR. The IBVGB curve around the IBpk is leastsquaresfitted (LSF) to a Gaussian with a baseline, IB = A1+ A2.exp[(VGBA3) /A4]2) (3.7) 0 0.5 1.0 1.5 VGB/(1 V) (a) 1016 t i i i i I i i i i I i i i i I i i i i I 1.0 0.5 0 0.5 1.0 VGB /(1 V) (b) Experimental TEDCIV of pMOSTs from quartermicron CMOS technology for VpN=50mV to 700mV. Channel Width to Length aspect ratio W/L of (a) 10pm/10gm. (b) 10pm/0.25pm. Fig. 3.10 The four fitting parameters are the baseline AI=I0o, the peak current A2=IBpk, the peak gate voltage A3=VGBpk and the linewidth A4. These four LSF parameters were obtained for the 84 DCIV curves from pMOSTs with the six L at the fourteen VPN values (50, 100, ..., 650, 700mV). Figure 3.11 shows a typical LSF result for the L=10OIm and 0.25pm pMOST at VpN=400mV. The simple Gaussian cannot be used to fit the entire gate voltage range because (i) the DCIV lineshape from NIT in MCR is skewed toward the flatbandaccumulation side of the peak (towards positive VGB in pMOSTs), with a slightly wider halfwidthhalfmaximum (HWHM) as previously shown chapter 3 and the skew was also observed in the analytical solution shown in Fig. 3.3(b) for a constant NIT in the JSCR and (ii) constant or peaked NIT in the JSCR contributes to additional IB to that from NIT in the MCR thereby lineshape widening on the flatbandaccumulation side of the MCR peak. To circumvent these two asymmetry possibilities, only data points from the inversion range and a small range on the accumulation side of the IBpk are LS Fitted to (3.6). These are the open circles (L=10glm) and squares (L=0.25.tm) shown Fig. 3.11. The difference, IBDATA 'BFIT, are shown by the two lowerheight humps labeled JSCR in Fig. 3.11 which are from the NIT distributions in the drain and source JSCRs or LDERs. The VGBpk (or A3) from the LSFs are plotted as a function of VpN in Figs. 3.12(a) and 3.12(b) for the main IBpkl. The increasing VGBpk1 towards flatbandaccumulation with increasing VpN (pMOST) suggest that the IBpkl arises from NIT located in the MCR. Thus, we proceeded to fit the (VGBpkl,VPN) datapoints to the analytical formulas developed in chapter 3: VGBpk = VFB + VSpk + 2.sign(VSpk) [V( VSpk I kT/q) ]1/2 (3.8) 1.2 1.2 1 1 I I  STEDCIV MCR NIT /_ 1.0 pMOST  ao A L=10m N 0.8 p 8 L=0.25pm , 0. VpN=400mV JSCR NIT E 0.6 ;.  Z 0.4  0.2 '0.2 0 0.2 I1 ,I, 0 0.2 0.4 0.6 0.8 VGB /(1V) Fig. 3.11 Leastsquaresfits of the TEDCIV curve of L=10 m and 0.25tgm pMOST at VpN=400mV shown in Fig. 3.10. Decomposition into two components: one from Nrr in the MCR and one from Nr in the JSCR. 63 0.8 1 1 L(pNm)= 0.7 o 0.25 o 0.40 o 0.80 S0.6 2.0  2.0 3para LSF 0 5 5.0 L=2gm .0 +10 3para. LSF m VFB=0.960.06V  S04 VF'=0.470.03V > 0.4 Vxx=486mV 2para. LSF 0.3 VFB=0.964V(fixed) VF'=473.30.9mV Vxx=45.10.5mV 0.2 0 0.2 0.4 0.6 ) 0.8 VpN/(1V) (a) 0.8 1 1 , TEDCIV 0.7 700  pN(mV) pMOST 700 6006 .6 00 0 500 500 0.5 400 o 400 400 S0.4 300 300 20020 0.3 150 100 0.2 1 1 i, l i 1 1 M, 101 1 10 102 LDRAWN /(1 m) (b) Fig. 3.12 Experimental channel length dependence of VGBpk at IBpk at six L(ptm) from 0.25 to 10 for extrapolation of dopant impurity concentration at the oxide/silicon interface. (a) VGBpk vs VPN with 3parameter and 2parameter leastsquaresfit for L=2.0m. (b) VGBpk vs L for VpN=50mV to 700mV. where VSpk = VF VPN/2 loge(cn/Cps)1/2 (3.9) where VSpk is the Si substrate surface energy band bending at the peak, Vxx = EsqNxx/2C02 where Cox = Eox/Xox, and VF = (kT/q)ologe(Nxx/ni) is the majority carrier quasiFermi potential. The term (kT/q) in (8) was dropped in (2.11) and is retained here to provide better accuracy at high VpN's where VSpk approaches zero or the flatband condition as indicated by the decreased drain/base p/n junction barrier height at the interface shown in Fig. 3.1. Combining (3.8) and (3.9) gives the 3 parameter formula to fit the experimental VGBpkVPN data: VGBpk = AI+A2+(VPN/2)2 (A3. [A2(VN/2) (kT/q)] }1/2 (pMOST) (3.10) The three LSF parameters are: A1 = VFB, A2 VF'= VF (kT/q)loge(cns/ps)1/2 and A3 = Vxx. As an example of the LSF procedure we discuss the steps to fit the L=2grm data to (10) which gives the solid line in Fig. 3.12(a). Only 9 (VpN=150mV550mV) of the 14 datapoints (50700mV) were used which are the unfilled triangles of the L=2gpm data in Fig. 3.12(a), in order to limit the experimental VGBpk uncertainty to <0.5mV. For VpN<100mV, VGBpk errors are larger than 0.5mV due to the 3fA noise in Ig. In the VpN>600mV range, a more tedious fit to parametric equations instead of (3.10) is needed due to the high injection level. The 9point VGBpk data fits the 3parameter equation (3.10) very well, as shown visually in Fig. 3.12(a), with a ChiSquare of only 0.16%. The LSF value of VFB, VF' and Vxx are also listed in Fig. 3.12(a). The VFB=0.96V is consistent with the designed polysilicon p+Gate for pMOST. The electron/hole capture rate ratio cns/Cps is on the order of unity for near midgap traps, therefore A2 = VF' = VF, which gives a surface concentration for the nBasewell donor (implanted As or P) impurity of Nxx=NDD=1.lxl018cm'3 which is consistent with the nominal design value of ~10'8cm3. The gate oxide thickness can then be determined from A3=Vxx which gives Xox=2.4nm compared with the nominal design value of 2.5nm. The exponential dependence of Nxx on the Fermi potential VF gives a much larger uncertainty in Xox and Nxx from the 6% uncertainty in VF. The error propagates as follows: NDD/NDD = AVF/(kT/q) (3.11) AXox/Xox = (AVxx/Vxx + ANDD/NDD) /2 (3.12) The data was taken at room temperature giving kT/q25mV and using AVF=0.03V, the percentage error in Nxx is 116% and Xox, 64% in this global 3parameter fit. However, if one of the three parameters (VFB, Nxx and Xox) is known from another independent measurement or is fixed in a regional 2parameter fit, then the two LSF parameters may be determined more precisely. For example, we fixed the value of VFB at 0.964V which was obtained by the 3parameter fit, and then we made a 2parameter LSF to (3.10). The results are listed in Fig. 3.12(a) showing a large reduction of uncertainties in VF' and Vxx. The percentage errors translated to Nxx and Xox are only 4% and 2% respectively. To test the sensitivity of this 2parameter extraction to the fixed value of VFB, we vary VFB by 2% (20mV). An alternative test would be to fix Xox from an independent measurement, such as the CV. The value of the device parameters (Nxx and Xox) and their uncertainties, computed from the A's from the 2parameter LSF with VFB fixed, are summarized in the following table: VFB(V) Nxx (1018cm3) Xox(nm) X2 () 0.945 0.760.02 2.870.06 0.15 0.964 1.130.04 2.400.05 0.15 0.984 1.680.06 2.000.05 0.15 The above table shows that the DCIV method can extract Nxx and Xox to an accuracy of <10% provided that the flatband voltage is known to better than about (kT/q)/5  5mV. In the preceding analysis, assumption is made that cns=Cps so VF'=VF. In factory application, a calibration transistor with known substrate doping concentration and oxide thickness may be used to determine the cns/cps ratio, from which VF can be extracted and the gate dopant impurity concentration can be computed from VFG=VFB+VF where VFG denotes the Fermipotential in the p+Gate. For IVFGI 2 0.50V, accurate gate doping concentration can be obtained only by including impurity deionization and FermiDirac statistics. A similar fit to the IBpk2 can be made to give the Pxx and Xox in the LDERs. 3.4 Profiling Interface Traps in Junction SpaceCharge Regions Examples are now given on profiling the interface traps in the drain and source junction spacecharge regions before and after channelhotcarrier (CHC) stress. An earlier profiling technique employed the transient chargepump current using its dependence on the drain reverse biased [47] which was shown to correlate with the DCIV method [48]. A recent demonstration of the DCIV technique for profiling interface traps near the drain junction measured the differential basewellterminal conductance by varying the drain reverse bias [43]. The differential DCIV method had a higher sensitivity and resolution and could profile a large portion of the channel. However, these methods are all limited to the region outside of the reversebiased JSCRs. The new approach, as described in section 3.2, gives the spatial NIT variation inside the forwardbiased drain or source JSCR directly from the ratio of the experimental DCIV curve and the reference theoretical DCIV curve corresponding to a constant NIT distribution. The rather good spatial resolution and accuracy of this new approach were already illustrated by using analytical NIT(y) models in Figs. 3.43.5 and described in section 3.2. Oxide charge builtup, which is usually associated with interface trap generation during CHC stress under large drain reversebias [32,49], changes the local flatband voltage which complicates data analysis. In this demonstration, the CHE stress is kept at low drain voltages to prevent injection of secondary hot holes over the SiO2/Si barrier (4.25eV for hot holes and 3.12eV for hot electrons) [32]. The example to be given is the extraction of NIT(y) in a 0.35gmnMOST testbed for reliability assessment of lowK interconnect materials [6]. The specific nMOST in this demonstration has a drawn aspect ratio of W/L = 50prm/0.4gm. The prestress and poststress DCIV data are plotted in Fig. 3.13(a) with the VGBindependent IBbaseline subtracted. The sharp prestress peak, IBpk=0.6pA, at VGBpk=0.5V is in the subthreshold range and comes from recombination at the interface traps in the MCR. This peak gate voltage is consistent with the nominal Xox=7.0nm and 100 80 < 60 t 40 15 c', E10 0 r5 0 o 4 3 2 1 0 1 VGB 1(1 V) (a) I I I . y/(1nm) (b) Fig. 3.13 Demonstration for the extrapolation algorithm applied to channelhot electron stressgenerated interfacetrap concentration profile of an nMOST from a 0.35ntm lowkinterconnect CMOS technology. (a) Prestress TE DCIV and poststress DEDCIV curves. (b) Prestress and poststress NIT(y) profile extrapolations. MOST + Stress: 3000sec SVGS=1.5V, VDS=5 + CHC stress(1 x) NIT(y) extracted from ETI=0.OeV 50gtm/0.4tim x pBase=1 x10'7cm3 S Prestress n+Drain=2x1019cm3  .,^ (200x) Xox=7.0nm S I ++I+ + + I+ V (5)_ Pxx(boron)= 107cm3. The broad prestress structure (~0.45pA) shown in Fig. 3.13(a) in the range VGB<2.5V (flatbandaccumulation range for this nMOST) is from recombination at NIT in the JSCR close to the metallurgical n+Drain/pBasewell boundary y=0 at the SiO2/Si interface x=0. This nMOST was then CHE stressed for 3000 seconds at VGB=+1.5V, VDB=+5.0V and VSB=OV. No positive oxide charging was observed under this stress condition since the kinetic energy of the hot carriers is only qVGBq(VDBVTH) = 5.0eV(1.5eV0.5eV) = 4.0eV, which is insufficient for the secondary hot holes to surmount the 4.25eV hole barrier at Si/SiO2 interface [49]. Figure 3.13(a) shows that after the CHE stress, the broad prestress structure (VGB<2.5V) grew almost 200 times in amplitude (to 85pA) and became even broader (VGB<IV). This indicates a substantial increase of interface trap density in the JSCR. A small poststress hump can be observed around VGB=0.5V which was the peak gate voltage due to the prestress NIT in the MCR, indicating that some interface traps were also generated in the MCR by the secondary hot holes generated by the hot electrons in the JSCR, but at much smaller magnitude than that in the JSCR due to attenuation of the hot hole density [32]. The pre and poststress IBVGB data in Fig.3.13(a) can be analyzed using (3.5) to give the lateral distribution of the interface trap density. The results are shown in Fig. 3.13(b). The prestress NIT was about 2x1010cm2 from the p/n boundary, y=0, to y=10nm into the JSCR on the basewell or channel side, and it dropped to a nearly constant value of 5x109cm2 beyond y=16nm. The poststress NIT increased to 8x1012cm2 within 18nm of the p/n boundary y=0 and dropped continuously towards the MCR, and is below 1012cm2 at y=40nm. The sharp rise near y=0 or the DLDER in 0 approximation and the resolution limitation of steeply varying NIT(y), as indicated by the theoretical models shown in Figs. 3.4 and 3.5. Thus, this example shows a 3nm spatial resolution. 3.5 Interface Trap Profile in the Channel Region A single DCIV curve would not provide sufficient information to profile the interface traps in the MCR. Because the surface potential is essentially constant along the entire length of the MCR, every interface trap along the MCR gives the same IBVGB dependency in the TEDCIV measurement regardless of the NIT location. This is readily seen by the general proof using (3.1) for the interface traps in the MCR which reduces to the simple formula: LEL IB = B NIT(y)Wdy = B NITA(LEL) (3.13) IBI=qRssi is the basewell recombination current from a single interface trap and NITA is the number of interface traps in the MCR with the electrical channel length of LEL between the edge of source and drain JSCRs. Thus, the spatial variation of NIT(y) is given by NIT(LEL)*W = (d/dLEL)NITA(LEL) = (d/dLEL) (IB/ IB) (3.14) Since LEL is modulated by VPN, the forward bias applied to the Source/Basewell and Drain/Basewell junctions, the VpNdependent IBpk measured in MOSTs covering a range of drawn channel length, L, can give the NIT(y) profile near the basewell edge of the two JSCR's. In addition to TEDCIV measurement, the SEDCIV and DEDCIV measurements would provide further information regarding to the symmetry of the NIT distribution by utilizing the additional variable, i.e., the nearly linear variation of the injected minority carrier interfacial concentration from the emitter, such as the DE, to the collector, such as the zerobiased Source Collector or SC in the DEDCIV bias configuration. In DEDCIV, interface traps near the drainemitter (DE) dominate the IB while in SEDCIV, those near the SE dominate. Thus, large asymmetry or differences between DEDCIV and SEDCIV would be expected in the stressed transistors and in prestressed transistors with designed drainsource asymmetries such as the FLASH memory transistor. The above differential method will be applied to the 0.25gm family of pMOSTs with 6 drawn channel lengths whose typical TEDCIV data at 15VpN's (OmV to 700mV with 50mV steps) were shown in Fig. 3.10(a) for L=10gtm and Fig.10(b) for L=0.25gm. The IBpk's were obtained from the LSF to the Gaussian as described by eq. (3.7) with uncertainties of 48%. The ratio IBpk(L)/IBpk(L=10gm) versus VPN for the five drawn L's are plotted in Fig. 3.14(a) and the 4%8% uncertainties of the datapoints are not perceptible. The nearly VpNindependent value of this ratio is plotted as a function of L in Fig. 3.14(b) for three VPN's (300, 400 and 500mV) showing two features: (i) a rise proportional to L, suggesting an increasing dominance of the NIT in MCR due to increasing length or recombination area, and (ii) an asymptotic constant value of 0.25 with decreasing L, suggesting a large contribution to Ig from NIT inside or near the edge of the drain and source JSCRs due to its Lindependence. The data points can be fitted 1.0 E 0.8 0 .. 0.6 mC 0.4 .J  0.2 0.2 0.4 VpN /(1 V) E _ 01   CO J 101 m Q. 102 101 ocL I 1 1111111 I 1 1111111 I I I I 1II~ I I I I II1 1 / VpN(mV)= o 300 o 400 0 500 ocLo o0 / 0 0 I I 11111 II I 1 11111 LDRAWN/(l jIm) 102 (b) NIT profile extrapolation from channel length dependence of DCIV peak current. (a) Normalized IBpk vs VPN for L(gm)=0.25 to 10. (b) Normalized IBpk vs L at VpN=300, 400, and 500mV. Two components are evident, one each from the MCR and JSCR. I I I I TEDCIV pMOST W=10pm L(gm)= 5 o_eo e c e 2 0.8 0.4   0.25 I I I I 0.6 0.8 (a) Fig. 3.14 I I I 1111 1 I I I I II to the following geometric equation where L is Lithographic or drawn channel length which will be taken as the distance between the metallurgical drain and source p/n junction, LMCR is the length of the midchannel region, YD(=YDJscR) and Ys(YSJSCR) are respectively the length of the drain and source junctionspacecharge region at the SiO2/Si interface which are equal, YD+Ys=2YD=YJ for conventional symmetrical cMOS transistor design, and YMCR = L Yj, and where the J's are the areal density of the recombination current in the MCR and the drain and source JSCR as indicated by the subscripts which are to be shortened to two characters, MC, DJ, SJ. IBpk(L) JMCR (L Y) + JDJSCR*YD + JJSCR*Y Bpk (10) JMCR(10 Yj) + JDJSCR*YD + JSJSCR*YS = y = (x + AI)/(10 + Ai) (3.15) where x=L, Al = (JDJ*YD + JSJ*YS)/JMC YJ which reduces to Al = [(JDJ/JMC) 1]* for identical drain and source. The data in Fig. 3.14(b) gives A1 = 3.250.13gm. For an abrupt source and drain n+/pB junction of 1018cm3, YD=Ys=YJ/2=0.04gm giving (JJSCR/JMCR)=NIT(SCR)/NIT(MCR) 40. This suggests that the NIT(y) profile rises sharply in a shortdistance (<0.04gm or <40nm) in the MCR near or inside the JSCR, which was depicted by the theoretical example of a sharper exponential profile, NIT(y)/NiT(0) = exp(y/3nm) given in Fig. 3.4(a). The geometric modeling from the Ldependence just presented that showed a MCR trap and a highNIT JSCR trap can be analyzed more thoroughly using the IB integral given by (3.1) to cover the entire channel. In view of the good accuracy and resolution demonstrated by the analytical model of an exponential NIT profile in the JSCR shown in Fig.4(a)(c), we shall assume the exponential NIT profile again to model the Ldependence that showed a highNIT near the edge or inside of the JSCR over the entire VpN range (50mV to 700mV) which sweeps this edge over a region about 20nm to 40nm on the MCR side of the p+D/nB boundary. Thus, the NIT profile can be modeled by NIT(y) = A1 + A2 {exp(y/A3) + exp[ (yYMR) /A3] (3.16) A1 is the constant concentration in the middle of the channel in asymptotic long channel, A2 is the peak concentration near the edges of the two JSCR's and A3 = LIT is the decay length of the NIT distribution. With the TEDCIV (both Drain and Source are forwardbiased at the same VpN) the minority carrier interfacial concentration, P(x=0,y), in the nBasewell of a pMOST is spatially constant in the MCR from y=0 to y=YMCR (yaxis shifted). In the DEDCIV or SEDCIV bias configuration, it is linearly decreasing from the forwardbiased drain (or source) emitter to the zerobiased source (or drain) collector. These are given below with the origin of the yaxis shifted to the collectoredge of the MCR. P(x=0,y) = P (Y) = P (YMCR) TEDCIV (3.17) = P (YMR) (/YMcR) DEDCIV, SEDCIV These three minority carrier concentration profiles can be used with the symmetrical exponential NIT profile of (3.16) to evaluate the IB integral such as (3.1) with the integration limit extended over the entire channel. To provide the analytical solutions for IBpk, we shall use the peak value of Rssi in (3.1), which occurs at CpsPs = cnsNs. For ETI ~ 0 or cpsPs=cnsNs >> eps and ens, it is given by Rss1pk = (1/2) (cpsPCnsNs) 1/2 (3.18) = (1/2) (psns) 1/2 [niexp (qVpN/2) ] TEDCIV = (1/2) (cpsns)1/2[niexp (qVpN/2)] (Y/YMCR)1/2 DE/SEDCIV Then, from (3.1) using (3.16) and (3.18), and L instead YMCR for the integration limit, and noting that YMCR = L 2YJscR(VpN), we have IBpk = { AlL+2A2A3 [1exp(L/A3) ] }IBW TEDCIV (3.19) = { (2/3)AiL+aA2A3. [lexp(L/A3) ] }IBIW DE/SEDCIV (3.20) Where c= 1 if A3 << L, or the exponential Nrr(y) is localized near the Source and Drain. In the other limit that NIT(y) varies slowly across the channel, A3 > L, ca=4/3. These show that IBpk of TEDCIV is 1.5 or 2.0 times larger than that of DEDCIV and SE DCIV for very long and short channels respectively. The TEDCIV, DEDCIV and SEDCIV data at VpN=400mV are fitted to (3.19) giving the following results which are used for the LSF lines in Fig. 3.15. A1IBW (pA/pn) A2IB1W (pA/Pm) A3 (nm) TE 4.30.2 9040 8040 DE 4.10.2 9050 8050 SE 4.80.2  These show consistency among the three bias configurations and a NIT(Y) that rises from the MCR by a factor of 20 to the edge MCR or JSCR (90/4.2=21). The two LSF parameters, A1 and A2, can be converted to NIT. Using W=10pm, ni=1010cm3, and assuming cns=cps=10 cm3/sec, we obtained A =2.2x109cm2 and A2=4.68x101cm2 for the interface trap densities in the middle of the channel and near the drain and source junctions. QC1010 CL _1011 1012  C I I IV D III I I I I CIV Data LSF Eq (17) I I II1 TE DE SE I I I 111111 I I I 11111 I I l I I I4 MOST  W=1Om  VpN=400mV  I I 1 iI I lI 101 10 LEL (1m) 102 Forward bias configuration dependence of the IBpkL data from TEDCIV, DEDCIV and SEDCIV measurements at VpN=400mV, showing the 0.5 ratio at short L from contributions of NIT located inside and near the edge of the 30nm JSCR and the 0.66 ratio at long L from NIT located in the MCR which are illustrated more explicitly in Fig. 3.16. Fig. 3.15 _ ____ __ rl I I (1111 1 111 II( The experimental data for the DE/TE and SE/TE ratios of the IBpk are shown in Fig. 3.16(a) and (b) as a function of forward bias, VpN, showing the predicted variation with channel L by (3.19) from 0.5 to 0.667. Finally, the LSF profile are plotted in Fig. 3.17 at VpN=400mV with an estimated YJscR=40nm for the shorter channels, L=0.25gm, 0.4gm, 0.8gm and 2.0pm. Outside of the MCR or in the JSCRs, NIT seemed to drop as shown by the two broken lines in Fig. 3.17, as suggested by three experimental evidences: (1) The VpN independence of the IBpk in Figs. 3.14(a), 3.16(a) and 3.16(b); and channellength dependence of the (2) lineshape, and (3) VGBpk as indicated in Fig. 3.11. The 0.25gm pMOST has a higher shoulder and a larger HWHM at the baseaccumulation side of the peak which is consistent with contributions from NIT in the JSCR anticipated by the analytical theory discussed in section 3.3. There is also a 20mV shift of peak gate voltages between the L=10gm and 0.25gm curves which could be from two possibilities: (1) NIT in the JSCR near MCR edge would shift VGBpk(0.25gm) pMOST towards flatbandaccumulation (positive VGB) with respect to VGBpk(lOgm) and (2) injectiondiffusionlimited minority carrier reduction in the 10m pMOST would shift VGBpk(10pm) towards subthresholdinversion (negative VGB direction) with respect to VGBpk(0.25gm). The first explanation is favored because NIT inside the JSCR and near the MCR/JSCR boundary can account for the lineshape change as well as peak gate voltage shift as indicated in Fig. 3.11. Furthermore, injectiondiffusionlimitation, proportional to L, is expected to dominate at low VPN due to its lower value from the D E I DE/TE  L(pm)  .10 o5 2  0 0.8 +0.4 .0.25 I I S 2/3 [constant NIT(y)] & [NIT localized near S/D] 1/2 [NT localized near S/D] I I 0.4 VpN /(1 V) 0.5 (a) 0.6 S2/3   1/2 0.4' 0.2 0.3 0.3 SE/TE  SE/TE  L(gm)  &10 05 2  0 0.8 +0.4 _,0.25 I I I I 0.4 VpN /(1 V) 0.5 (b) 0.6 Channel length dependence of the IBpkVPN and its theoretical limits for short and long channels. (a) DEIBpk/TEIBpk and (b) SEIBpk/TEIBpk, showing the theoretically anticipated 0.5 ratio at short L from NIT located inside and near the edge of ~30nm thick JSCR and the 0.66 ratio at long L from NIT located in the MCR. rn I I w 0. a1. w LU n  0.6 0.5 0.4 L 0.2 0.3 w an m S CL ii m 0.7 0.6 0.5 Fig. 3.16 I I I I I P+ + SOURCE su  I "  LMET SL=L GL pBASE 0 E C C Z 5/' I I ,'4 /1 I  I 1 2 1 I 0 0.2 0.4 0.6 0.8 y/LEL r 1.0 Fig. 3.17 NIT(y) distribution for L(gm)=0.25 to 2.0 of pMOSTs extrapolated from experimental data using the profiling algorithm described in the text. > > exp(qVpN/kT), which is inconsistent with the nearly Lindependence of the experimental VGBpk at all VpN'S shown in Fig. 3.12(b). The presence of the interface traps inside JSCR should not affect the validity of MOST parameter extraction using the VPN dependence of VGBpk as described in section 3.4. The parallel shift in Fig. 3.12(b) indicates that the accuracy of oxide thickness and substrate doping concentration extraction would not be affected by the channel length of the MOST. However, there could be a small offset (<20mV) in the extracted flatband voltage. 3.6 Summary A selfconsistent picture on the effects of spatial distributions of interface traps on DCIV characteristics has been obtained and presented. Three applications of the DCIV method have been demonstrated with experimental data: (1) Extraction of transistor design parameters using the weak inversion gate voltage at the peak base terminal current from carrier recombination at interface traps in the channel region; (2) Profiling the concentration of processresidual and channel hot carrier stress generated interface traps in the forwardbiased drain junction space charge region using a portion of DCIV curve between the weak inversion gate voltage and strong accumulation gate voltage; and (3) Profiling the concentration of process residual interface traps in the channel region using the channel length dependence of basecurrent peak. These demonstrations provide further application capabilities for industrial applications of the DCIV method [50,51]. CHAPTER 4 GATE TUNNELING CURRENTS IN ULTRATHIN OXIDE MOS TRANSISTORS 4.1 Historical Survey Electron tunneling through a classicallyforbidden energy barrier was first employed by Fowler and Nordheim [52] (FN) in 1928 to successfully explain the emission of electrons from the surface of a tungsten electrode into vacuum under the influence of an external electric field of some 106 V/cm. Schottky attempted to explain the phenomena by thermionic emission through an image force lowered surface potential barrier [53], but a complete reduction of the 4.5eV barrier in tungsten requires a field of at least 108V/cm. In the FN theory of field emission [54], the electrons inside the tungsten with kinetic energy lower than 4.5eV have an energy dependent probability of tunneling through the fieldinduced triangular potential barrier as determined by Schrodinger's wave mechanics, while the energy distribution of electrons was obtained following Sommerfeld's electron theory of metal. With the advancement of quantum theory and materials technology, investigation of tunneling phenomena was extended to (1) extrinsic semiconductors first by Zener [55] which eventually led to the invention of pn tunnel diode by Esaki [56] in 1957, and (2) metaloxidemetal (MOM) and metaloxidesemiconductor (MOS) structures which were made possible by the thermal oxidation technology to grow surface oxide. In terms of band theories of semiconductors, Kane [57] interpreted the interband tunneling in pn diode as 'electron penetrating the forbidden gap along the imaginary k axis' and under the constantfield approximation derived an electron tunneling theory that took into account of perpendicular momentum conservation. The pn tunnel diode showed negative resistance under small forward biases due to the narrowing of energy range for direct interband tunneling with increasing forwardbias but its current never went to zero even when the constant energy tunneling path ceased to exist. This 'excess' current was from many trapassisted inelastic tunneling pathways, such as those studied by Sah in golddoped narrow pn diode [58]. Bardeen considered tunneling in MOM structure as transferring of a quasiparticle across the oxide in a manyparticle system [59]. He calculated the transition probability using the timedependent perturbation approach and showed that the matrix element for the transition is that of the current density operator in the barrier region. This was followed by Harrison [60] to treat tunneling through a forbidden region with spatially varying band structures from an independentparticle point of view. Harrison showed that the traditional WentzelKramersBrillouin (WKB) approximation can be readily applied to band structures which vary slowly over a wavelength of the particle, but at the sharp boundaries the wavefunctions must be matched to assure the conservation of electron flux. The latter resulted in an energydependent preexponential factor in the expression of the transition probability which was used by Shewchun and Temple [61] in their computations of tunneling current through semiconductorinsulatorsemiconductor strictures. Simmons [62] introduced the averagebarrier approximation to evaluate the WKB tunneling probability for barriers of arbitrary shape and derived an analytical tunneling current formula for MOM structures at zero temperature. Simmon's formula was used by Chang, Stiles and Esaki [63] to correlate their data on electron tunneling through a trapezoidal barrier in a Al/A1203/SnTe MOS structure while neglecting band bendings in the highlydegenerate ptype SnTe. By making the WKB approximation, detailed tunneling current structures due to the sharp potential boundaries are obscured. Gundlach [64] showed by solving the Schrodinger equation exactly that tunneling current through a triangular barrier can be an oscillatory function of applied voltage due to partial reflections and interference of electron waves in the conduction band of the insulator at the sharp potential boundary. Since the advent of silicon transistor technologies in the late 1950's [1], tunneling through metal/SiO2/Si structures has received much attention. Lenzlinger and Snow [65] performed the original experiment of electron tunneling from silicon into thermally grown SiO2 and found that the tunneling current density as a function of electric field J(E) followed the classical FN theory. They derived a constant effective mass of 0.42mo in the forbidden energy gap of SiO2 and showed that the simple parabolic dispersion relationship is equivalent to that of the empirical Franztype which reduces to k=0 at both conduction band edge E=Ec and valence band edge E=Ev. We note that this equivalence is only valid in the triangular barrier range (or FN range) while some recent authors applied it to trapezoidal barriers. The band bandings and carrier quantization effects in silicon inversion layer were considered by Weinberg [66,67] and those of silicon accumulation layer considered by Krieger and Swanson [68] who also included transverse momentum conservation and image force correction in their theory. In view of the accuracy of Weinberg's tunneling J(E) data [66] on thick ~100nm SiO2 films, we will use them as a reference to calibrate our analytical tunneling theory in the FN range. On thin 5.0nm oxide MOS structures, Lewicki and Maserjian [69] observed oscillatory tunneling J(V) characteristics in the FN range as predicted by the Gundlach theory. From the decay of the oscillation amplitude with the tunneling path length in SiO2 conduction band, they obtained a value of scattering meanfreepath (MFP) in SiO2 conduction band, which was later reinterpreted to be 0.65nm by Fischetti et al. [70] who correlated this MFP to the electronLO phonon scattering. Recently, the oxide fields at which oscillatory extrema occur were used by Zafar et al. [71] to extract oxide thickness in the range of 4.0nm to 6.0nm. In MOS structures, tunneling carrier species includes electrons and holes, which were first separated by Weinberg et al. who diffused a shallow pn junction in the silicon substrate under the insulator [72,73]. In a MOS transistor or a MOS capacitor surrounded by a source region (sourced MOS capacitor, or SMOSC), the inversion channel and the well/substrate pn junction (if available) provide a means for charge carrier separation. However, this separation is not unambiguous because the carrier type detected are those in the terminals of the pn junction or the MOST rather than those in the oxide. The following three processes lead to the detection of hole currents as a result of electron tunneling: (1) valence electron tunneling from Si leaves a hole behind (2) electron tunneling from the gate electrode can impact generate a hole or (3) recombine with a hole in the silicon substrate. Careful analysis of chargeseparation data were demonstrated by Yau [74] in his identification of electron as the major conduction carrier in Si3N4. Eitan and Kolodny [75] observed a hole current in the p substrate terminal of a 7.8nm oxide n+sourced MOS capacitor under positive gate bias and attributed it to valence electron tunneling from the psubstrate. This was argued against by Weinberg and Fischetti [76] because their theoretical estimates for valence electron tunneling was about 103 times lower than the experimental data. Recently, Rasras et al. [77] used a remote collector to show that this hole current under large positive gate voltage was due to electronhole pair generation in the psubstrate by photons travelled from the gate electrode. For thin oxide (<3.0nm) under low (<3V) gate voltages, Shanware et al. [78] showed that their valence band tunneling theory with a tunneling effective mass of 0.33mo correlated with the hole substrate currents from which oxide thickness can be extracted. At the Si/SiO2 interface, the valence band offset is 4.25eV while the conduction band offset is 3.13eV [79]. The 1.12eV difference in tunneling barrier height makes the hole tunneling much smaller in magnitude and elusive for experimental detection. However, secondary hot hole generation [80] and injection [81] from the anode initiated by FN tunneling of primary electrons from the cathode was identified to cause positive oxide charge and dielectric breakdown. The threshold SiO2 voltage to give secondary hole overthebarrier injection was found by Lu and Sah [81] to be (1) 4.25V by Auger generation and (2) 5V by impact generation of energetic holes. Primary hole tunneling was not reported until very recently in p+gate pMOST [8284] at the low inversion gate voltage range, but no quantitative correlation with hole tunneling theory was given. 4.2 Recent Technology Motivations Literatures on fundamental theories and experiments of tunneling are abundant as reviewed in the first section. Most of them focused on tunneling through a triangular barrier. Over the past three decades, semiconductor industry has sustained a growth rate of 15% per year which is fueled by relentless down scaling of silicon transistors. The channel length of a MOST is scaled from 25gm in 1962 [1] to about 0.13gm in the current production technology. Following Dennard's constantfield scaling law [85], gate oxide thickness and power supply voltage need to be scaled accordingly. Oxide thickness is scaled down to about 3.0nm in production technologies while more aggressive scaling to below 1.5nm has been pursued in research and development establishments [8687] which is limited by oxide tunneling currents. Power supply voltage is limited by the MOST threshold voltage to about 1.0V. At such values of oxide thickness and power supply voltage, the shape of the potential barrier for tunneling is trapezoidal rather than triangle, and gate oxide tunneling could become a limiting factor in MOST offstate power dissipation. Also, tunneling current hinders transistor parameter extraction by traditional measurement techniques such as capacitancevoltage method [10,13,88]. Accurate modeling of trapezoidal tunneling through ultrathin (<3.0nm) oxide is needed in new transistor technology development. Tunneling through a trapezoidal SiO2 barrier has been modeled for conduction band electron tunneling from nMOST inversion layers [8992] and from pMOST accumulation layers [93,94]. When the silicon surface is strongly inverted or strongly accumulated, electrons at the Si/SiO2 interface are confined by the surface electric field on the silicon side and the 3.13eV potential barrier on the SiO2 side. Due to the finite probability of tunneling through the SiO2 barrier, electrons are in quasibound states. Full quantum mechanical models compute the tunneling current by solving the lifetime of the quasibound state [89,91,93], which is computationally demanding and not suitable for compact modeling. A comparative study of quantum mechanical and classical modeling, however, reveals similar results in tunneling currentvoltage characteristics [93]. This maybe due to the two quantum mechanical effects that act against each other as far as tunneling current is concerned: (1) energy quantization gives a ground state energy above the silicon conduction band minimum which reduces the effective barrier height, and (2) the centroid of electron distribution in the surface layer moves away from the Si/SiO2 interface which increases 'tunneling distance'. Analytical approximations to evaluate lifetimes [92,94], however, render the tunneling current as a function of oxide electric field and oxide thickness only. Those results give zero tunneling current at zero oxide electric field rather than at the zero gate voltage, which is inaccurate for any MOST structures that has work function difference between gate and substrate materials. We will develop a compact tunneling current model, which is applicable to the full gate voltage range for both nMOSTs and pMOSTs. The model will treat conduction band electrons, valence band electrons and valence band holes on equal basis. The latter is indispensable to describe the tunneling currents in the inversion range of a p+gate pMOST. Carrier concentrations in silicon layers will be taken into account both explicitly and implicitly, the latter through the gatevoltage vs. oxide field relationship, and tunneling in both directions will be included. This will allow an accurate comparison of relative importance of various energetic tunneling pathways and geometric tunneling pathways in MOSTs at low gate voltages. We will correlate the model to experimental data and explore its utility for transistor parameter extraction. 4.3 Theory of Tunneling in MOS Structures In deriving our tunneling current formula, we follow Bardeen's transition probability approach [59] and Harrison's independentparticle tunneling model [60]. The probability per unit time of transition for an electron in state a on one side of the tunneling barrier to state 3 on the other side is described by Fermi's golden rule: Pa = (27/h) Map 2 Ppfa(lf) (4.1) Ma0 is the matrix element to be evaluated between the two states a and 1 in the tunneling region where M is proportional to the current density operator as shown by Bardeen [59]. pp is the density of states at 1, and fa and f1 are occupation probabilities of the two states respectively. The net tunneling current density is derived by summing over all allowed states a and subtracting the reverse tunneling current under the constraint of transverse momentum (kt) conservation [60]: 47rq J IM a12 PaP(faf) dE (4.2) h kt 0 The additional factor 2 accounts for spin degeneracy, q is the charge of an electron and zero to Em represents allowed energy range for tunneling. The summation over transverse momentum can be converted to integrals if the electrons are free to move in the transverse directions: I  1/(2nt)2dkyfdkz. The double integration over transverse momentum can be carried out explicitly for the Fermi functions (faf.). The matrix element can be evaluated if the wavefunctions inside the tunneling barrier for state a and 0 are written in terms of WKB approximations. The result is the familiar exponential WKB tunneling probability. Figure 4.1 shows an energy band diagram of a Si/SiO2/Si trapezoidal barrier. The Si/SiO2 conduction band and valence band offsets are denoted by OBn and OBp respectively. The initial state on the right side of the barrier with kinetic energy El and wavefunction Ygs tunnels to the final state on the left side with kinetic energy E2 and wavefunction TS2. At the two abrupt boundaries, x=0 and x=Xox, both Y and (1/ms)aY/aX must be continuous to conserve electron flux. Wavefunction matching of Ysl at x=0, and Ys2 at x=Xox results in an electron kinetic energy dependent preexponential factor. Applying the above for electron tunneling through Si/SiO2/Si structure (see Appendix for detailed analysis), we derive the following tunneling current formula for a single ellipsoid conduction band subvalley in the silicon: 4tnqmdkT 0Bn JN = 3 J0 To(E) exp[2 (Ex)] X le 1+exp[ (EFEcEx) /kT] dE 3) x loge dEx ( 4.3 ) l+exp [ (EFEcExqVGB) /kT] md is the densityofstates effective mass of the subvalley, Ex=(EEc)Et is the electron kinetic energy in the tunneling direction x, EF is the Fermi energy, EC is the OBn Ev OBp Si Si02 Si Xox 0 Fig. 4.1 Trapezoidal barrier for electron tunneling in a Si/SiO2/Si structure. Electron wavefunctions of the initial and final states are denoted by 'Ps and 'S2 respectively. Boundary conditions at x=0 and x=Xox must be satisfied to conserve electron flux across the two abrupt boundaries. conduction band minimum in the semiconductor near the tunneling boundary. To(Ex) and u(Ex) are the preexponential factor and the exponent of the WKB tunneling probability respectively to be described as follows in conjunction with figure 4.1. 16 To(Ex) = mxklx(0) mslKox (0) xk2(OX ms2Kox(Xox) + + I slKox() moxkl (0) 2Kx(Xox) moxk2x(Xox) (4.4) and Xox v(Ex) = K (x)dx .0 (4.5) msi (i=l, 2) are the normal effective mass in the two silicon regions, and mox is the tunneling effective mass in the SiO2 layer with two boundaries at x=0 and x=Xox respectively. klx(0) and k2x(Xox) are real wave numbers at the silicon side of the boundaries, while K(O) and K(Xox) are imaginary wave numbers at the SiO2 side of the boundaries. Assuming parabolic conduction band of SiO2 and extending the dispersion relationship analytically into the energy gap, we have the traditional expression for K, which is: K(x) = [2mox(~ nqEoxEx)] 1/2/) (4.6) Eox is the electric field inside SiO2 and is constant for a trapezoidal barrier. We will include some discussions to the above formulas (4.3) to (4.6) in the following paragraphs. The WKB approximation is valid when the de Broglie wavelength (X) of the electron (or its imaginary analogue inside the barrier) is much smaller than the characteristic length over which the potential varies appreciably [95]. For the Si/SiO2 electron barrier, X can be estimated as follows: 1 h S= = = 1.5A K (2mox B)1/2 (4.7) This result shows that the WKB approximation should be valid for oxide thickness as thin as 1015A which is already 610 times larger than the (imaginary) electron wavelength. The preexponential factor To(Ex) of (4.4) is valid for trapezoidal barrier only in which both boundaries are abrupt. This kineticenergy dependent factor plays an important role in explaining the gate voltage dependence of thin oxide tunnel data as will be shown later. It gives the largest correction near the flatband voltage as compared to the traditional unity preexponent. Equation (4.4) is symmetric to the two silicon layers, which is consistent with the notion that the tunneling probability of a trapezoidal barrier is independent of the tunneling direction. In the triangular barrier range, only an approximate form of preexponential factor can be derived (see Appendix). A similar factor was used by Krieger and Swanson [68]. As it does not affect the gate voltage dependence of tunneling current, we simply use To=1 in the triangular barrier range. The band structures of SiO2 was studied by Li and Ching [96]. However, the exact dispersion relationship in the wide energy gap of SiO2 is not known. We use the simplest parabolic band approximation in (6). The empirical Franztype dispersion relationship has been used by several authors [92,94], which treated the conduction band barrier and valence band barrier on the same footing. However, it assumed equal effective masses near the valence band edge and near the conduction band edge, i.e., mcb=mvb. This is not supported by theoretical band structure calculations [96] that showed a much smaller curvature near the valence band edge (mvb>mcb). Using the form suggested by Freeman and Dahlke [97], a more appropriate empirical E(k) relationship in the energy gap is: K2(Ex) = Kb2 (E)+Kvb2 (E) = h2/[2mcb (BqEoxXEx) ] +2/{2mvb[Eg (0BqEoxXEx) ] (4.8) where Eg=8.5eV is the energy gap of SiO2. Equation (4.8), however, does not yield an analytical solution for the tunneling probability. Since mvb is much larger than mcb, it would be a better approximation by simply dropping the second term on the R.H.S. of (4.8) (the parabolic band approximation) than retaining both terms and making mvb=mcb (Frantztype dispersion relationship). It would be straightforward to prove that the equation (3.3) reduces to the classical FowlerNordheim formula under these conditions: (1) low temperature: T0, (2) highly degenerate ntype surface layer: EEc>kT (3) triangular barrier and (4) unity preexponential factor: To(Ex)=I. The classical FN formula predicts that a semilog plot of JFN/Eox vs. 1/Eox is a straight line: JFN = aEox exp(P/Eox) (4.9) a = q3md/ (16;r2 moxB) P = 4(2moxOB3)1/2/(3qh) The total conduction band electron tunneling current is obtained by summing over contributions from all six conduction band subvalleys of silicon. The result 
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